JPH1146122A - Switching power amplifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To unnecessitate to differentiate edges of a drive signal, to drastically reduce loss and to perform efficient amplification by inserting an inductive element between an outputting stage and ground and utilize counter- electromotive force that occurs when one transistor is turned off to make inter- terminal voltage of the transistor 0 V when the other transistor performs the on-operation. SOLUTION: A condenser 10 and an inductor 11 are connected between an outputting stage and ground in order to compensate loss for an inclined part. For instance, when a field-effect transistor 6 is turned on and a field-effect transistor 7 is turned off, current flow into the inductor 11 through the transistor 6 and the condenser 10. Here, when the transistor 6 is turned off, counter- electromotive force occurs in the inductor 11, voltage between its drain and source is made 0 V before the transistor 7 performs an on-operation and after that, the transistor 7 performs the on-operation. This makes it possible to perform a switching operation with both the transistors 6 and 7 at 0 V between their drains and sources.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a push-pull switching power amplifier circuit.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram showing an example of a single-ended push-pull type switching power amplifier circuit using an FET as an amplifier element, which is used for a power amplifier of a medium-wave broadcasting device or the like. Is shown. 3, 1 is a transformer, 2 and 4 are resistors, 3 and 5 are capacitors, 6 and 7 are field effect transistors (FETs), 8 is a capacitor for cutting a direct current component, 9 is a load resistor, 1
Reference numerals 2 and 13 denote diodes.

The operation of this type of amplifying circuit is well known, and the description of the operation is omitted. However, as a method of reducing the loss due to dull rising and falling edges of the drive signal, the gates of the FETs 6 and 7 are reduced. Are connected in parallel with the resistor 2 and the capacitor 3 and the resistor 4 and the capacitor 5, respectively, as shown in waveforms (A) and (B) of FIG.
Differentiating the rising and falling edges, FET
6 and 7 are driven to obtain an output waveform (C).

[0004]

In the conventional power amplifier circuit as described above, as shown in the waveform (C) of FIG. 4, the ON and OFF times of the output waveform can be made close to 0, and the loss due to the slope can be reduced. Although it is possible to prevent it, there are the following problems. That is, it is necessary to match the values of the resistor 2 and the capacitor 3, the resistor 4 and the capacitor 5 with the characteristics of the field effect transistors 6 and 7. Further, in order to reduce the slope time of the output waveform, it is necessary to excessively drive the gates of the field effect transistors 6 and 7, but in this case, the time when the field effect transistors 6 and 7 are simultaneously turned on occurs. The waveform overlaps as shown in waveform (D) of FIG. Therefore, the power supply is short-circuited for this time, and a short-circuit current as shown in waveform (E) of FIG. 4 flows through the field-effect transistors 6 and 7, resulting in a large power loss in the field-effect transistors. There were problems such as becoming.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and there is no need to differentiate the edge of a drive signal. It is intended to provide.

[0006]

SUMMARY OF THE INVENTION A switching power amplifier circuit according to the present invention is a single-ended push-pull switching power amplifier circuit using a transistor as an amplifying element. An element is inserted, and a voltage between terminals of this transistor is set to 0 V when the other transistor performs an ON operation by using a back electromotive force generated in the inductive element when one transistor is turned off. .

Further, in a single-end push-pull type switching power amplifier circuit using an FET (field effect transistor) or SIT (static induction transistor) as an amplifying element, an inductive element is provided between an output stage and ground. Is inserted, and the other FET or the other FET is used by utilizing the back electromotive force generated in the inductive element when the SIT is turned off.
Or, when SIT performs ON operation, this FET or SI
A feature is that the source-drain voltage of T is set to 0V.

Further, a capacitive element for blocking direct current is inserted before the inductive element. With the switching power amplifier circuit of the present invention having the above-described configuration, dull drive signals can be compensated and short-circuit current can be prevented.

[0009]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a transformer, reference numerals 2 and 4 denote resistors, reference numerals 6 and 7 denote field effect transistors (FETs), and reference numeral 8 denotes a DC component for cutting a DC component. Capacitor, 9 is load resistance,
10 is a capacitor (capacitive element) for cutting the DC component, 11 is an inductor (inductive element), 12,
13 is a diode. That is, unlike the conventional circuit shown in FIG. 3, a circuit for differentiating the rising and falling edges of the drive signal is not provided in the stage preceding the gate of the field effect transistor, and a capacitor and an inductor are connected between the output stage and the ground. It has a configuration in which circuits connected in series are inserted.

Next, the operation will be described. The rising and falling edges of the drive signal are shown in FIGS.
When there is no circuit of the capacitor 10 and the inductor 11, the waveform of the output stage C repeats ON and OFF at the switching speed of the FET, as shown in the waveform (C) of FIG. , The loss of the slope occurs.

In order to prevent this, the circuit of the present invention uses a capacitor 10 and an inductor 1 between the output stage and ground.
1 is connected to compensate for the loss of the slope. For example, when the field effect transistor 6 is on and the field effect transistor 7 is off, current flows into the inductor 11 via the transistor 6 and the capacitor 10. In this state, when the transistor 6 is turned off, a counter electromotive force is generated in the inductor 11, and the drain of the transistor 7 is turned off before the transistor 7 performs the ON operation.
The voltage between the sources is set to 0 V, and then the transistor 7
N operations are performed.

Conversely, when the transistor 7 is ON and the transistor 6 is OFF, the capacitor 1
0, a current flows from the inductor 11 via the transistor 7. In this state, when the transistor 7 is turned off, a back electromotive force is generated in the inductor 11, the voltage between the drain and the source of the transistor 6 is set to 0 V before the transistor 6 performs the ON operation, and then the transistor 6 performs the ON operation. The apparent output waveform is shown in FIG.
It is shaped as in (D).

As described above, in the configuration of the present embodiment, the switching operation can be performed when the voltage between the drain and the source of each of the transistors 6 and 7 is 0 V, which is indicated by the black waveform in FIG. Loss due to such inclination can be reduced.

In the above-described embodiment, the configuration using the FET as the device of the amplifying element has been described. However, it is needless to say that the configuration can be implemented using a general transistor such as an SIT (static induction transistor) or a bipolar transistor. When a bipolar transistor is used, both transistors 6 and 7 can perform a switching operation when the voltage between the emitter and the collector is 0V.

[0015]

As described above, the switching power amplifier circuit of the present invention does not need to adjust the differential value of the gate drive for each device, which is a drawback of the conventional circuit, and uses a constant resistance value for the gate resistance. Circuit design can be easily performed. In addition, since it is not necessary to drive excessively, there is no short-circuit current due to overlapping of waveforms at the output stage, and significant loss reduction can be achieved. Furthermore, if the device is O
Since the voltage applied to the device when performing N operation is 0 V, loss due to tilt can be significantly reduced irrespective of the operating voltage, and a highly efficient circuit can be obtained. Has the effect.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a waveform chart showing waveforms at various parts of the circuit shown in FIG.

FIG. 3 is a block diagram showing an example of such a conventional circuit.

FIG. 4 is a waveform chart showing waveforms at various parts of the circuit shown in FIG. 3;

[Explanation of symbols]

 Reference Signs List 1 transformer 2, 4 resistor 3, 5 capacitor 6, 7 field effect transistor (FET) 8 capacitor 9 load resistor 10 capacitor (capacitive element) 11 inductor (inductive element) 12, 13 diode

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masahisa Raw Rock 2-2-1 Jinnan, Shibuya-ku, Tokyo Inside the Japan Broadcasting Corporation Broadcasting Center (72) Masahiko Yamazoe 2-2-2 Jinnan, Shibuya-ku, Tokyo No. 1 Inside the Japan Broadcasting Corporation Broadcasting Center (72) Inventor Ikuji Fujitani 2-2-1 Jinnan, Shibuya-ku, Tokyo Inside the Japan Broadcasting Corporation Broadcasting Center

Claims (3)

[Claims] In a single-ended push-pull switching power amplifier circuit using a transistor as an amplifying element, an inductive element is inserted between its output stage and ground, and said inductive element is turned off when one transistor is turned off. A switching power amplifier circuit characterized in that a voltage between terminals of the other transistor is set to 0 V when the other transistor performs an ON operation by using a back electromotive force generated in the element. 2. A single-ended push-pull type switching power amplifier circuit using an FET (Field Effect Transistor) or SIT (Static Induction Transistor) as an amplifying element, wherein an inductive element is provided between its output stage and ground. Is inserted, and the source-drain voltage of this FET or SIT is reduced to 0 V when the other FET or SIT performs an ON operation by using the back electromotive force generated in the inductive element when one FET or SIT is turned off. A switching power amplifier circuit characterized by the following configuration. 3. The switching power amplifier circuit according to claim 1, wherein a capacitive element for blocking direct current is inserted before the inductive element.