JP3508965B2 - Switch element drive circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a drive circuit for a switch element used in a switching power supply circuit, an inverter circuit or the like.

[0002]

2. Description of the Related Art In a conventional switching element drive circuit, as shown in FIG. 4, the emitters of two NPN transistors 10 and the collectors of NPN transistors 11 are connected in series, and the connection points of these emitters and collectors are connected. As shown in FIG. 5, the totem pole circuit 12 that outputs a signal from
There is a complementary circuit 15 that outputs a signal from a common emitter by combining an NPN transistor 13 and a PNP transistor 14, and each has the following characteristics.

The totem pole circuit 12 shown in FIG.
Does not use a common base, but connects an inverter circuit 16 that inverts a signal to either one to alternately turn on / off the two NPN transistors 10 and 11. However, since the inverter circuit 16 is necessary, Many are used as internal circuits of ICs, and few are used as drive circuits near switch elements.

The complementary circuit 15 shown in FIG.
Is a PNP transistor 14 and an NPN transistor 13
Therefore, the base circuit can be shared and driven by the same control signal.
Base-emitter saturation voltage Vbe (sa
If t) is not adjusted, the two may be turned on at the same time and a through current may flow.

As an example of the step-up chopper circuit of FIG. 6 using the complementary circuit 15 as a drive circuit used near the switch element, the control circuit 23 adjusts the output voltage to the base of the transistor 22 to stabilize it. When the duty ratio control signal is applied, when the pulse is at a low level (hereinafter referred to as L), the transistor 22 is turned off, and the drive voltage Vd forward biases the NPN transistor 13 by the resistor 20 to turn it on (at the same time, the PNP is turned on).
Transistor 14 is reverse biased off and), resistor 18
The gate charge of the switch element 24 is charged via the switch to turn on.

On the contrary, when the pulse from the control circuit 23 is at a high level (hereinafter referred to as H), the transistor 22 is turned on and the base terminals of the NPN transistor 13 and the PNP transistor 14 are turned to L, so that the PNP transistor 14 is turned on. (At this time, NPN transistor 1
3 is off), diode 19 in parallel with resistor 18
The gate charge of the switch element 24 is discharged via the switch.

The output voltage detected by being divided by the resistors 33 and 34 is fed back to the control circuit 23.
Outputs a duty ratio control signal proportional to the output voltage, the switch element 24 is turned on and off by the above-described operation, and when the switch element 24 is turned on, the input voltage is changed to the inductance element 25 and the switch element 24. And short-circuit with to store energy in the inductance element 25,
The energy stored in the inductance element 25 when the switch element 24 is turned off is rectified by the diode 26 and smoothed by the capacitor 29 to boost and stabilize the output voltage.

In FIG. 6, 27 and 29 are input and output capacitors, respectively, and a resistor 30 and a capacitor 28 form a drive power supply circuit 31. A protection resistor 32 is connected to the gate of the switch element 24.

[0009]

In the conventional complementary circuit 15 shown in FIG. 5, the H signal of the control circuit 23 turns on the transistor 22 and the PNP transistor 14, and the forward voltage drop VF of the diode 19 and the PNP transistor 14 are turned on. Base-emitter saturation voltage Vbe (s
at) and the collector-emitter saturation voltage Vce (sat) of the transistor 22 are added, and this is supplied between the gate and source of the switch element 24. For this reason, as shown in FIG. 7, a voltage remains at the gate terminal of the switch element 24, and depending on the variation in the gate threshold voltage Vth of the switch element 24, the switch element 24 cannot be turned off, and the circuit may be damaged.

According to the present invention, the gate-source voltage (or base
It is an object of the present invention to provide a circuit capable of reliably driving a switch element by lowering the voltage between emitters).

[0011]

According to the present invention, a driving power source is connected to a collector of an NPN transistor 13, a resistor 20 is connected between a base and a collector, and a diode 36 is connected in antiparallel between a base and an emitter. The gate of the switch element 24 to be driven is connected to the emitter through the resistor 18, the drain of the N-channel FET 35 is connected to the base, the source of the N-channel FET 35 is grounded to the drive power source, and the switch element is connected. 24
Is connected to the drain of the N-channel FET 35 via a diode 19 for extracting the gate charge of the switch element 24.
Is a drive circuit for a switch element, which is a Schottky barrier diode.

[0012]

When the applied pulse is L, N channel FE
T35 is turned off, the drive voltage Vd forward biases the NPN transistor 13 by the resistor 20 to turn it on, the gate of the switch element 24 is turned on via the resistor 18, and the gate charge of the switch element is charged via the resistor 18. do it,
The switch element 24 is driven. On the contrary, when the H signal is applied, the N-channel FET 35 is turned on, and the gate of the switch element 24 is directly discharged through the diode 19, but the voltage waveform shows the forward voltage drop VF and N of the diode 19. The sum of the drain-source saturation voltage Vds (sat) of the channel FET 35 drops to the sum voltage, and the switch element 24 is surely turned off.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an embodiment of the basic circuit of the present invention will be described with reference to FIG. Normally, an enhancement-type N-channel FET used for a switch element has a drive voltage Vd with respect to a gate threshold voltage Vth as shown in the following equation.
A drain current Id obtained by multiplying the voltage of the difference with the forward admittance Yfs can be passed. Id = (Vd−Vth) × Yfs

Particularly in a battery-driven DC / DC converter or the like, in order to reduce the drive power of the switch element and improve the overall efficiency, the switching operation is performed even if the drive voltage Vd is low, that is, the so-called F having a low gate threshold voltage Vth.
ET has been developed, and in a drive type of 4V or the like, the gate threshold voltage Vth is as low as about 1V, and it is necessary to make the gate-source voltage as low as possible and approach 0V in order to completely turn it off.

Further, the gate threshold voltage Vth of the N-channel FET 35 has a negative temperature coefficient and is generally about -10 mV / ° C. It is difficult to turn it off.

In the conventional complementary drive circuit shown in FIG. 5, since the transistor 14 discharges the gate of the switch element 24 connected to the output terminal 21 by using the PNP type as described above, the diode 19 of the diode 19 is discharged. The forward voltage drop VF, the base-emitter saturation voltage Vbe (sat) of the PNP transistor 14 and the collector-emitter saturation voltage Vce (sat) of the transistor 22 are added, and this is supplied between the gate and source of the switch element 24. To be done.

On the other hand, according to the present invention, as shown in FIG.
N-channel FET 35 (or NPN transistor 3
7), the base-emitter saturation voltage Vbe (sat) resulting from the PNP transistor 14 is used.
The problem is solved by reducing the voltage drop corresponding to.

That is, a driving power supply is connected to the collector of the NPN transistor 13, a resistor 20 is connected between the base and collector of the NPN transistor 13, and a diode 36 is connected between the base and emitter of the NPN transistor 13 in antiparallel. The gate of the switch element to be driven is connected to the output terminal 21 via the resistor 18, the emitter of the NPN transistor 13 is connected, and the drain of the N-channel FET 35 is connected to the base of the NPN transistor 13.
The source of the N-channel FET 35 is grounded to the driving power source, and the diode 19 which is a Schottky barrier diode for extracting the gate charge of the switching element between the gate of the switching element to be driven and the drain of the N-channel FET 35. It is a drive circuit of the switch element connected via.

In the drive circuit shown in FIG. 1, when an L signal is applied to the N channel FET 35 from the input terminal 17, the N channel FET 35 is turned off. When the N-channel FET 35 is turned off, the NPN transistor 13 is forward biased by the drive voltage Vd via the resistor 20 to be turned on, and the gate charge of the switch element is charged via the resistor 18 to drive the switch element 24. To be done. This is similar to the conventional circuit shown in FIG.

On the contrary, when an H signal is applied to the N-channel FET 35, the N-channel FET 35 is turned on and the gate charge of the switch element is directly discharged through the diode 19, but the diode 19 and the N-channel FET 35 are discharged. Drain-source saturation voltage Vds (sa
It falls to the total voltage of t). Since the drain-source saturation voltage Vds (sat) is low, the gate voltage of the switch element is lower than in the conventional case, and the switch element can be driven reliably.

Next, an example of a boost chopper circuit using the drive circuit according to the present invention will be described with reference to FIG. Input terminal 3
A capacitor 27 is connected between 8 and 39, a drive power supply circuit 31 including a capacitor 28 and a resistor 30 is connected, a control circuit 23 is connected between both ends of the capacitor 28, and an output side of the control circuit 23 is connected. The drive circuit 9 for the switch element according to the present invention is connected to the terminal 17. A switch element 24 composed of an N-channel FET is connected to the output terminal 21 of the drive circuit 9 for this switch element, and a protection resistor 3 is provided between the gate of the switch element 24 and the negative side of the power supply.
2 is connected.

In addition, the inductance element 25, the diode 26, the capacitor 29, the resistor 33, and the resistor 34 are the same as those in the conventional circuit. Both ends of the resistor 33 and the resistor 34 are connected to the output terminals 40 and 41, and the resistor 33 is also provided. And resistance 34
The connection point of is connected to the control circuit 23.

The operation of the boost chopper circuit configured as shown in FIG. 2 will be described above. The pulse controlled by the control circuit 23 to stabilize the output voltage is N-channel F.
Applied to the gate of ET35. When the pulse is L, the N-channel FET 35 is turned off, the drive voltage Vd is forward biased to the NPN transistor 13 by the resistor 20 and turned on, the gate of the switch element 24 is turned on via the resistor 18, and the resistor 18 is turned on. The switch element 24 is driven by charging the gate charge of the switch element. this is,
This is similar to the conventional circuit shown in FIG.

On the contrary, when the H signal is applied to the N-channel FET 35, the N-channel FET 35 is turned on and the gate of the switch element 24 is directly discharged through the diode 19, but the voltage waveform shown in FIG. Forward voltage drop VF of diode 19 and N channel FET
The sum of the drain-source saturation voltage Vds (sat) of Vds (sat) 35 is reduced, and the switch element 24 is reliably turned off.

As described above, since the transistor 35 is an N-channel FET, the drain-source saturation voltage Vds (sat) is low, and the gate voltage when the switch element 24 is turned off is lower than that of the conventional one.
The switch element 24 can be driven reliably without being affected by variations in the gate threshold voltage Vth of the switch element 24.

The control circuit 23 stabilizes the output voltage.
In accordance with the duty ratio control signal adjusted by
Is driven. Then, when the switch element 24 is turned on, the input voltage changes to the inductance element 25 and the switch element 24.
Is short-circuited and the energy is stored in the inductance element 25. When the switch element 24 is turned off, the energy stored in the inductance element 25 is transferred to the diode 2
6 is rectified and smoothed by the capacitor 29 to boost and stabilize the output voltage.

The diode 36 connected in anti-parallel between the base and the emitter of the NPN transistor 13 is a circuit which makes the NPN transistor 13 conductive in an unsaturated state, reduces excess carriers in the base, and turns off quickly. . The other parts have the same operation as in FIG.

In the above embodiment, the N-channel FET is used as the transistor 35, but the present invention is not limited to this, and the NPN transistor 37 may be used. As described above, also in the case of the NPN transistor 37, as in the case of the N-channel FET 35, the collector-emitter saturation voltage Vce (sat) is low, and the gate voltage of the switch element 24 becomes lower than that of the conventional one.
The switching element 24 can be driven reliably without being affected by variations in the gate threshold voltage Vth of No. 4 and the like.

[0029]

【The invention's effect】

(1) Since the switch element drive circuit of the present invention is configured as described above, it is possible to lower the gate-source voltage when the switch element 24 is turned off, and to reliably stabilize the switch element 24. Can be operated.

(2) The switch element driving circuit according to the present invention can be used not only in the boost chopper circuit as shown in the embodiment but also in the enhancement type N-channel F.
It can be widely applied to, for example, a drive circuit of a motor or a solenoid using ET.

[Brief description of drawings]

FIG. 1 is an electric circuit showing an embodiment of a switch element drive circuit according to the present invention.

FIG. 2 is an electric circuit showing an embodiment in which the switch element drive circuit according to the present invention is applied as a boost chopper circuit.

FIG. 3 is a voltage waveform diagram of a switch element drive circuit according to the present invention.

FIG. 4 is a conventional totem pole circuit diagram.

FIG. 5 is a conventional complementary circuit diagram.

FIG. 6 is a conventional boost chopper circuit diagram.

FIG. 7 is a voltage waveform diagram of a conventional switch element drive circuit.

[Explanation of symbols]

9 ... Switching element drive circuit, 10 ... NPN transistor, 11 ... NPN transistor, 12 ... Totem pole circuit, 13 ... NPN transistor, 14 ... PNP transistor, 15 ... Complementary circuit, 16 ... Inverter circuit, 17 ... Input terminal, 18 ... Resistance, 19 ... diode, 20 ... resistance, 21 ... output terminal, 22 ... transistor, 23 ... control circuit, 24 ... switch element, 25 ... inductance element, 26 ... diode, 27 ... condenser, 28 ... condenser, 29 ... condenser, 30 ... Resistor, 31 ... Driving power supply circuit, 32 ... Resistor, 33 ... Resistor, 3
4 ... Resistor, 35 ... N-channel FET, 36 ... Diode, 37 ... NPN transistor, 38 ... Input terminal, 39
... input terminal, 40 ... output terminal, 41 ... output terminal, 42 ...
resistance.

Claims (4)

(57) [Claims] 1. A driving power source is connected to a collector of an NPN transistor 13, and a resistor 20 is connected between a base and a collector.
, The diode 36 is connected between the base and the emitter in antiparallel, the gate of the switch element 24 to be driven is connected to the emitter via the resistor 18, and the drain of the N-channel FET 35 is connected to the base. The source of the N-channel FET 35 is grounded to the driving power source, and the gate of the switch element 24 and the drain of the N-channel FET 35 are connected via a diode 19 for extracting the gate charge of the switch element 24. A drive circuit for a switch element characterized by the above. 2. The diode 1 interposed between the gate of the switch element 24 and the drain of the N-channel FET 35.
9. The switch element drive circuit according to claim 1, wherein 9 is a Schottky barrier diode. 3. A driving power source is connected to a collector of the NPN transistor 13, and a resistor 20 is connected between the base and the collector.
, A diode 36 is connected in antiparallel between the base and the emitter, the gate of the switch element 24 to be driven is connected to the emitter via the resistor 18, and the collector of the NPN transistor 37 is connected to the base. , This NP
The emitter of the N-transistor 37 is grounded to the driving power source, and the switch element 24 is connected between the gate of the switch element 24 and the collector of the NPN transistor 37.
A drive circuit for a switch element, which is connected through a diode 19 for extracting the gate charge of the switch element. 4. The diode 1 interposed between the gate of the switch element 24 and the collector of the NPN transistor 37.
4. The switch element drive circuit according to claim 3, wherein 9 is a Schottky barrier diode.