JPH1143393A - Silicon single crystal wafer and its production - Google Patents

Abstract

PROBLEM TO BE SOLVED: To produce excellent withstand voltage characteristics of an oxide film by regulating the density of crystal originated particles(COP) having a specific size or above of a silicon single crystal, produced by a Czochralski method and measured with a surface foreign material meter to a specific number or below over the whole surface and the dislocation cluster density to a specific value or below. SOLUTION: This silicon single crystal wafer is obtained by regulating the density of COP having >=0.11 μm size measured by a surface foreign matter meter to <=104 particles/cm<3> over the whole surface of the wafer and the dislocation cluster density to <=200 clusters/cm<3> over the whole surface of the wafer and is a silicon single crystal prepared by growing a crystal under conditions so as to provide <=0.8 mm/min crystal growth rate and further growing the crystal under conditions so as to afford <=0.15 mm<2> / deg.C.min V/G when the crystal growth rate is V mm/min and the crystallization temperature gradient in the interface between a silicon melt and the crystal is G deg.C/mm. The cooling rate in a region from the melting point of the silicon to 1,200 deg.C when growing the crystal is preferably <=1 deg.C/min.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a silicon single crystal,
More particularly, the present invention relates to a silicon wafer of excellent quality in oxide film breakdown voltage characteristics and pn junction leak characteristics, and a method of manufacturing the same.

[0002]

2. Description of the Related Art A silicon single crystal wafer manufactured by the Czochralski method used as a substrate of a highly integrated MOS device has a high quality that does not adversely affect device characteristics such as an oxide film breakdown voltage characteristic and a pn junction leak characteristic. Quality crystals are required.

[0003] In recent years, it has become clear that crystal defects that deteriorate the initial dielectric breakdown characteristics (TZDB characteristics) of the oxide film breakdown voltage characteristics are present in the silicon single crystal immediately after crystal growth. These crystal defects are detected by, for example, a selective etching method, cleaning of an ammonia-based wafer, or a crystal defect evaluation method using infrared scattering / infrared interference, and are generally referred to as grown-in defects. In particular, those in which grown-in defects became apparent as etch pits on the surface after cleaning of ammonia-based wafers were identified as COP (Crystal Originated Partially).
cle) (J. Ryuta, E. Morita, T. Tanaka
and Y. Shimanuki, Jpn. J. Appl. Phys. 29, L1947 (19
90)).

As a method for producing a crystal for reducing grown-in defects such as COP, there is disclosed, for example, Japanese Patent Application Laid-Open No. 2-267169.
In the crystal growing method characterized in that the crystal growth rate is 0.8 mm / min or less as specified in Japanese Patent Publication No. 5, the crystal has a small number of grown-in defects as described above and has excellent initial dielectric breakdown characteristics. Can be manufactured. In addition, JP-A-7-25
A crystal growth method characterized in that the ratio of the crystal growth rate [mm / min] to the crystal temperature gradient [° C./mm] at the silicon melt-crystal interface is not more than a certain value as specified in JP 7991 , A similar crystal can be produced.

In these crystals, a ring-shaped OSF (oxidation-induced stacking fault) distribution region generated when an oxidation heat treatment is performed at a temperature of 950 ° C. or higher (M. Hasebe S. Shinoyama, S. Naito,
Ring-likely distributed stacking faults in CZ-Si w
afers. K. Sumino, Eds., Defectcontrol in Semicondu
ctors (Elsevier Science Publishers BV, 1990), vo
Since lI) disappears at the center of the wafer, and the region outside the ring-shaped OSF distribution with few grown-in defects is spread over the entire surface of the wafer, the crystal has excellent initial dielectric breakdown characteristics.

[0006]

However, the ring-shaped OSF
Although the outer region of the distribution has a lower density than the grown-in defect, there are dislocation clusters with a density of about 10 ³ / cm ³ (H. Takeno et al. Mat. Res. Soc. Symp. . Proc.
vol. 262,1992). Such crystal defects are detected, for example, by an evaluation method using X-ray topography and secco etching. Looking at the depth distribution of oxygen precipitates (the relationship between the depth from the wafer surface and the defect density) generated when a mirror wafer cut from the ingot was subjected to a heat treatment equivalent to the device process, the wafer was found to be in the region inside the ring OSF region. The so-called DZ (Denud) where the precipitate density decreases near the surface
ed Zone) layer, whereas high-density oxygen precipitates are generated near the wafer surface outside the ring-shaped OSF distribution (Nakai et al. The 42nd Spring Meeting of the Japan Society of Applied Physics, p198, 1995). Such crystal defects are, for example, angle polishing +
Light etching, infrared tomography, infrared interferometry (OPP; O
It is detected by a crystal defect evaluation method using ptical precipitate profiler). Such dislocation clusters or oxygen precipitates near the surface adversely affect the pn junction leakage characteristics.

The present invention eliminates the above-mentioned adverse effects on the device characteristics due to crystal defects, thereby providing a silicon single crystal having excellent oxide film breakdown voltage characteristics and excellent pn junction leakage characteristics, and a silicon single crystal having the same. It is intended to provide a method for producing such a silicon single crystal.

[0008]

The present inventors have investigated the relationship between the state of COP, dislocation clusters, and oxygen precipitates in various crystals and the device characteristics, and have found that the density of these defects existing in the crystals is small. It has been found that reducing the amount is effective in producing a crystal having excellent device characteristics.
Furthermore, as a result of detailed examination of the relationship between growth conditions and crystal defects, the density of dislocation clusters and oxygen precipitates was reduced, and pn
The present inventors have found thermal hysteresis conditions under which a crystal having excellent junction leak characteristics can be grown, and completed the present invention.

That is, the present invention provides (1) a silicon single crystal produced by the Czochralski method, wherein the density of COP is 10 ⁴ / cm ³ or less over the entire surface of the wafer and the dislocation cluster density is over the entire surface of the wafer. A silicon single crystal wafer characterized by being 200 or less per cm ³ ,
(2) In a silicon single crystal manufactured by the Czochralski method, a silicon single crystal grown under conditions such that the crystal growth rate is 0.8 mm / min or less, and the dislocation cluster density is 200 over the entire surface of the wafer. (3) a silicon single crystal wafer characterized by being not more than ³ pieces / cm ³
In a silicon single crystal manufactured by the Czochralski method, when the crystal growth rate is V [mm / min] and the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / mm], V / G is 0.1
A silicon single crystal obtained by growing a crystal under a condition of not more than 5 [mm ² / ° C. · min], wherein the dislocation cluster density is not more than 200 / cm ³ over the entire surface of the wafer. Wafers, (4) In the method of manufacturing a silicon single crystal by the Czochralski method, in the method of growing a crystal at a crystal growth rate of 0.8 mm / min or less, and a cooling rate from the melting point of silicon during crystal growth to 1200 ° C. 1
° C. / min or less, the method for producing a silicon single crystal wafer, characterized by (5) a method for producing a silicon single crystal by the Czochralski method, the crystal growth rate is 0.
A crystal is grown at 8 mm / min or less, and 10
Cooling rate 0.5 ° C in the temperature range from 50 ° C to 900 ° C
(6) a method for producing a silicon single crystal by the Czochralski method, wherein the crystal growth rate is V [mm / min]; Assuming that the crystal temperature gradient between the melt and the crystal interface is G [° C / mm], the crystal grows under conditions such that V / G is 0.15 [mm ² / ° C · min] or less, and The cooling rate from the melting point of silicon to 1200 ° C at 1 ° C /
Minutes or less, a method for manufacturing a silicon single crystal wafer, characterized in that: (7) a method for manufacturing a silicon single crystal by the Czochralski method, wherein the crystal growth rate is V (mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a crystal is grown under the condition that V / G is 0.15 [mm ² / ° C. · min] or less, and 1050 during crystal growth.
Cooling rate of 0.5 ° C /
(8) 1050 ° C. during crystal growth
(4), characterized in that the cooling rate from 900 ° C. to 0.5 ° C. / min or less, the manufacturing method of silicon single crystal wafer according to (6), (9) cooling rate of 600 ° C. or less during crystal growth To
The method for producing a silicon single crystal wafer according to (4) to (8), wherein the temperature is 10 ° C./min or more.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION The inventor of the present invention has proposed a method of forming a silicon single crystal under such a condition that a ring-shaped OSF distribution region is eliminated at the center of a wafer so that grown-in defects such as COP become 10 ⁴ / cm ³ or less. Nurtured.

In order to eliminate the ring-shaped OSF distribution region at the center of the wafer, for example, the crystal growth rate is 0.8 mm / min or less, or V / G is 0.15 [mm ² / ° C. · min] or less. You only have to bring them up. In a crystal grown under the condition that the ring-shaped OSF distribution region does not disappear at the center of the wafer, more than 10 ⁴ / cm ³ of grown-in defects such as COP are introduced, and the C mode The pass rate has deteriorated to less than 60%. Furthermore, the dislocation cluster density is 200
Pieces / cm ³ when ultra exists, to deterioration of the pn junction leakage characteristics, it was found that it is important to reduce the dislocation cluster density 200 / cm ³ or less.

In order to reduce dislocation clusters, the cause was investigated in relation to the thermal history of crystallization, and as a result, they were found to be due to the effect of point defects. That is, point defects (interstitial atoms) introduced from the solid-liquid interface between the silicon melt and the crystal during the growth of the silicon single crystal cause aggregation in a certain temperature range to form dislocation clusters. From the results of various experiments in which the growth conditions were changed and the temperature measurement results of the crystals, it was found that the aggregation started at a temperature of 1050 ° C or less. From this temperature, aggregation of point defects and a decrease in supersaturation occurred rapidly, and the aggregation was completed. The operating temperature is 900 ° C.

All of the above phenomena are caused by point defects introduced from the solid-liquid interface between the crystal and the melt during silicon single crystal growth, and the point defects are determined by the crystal cooling conditions during single crystal growth, ie, the crystal heat history. It is possible to control.

The present inventors have found that the following temperature range is important as a temperature range effective for reducing dislocation clusters in the crystal heat history during silicon single crystal growth. That is, (A) solid-liquid interface to 1200 ° C. By maintaining this temperature range for a long time, dislocation clusters and oxygen precipitates near the surface can be reduced. In other words, this temperature range is based on the slope diffusion of point defects to the solid-liquid interface,
Further, outward diffusion to the outside of the crystal occurs, and it is considered that the point defect is a region where the point defect actively escapes from the crystal. Therefore, by maintaining this temperature range for a long time, the total amount of point defects can be reduced, and the number of dislocation clusters caused by this can be reduced.

(B) 1050 to 900 ° C. By maintaining this temperature range for a long time, the number of dislocation clusters can be reduced. That is, in this temperature range, point defects (interstitial atoms) aggregate to form dislocation clusters, so that the concentration of point defects is considered to decrease rapidly. Therefore, by maintaining this temperature range for a long time, the concentration of point defects is reduced, and the number of dislocation clusters caused by the concentration can be reduced.

(4) and (6) of the present invention have a function of controlling the crystal temperature history, thereby promoting the reduction of the point defect concentration in the temperature range (A) during the crystal growth. That is, the point defect introduced from the solid-liquid interface is diffused to the solid-liquid interface and the outside of the crystal by setting the cooling rate from the melting point of silicon to 1200 ° C. at the time of crystal growth to 1 ° C./min or less. Decreasing the concentration reduces dislocation clusters resulting therefrom.
When the cooling rate is 1 ° C./min or more, point defects introduced from the solid-liquid interface do not sufficiently diffuse out of the solid-liquid interface and out of the crystal, so that the number of dislocation clusters increases.

In the present invention, (5) and (7) promote agglomeration of point defects in the temperature range (B), thereby promoting a reduction in the concentration of point defects. That is, by setting the cooling rate from 1050 ° C. to 900 ° C. during crystal growth to 0.5 ° C./min or less, the aggregation of dislocation clusters is promoted, and the number of dislocation clusters is reduced by reducing the point defect concentration. . When the cooling rate is 0.5 ° C./min or more, dislocation clusters do not sufficiently aggregate, so that the point defect concentration does not decrease and the dislocation cluster density increases.

According to the aspect (8) of the present invention, the effect of the temperature range (A) and the temperature range (B) are added to promote further reduction of the point defect concentration, thereby reducing the number of dislocation clusters.

Further, in order to eliminate the abnormal oxygen precipitate distribution near the surface, the cause was investigated in relation to the crystal heat history, and as a result, they were found to be due to the effect of point defects. That is, it is considered that point defects (atomic vacancies) introduced from the solid-liquid interface are the origin of oxygen precipitation nuclei. Oxygen precipitate nuclei cannot be detected in the crystal immediately after crystal growth, but become larger due to wafer heat treatment and become oxygen precipitates.

All of the above phenomena are caused by point defects introduced from the solid-liquid interface between the crystal and the melt during silicon single crystal growth, and the point defects are determined by the crystal cooling conditions during single crystal growth, that is, the crystal heat history. It is possible to control.

Furthermore, the present inventors have found that the following temperature range is important as a temperature range effective for reducing oxygen precipitates near the surface in the crystal heat history during silicon single crystal growth. That is, (C) 600 ° C. or less By rapidly cooling this temperature range, oxygen precipitates near the surface can be reduced. That is, in this temperature range, it is considered that point defects (atomic vacancies) introduced from the solid-liquid interface react with oxygen atoms dissolved in the crystal to form oxygen precipitation nuclei. These oxygen precipitate nuclei show an abnormal distribution with a high density near the wafer surface by subjecting a silicon wafer prepared by slicing an ingot to heat treatment. Therefore, by passing this temperature as soon as possible, it is possible to suppress the formation of oxygen precipitate nuclei and to reduce oxygen precipitates near the wafer surface.

(9) of the present invention suppresses the formation of oxygen precipitation nuclei in the temperature range of (C). In other words, a cooling rate of
By controlling the temperature to at least ° C / min, the reaction between point defects and dissolved oxygen atoms is reduced, and the formation of oxygen precipitation nuclei is suppressed. When the cooling rate is 10 ° C./min or less, the point defects react with the solute oxygen atoms to form oxygen precipitation nuclei, so that oxygen precipitation is not suppressed.

[0023]

The present invention will be described below with reference to examples of the present invention.
The present invention is not limited by the description of these examples.

(Embodiment 1) The silicon single crystal manufacturing apparatus used in the present embodiment is not particularly limited as long as it is used for manufacturing a silicon single crystal by a normal CZ method. The manufacturing method shown in FIG.

This CZ method silicon single crystal apparatus comprises a quartz crucible 6a for containing a silicon melt M and a black smoke crucible 6 for protecting the same.
b, and a crystal pulling furnace 1 for accommodating the grown silicon single crystal ingot S. Crucible 6
On the side surface of the heating heater 4 and a heat insulating material 3 for preventing heat from the heating heater 4 from escaping outside the crystal pulling furnace.
Is set around the crucible 6. Further, the crucible 6 is connected to a driving device (not shown) by a rotating jig 5 and rotated at a predetermined speed by the driving device, and the silicon melt M in the crucible 6 decreases with the decrease of the silicon melt M in the crucible 6. The surface is raised and lowered to compensate for the relative lowering. In the pulling furnace 1, a pulling wire 7 hanging down from above the outside of the furnace is provided, and a chuck 9 for holding a seed crystal 8 is provided at a lower end of the wire. The upper end of the pulling wire 7 is taken up by a wire hoist 2 installed above the outside of the furnace, so that the silicon single crystal S growing under the seed crystal can be pulled up. ing. Then, Ar gas is introduced into the pulling furnace 1 from a gas inlet 10 formed in the pulling furnace 1, flows through the pulling furnace 1, and is discharged from a gas outlet 11. The Ar gas is circulated in this way to prevent SiO generated in the pulling furnace 1 accompanying the silicon melt from being mixed into the silicon melt.

Using this single crystal manufacturing apparatus, a silicon single crystal was pulled and grown under the condition that the single crystal growth rate was 0.9 mm / min.

The specifications of the silicon single crystal grown under these conditions are as follows. Conduction type: p-type (boron doped),
Crystal diameter: 5 inches (125mm), resistivity: 10Ωcm, oxygen concentration
9.5 × 10 ¹⁷ atoms / cm ³ (calculated using oxygen concentration conversion coefficient by Japan Electronics Industry Development Association), carbon concentration <1 × 10 ¹⁶ atoms / c
m ³ (calculated by using the carbon concentration conversion coefficient by the Japan Electronic Industry Development Association).

The wafer cut out of the ingot was treated with H ₂
O, washed with SC1 cleaning liquid and the composition of _{H 2 O 2, NH 4 OH} , 0.11
COP of μm or more was measured with a surface foreign substance meter. The volume density of COP was determined from the number of COP increases when SC1 was repeatedly washed.
(Morita et al. The 39th Spring Meeting of the Japan Society of Applied Physics first volume p27
8,1992).

Further, a wafer cut out from the same ingot was subjected to Secco solution (F. Secc) which is a mixed solution of K ₂ Cr ₂ O ₇ , hydrofluoric acid and water.
o D Aragona, J. Electrochem. Soc. 119, p948, 1972)
Table 2 shows the results of calculating the volume density of dislocation clusters from the surface density of the etch pits and the amount of etching after etching for 30 minutes using the above method. In a nitrogen atmosphere at 800 ° C, 4
After performing the heat treatment for 1000 hours in a nitrogen atmosphere, the oxygen precipitation amount of the wafer that was heat-treated for 16 hours (oxygen concentration before heat treatment-oxygen concentration after heat treatment), and a depth of 5 μm from the wafer surface
Precipitate density up to Infrared Interferometry (OPP; Optical Precipit
ate Profiler).

In order to evaluate the oxide film breakdown voltage characteristics, 1000 ° C.
A MOS capacitor having a 250 Å gate oxide film on a wafer in dry oxygen and a boron-doped polysilicon electrode having a thickness of 5000 Å and an area of 20 mm ² was formed thereon. When an electric field is applied to the above MOS capacitor, the average electric field applied to the gate oxide film when the judgment current is 1 × 10 ⁻⁶ A / cm ² is 7.5 MV / cm or more. And

In order to evaluate the pn junction leak characteristics, a pn junction diode was prepared under the following conditions. First,
Protective oxidation is performed on the wafer substrate in a dry oxygen atmosphere at 1000 ° C., and after phosphorus ions are implanted at 5 × 10 ¹⁵ / cm ^{2, the} wafer
Drive annealing was performed in a nitrogen atmosphere for a minute. As element isolation, guard ring electrodes were arranged so as to surround the element, and a pn junction diode was created. Element area is 30mm
^{In step 2} , 308-point devices were formed in the plane of the 6-inch wafer. As an evaluation condition, a reverse bias voltage of 30 V was applied at room temperature, and the number of devices whose current flowing at that time was 1 pA or more was evaluated.

Further, in order to evaluate the pn junction leakage characteristics after the heat treatment, the wafer was subjected to the heat treatment shown in Table 1, and then a pn junction diode was formed under the same conditions as described above. As an evaluation condition, a reverse bias voltage of 30 V was applied at room temperature, and the average value of the amount of current flowing through the device at that time was evaluated as the average leakage current amount.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from this wafer. In this crystal C
OP density is 10 ⁴ / cm ³ or less, dislocation cluster density is 200 / c
m ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 2) In this embodiment, a single crystal growth rate of 0.9 mm /
The silicon single crystal was pulled and grown under the condition of min.

The specifications of the silicon single crystal grown under these conditions are as follows. Conduction type: p-type (boron doped),
Crystal diameter: 6 inches (150mm), resistivity: 10Ωcm, oxygen concentration
9.5 × 10 ¹⁷ atoms / cm ³ (calculated using oxygen concentration conversion coefficient by Japan Electronics Industry Development Association), carbon concentration <1 × 10 ¹⁶ atoms / c
m ³ (calculated by using the carbon concentration conversion coefficient by the Japan Electronic Industry Development Association).

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 3) In this embodiment, the same single crystal manufacturing apparatus as in Embodiment 1 was used to increase the single crystal growth rate to 0.9 mm /
The silicon single crystal was pulled and grown under the condition of min.

The specifications of the silicon single crystal grown under these conditions are as follows. Conduction type: p-type (boron doped),
Crystal diameter: 8 inches (200mm), resistivity: 10Ωcm, oxygen concentration
9.5 × 10 ¹⁷ atoms / cm ³ (calculated using oxygen concentration conversion coefficient by Japan Electronics Industry Development Association), carbon concentration <1 × 10 ¹⁶ atoms / c
m ³ (calculated by using the carbon concentration conversion coefficient by the Japan Electronic Industry Development Association).

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 4) In this embodiment, a single crystal growth rate of 0.9 mm /
The silicon single crystal was pulled and grown under the condition of min.

The specifications of the silicon single crystal grown under these conditions are as follows. Conduction type: p-type (boron doped),
Crystal diameter: 12 inches (300 mm), resistivity: 10 Ωcm, oxygen concentration 9.5 × 10 ¹⁷ atoms / cm ³ (calculated using oxygen concentration conversion coefficient by Japan Electronic Industry Development Association), carbon concentration <1 × 10 ¹⁶ atoms
/ cm ³ (calculated using the carbon concentration conversion coefficient by the Japan Electronic Industry Development Association).

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 5) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a silicon single crystal was pulled and grown under the condition that V / G was 0.24 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the first embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 6) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a silicon single crystal was pulled and grown under the condition that V / G was 0.24 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the second embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 7) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a silicon single crystal was pulled and grown under the condition that V / G was 0.24 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 8) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a silicon single crystal was pulled and grown under the condition that V / G was 0.24 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the fourth embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 9) In this embodiment, a single crystal growth rate of 0.8 mm /
The silicon single crystal was pulled and grown under the condition of min.

The specifications of the silicon single crystal grown under these conditions are the same as in the first embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 10) In this embodiment, a single crystal growth rate of 0.8 m
The silicon single crystal was grown under the condition of m / min.

The specifications of the silicon single crystal grown under these conditions are the same as in the second embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 11) In this embodiment, a single crystal growth rate of 0.8 m
The silicon single crystal was grown under the condition of m / min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 12) In this embodiment, a single crystal growth rate of 0.8 m
The silicon single crystal was grown under the condition of m / min.

The specifications of the silicon single crystal grown under these conditions are the same as in the fourth embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Example 13) In this example, the same crystal growth equipment as in Example 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], the silicon single crystal was pulled and grown under the condition that V / G was 0.22 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the first embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 14) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], the silicon single crystal was pulled and grown under the condition that V / G was 0.22 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the second embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 15) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], the silicon single crystal was pulled and grown under the condition that V / G was 0.22 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 16) In this embodiment, the same crystal growth apparatus as in Embodiment 1 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], the silicon single crystal was pulled and grown under the condition that V / G was 0.22 [mm ² / ° C. · min].

The specifications of the silicon single crystal grown under these conditions are the same as in the fourth embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 17) In this embodiment, as shown in FIG. 2, a crystal heat history control device 12 was installed in a crystal pulling apparatus. As the temperature control device, a heat insulating material for heat insulation or a combination of a graphite heater, a water cooling tube, and the like installed around the crystal is effective. Using this single crystal manufacturing apparatus, the single crystal growth rate is 0.8 mm / min, and the silicon single crystal is grown under the condition that the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. is 0.9 ° C./min. Pull-up growth was performed.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 18) In this embodiment, a single crystal growing speed of 0.8 m
At a rate of m / min, a silicon single crystal was pulled and grown under such a condition that the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. was 0.4 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 19) In this embodiment, the same single crystal production apparatus as in Embodiment 17 is used to increase the single crystal growth rate to 0.4 m.
At a rate of m / min, a silicon single crystal was grown under the condition that the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. was 0.3 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

Embodiment 20 In this embodiment, as shown in FIG. 3, a crystal heat history control device 13 was installed in a crystal pulling apparatus. As the temperature control device, a heat insulating material for heat insulation or a combination of a graphite heater, a water cooling tube, and the like installed around the crystal is effective. Using this single crystal production apparatus, the single crystal growth rate was set to 0.8 mm / min, and 105
The silicon single crystal was grown under the condition that the cooling rate from 0 ° C. to 900 ° C. was 0.5 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

Example 21 In this example, the same single crystal manufacturing apparatus as in Example 20 was used to increase the single crystal growth rate by 0.8 m.
At a rate of m / min, the silicon single crystal was grown under the condition that the cooling rate from 1050 ° C. to 900 ° C. during the crystal growth was 0.3 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Embodiment 22) In this embodiment, a single crystal growing speed of 0.4 m
The silicon single crystal was pulled and grown under the condition that the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. was 0.2 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

(Embodiment 23) In this embodiment, the same crystal growth apparatus as in Embodiment 17 is used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], V / G is 0.22 [mm ² / ° C. min], and the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. is 0.4
The silicon single crystal was pulled and grown under the condition of ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good.

(Example 24) In this example, the same crystal growth apparatus as in Example 17 was used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], V / G is 0.10 [mm ² / ° C. min], and the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. is 0.3
The silicon single crystal was pulled and grown under the condition of ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

(Embodiment 25) In this embodiment, the same crystal growth apparatus as in Embodiment 20 is used to increase the crystal growth rate to V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], V / G is set to 0.22 [mm ² /°C.min], and the silicon single crystal is grown under the condition that the cooling rate from 1050 ° C to 900 ° C during crystal growth is 0.2 ° C / min. Pull-up growth was performed.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

Embodiment 26 In this embodiment, as shown in FIG. 4, a crystal pulling apparatus equipped with a crystal heat history control device 12 and a crystal heat history control device 13 was used, and the single crystal growth rate was 0.8 m.
m / min, and silicon single crystal under the condition that the cooling rate from the melting point of silicon during crystal growth to 1200 ° C is 0.5 ° C / min, and the cooling rate from 1050 ° C to 900 ° C is 0.2 ° C / min. Has grown.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

Example 27 In this example, the same apparatus as in Example 26 was used, the crystal growth rate was V [mm / min], and the crystal temperature gradient between the silicon melt and the crystal interface was G [° C./mm]. ],
V / G is 0.22 [mm ² / ℃ ・ min], and the cooling rate from the melting point of silicon during crystal growth to 1200 ℃ is 0.5 ℃ / min, from 1050 ℃
The silicon single crystal was grown under the condition that the cooling rate to 900 ° C. was 0.2 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was very small and good.

Embodiment 28 In this embodiment, as shown in FIG. 5, a crystal heat history control device 12 and a crystal heat history control device 14 are installed in a crystal pulling apparatus. As the temperature control device, a heat insulating material for heat insulation or a combination of a graphite heater, a water cooling tube, and the like installed around the crystal is effective. Using this single crystal manufacturing apparatus, the single crystal growth rate was 0.8 mm / min, the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. was 0.4 ° C./min, and the cooling rate of 600 ° C. or less was 30 ° C./min. The silicon single crystal was grown under the following conditions.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good. In addition, the amount of oxygen precipitate and the density of oxygen precipitate near the surface also decreased. Therefore, the average amount of leak current of the wafer after the heat treatment was small and an improvement was observed.

(Example 29) In this example, the same single crystal manufacturing apparatus as in Example 28 was used, and the crystal growth rate was V [mm / min].
When the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / mm], V / G is 0.22 [mm ² / ° C · min], and the temperature is lowered from the melting point of silicon during crystal growth to 1200 ° C. Speed 0.4 ° C / min,
The silicon single crystal was pulled and grown at a cooling rate of 600 ° C. or less at a rate of 30 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density is less than 10 ⁴ / cm ³ and the dislocation cluster density is 20
0 / cm ³ or less. As a result, the withstand voltage characteristics of the oxide film were good with a pass rate of C mode of 60% or more. As for the pn junction leakage characteristics, the number of elements having a current amount of 1 pA or more was small and good. In addition, the amount of oxygen precipitate and the density of oxygen precipitate near the surface also decreased. Therefore, the average amount of leak current of the wafer after the heat treatment was small and an improvement was observed.

Comparative Example 1 In this comparative example, as shown in FIG. 6, a crystal heat history control device 12, a crystal heat history control device 13, and a crystal heat history control device 14 were installed in a crystal pulling device. As the temperature control device, a heat insulating material for heat insulation or a combination of a graphite heater, a water cooling tube, and the like installed around the crystal is effective. In such a single crystal manufacturing apparatus,
The single crystal growth rate is 0.8 mm / min, and the cooling rate from the silicon melting point during crystal growth to 1200 ° C is 5 ° C / min, from 1050 ° C.
Cooling rate up to 900 ℃ is 3 ℃ / min, cooling rate below 600 ℃
The silicon single crystal was grown under the condition of 2 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density was less than 10 ⁴ / cm ³ , but the dislocation cluster density was more than 200 / cm ^3, which was very high. As a result, the oxide film withstand voltage characteristics were good with a C mode pass rate of 60% or more, but the current amount was 1 p
The number of elements having A or more was large, and was extremely inferior to the examples.

(Comparative Example 2) In this comparative example, a single crystal growth rate of 0.8 mm /
min, the cooling rate from the silicon melting point to 1200 ° C during crystal growth is 5 ° C / min, and the cooling rate from 1050 ° C to 900 ° C is 2
The silicon single crystal was pulled and grown at a cooling rate of 600 ° C. or less at 30 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut from the ingot. In this crystal, the COP density was less than 10 ⁴ / cm ³ , but the dislocation cluster density was more than 200 / cm ^3, which was very high. As a result, the oxide film withstand voltage characteristics were good with a C mode pass rate of 60% or more, but the current amount was 1 p
The number of elements having A or more was large, and was extremely inferior to the examples.

(Comparative Example 3) In this comparative example, a single crystal growth rate was set to 1.2 mm /
min, the cooling rate from the silicon melting point to 1200 ° C during crystal growth is 7 ° C / min, and the cooling rate from 1050 ° C to 900 ° C is 4
The silicon single crystal was pulled and grown at a cooling rate of 600 ° C./min and a cooling rate of 600 ° C. or less at 2 ° C./min.

The specifications of the silicon single crystal grown under these conditions are the same as in the third embodiment.

Table 2 shows the results of the defect evaluation and the evaluation of the electrical characteristics of the wafer cut out from the ingot. In this crystal, the COP density was very ^{high at} 10 ⁴ / cm ³ or more, but the dislocation cluster density was very low at 0 / cm ³ . As a result, as for the pn junction leakage characteristics, although the number of elements having a current amount of 1 pA or more was zero, the oxide film breakdown voltage characteristic was C
The mode pass rate was 60% or less, which was inferior to the examples.

[0127]

[Table 1]

[0128]

[Table 2]

[0129]

The silicon single crystal produced by the method of the present invention has no grown-in defects that adversely affect TZDB, and has few dislocation clusters and oxygen precipitates near the surface.
It has excellent pn junction leakage characteristics and is the most suitable crystal for manufacturing MOS device wafers that require high integration and high reliability.

[Brief description of the drawings]

FIG. 1 is a schematic diagram of a crystal manufacturing apparatus used in Examples 1, 2, and 5.

FIG. 2 is a schematic diagram of a crystal manufacturing apparatus used in Examples 3, 4, and 6.

FIG. 3 is a schematic diagram of a crystal manufacturing apparatus used in Example 7.

FIG. 4 is a schematic diagram of a crystal manufacturing apparatus used in Example 8.

FIG. 5 is a schematic diagram of a crystal manufacturing apparatus used in Comparative Examples 1 and 3.

FIG. 6 is a schematic diagram of a crystal manufacturing apparatus used in Comparative Example 2.

[Explanation of symbols]

 1 CZ method silicon single crystal pulling furnace 2 Wire hoist 3 Heat insulator 4 Heater 5 Rotating jig 6 Crucible 6a Quartz crucible 6b Graphite crucible 7 Wire 8 seed crystal 9 Chuck 10 Gas inlet 11 Gas outlet 12 Crystal heat history Control device 13 Crystal heat history control device 14 Crystal heat history control device

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Kunisho Ota 3-35-1, Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Nippon Steel Corporation Technology Development Division (72) Inventor Toshio Iwasaki Hikari-shi, Yamaguchi 3434 Shimada Inside Nittetsu Electronics Co., Ltd. (72) Inventor Kazuki Ishizaka 3-35-1, Ida, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Nippon Steel Corporation Technology Development Headquarters

Claims (9)

[Claims] 1. A silicon single crystal manufactured by the Czochralski method and having a size of 0.
COP density of 11μm or more is 10 ⁴ / cm over the entire wafer
A silicon single crystal wafer characterized by having a dislocation cluster density of not more than ³ and a dislocation cluster density of not more than 200 / cm ³ over the entire surface of the wafer. 2. A silicon single crystal produced by the Czochralski method, wherein the crystal is grown under the condition that the crystal growth rate is 0.8 mm / min or less, and the dislocation cluster density is higher than the entire surface of the wafer. Over 200
Silicon / single crystal wafer characterized in that the number is not more than ³ pieces / cm ³ . 3. In a silicon single crystal produced by the Czochralski method, when the crystal growth rate is V [mm / min] and the crystal temperature gradient between the silicon melt and the crystal interface is G [° C./mm]. A silicon single crystal grown under the condition that V / G is 0.15 [mm ² / ° C./min] or less, and the dislocation cluster density is 200 / cm ³ or less over the entire surface of the wafer. Silicon single crystal wafer. 4. A method for producing a silicon single crystal by the Czochralski method, wherein a crystal is grown at a crystal growth rate of 0.8 mm / min or less and a cooling rate from the melting point of silicon to 1200 ° C. during crystal growth. A method for producing a silicon single crystal wafer, wherein the temperature is 1 ° C./min or less. 5. A method for producing a silicon single crystal by the Czochralski method, wherein the crystal is grown at a crystal growth rate of 0.8 mm / min or less and cooled in a temperature range from 1050 ° C. to 900 ° C. during the crystal growth. A method for producing a silicon single crystal wafer, characterized in that there is a temperature at which the rate is 0.5 ° C./min or less. 6. A method for producing a silicon single crystal by the Czochralski method, wherein the crystal growth rate is V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], the crystal is grown under the condition that V / G is 0.15 [mm ² / ° C. min] or less, and the cooling rate from the melting point of silicon during crystal growth to 1200 ° C. is 1 ° C. / Min or less, a method for producing a silicon single crystal wafer. 7. A method for producing a silicon single crystal by the Czochralski method, wherein the crystal growth rate is V [mm /
Min], the crystal temperature gradient between the silicon melt and the crystal interface is G [° C / m
m], a crystal is grown under the condition that V / G is 0.15 [mm ² / ° C. · min] or less, and 1050 during crystal growth.
Cooling rate of 0.5 ° C /
A method for producing a silicon single crystal wafer, characterized in that the temperature is less than or equal to minutes. 8. The method for producing a silicon single crystal wafer according to claim 4, wherein a cooling rate from 1050 ° C. to 900 ° C. during crystal growth is 0.5 ° C./min or less. 9. The method for producing a silicon single crystal wafer according to claim 4, wherein the cooling rate at 600 ° C. or less during the crystal growth is 10 ° C./min or more.