JPH1140703A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH1140703A JPH1140703A JP20868797A JP20868797A JPH1140703A JP H1140703 A JPH1140703 A JP H1140703A JP 20868797 A JP20868797 A JP 20868797A JP 20868797 A JP20868797 A JP 20868797A JP H1140703 A JPH1140703 A JP H1140703A
- Authority
- JP
- Japan
- Prior art keywords
- silicone gel
- semiconductor device
- modulus
- semiconductor
- gel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ケース内の半導体
素子をシリコーンゲルにより封止もしくは充填している
半導体装置に関し、詳しくは、ヒートサイクル時の気泡
や亀裂の生成が抑制されたシリコーンゲルにより半導体
素子を封止もしくは充填している、優れた信頼性を有す
る半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel, and more particularly, to a semiconductor device in which the generation of bubbles and cracks during a heat cycle is suppressed. The present invention relates to a semiconductor device having excellent reliability in which a semiconductor element is sealed or filled.
【０００２】[0002]
【従来の技術】半導体素子を主要な構成部品とする半導
体装置は、一般に、外部からの機械的応力から該素子を
保護するために、該素子がケース内に設置されており、
さらに、外部からの振動を緩和して、湿気を遮断するた
めに該素子がシリコーンゲルにより封止もしくは充填さ
れている(特開昭６１−４８９４５号公報、特開昭６２
−１０４１４５号公報、および特開平８−４６０９３号
公報参照)。2. Description of the Related Art In general, a semiconductor device having a semiconductor element as a main component is provided in a case to protect the element from external mechanical stress.
Further, the element is sealed or filled with a silicone gel in order to reduce external vibrations and block moisture (Japanese Patent Application Laid-Open Nos. 61-48945 and 62).
-104145 and JP-A-8-46093).
【０００３】[0003]
【発明が解決しようとする課題】しかし、ケース内の半
導体素子をシリコーンゲルにより封止もしくは充填して
いる半導体装置がヒートサイクルを受けた場合には、該
シリコーンゲル中に気泡や亀裂が生成して、該半導体装
置の信頼性が低下するという問題があった。そして、こ
の問題は、複数の電気素子を１つの基板内に組み込んだ
ようなモジュールにおいて、特に顕著であった。However, when a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel is subjected to a heat cycle, bubbles and cracks are generated in the silicone gel. Thus, there is a problem that the reliability of the semiconductor device is reduced. This problem is particularly remarkable in a module in which a plurality of electric elements are incorporated in one substrate.
【０００４】本発明者らは、上記の課題を解決するため
鋭意検討した結果、本発明に到達した。すなわち、本発
明の目的は、ヒートサイクル時の気泡や亀裂の生成が抑
制されたシリコーンゲルにより半導体素子を封止もしく
は充填している、優れた信頼性を有する半導体装置を提
供することにある。The present inventors have made intensive studies to solve the above-mentioned problems, and as a result, have reached the present invention. That is, an object of the present invention is to provide a semiconductor device having excellent reliability, in which a semiconductor element is sealed or filled with a silicone gel in which generation of bubbles and cracks during a heat cycle is suppressed.
【０００５】[0005]
【課題を解決するための手段】本発明は、ケース内の半
導体素子をシリコーンゲルにより封止もしくは充填して
いる半導体装置であって、該シリコーンゲルの２５℃、
せん断周波数０.１Hzにおける損失弾性率が１.０×１０
3〜１.０×１０5dyne／cm2であり、かつ、複素弾性率が
１.０×１０6dyne／cm2以下であることを特徴とする半
導体装置に関する。SUMMARY OF THE INVENTION The present invention relates to a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel.
The loss elastic modulus at a shear frequency of 0.1 Hz is 1.0 × 10
The present invention relates to a semiconductor device having a density of 3 to 1.0 × 10 5 dyne / cm 2 and a complex elastic modulus of 1.0 × 10 6 dyne / cm 2 or less.
【０００６】[0006]
【発明の実施の形態】本発明の半導体装置を詳細に説明
する。本発明の半導体装置は、ケース内の半導体素子を
シリコーンゲルにより封止もしくは充填している半導体
装置である。このような半導体素子としては、ＩＣ、ハ
イブリッドＩＣ、ＬＳＩ等の半導体素子；このような半
導体素子、コンデンサ、電気抵抗器等の電気素子を実装
した電気回路やモジュール；１Ｗ以上の電力を扱えるパ
ワーＩＣ；静電誘導トランジスタ(ＳＩＴ：Ｓtatic Ｉ
nduction Ｔransistor)、ＭＯＳ型(パワーＭＯＳＦＥ
Ｔ)、ＭＯＳ型とバイポーラ型を組み合わせたＩＧＢＴ
(Ｉnsulated Ｇate Ｂipolar Ｔransistor)、ショッ
トキバリアゲート型化合物(ＧａＡｓ)ＦＥＴ等のパワー
トランジスタ；パワー半導体素子が例示される。また、
このような半導体素子を保護するためのケースとして
は、金属製のものや、プラスチック製のものが例示され
る。このような本発明の半導体装置としては、電極と電
極、電気素子と電気素子、電気素子とケース等の隙間が
狭いものや、これらの構造がこのシリコーンゲルの膨張
・収縮に追随しにくい構造を有するものが例示される。
このような構造を有する半導体装置においても、これが
ヒートサイクルを受けた場合でも半導体素子を封止もし
くは充填しているシリコーンゲル中の気泡や亀裂の生成
が抑制されているという特徴がある。このような半導体
装置としては、例えば、ＩＣ、ハイブリッドＩＣ、ＬＳ
Ｉ等の半導体素子、コンデンサ、電気抵抗器等の電気素
子を実装した電気回路やモジュールをシリコーンゲルに
より封止もしくは充填している、ＯＡ、情報、自動車、
家電、ＦＡ等の分野で使用される各種モータ制御用パワ
ーＩＣ、電源分野で２００ＶラインオペレートパワーＩ
Ｃ、自動車分野でのランプ／ソレノイドドライブ用ハイ
サイドスイッチ等のパワーＩＣ、複数個のパワー半導体
素子を１つのパッケージに組み込んで、電流容量を大き
くしたパワーモジュール、自動車用のイグナイターやレ
ギュレータが挙げられ、特に、パワーモジュールが好適
である。DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to the present invention will be described in detail. The semiconductor device of the present invention is a semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel. Examples of such semiconductor elements include semiconductor elements such as ICs, hybrid ICs, and LSIs; electric circuits and modules in which such electric elements as semiconductor elements, capacitors, and electric resistors are mounted; power ICs that can handle power of 1 W or more. A static induction transistor (SIT: Static I)
nduction Transistor), MOS type (Power MOSFE)
T), IGBT combining MOS type and bipolar type
(Insulated Gate Bipolar Transistor), power transistors such as Schottky barrier gate type compound (GaAs) FETs; and power semiconductor devices. Also,
Examples of such a case for protecting the semiconductor element include a metal case and a plastic case. As such a semiconductor device of the present invention, those having a narrow gap between an electrode and an electrode, an electric element and an electric element, an electric element and a case, and a structure where these structures are difficult to follow the expansion and contraction of the silicone gel. Are exemplified.
Even in a semiconductor device having such a structure, even when it is subjected to a heat cycle, generation of bubbles and cracks in the silicone gel sealing or filling the semiconductor element is suppressed. As such a semiconductor device, for example, an IC, a hybrid IC, an LS
OA, information, automobiles, which seal or fill an electric circuit or module mounted with an electric element such as a semiconductor element such as I, a capacitor, and an electric resistor with a silicone gel.
Power ICs for controlling various motors used in the fields of home appliances, factory automation, etc.
C, power ICs such as high-side switches for lamp / solenoid drive in the automobile field, power modules with a large current capacity by incorporating a plurality of power semiconductor elements into one package, and igniters and regulators for automobiles. In particular, power modules are preferred.
【０００７】本発明の半導体装置においては、半導体素
子を封止もしくは充填しているシリコーンゲルの２５
℃、せん断周波数０.１Hzにおける損失弾性率が１.０×
１０3〜１.０×１０5dyne／cm2であり、かつ、複素弾性
率が１.０×１０6dyne／cm2以下であることを特徴とし
ており、特に、このシリコーンゲルの２５℃、せん断周
波数０.１Hzにおける損失弾性率が３.０×１０3〜３.０
×１０4dyne／cm2であり、かつ、この複素弾性率が１.
０×１０5dyne／cm2以下であることことが好ましい。こ
れは、このような範囲の損失弾性率および複素弾性率を
有するシリコーンゲルにより半導体素子を封止もしくは
充填している半導体装置は、これがヒートサイクルを受
けても、該シリコーンゲル中の気泡や亀裂の形成が抑制
されているので、絶縁破壊強さ等の電気特性の低下がな
く、信頼性が優れるためである。[0007] In the semiconductor device of the present invention, the silicone gel 25 sealing or filling the semiconductor element is used.
℃, the loss modulus at a shear frequency of 0.1 Hz is 1.0 ×
10 3 to 1.0 × 10 5 dyne / cm 2 and a complex elastic modulus of 1.0 × 10 6 dyne / cm 2 or less. The loss elastic modulus at a shear frequency of 0.1 Hz is 3.0 × 10 3 to 3.0.
× 10 4 dyne / cm 2 and this complex elastic modulus is 1.
It is preferably 0 × 10 5 dyne / cm 2 or less. This is because a semiconductor device in which a semiconductor element is sealed or filled with a silicone gel having such a loss elastic modulus and a complex elastic modulus in such a range, even if it is subjected to a heat cycle, bubbles or cracks in the silicone gel. This is because, since the formation of is suppressed, there is no decrease in electric characteristics such as dielectric breakdown strength and the reliability is excellent.
【０００８】このようなシリコーンゲルを形成するため
のシリコーンゲル組成物としては、例えば、アルケニル
基含有オルガノポリシロキサン、ケイ素原子結合水素原
子含有オルガノポリシロキサン、およびヒドロシリル化
反応用触媒からなるヒドロシリル化反応硬化型シリコー
ンゲル組成物、シラノール基またはケイ素原子結合アル
コキシ基含有オルガノポリシロキサン、ケイ素原子結合
アルコキシ基含有シラン、および縮合反応用触媒からな
る脱アルコール縮合反応硬化型シリコーンゲル組成物、
アクリル官能性基含有オルガノポリシロキサンを主成分
とする紫外線硬化型シリコーンゲル組成物が挙げられ、
比較的速やかに全体が硬化することから、ヒドロシリル
化反応硬化型シリコーンゲル組成物であることが好まし
い。The silicone gel composition for forming such a silicone gel includes, for example, a hydrosilylation reaction comprising an alkenyl group-containing organopolysiloxane, a silicon-bonded hydrogen atom-containing organopolysiloxane, and a hydrosilylation reaction catalyst. Curable silicone gel composition, a silanol group or a silicon atom-bonded alkoxy group-containing organopolysiloxane, a silicon atom-bonded alkoxy group-containing silane, and a dealcoholization condensation-curable silicone gel composition comprising a condensation reaction catalyst,
UV-curable silicone gel compositions containing acrylic functional group-containing organopolysiloxane as a main component,
A hydrosilylation reaction-curable silicone gel composition is preferred because the whole is relatively quickly cured.
【０００９】半導体素子を封止もしくは充填しているシ
リコーンゲルの２５℃、せん断周波数０.１Hzにおける
損失弾性率および複素弾性率は、例えば、このシリコー
ンゲルを厚さ５〜６mm、直径２０mmの円形プレート状に
調整した後、これを動的粘弾性測定装置により測定する
ことにより求められる。The loss elastic modulus and complex elastic modulus at 25 ° C. and a shear frequency of 0.1 Hz of the silicone gel encapsulating or filling the semiconductor element can be determined, for example, by measuring the silicone gel in a circle having a thickness of 5 to 6 mm and a diameter of 20 mm. After adjusting to a plate shape, it can be determined by measuring this with a dynamic viscoelasticity measuring device.
【００１０】また、本発明の半導体装置において、半導
体素子を封止もしくは充填しているシリコーンゲルのＪ
ＩＳ Ｋ ２２２０に規定される１／４ちょう度は２０
〜８０の範囲内であることが好ましい。これは、この１
／４ちょう度がこの範囲内であるようなシリコーンゲル
が繰り返しのヒートサイクルや振動を受けても、該シリ
コーンゲル中に気泡や亀裂の生成が著しく抑制されるか
らである。Further, in the semiconductor device of the present invention, the J of the silicone gel sealing or filling the semiconductor element is used.
The 1/4 consistency specified in ISK 2220 is 20
It is preferably in the range of ~ 80. This is this one
This is because even if a silicone gel having a / 4 consistency within this range is subjected to repeated heat cycles and vibrations, generation of bubbles and cracks in the silicone gel is significantly suppressed.
【００１１】本発明の半導体装置を調製する方法は限定
されず、例えば、半導体素子を設置したケース内にシリ
コーンゲル組成物を注入した後、該組成物を加熱した
り、室温で放置したり、紫外線を照射することにより硬
化させる方法が挙げられ、特に、比較的速やかに全体が
硬化することから、該組成物としてヒドロシリル化反応
硬化型のものを用いて、加熱により硬化させることがが
好ましい。この際には、加熱温度が高くなると、半導体
素子を封止もしくは充填しているシリコーンゲル中に気
泡や亀裂が生成しやすくなる傾向があるので、５０〜２
５０℃の範囲内に加熱することが好ましく、特に、７０
〜１３０℃の範囲内に加熱することが好ましい。The method for preparing the semiconductor device of the present invention is not limited. For example, after injecting a silicone gel composition into a case in which a semiconductor element is placed, the composition is heated or left at room temperature, There is a method of curing by irradiating ultraviolet rays. In particular, since the whole is relatively quickly cured, it is preferable to use a hydrosilylation reaction-curable composition as the composition and to cure the composition by heating. At this time, if the heating temperature is high, bubbles and cracks tend to be easily generated in the silicone gel sealing or filling the semiconductor element.
Heating is preferably performed within the range of 50 ° C.
It is preferable to heat to within the range of -130 ° C.
【００１２】[0012]
【実施例】本発明の半導体装置を実施例により詳細に説
明する。なお、実施例中の特性は２５℃において測定し
た値であり、シリコーンゲルの特性は次のようにして測
定した。 ［シリコーンゲルの損失弾性率および複素弾性率］ヒド
ロシリル化反応硬化型のシリコーンゲル組成物を１２５
℃で１時間加熱することにより、厚さ５〜６mm、直径２
０mmの円形プレート状のシリコーンゲルを作成した。こ
のシリコーンゲルの２５℃、せん断周波数０.１Hzにお
ける損失弾性率および複素弾性率をレオメトリック社製
の動的粘弾性測定装置（商品名：ダイナミックアナライ
ザーＡＲＥＳ）により測定した。 ［シリコーンゲルの１／４ちょう度］５０mlのガラスビ
ーカーにヒドロシリル化反応硬化型のシリコーンゲル組
成物を静かに注いだ後、１２５℃で１時間加熱すること
によりシリコーンゲルを作成した。このシリコーンゲル
の１／４ちょう度をＪＩＳ Ｋ ２２２０に規定の方法
により測定した。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The semiconductor device of the present invention will be described in detail with reference to embodiments. The properties in the examples are values measured at 25 ° C., and the properties of the silicone gel were measured as follows. [Loss Modulus and Complex Modulus of Silicone Gel] A hydrosilylation-curable silicone gel composition was prepared using 125
By heating for 1 hour at a temperature of 5 to 6 mm and a diameter of 2
A 0 mm circular plate-like silicone gel was prepared. The loss elastic modulus and complex elastic modulus of this silicone gel at 25 ° C. and a shear frequency of 0.1 Hz were measured with a dynamic viscoelasticity measuring device (trade name: Dynamic Analyzer ARES) manufactured by Rheometrics. [1/4 consistency of silicone gel] A silicone gel composition of a hydrosilylation reaction-curable type was gently poured into a 50 ml glass beaker, and heated at 125 ° C for 1 hour to prepare a silicone gel. The 1/4 consistency of this silicone gel was measured by the method specified in JIS K2220.
【００１３】［実施例１〜７・比較例１〜４］各種の１
／４ちょう度、損失弾性率、および複素弾性率を有する
シリコーンゲルを形成することができるヒドロシリル化
反応硬化型のシリコーンゲル組成物を用いて図１で表さ
れる半導体装置を作成した。すなわち、この半導体装置
は、半導体素子(ＩＧＢＴ)１が、銅製回路配線２を設け
たセラミック製基板３上に接着剤により載置され、この
回路配線２とボンディングワイヤにより電気的に接続さ
れている。このセラミック製基板３上の回路配線２には
外部接続端子４が設けられており、また、半導体素子１
以外の電気抵抗器やコンデンサ等の各種電気素子が実装
されている。この半導体素子１および各種の電気素子を
実装したセラミック製基板３は、ポリエチレンテレフタ
レート（ＰＥＴ）等のプラスチック製のケース５内に接
着剤により固定されている。Examples 1 to 7 and Comparative Examples 1 to 4
A semiconductor device shown in FIG. 1 was prepared using a hydrosilylation reaction-curable silicone gel composition capable of forming a silicone gel having / 4 consistency, loss elastic modulus, and complex elastic modulus. That is, in this semiconductor device, a semiconductor element (IGBT) 1 is mounted on a ceramic substrate 3 provided with a copper circuit wiring 2 by an adhesive, and is electrically connected to the circuit wiring 2 by a bonding wire. . External connection terminals 4 are provided on the circuit wiring 2 on the ceramic substrate 3.
Various electric elements such as electric resistors and capacitors other than the above are mounted. The ceramic substrate 3 on which the semiconductor element 1 and various electric elements are mounted is fixed by an adhesive in a plastic case 5 such as polyethylene terephthalate (PET).
【００１４】この半導体素子１を設置したケース５の内
部にヒドロシリル化反応硬化型のシリコーンゲル組成物
を静かに注ぎ込んだ。その後、この半導体装置ごと、室
温、５mmHg以下の条件で１０分間減圧脱泡した後、これ
を１２５℃のオーブン中で１時間加熱することにより、
このシリコーンゲル組成物をを硬化させてシリコーンゲ
ル６を形成した。The hydrosilylation-curable silicone gel composition was gently poured into the case 5 in which the semiconductor element 1 was installed. Thereafter, the entire semiconductor device was degassed under reduced pressure at room temperature and 5 mmHg or less for 10 minutes, and then heated in an oven at 125 ° C. for 1 hour.
The silicone gel composition was cured to form a silicone gel 6.
【００１５】このようにして調製した各々５個の半導体
装置について、−４０℃で１時間、１２５℃で１時間を
１サイクルとするヒートサイクル試験を行った。５００
サイクル後のシリコーンゲルの外観（気泡・亀裂の有無
および程度）、および外部接続端子４を用いた絶縁破壊
強さ（毎秒１kVの割合で昇圧）を測定した。これらの測
定結果を表１に示した。なお、表中のシリコーンゲルの
外観はそれぞれ、 Ａ：気泡・亀裂の生成が全くない、 Ｂ：気泡・亀裂が生成し、その大きさが１０mm未満であ
る、 Ｃ：気泡・亀裂が生成し、その大きさが１０〜３０mmで
ある、 Ｄ：気泡・亀裂が生成し、その大きさが３０mm以上であ
る、 を示している。また、表中の半導体装置の不良率は、半
導体装置５個中の絶縁破壊強さが５KV／mm以下である半
導体装置の個数を示している。For each of the five semiconductor devices thus prepared, a heat cycle test was performed in which one cycle was performed at -40 ° C. for one hour and at 125 ° C. for one hour. 500
The appearance of the silicone gel after the cycle (the presence and degree of bubbles / cracks and the degree thereof) and the dielectric breakdown strength using the external connection terminal 4 (pressure rise at a rate of 1 kV per second) were measured. Table 1 shows the results of these measurements. The appearances of the silicone gels in the table are as follows: A: no bubbles / cracks are formed, B: bubbles / cracks are formed, the size of which is less than 10 mm, C: bubbles / cracks are formed, D: The size is 10 to 30 mm. D: Bubbles / cracks are formed and the size is 30 mm or more. In addition, the defect rate of the semiconductor devices in the table indicates the number of semiconductor devices having a dielectric breakdown strength of 5 KV / mm or less in five semiconductor devices.
【００１６】[0016]
【表１】 [Table 1]
【００１７】[0017]
【発明の効果】本発明の半導体装置は、半導体素子を封
止もしくは充填しているシリコーンゲルの２５℃、せん
断周波数０.１Hzにおける損失弾性率が１.０×１０3〜
１.０×１０5dyne／cm2であり、かつ、複素弾性率が１.
０×１０6dyne／cm2以下であるので、ヒートサイクルを
受けた場合でも、該シリコーンゲル中の気泡や亀裂の生
成が抑制され、信頼性が優れるという特徴がある。According to the semiconductor device of the present invention, the silicone gel sealing or filling the semiconductor element has a loss elastic modulus of 1.0 × 10 3 at 25 ° C. and a shear frequency of 0.1 Hz.
1.0 × 10 5 dyne / cm 2 and a complex elastic modulus of 1.0.
Since it is 0 × 10 6 dyne / cm 2 or less, even when subjected to a heat cycle, the generation of bubbles and cracks in the silicone gel is suppressed, and the silicone gel is characterized by excellent reliability.
【図１】 図１は、本発明の一例であり、実施例で用い
た半導体装置の断面図である。FIG. 1 is an example of the present invention, and is a cross-sectional view of a semiconductor device used in an example.
【図２】 図２は、半導体素子を封止もしくは充填して
いるシリコーンゲル中に気泡矢や亀裂が生成した半導体
装置の断面図である。FIG. 2 is a cross-sectional view of a semiconductor device in which bubbles and cracks are generated in a silicone gel sealing or filling a semiconductor element.
１ 半導体素子(ＩＧＢＴ) ２ 銅製回路配線 ３ セラミック製基板 ４ 外部取出端子 ５ プラスチック製ケース ６ シリコーンゲル ７ シリコーンゲル中に生成した気泡や亀裂 DESCRIPTION OF SYMBOLS 1 Semiconductor element (IGBT) 2 Copper circuit wiring 3 Ceramic board 4 External extraction terminal 5 Plastic case 6 Silicone gel 7 Bubbles and cracks generated in silicone gel
───────────────────────────────────────────────────── フロントページの続き (72)発明者 中村 昭宏 千葉県市原市千種海岸２番２ 東レ・ダウ コーニング・シリコーン株式会社研究開発 本部内 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Akihiro Nakamura 2-2 Chikusa Beach, Ichihara City, Chiba Prefecture Toray Dow Corning Silicone Co., Ltd.
Claims (3)
により封止もしくは充填している半導体装置であって、
該シリコーンゲルの２５℃、せん断周波数０.１Hzにお
ける損失弾性率が１.０×１０3〜１.０×１０5dyne／cm
2であり、かつ、複素弾性率が１.０×１０6dyne／cm2以
下であることを特徴とする半導体装置。1. A semiconductor device in which a semiconductor element in a case is sealed or filled with a silicone gel,
The loss modulus of the silicone gel at 25 ° C. and a shear frequency of 0.1 Hz is 1.0 × 10 3 to 1.0 × 10 5 dyne / cm.
2. A semiconductor device having a complex elastic modulus of 1.0 × 10 6 dyne / cm 2 or less.
に規定される１／４ちょう度が２０〜８０であることを
特徴とする、請求項１記載の半導体装置。2. JIS K 2220 of silicone gel
2. The semiconductor device according to claim 1, wherein the 1/4 consistency defined in the above is 20 to 80.
とを特徴とする、請求項１記載の半導体装置。3. The semiconductor device according to claim 1, wherein the semiconductor device is a power module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20868797A JP3822321B2 (en) | 1997-07-17 | 1997-07-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20868797A JP3822321B2 (en) | 1997-07-17 | 1997-07-17 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1140703A true JPH1140703A (en) | 1999-02-12 |
| JP3822321B2 JP3822321B2 (en) | 2006-09-20 |
Family
ID=16560418
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20868797A Expired - Lifetime JP3822321B2 (en) | 1997-07-17 | 1997-07-17 | Semiconductor device |
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| Country | Link |
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| JP (1) | JP3822321B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015111409A1 (en) * | 2014-01-27 | 2015-07-30 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| WO2017090267A1 (en) * | 2015-11-27 | 2017-06-01 | 三菱電機株式会社 | Power semiconductor device |
| JP2020178011A (en) * | 2019-04-17 | 2020-10-29 | アルプスアルパイン株式会社 | Electronic apparatus and manufacturing method thereof |
-
1997
- 1997-07-17 JP JP20868797A patent/JP3822321B2/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015111409A1 (en) * | 2014-01-27 | 2015-07-30 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| US10155852B2 (en) | 2014-01-27 | 2018-12-18 | Dow Corning Toray Co., Ltd. | Silicone gel composition |
| WO2017090267A1 (en) * | 2015-11-27 | 2017-06-01 | 三菱電機株式会社 | Power semiconductor device |
| DE112016005409T5 (en) | 2015-11-27 | 2018-08-09 | Mitsubishi Electric Corporation | POWER SEMICONDUCTOR DEVICE |
| JPWO2017090267A1 (en) * | 2015-11-27 | 2018-08-30 | 三菱電機株式会社 | Power semiconductor device |
| US10461045B2 (en) | 2015-11-27 | 2019-10-29 | Mitsubishi Electric Corporation | Power semiconductor device |
| JP2020178011A (en) * | 2019-04-17 | 2020-10-29 | アルプスアルパイン株式会社 | Electronic apparatus and manufacturing method thereof |
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| Publication number | Publication date |
|---|---|
| JP3822321B2 (en) | 2006-09-20 |
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