JP5083822B2 - Semiconductor device - Google Patents

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JP5083822B2
JP5083822B2 JP2008054630A JP2008054630A JP5083822B2 JP 5083822 B2 JP5083822 B2 JP 5083822B2 JP 2008054630 A JP2008054630 A JP 2008054630A JP 2008054630 A JP2008054630 A JP 2008054630A JP 5083822 B2 JP5083822 B2 JP 5083822B2
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silicon
curable composition
semiconductor element
semiconductor device
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JP2009212342A (en
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真一 岡田
良孝 菅原
凌治 木村
誠一 斎藤
孝 末吉
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Adeka Corp
Kansai Electric Power Co Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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Description

この発明は、半導体装置に関し、例えば耐熱性が高い高耐電圧パワー半導体装置に関する。   The present invention relates to a semiconductor device, for example, a high withstand voltage power semiconductor device having high heat resistance.

炭化珪素(以下、SiCと記す)等のワイドギャップ半導体材料は、シリコン(以下、Siと記す)に比べて、エネルギーギャップが大きく絶縁破壊電界強度も約1桁大きい等の優れた物理特性を有しているため、高耐熱かつ高耐電圧のパワー半導体装置に用いるのに好適である。   Wide-gap semiconductor materials such as silicon carbide (hereinafter referred to as SiC) have superior physical properties such as a larger energy gap and a breakdown electric field strength that is about one order of magnitude larger than silicon (hereinafter referred to as Si). Therefore, it is suitable for use in a power semiconductor device with high heat resistance and high withstand voltage.

従来、SiCを用いた高耐電圧半導体装置では、例えば高逆耐電圧を有するSiC半導体素子を金属製のパッケージ内に収納し、このパッケージ内に六弗化硫黄ガス等の絶縁用ガスを充填している。これにより、上記SiC半導体素子の高電圧が印加される電極間の周囲の空間における絶縁性を高めている。   Conventionally, in a high withstand voltage semiconductor device using SiC, for example, a SiC semiconductor element having a high reverse withstand voltage is housed in a metal package, and this package is filled with an insulating gas such as sulfur hexafluoride gas. ing. Thereby, the insulation in the surrounding space between the electrodes to which the high voltage of the SiC semiconductor element is applied is enhanced.

ここで、上記六弗化硫黄ガスは絶縁用ガスとしては優れた絶縁性を持つが、地球温暖化防止の観点からは使用を避ける必要がある。また、特に、高い絶縁性を得るためには、半導体装置内に充填する六弗化硫黄ガスの圧力を常温で2気圧程度にする必要がある。よって、上記半導体装置の使用中に温度が上昇すると、この圧力は2気圧以上に高くなるので、上記半導体装置のパッケージを相当堅牢にしないと爆発やガス漏れの危険性がある。   Here, the sulfur hexafluoride gas has an excellent insulating property as an insulating gas, but it must be avoided from the viewpoint of preventing global warming. In particular, in order to obtain high insulation, it is necessary to set the pressure of sulfur hexafluoride gas filled in the semiconductor device to about 2 atm. Therefore, when the temperature rises during use of the semiconductor device, this pressure becomes 2 atmospheres or more. Therefore, there is a risk of explosion or gas leakage unless the package of the semiconductor device is made quite robust.

一方、特許文献1(特開2006−206721号公報)では、上記六弗化硫黄ガス以外の物質で半導体装置の高絶縁性を保つために使用される優れた絶縁性を有する材料が提案されている。この材料は、シロキサン(Si−O−Si結合体)による橋かけ構造を有する有機珪素ポリマーとシロキサンによる線状連結構造を有する有機珪素ポリマーとをシロキサン結合により連結させた有機珪素ポリマー同士を、付加反応により生成される共有結合で連結させて三次元の立体構造に形成した合成高分子化合物である。この合成高分子化合物で半導体素子(半導体チップ)全体を覆うように塗布し、常温から200℃程度の温度に加熱して硬化させることで、上記半導体素子の高い絶縁性を保ち耐電圧を高くすることができる。   On the other hand, Patent Document 1 (Japanese Patent Laid-Open No. 2006-206721) proposes a material having an excellent insulating property that is used to maintain a high insulating property of a semiconductor device with a substance other than the above-described sulfur hexafluoride gas. Yes. This material is an addition of an organosilicon polymer having a crosslinked structure of siloxane (Si-O-Si conjugate) and an organosilicon polymer having a linear linkage structure of siloxane linked by a siloxane bond. It is a synthetic polymer compound formed into a three-dimensional structure by linking with covalent bonds generated by the reaction. This synthetic polymer compound is applied so as to cover the entire semiconductor element (semiconductor chip) and is cured by heating from room temperature to about 200 ° C., thereby maintaining the high insulation of the semiconductor element and increasing the withstand voltage. be able to.

また、特許文献1では、図3に示す半導体装置が開示されている。この半導体装置は、半導体素子101に合成高分子化合物を塗布して被覆しさらに熱硬化させた熱硬化被覆102を有する。そして、この半導体装置は、この熱硬化被覆102の表面酸化を防止するため、窒素雰囲気中で金属キャップ103を支持体104に取り付けて溶接し、内部空間105に窒素ガスを充たしたものである。なお、図3において、106,110は端子、107,111は端子106,110と支持体104とを絶縁する絶縁体、108,112は半導体素子101を端子106,110に接続するリード線である。   Patent Document 1 discloses a semiconductor device shown in FIG. This semiconductor device has a thermosetting coating 102 in which a synthetic polymer compound is applied to a semiconductor element 101 and then coated and further thermally cured. In this semiconductor device, in order to prevent surface oxidation of the thermosetting coating 102, the metal cap 103 is attached to the support 104 and welded in a nitrogen atmosphere, and the internal space 105 is filled with nitrogen gas. In FIG. 3, 106 and 110 are terminals, 107 and 111 are insulators that insulate the terminals 106 and 110 and the support 104, and 108 and 112 are lead wires that connect the semiconductor element 101 to the terminals 106 and 110. .

ところで、上記半導体装置では、金属キャップ103と支持体104とを溶接する際、溶接部109に上記被覆102をなす合成高分子化合物がわずかでも付着していると、溶接が不完全となる。すると、窒素ガスを充たしている内部空間105に空気が流入する。この状態で半導体装置を長時間使用すると、装置内部の熱硬化物である被覆102が酸化劣化してしまい、被覆102の絶縁性が低下する。また、金属キャップ103と支持体104は窒素雰囲気中にて溶接する際、特殊な治具を必要とするので、溶接作業には多くの時間とコストを要する。   By the way, in the semiconductor device, when the metal cap 103 and the support 104 are welded, welding is incomplete if a slight amount of the synthetic polymer compound forming the coating 102 adheres to the welded portion 109. Then, air flows into the internal space 105 filled with nitrogen gas. When the semiconductor device is used for a long time in this state, the coating 102 which is a thermosetting material inside the device is oxidized and deteriorated, and the insulating property of the coating 102 is lowered. Further, since the metal cap 103 and the support 104 require a special jig when welding in a nitrogen atmosphere, the welding work requires a lot of time and cost.

一方、トランジスタやIC等に使用されている一般的なエポキシ樹脂を用いて半導体装置をモールドすれば金属キャップは不要になるが、エポキシ樹脂は高温での柔軟性が乏しく、200℃以上になるとガラス化して硬くなってしまう。このため、半導体素子の温度が通電時の高温状態からオフ時の室温状態に戻ると、エポキシ樹脂の内部に多数のクラックが発生し、高電界には耐えることができず、耐電性はよくない。   On the other hand, if a semiconductor device is molded using a general epoxy resin used in transistors, ICs, etc., a metal cap is not necessary, but epoxy resin is not flexible at high temperatures, and when it exceeds 200 ° C., glass Will become harder. For this reason, when the temperature of the semiconductor element returns from the high temperature state at the time of energization to the room temperature state at the time of off, a large number of cracks are generated inside the epoxy resin, cannot withstand a high electric field, and the electric resistance is not good .

これに対して、上述の合成高分子化合物は高温でも柔軟性を保持するが、この合成高分子化合物を硬化して半導体装置をモールドした場合、この合成高分子化合物と支持体との線膨張係数の違いにより、温度の上昇と降下を繰り返すとモールドが剥がれてしまうという問題がある。
特開2006−206721号公報 特開2006−283012号公報
In contrast, the synthetic polymer compound described above retains flexibility even at high temperatures, but when this synthetic polymer compound is cured and a semiconductor device is molded, the linear expansion coefficient between the synthetic polymer compound and the support is determined. Due to this difference, there is a problem that the mold peels off when the temperature rises and falls repeatedly.
JP 2006-206721 A JP 2006-283012 A

そこで、この発明の課題は、高耐熱性と高耐電圧性を達成できると共に半導体素子の被覆部と半導体素子の支持体との密着性を向上できる半導体装置を提供することにある。   SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device that can achieve high heat resistance and high voltage resistance and can improve the adhesion between the covering portion of the semiconductor element and the support of the semiconductor element.

上記課題を解決するため、この発明の半導体装置は、半導体素子と、
上記半導体素子を支持する金属製の支持体と、
上記半導体素子を外部機器に電気的に接続するための電気接続部と、
上記半導体素子を被覆すると共に上記電気接続部の少なくとも一部および上記支持体の一部を被覆する珪素含有硬化性組成物で作製された被覆部とを備え、
上記珪素含有硬化性組成物は、
下記の(A)成分、(B)成分および(C)成分のうちの少なくとも一つの珪素含有重合体を含有し、かつ、下記の(D)成分および(E)成分および(F)成分を含有し、上記(F)成分の含有量が体積充填率で40〜70%であり、かつ、上記(C)成分を含有しない場合は上記(A)成分および(B)成分の両方を含有する珪素含有硬化性組成物であり、
上記被覆部は、上記珪素含有硬化性組成物を熱硬化させた硬化物であり、上記硬化物の線膨張係数が50〜200ppm/℃であることを特徴とする半導体装置。
In order to solve the above problems, a semiconductor device of the present invention includes a semiconductor element,
A metal support for supporting the semiconductor element;
An electrical connection for electrically connecting the semiconductor element to an external device;
A coating portion made of a silicon-containing curable composition that covers the semiconductor element and covers at least a portion of the electrical connection portion and a portion of the support;
The silicon-containing curable composition is
Contains at least one silicon-containing polymer of the following (A) component, (B) component and (C) component, and contains the following (D) component, (E) component and (F) component When the content of the component (F) is 40 to 70% by volume filling rate and the component (C) is not contained, silicon containing both the component (A) and the component (B) Containing curable composition,
The said coating | coated part is the hardened | cured material which heat-cured the said silicon-containing curable composition, The linear expansion coefficient of the said hardened | cured material is 50-200 ppm / degrees C, The semiconductor device characterized by the above-mentioned.

(A)成分:Si−CH=CH、Si−R−CH=CHおよびSi−R−OCOC(R)=CH [式中、Rは炭素数1〜9のアルキレン基またはフェニレン基であり、Rは水素またはメチル基である]からなる群から選ばれる反応基(A')を一種または二種以上有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらにSi−H基を有するものは除く)
(B)成分:Si−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらに上記反応基(A')を有するものは除く)
(C)成分:上記反応基(A')を一種または二種以上有し、さらにSi−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体
(D)成分:白金系触媒である硬化反応触媒
(E)成分:鉄族含有錯体
(F)成分:セラミックス粒子
この発明の半導体装置では、上記半導体素子を覆うと共に電気接続部の少なくとも一部を被覆する被覆部を、珪素含有硬化性組成物で作製した。そして、この珪素含有硬化性組成物は、シロキサン(Si−O−Si結合体)による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体を含有し、かつ硬化反応触媒である白金系触媒、および鉄族含有錯体を含有する珪素含有硬化性組成物に充填剤としてセラミックス粒子を配合している。これにより、この発明の半導体装置によれば、上記被覆部は高温(例えば200℃以上)で使用してもクラック等が発生せず、高絶縁耐力を達成できる。また、上記被覆部は上記セラミックスが配合されたことで線膨張係数が小さくなり、例えば銅等の金属で作製されて半導体素子を支持する支持体との線膨張係数の差が小さくなるので、被覆部と支持体との密着性を向上できる。
Component (A): Si-CH = CH 2, Si-R 1 -CH = CH 2 and Si-R 1 -OCOC (R 2 ) = CH 2 [ wherein, R 1 represents an alkylene group having 1 to 9 carbon atoms Or a phenylene group, and R 2 is hydrogen or a methyl group]. One or two or more reactive groups (A ′) selected from the group consisting of a group consisting of Si—O—Si bonds are provided at one place. Silicon-containing polymer having a molecular weight of 1,000,000 to 1,000,000 (excluding those further having Si-H groups)
Component (B): A silicon-containing polymer having Si—H groups, having one or more cross-linked structures by Si—O—Si bonds, and having a molecular weight of 1,000,000 to 1,000,000 (however, the above reactive groups ( (Excluding those with A '))
Component (C): One or more of the above reactive groups (A ′), a Si—H group, one or more bridged structures by Si—O—Si bonds, and a molecular weight of 100 Silicon-containing polymer that is ~ 1 million
Component (D): a curing reaction catalyst that is a platinum-based catalyst
Component (E): Iron group-containing complex
(F) Component: Ceramic Particles In the semiconductor device of the present invention, a covering portion that covers the semiconductor element and covers at least a part of the electrical connection portion is made of a silicon-containing curable composition. This silicon-containing curable composition contains a silicon-containing polymer having a crosslinking structure of siloxane (Si—O—Si conjugate) at one or more locations and having a molecular weight of 1,000,000 to 1,000,000, and is cured. Ceramic particles are blended as a filler in a silicon-containing curable composition containing a platinum-based catalyst as a reaction catalyst and an iron group-containing complex. Thereby, according to the semiconductor device of this invention, even if it uses the said coating | coated part at high temperature (for example, 200 degreeC or more), a crack etc. do not generate | occur | produce and high dielectric strength can be achieved. In addition, the coating portion has a low coefficient of linear expansion due to the blending of the ceramics. For example, the difference in the coefficient of linear expansion from a support made of a metal such as copper and supporting a semiconductor element is reduced. The adhesion between the part and the support can be improved.

また、上記セラミックス粒子の粒径は1〜50μmが好ましく、5〜25μmがより好ましい。また、上記被覆部をなす上記珪素含有硬化性組成物に占めるセラミックスの体積充填率は40〜70%であるのが好ましく、50〜60%がより好ましい。これにより、上記珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を50〜200ppm/℃、より好ましくは100〜150ppm/℃にすることができる。なお、上記被覆部をなす珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を50ppm/℃より小さくすると、半導体素子および支持体との密着性が悪くなり、絶縁材として作用しなくなる。一方、上記被覆部をなす珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を200ppm/℃より大きくすると、半導体装置を保護できる程度の硬度が得られない。   The ceramic particles preferably have a particle size of 1 to 50 μm, more preferably 5 to 25 μm. Moreover, it is preferable that the volume filling rate of the ceramics which occupies for the said silicon-containing curable composition which comprises the said coating | coated part is 40 to 70%, and 50 to 60% is more preferable. Thereby, the linear expansion coefficient of the hardened | cured material formed by hardening | curing the said silicon-containing curable composition can be 50-200 ppm / degreeC, More preferably, it can be 100-150 ppm / degreeC. If the linear expansion coefficient of the cured product obtained by curing the silicon-containing curable composition that forms the covering portion is less than 50 ppm / ° C., the adhesion between the semiconductor element and the support deteriorates and acts as an insulating material. Disappear. On the other hand, if the linear expansion coefficient of a cured product obtained by curing the silicon-containing curable composition forming the covering portion is greater than 200 ppm / ° C., a hardness that can protect the semiconductor device cannot be obtained.

なお、上記(D)成分の白金系触媒は、白金、パラジウム及びロジウムの一種以上の金属を含有し、ヒドロシリル化反応を促進する触媒であり、公知のものを用いることができる。ヒドロシリル化反応用の触媒として用いられる該白金系触媒としては、白金−カルボニルビニルメチル錯体、白金−ジビニルテトラメチルジシロキサン錯体、白金−シクロビニルメチルシロキサン錯体、白金−オクチルアルデヒド錯体等が挙げられるほか、これらの触媒における白金を、同じく白金系金属であるパラジウムまたはロジウムに代えた化合物が挙げられ、これらは一種で用いてもよく又は二種以上を併用してもよい。硬化性の点から、白金を含有するものが好ましく、具体的には、白金−カルボニルビニルメチル錯体が特に好ましい。また、クロロトリストリフェニルホスフィンロジウム(I)等の、上記白金系金属を含有するいわゆるWilkinson触媒も、(D)成分の白金系触媒に含まれる。   The platinum catalyst of the component (D) is a catalyst that contains one or more metals of platinum, palladium, and rhodium and promotes the hydrosilylation reaction, and known ones can be used. Examples of the platinum catalyst used as a catalyst for hydrosilylation include platinum-carbonylvinylmethyl complex, platinum-divinyltetramethyldisiloxane complex, platinum-cyclovinylmethylsiloxane complex, platinum-octylaldehyde complex, etc. The compounds in which platinum in these catalysts is replaced with palladium or rhodium, which are also platinum-based metals, may be used, and these may be used alone or in combination of two or more. From the viewpoint of curability, those containing platinum are preferred, and specifically, platinum-carbonylvinylmethyl complexes are particularly preferred. In addition, so-called Wilkinson catalysts containing the above platinum-based metals, such as chlorotristriphenylphosphine rhodium (I), are also included in the platinum catalyst of component (D).

また、上記(E)成分の鉄族含有錯体は、鉄、ルテニウムおよびオスミウムのいずれか一種以上を含有する錯体であれば特に限定されないが、その具体例としては、鉄(III)アセチルアセトネート、ヘミン誘導体、鉄(III)ジフェニルプロパンジオネート、鉄(III)アクリレート、鉄(III)メソ−テトラフェニルポルフィリンクロライド、鉄(III)トリフルオロペンタンジオネート、鉄カルボニル錯体、ルテニウムカルボニル錯体等が挙げられる。耐熱性、電気特性、硬化性、力学特性、保存安定性およびハンドリング性の点から、鉄(III)アセチルアセトネートが好ましい。
また、上記(F)成分のセラミックス粒子の例としては、コロイダルシリカ、シリカフィラー、シリカゲル、マイカやモンモリロナイト等の鉱物、酸化アルミニウムや酸化亜鉛、二酸化珪素等の金属酸化物、窒化珪素、窒化アルミニウム、窒化ホウ素、炭化珪素等のセラミックス等が挙げられる。耐熱性の点から、酸化アルミニウムが好ましい。
Further, the iron group-containing complex of the component (E) is not particularly limited as long as it is a complex containing any one or more of iron, ruthenium and osmium. Specific examples thereof include iron (III) acetylacetonate, Hemin derivatives, iron (III) diphenylpropane dionate, iron (III) acrylate, iron (III) meso-tetraphenylporphyrin chloride, iron (III) trifluoropentanedionate, iron carbonyl complex, ruthenium carbonyl complex, etc. . Iron (III) acetylacetonate is preferred from the viewpoints of heat resistance, electrical properties, curability, mechanical properties, storage stability and handling properties.
Examples of the ceramic particles of the component (F) include colloidal silica, silica filler, silica gel, minerals such as mica and montmorillonite, metal oxides such as aluminum oxide, zinc oxide, and silicon dioxide, silicon nitride, aluminum nitride, Examples thereof include ceramics such as boron nitride and silicon carbide. Aluminum oxide is preferable from the viewpoint of heat resistance.

また、この発明によれば、上記硬化物の線膨張係数が50ppm/℃以上なので、半導体素子および金属製の支持体との密着性が良く、かつ、上記硬化物の線膨張係数が200ppm/℃以下なので、半導体装置を保護できる程度の硬度が得られる。   Further, according to the present invention, since the cured product has a linear expansion coefficient of 50 ppm / ° C. or more, the adhesiveness between the semiconductor element and the metal support is good, and the cured product has a linear expansion coefficient of 200 ppm / ° C. Therefore, hardness sufficient to protect the semiconductor device can be obtained.

また、一実施形態の半導体装置では、上記被覆部を第1の被覆部とし、
上記半導体素子を覆うと共に上記第1の被覆部で覆われており、かつ、上記(A)成分、(B)成分および(C)成分のうちの少なくとも一つの珪素含有重合体を含有し、かつ、上記(D)成分および(E)成分を含有し、かつ、上記(C)成分を含有しない場合は上記(A)成分および(B)成分の両方を含有する珪素含有硬化性組成物からなる第2の被覆部を有する。
In one embodiment of the semiconductor device, the covering portion is the first covering portion,
Covering the semiconductor element and covered with the first covering portion, and containing at least one silicon-containing polymer of the components (A), (B) and (C), and And a silicon-containing curable composition containing both the component (A) and the component (B) when the component (D) and the component (E) are contained and the component (C) is not contained. It has a 2nd coating | coated part.

この実施形態の半導体装置によれば、高い耐熱性と高い耐電圧性を有すると共に高い柔軟性を有する第2の被覆部でもって、半導体素子を絶縁できる。   According to the semiconductor device of this embodiment, the semiconductor element can be insulated by the second covering portion having high heat resistance and high voltage resistance and high flexibility.

また、一実施形態の半導体装置では、上記半導体素子が、ワイドギヤップ半導体であるSiCで作製されたSiC半導体素子またはワイドギヤップ半導体であるGaNで作製されたGaN半導体素子である。   In one embodiment, the semiconductor element is a SiC semiconductor element made of SiC, which is a wide-gap semiconductor, or a GaN semiconductor element made of GaN, which is a wide-gap semiconductor.

この実施形態の半導体装置によれば、SiCもしくはGaNワイドギヤップ半導体素子をモールドする第1の被覆部と支持体との密着性を向上できると共に高耐熱性,高耐電圧性を有する半導体装置を実現できる。   According to the semiconductor device of this embodiment, it is possible to improve the adhesion between the first covering portion for molding the SiC or GaN wide gap semiconductor element and the support and realize a semiconductor device having high heat resistance and high voltage resistance. it can.

また、一実施形態の半導体装置では、上記第1の被覆部の珪素含有硬化性組成物が、硬化性およびハンドリング性の点から、体積充填率が40〜70%のセラミックス粒子を含有することが望ましい。   In one embodiment, the silicon-containing curable composition of the first covering portion may contain ceramic particles having a volume filling rate of 40 to 70% from the viewpoint of curability and handling properties. desirable.

この発明の半導体装置によれば、シロキサン(Si−O−Si結合体)による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体を含有し、かつ硬化反応触媒である白金系触媒、および鉄族含有錯体を含有すると共に充填剤として絶縁性のセラミックスを配合している珪素含有硬化性組成物で作製した被覆部で半導体素子を被覆したことで、高い耐熱性と高い耐電圧性を有するモールド型半導体装置を実現できる。   According to the semiconductor device of the present invention, the curing reaction catalyst contains a silicon-containing polymer having one or more cross-linked structures of siloxane (Si—O—Si conjugate) and having a molecular weight of 1,000,000 to 1,000,000. High heat resistance by covering a semiconductor element with a coating part made of a silicon-containing curable composition containing a platinum-based catalyst and an iron group-containing complex and containing insulating ceramics as a filler Thus, a molded semiconductor device having high withstand voltage can be realized.

以下、この発明を図示の実施の形態により詳細に説明する。なお、この発明はこれらの実施形態により限定されるものではない。   Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. Note that the present invention is not limited to these embodiments.

(第1の実施の形態)
図1は、この発明の半導体装置の第1実施形態の断面図である。この第1実施形態の半導体装置は、耐圧5kVのSiC−GTOサイリスタ装置であり、半導体素子としてSiCのGTO(ゲート・ターン・オフ)サイリスタ素子1を備える。
(First embodiment)
FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention. The semiconductor device according to the first embodiment is a SiC-GTO thyristor device having a breakdown voltage of 5 kV, and includes a SiC GTO (gate turn-off) thyristor element 1 as a semiconductor element.

このGTOサイリスタ素子1のアノード電極2はアルミニウム製のリード線3によりアノード端子5の上端に接続されている。また、サイリスタ素子1のゲート電極6は金製のリード線7によりゲート端子8の上端に接続されている。このリード線3,7と、アノード端子5およびゲート端子8は電気接続部である。   The anode electrode 2 of the GTO thyristor element 1 is connected to the upper end of the anode terminal 5 by an aluminum lead wire 3. The gate electrode 6 of the thyristor element 1 is connected to the upper end of the gate terminal 8 by a gold lead wire 7. The lead wires 3, 7 and the anode terminal 5 and the gate terminal 8 are electrical connection portions.

カソード電極10はカソード端子であるパッケージの銅製の支持体11に金シリコンの高温半田を用いて電気的接続を保って取り付けられている。アノード端子5およびゲート端子8はそれぞれの絶縁材12および13で支持体11との間の絶縁を保ちつつ支持体11を貫通して固定されている。   The cathode electrode 10 is attached to the copper support 11 of the package, which is a cathode terminal, while maintaining electrical connection using high temperature solder of gold silicon. The anode terminal 5 and the gate terminal 8 are fixed through the support 11 while maintaining insulation between the anode terminal 5 and the gate terminal 8 with the respective insulating materials 12 and 13.

GTOサイリスタ素子1の全面およびリード線3,7とGTOサイリスタ素子1との接続部近傍を覆うように、第2の被覆部である被覆部15となる第1の珪素含有硬化性組成物が塗布されている。この被覆部15として使用される第1の珪素含有硬化性組成物は、次に説明する合成工程1から合成工程5によって合成した。なお、この合成工程1〜5において「部」とは重量部を表す。上記第1の珪素含有硬化性組成物を250℃にて3時間硬化反応させることにより被覆部15が得られる。   The first silicon-containing curable composition to be the covering portion 15 as the second covering portion is applied so as to cover the entire surface of the GTO thyristor element 1 and the vicinity of the connecting portion between the lead wires 3 and 7 and the GTO thyristor element 1. Has been. The first silicon-containing curable composition used as the covering portion 15 was synthesized by the synthesis step 1 to the synthesis step 5 described below. In the synthesis steps 1 to 5, “part” represents part by weight. The covering portion 15 is obtained by curing the first silicon-containing curable composition at 250 ° C. for 3 hours.

さらに、この第1実施形態では、上記被覆部15の全面および支持体11の上面11Aから突き出したアノード端子5およびゲート端子8の全面を覆うように、第1の被覆部16となる第2の珪素含有硬化性組成物が塗布されている。この第1の被覆部16として使用される第2の珪素含有硬化性組成物は上記第1の珪素含有硬化性組成物に絶縁性セラミックスとして粒径20μmのアルミナ微粒子を50%の体積充填率で配合している。この第2の珪素含有硬化性組成物を200℃にて6時間硬化反応させることにより第1の被覆部16が得られる。また、上記硬化後の第2の珪素含有硬化性組成物の線膨張係数は150ppm/℃である。   Furthermore, in the first embodiment, a second covering portion 16 is formed so as to cover the entire surface of the covering portion 15 and the entire surfaces of the anode terminal 5 and the gate terminal 8 protruding from the upper surface 11A of the support 11. A silicon-containing curable composition is applied. The second silicon-containing curable composition used as the first covering portion 16 is composed of alumina fine particles having a particle diameter of 20 μm as an insulating ceramic in the first silicon-containing curable composition at a volume filling rate of 50%. It is blended. The 1st coating | coated part 16 is obtained by making this 2nd silicon-containing curable composition make hardening reaction at 200 degreeC for 6 hours. The linear expansion coefficient of the second silicon-containing curable composition after curing is 150 ppm / ° C.

〔合成工程1〕 フェニルトリメトキシシランを75部およびメチルトリエトキシシランを25部混合し、さらに0.4%のリン酸水溶液を86部加え、水酸化ナトリウム水溶液でこの反応液を中和した後、60℃にて30分間撹拌した。反応後、900部のトルエンを加えながらエタノールおよび水を留去することで(共沸)、第1の珪素含有重合体前駆体を得た。GPC(ゲル浸透クロマトグラフィー)による分析の結果、得られた第1の珪素含有重合体前駆体の重量平均分子量(Mw)は5000であった。   [Synthesis step 1] After 75 parts of phenyltrimethoxysilane and 25 parts of methyltriethoxysilane were mixed, 86 parts of 0.4% phosphoric acid aqueous solution was added, and this reaction solution was neutralized with aqueous sodium hydroxide solution. And stirred at 60 ° C. for 30 minutes. After the reaction, ethanol and water were distilled off while adding 900 parts of toluene (azeotropic) to obtain a first silicon-containing polymer precursor. As a result of analysis by GPC (gel permeation chromatography), the weight average molecular weight (Mw) of the obtained first silicon-containing polymer precursor was 5000.

〔合成工程2〕 90部のジクロロジメチルシランおよび9部のジクロロジフェニルシランを混合し、100部のイオン交換水中に滴下した。この反応液から水層を取り除いた後、なお残存している溶媒(水)を留去しながら250℃にて2時間重合させた。得られた反応液にピリジンを20部加え、これにさらにジクロロジメチルシランを20部加えて30分間撹拌した。その後、得られた溶液を250℃にて加熱しながら減圧して、低分子量成分およびピリジン塩酸塩を除き、第2の珪素含有重合体前駆体を得た。GPCによる分析の結果、この第2の珪素含有重合体前駆体の分子量(Mw)は50000であった。   [Synthesis Step 2] 90 parts of dichlorodimethylsilane and 9 parts of dichlorodiphenylsilane were mixed and dropped into 100 parts of ion-exchanged water. After removing the aqueous layer from this reaction solution, polymerization was carried out at 250 ° C. for 2 hours while still distilling off the remaining solvent (water). 20 parts of pyridine was added to the reaction solution obtained, and 20 parts of dichlorodimethylsilane was further added thereto, followed by stirring for 30 minutes. Thereafter, the resulting solution was depressurized while being heated at 250 ° C. to remove low molecular weight components and pyridine hydrochloride, thereby obtaining a second silicon-containing polymer precursor. As a result of analysis by GPC, the molecular weight (Mw) of the second silicon-containing polymer precursor was 50,000.

〔合成工程3〕 トルエンを溶媒として、上記合成工程1で得られた第1の珪素含有重合体前駆体を5部、ピリジンを10部、トリメチルクロロシランを1.5部加えて、室温にて30分間撹拌した。この溶液に、上記合成工程2で得られた第2の珪素含有重合体前駆体を100部加え、さらに撹拌しながら4時間共重合を行い、イオン交換水を加えてこの共重合反応を止めた。水洗によってピリジン塩酸塩等を除き、第3の珪素含有重合体前駆体を得た。GPCによる分析の結果、分子量(Mw)は92000であった。   [Synthesis Step 3] Using toluene as a solvent, 5 parts of the first silicon-containing polymer precursor obtained in Synthesis Step 1 above, 10 parts of pyridine, and 1.5 parts of trimethylchlorosilane were added, and 30 parts at room temperature. Stir for minutes. To this solution, 100 parts of the second silicon-containing polymer precursor obtained in the above synthesis step 2 was added, copolymerization was further performed for 4 hours while stirring, and ion exchange water was added to stop the copolymerization reaction. . The third silicon-containing polymer precursor was obtained by removing pyridine hydrochloride and the like by washing with water. As a result of analysis by GPC, the molecular weight (Mw) was 92,000.

〔合成工程4〕 トルエンを溶媒として、上記合成工程3で得られた第3の珪素含有重合体前駆体を50部およびピリジンを5部加え、均一に混合した後、この混合物を半分に分割した。上記混合物の一方に、ジメチルビニルクロロシランを5部加え、室温にて30分間、さらに70℃にて30分間撹拌した後、イオン交換水で水洗することでピリジン塩酸塩を除き、珪素含有重合体(A)を得た。得られた珪素含有重合体(A)はSi−CH=CH基を有し、Si−O−Si結合による橋かけ構造を―箇所以上有し、分子量(Mw)は93000であった。また、上記混合物の他方に、ジメチルクロロシランを5部加え、室温にて30分間、さらに70℃にて30分間撹拌した後、イオン交換水で水洗することでピリジン塩酸塩を除き、珪素含有重合体(B)を得た。得られた珪素含有重合体(B)はSi−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量(Mw)は93000であった。 [Synthesis Step 4] Using toluene as a solvent, 50 parts of the third silicon-containing polymer precursor obtained in Synthesis Step 3 and 5 parts of pyridine were added and mixed uniformly, and then the mixture was divided in half. . One part of the above mixture was added with 5 parts of dimethylvinylchlorosilane, stirred at room temperature for 30 minutes, and further at 70 ° C. for 30 minutes, and then washed with ion-exchanged water to remove pyridine hydrochloride, and a silicon-containing polymer ( A) was obtained. The obtained silicon-containing polymer (A) had a Si—CH═CH 2 group, had a crosslinked structure with Si—O—Si bonds at more than one site, and had a molecular weight (Mw) of 93,000. In addition, 5 parts of dimethylchlorosilane was added to the other of the above mixture, and after stirring at room temperature for 30 minutes and further at 70 ° C. for 30 minutes, pyridine hydrochloride was removed by washing with ion-exchanged water to remove the silicon-containing polymer. (B) was obtained. The obtained silicon-containing polymer (B) had Si—H groups, had one or more cross-linked structures with Si—O—Si bonds, and had a molecular weight (Mw) of 93,000.

〔合成工程5〕 上記合成工程4で得られた珪素含有重合体(A)を50部と珪素含有重合体(B)を50部とを混合したものに、白金系触媒である硬化反応触媒(D)として白金−カルボニルビニルメチル錯体0.005部、および鉄族含有錯体(E)として鉄(III)アセチルアセトネート0.01部を混合して、上記第1の珪素含有硬化性組成物を得た。   [Synthesis step 5] A mixture of 50 parts of the silicon-containing polymer (A) obtained in the synthesis step 4 and 50 parts of the silicon-containing polymer (B) is added to a curing reaction catalyst (platinum catalyst). D) 0.005 part of a platinum-carbonylvinylmethyl complex as D) and 0.01 part of iron (III) acetylacetonate as an iron group-containing complex (E) are mixed to obtain the first silicon-containing curable composition. Obtained.

この実施形態によれば、第1の被覆部16となる第2の珪素含有硬化性組成物は上記第1の珪素含有硬化性組成物にセラミックスとしての粒径20μmのアルミナ微粒子を50%の体積充填率で配合している。そして、この第2の珪素含有硬化性組成物を200℃にて6時間硬化反応させることにより第1の被覆部16とした。上記硬化後の第2の珪素含有硬化性組成物の線膨張係数は150ppm/℃である。この実施形態によれば、上記第1の被覆部16は高温(例えば200℃以上)で使用してもクラック等が発生せず、高絶縁耐力を達成できる。また、上記第1の被覆部16は上記セラミックスが配合されたことで線膨張係数が小さくなり、銅等の金属で作製されて半導体素子1を支持する支持体11との線膨張係数の差が小さくなるので、第1の被覆部16と支持体11との密着性を向上できる。   According to this embodiment, the second silicon-containing curable composition serving as the first covering portion 16 is composed of 50% volume of alumina fine particles having a particle diameter of 20 μm as ceramics in the first silicon-containing curable composition. It is blended at the filling rate. And this 2nd silicon-containing curable composition was made into the 1st coating | coated part 16 by carrying out hardening reaction at 200 degreeC for 6 hours. The linear expansion coefficient of the second silicon-containing curable composition after curing is 150 ppm / ° C. According to this embodiment, even if the first covering portion 16 is used at a high temperature (for example, 200 ° C. or higher), cracks and the like do not occur, and a high dielectric strength can be achieved. Further, the first covering portion 16 has a smaller coefficient of linear expansion due to the blending of the ceramics, and there is a difference in coefficient of linear expansion from the support 11 made of a metal such as copper and supporting the semiconductor element 1. Since it becomes small, the adhesiveness of the 1st coating | coated part 16 and the support body 11 can be improved.

なお、上記第1,第2の珪素含有硬化性組成物が含有する上記珪素含有重合体(A),(B)としては、次に示す組成のものを採用できる。   The silicon-containing polymers (A) and (B) contained in the first and second silicon-containing curable compositions may be those having the following compositions.

珪素含有重合体(A)成分:Si−CH=CH、Si−R−CH=CHおよびSi−R−OCOC(R)=CH [式中、Rは炭素数1〜9のアルキレン基またはフェニレン基であり、Rは水素またはメチル基である]からなる群から選ばれる反応基(A')を一種または二種以上有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらにSi−H基を有するものは除く)。 Silicon-containing polymer (A) component: Si—CH═CH 2 , Si—R 1 —CH═CH 2 and Si—R 1 —OCOC (R 2 ) ═CH 2 [wherein R 1 has 1 to 1 carbon atoms] 9 is an alkylene group or a phenylene group, and R 2 is hydrogen or a methyl group] and has one or more reactive groups (A ′) selected from the group consisting of A silicon-containing polymer having one or more structures and a molecular weight of 1,000,000 to 1,000,000 (except for those having a Si-H group).

珪素含有重合体(B)成分:Si−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらに上記反応基(A')を有するものは除く)。   Silicon-containing polymer (B) component: a silicon-containing polymer having Si—H groups, having one or more cross-linked structures by Si—O—Si bonds, and having a molecular weight of 100 to 1,000,000 (however, Excluding those having the reactive group (A ′)).

また、上記実施形態では、上記第1,第2の珪素含有硬化性組成物が上記 (A)成分と(B)成分を含有したが、上記(A)成分と(B)成分に加えて次に示す(C)成分を含有してもよい。   Moreover, in the said embodiment, although the said 1st, 2nd silicon-containing curable composition contained the said (A) component and (B) component, in addition to the said (A) component and (B) component, the following (C) You may contain the component shown.

(C)成分:上記反応基(A')を一種または二種以上有し、さらにSi−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体
また、上記(A)成分,(B)成分,(C)成分のうちの上記(A)成分と上記(C)成分とを含有してもよい。また、上記(A)成分,(B)成分,(C)成分のうちの上記(B)成分と上記(C)成分を含有してもよい。また、上記(A)成分,(B)成分,(C)成分のうちの(C)成分のみを含有してもよい。ただし、上記(C)成分を含有しない場合は、上記(A)成分と(B)成分の両方を含有する必要がある。
Component (C): One or more of the above reactive groups (A ′), a Si—H group, one or more bridged structures by Si—O—Si bonds, and a molecular weight of 100 The silicon-containing polymer which is ˜1 million Further, the component (A) and the component (C) among the components (A), (B) and (C) may be contained. Moreover, you may contain the said (B) component and the said (C) component among the said (A) component, (B) component, and (C) component. Moreover, you may contain only (C) component among the said (A) component, (B) component, and (C) component. However, when not containing the said (C) component, it is necessary to contain both the said (A) component and (B) component.

また、上記第1の被覆部16をなす第2の珪素含有硬化性組成物が含有するセラミックス粒子の粒径は1〜50μmが好ましく、5〜25μmがより好ましい。また、上記第2の珪素含有硬化性組成物に占めるセラミックス粒子の体積充填率は40〜70%であるのが好ましく、50〜60%がより好ましい。これにより、上記第2の珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を50〜200ppm/℃、より好ましくは100〜150ppm/℃にすることができる。なお、上記第1の被覆部16をなす第2の珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を50ppm/℃より小さくすると、半導体素子であるGTOサイリスタ素子1および金属である支持体11との密着性が悪くなり、絶縁材として作用しなくなる。一方、上記第1の被覆部16をなす第2の珪素含有硬化性組成物を硬化させてなる硬化物の線膨張係数を200ppm/℃より大きくすると、半導体装置を保護できる程度の硬度が得られない。   Moreover, 1-50 micrometers is preferable and, as for the particle size of the ceramic particle which the 2nd silicon containing curable composition which comprises the said 1st coating part 16 contains, 5-25 micrometers is more preferable. Moreover, it is preferable that the volume filling rate of the ceramic particle which occupies for said 2nd silicon containing curable composition is 40 to 70%, and 50 to 60% is more preferable. Thereby, the linear expansion coefficient of the hardened | cured material formed by hardening | curing the said 2nd silicon containing curable composition can be 50-200 ppm / degreeC, More preferably, it can be 100-150 ppm / degreeC. When the linear expansion coefficient of the cured product obtained by curing the second silicon-containing curable composition forming the first covering portion 16 is less than 50 ppm / ° C., the GTO thyristor element 1 which is a semiconductor element and the metal Adhesiveness with a certain support 11 is deteriorated, and it does not function as an insulating material. On the other hand, when the linear expansion coefficient of the cured product obtained by curing the second silicon-containing curable composition forming the first covering portion 16 is greater than 200 ppm / ° C., a hardness sufficient to protect the semiconductor device is obtained. Absent.

また、上記第1の被覆部16をなす第2の珪素含有硬化性組成物は絶縁性セラミックス微粒子を含有することで、上記第2の珪素含有硬化性組成物のガスバリア性が向上する。すなわち、上記第2の珪素含有硬化性組成物は酸化劣化しにくくなる。   Moreover, the gas barrier property of the said 2nd silicon-containing curable composition improves because the 2nd silicon-containing curable composition which comprises the said 1st coating | coated part 16 contains insulating ceramic fine particles. That is, the second silicon-containing curable composition is less susceptible to oxidative degradation.

(第2の実施の形態)
次に、この発明の半導体装置の第2実施形態を説明する。この第2実施形態は、前述の第1実施形態における第2の被覆部15および第1の被覆部16を形成する珪素含有硬化性組成物の組成が、前述の第1実施形態と異なる。よって、この第2実施形態では、前述の第1実施形態と異なる点を説明する。
(Second Embodiment)
Next, a second embodiment of the semiconductor device of the present invention will be described. This 2nd Embodiment differs in the composition of the silicon-containing curable composition which forms the 2nd coating | coated part 15 and the 1st coating | coated part 16 in above-mentioned 1st Embodiment from the above-mentioned 1st Embodiment. Therefore, in the second embodiment, points different from the first embodiment will be described.

この第2実施形態では、第2の被覆部15を前述の第1の珪素含有硬化性組成物に替えて第3の珪素含有硬化性組成物で形成した。この第3の有硬化性祖成物は次に説明する合成工程6によって合成した。なお、この合成工程6において「部」とは重量部を表す。上記第3の珪素含有硬化性組成物を250℃にて3時間硬化反応させることにより被覆部15が得られる。   In the second embodiment, the second covering portion 15 is formed of a third silicon-containing curable composition instead of the first silicon-containing curable composition. This third curable genus was synthesized by the synthesis step 6 described below. In this synthesis step 6, “parts” represents parts by weight. The covering portion 15 is obtained by causing the third silicon-containing curable composition to undergo a curing reaction at 250 ° C. for 3 hours.

さらに、この第2実施形態では、被覆部15の全面および支持体11の上面11Aから突き出しているアノード端子5およびゲート端子8の全面を覆うように、第1の被覆部16となる第4の珪素含有硬化性組成物を塗布する。この第1の被覆部16として使用される第4の珪素含有硬化性組成物は上記第3の珪素含有硬化性組成物にセラミックス粒子として粒径20μmのアルミナ微粒子を40%の体積充填率で配合している。この第4の珪素含有硬化性組成物を200℃にて6時間硬化反応させることにより第1の被覆部16が得られる。また、上記第4の珪素含有硬化性組成物の線膨張係数は180ppm/℃である。   Furthermore, in the second embodiment, a fourth covering portion 16 is formed so as to cover the entire surface of the covering portion 15 and the entire surfaces of the anode terminal 5 and the gate terminal 8 protruding from the upper surface 11A of the support 11. A silicon-containing curable composition is applied. The fourth silicon-containing curable composition used as the first covering portion 16 is compounded with the third silicon-containing curable composition with alumina fine particles having a particle diameter of 20 μm as ceramic particles at a volume filling rate of 40%. doing. The 4th silicon containing curable composition is made to harden at 200 degreeC for 6 hours, and the 1st coating | coated part 16 is obtained. The linear expansion coefficient of the fourth silicon-containing curable composition is 180 ppm / ° C.

〔合成工程6〕 前述の第1実施形態で述べた合成工程4で得られた珪素含有重合体(A)を50部と珪素含有重合体(B)を50部とを混合したものに、硬化反応触媒(D)として白金−カルボニルビニルメチル錯体0.01部、および鉄族含有錯体(E)として鉄(III)アセチルアセトネート0.01部を混合して、上記第3の珪素含有硬化性組成物を得た。   [Synthesis step 6] 50 parts of the silicon-containing polymer (A) obtained in the synthesis step 4 described in the first embodiment and 50 parts of the silicon-containing polymer (B) are mixed and cured. The above third silicon-containing curability is prepared by mixing 0.01 part of a platinum-carbonylvinylmethyl complex as a reaction catalyst (D) and 0.01 part of iron (III) acetylacetonate as an iron group-containing complex (E). A composition was obtained.

(第1の比較例)
次に、この発明の第1比較例を説明する。この第1比較例は、上述の第1実施形態における上記第1の被覆部16を上記第2の珪素含有硬化性組成物に替えて第5の珪素含有硬化性組成物で形成した点だけが、上述の第1実施形態と異なる。よって、この第1比較例では、上述の第1実施形態と異なる点を説明する。
(First comparative example)
Next, a first comparative example of the present invention will be described. This 1st comparative example is only the point which replaced the said 1st coating | coated part 16 in the above-mentioned 1st Embodiment with the said 2nd silicon-containing curable composition, and was formed with the 5th silicon-containing curable composition. This is different from the first embodiment described above. Therefore, in the first comparative example, differences from the above-described first embodiment will be described.

この第1比較例の第1の被覆部16を構成する上記第5の珪素含有硬化性組成物は、上記第1の珪素含有硬化性組成物にセラミックスとして粒径20μmのアルミナ微粒子を20%の体積充填率で配合している。この第5の珪素含有硬化性組成物を200℃にて6時間硬化反応させることにより上記第1の被覆部16が得られる。また、上記第5の珪素含有硬化性組成物の線膨張係数は300ppm/℃である。   The fifth silicon-containing curable composition constituting the first covering portion 16 of the first comparative example is composed of 20% alumina fine particles having a particle size of 20 μm as ceramics in the first silicon-containing curable composition. It is compounded by volume filling rate. The first covering portion 16 is obtained by curing the fifth silicon-containing curable composition at 200 ° C. for 6 hours. The linear expansion coefficient of the fifth silicon-containing curable composition is 300 ppm / ° C.

(第2の比較例)
次に、図2の断面図を参照して、この発明の第2の比較例を説明する。図2に示すように、この第2比較例は、上述の第1実施形態の被覆部15,16に替えて被覆部21を備えた点が、上述の第1実施形態と異なる。
(Second comparative example)
Next, a second comparative example of the present invention will be described with reference to the sectional view of FIG. As shown in FIG. 2, the second comparative example is different from the first embodiment described above in that a covering portion 21 is provided instead of the covering portions 15 and 16 of the first embodiment described above.

すなわち、この第2比較例では、GTOサイリスタ素子1の全面および支持体11の上面11Aから突き出しているアノード端子5およびゲート端子8を覆うように、上述の第1実施形態における被覆部15をなす第1の珪素含有硬化性組成物を塗布した。この第1の珪素含有硬化性組成物を250ccにて3時間硬化反応させることにより被覆部21が得られる。この第1の珪素含有硬化性組成物の線膨張係数は400ppm/℃である。   That is, in the second comparative example, the covering portion 15 in the first embodiment is formed so as to cover the entire surface of the GTO thyristor element 1 and the anode terminal 5 and the gate terminal 8 protruding from the upper surface 11A of the support 11. A first silicon-containing curable composition was applied. The first silicon-containing curable composition is subjected to a curing reaction at 250 cc for 3 hours to obtain the covering portion 21. The first silicon-containing curable composition has a linear expansion coefficient of 400 ppm / ° C.

(耐熱性試験)
次に、上述した第1,第2実施形態および第1,第2比較例による半導体装置について耐熱性試験を実施した。また、第2比較例の被覆部21に替えて市販品のエポキシ樹脂から得た硬化物を被覆部とした第3比較例とし、この第3比較例についても耐熱性試験を行なった。この耐熱性試験は、それぞれの半導体装置を空気中にて「200℃に昇温し、20分間放置した後、0℃まで降温し、20分間放置」を1サイクルとして、100サイクルの熱サイクル試験を行い、被覆部,第1の被覆部の剥がれを観察することにより行った。
(Heat resistance test)
Next, a heat resistance test was performed on the semiconductor devices according to the first and second embodiments and the first and second comparative examples described above. Moreover, it replaced with the coating | coated part 21 of the 2nd comparative example, made it the 3rd comparative example which used the hardened | cured material obtained from the commercial epoxy resin as a coating | coated part, and also performed the heat resistance test about this 3rd comparative example. This heat resistance test is a 100-cycle thermal cycle test in which each semiconductor device is heated in air to 200 ° C. and left for 20 minutes, then cooled to 0 ° C. and left for 20 minutes. And by observing the peeling of the covering portion and the first covering portion.

この耐熱性試験の結果を図4に示す。図4に示すように、この発明の半導体装置である第1,第2実施形態では、上記100サイクル後の第1,第2の被覆部の剥がれが無いのに対して、第1,第2比較例および第3比較例では、上記100サイクル後の被覆部の剥がれが発生した。特に、第3比較例では、被覆部にクラックが発生した。したがって、線膨張係数が200ppm/℃よりも小さな第2,第3珪素含有硬化性組成物で第1の被覆部16を作製した第1,第2実施形態によれば、線膨張係数が200ppm/℃よりも大きな被覆部(300ppm/℃),被覆部(400ppm/℃)を備えた第1,第2の比較例に比べて、耐熱性が高いことが分かった。   The results of this heat resistance test are shown in FIG. As shown in FIG. 4, in the first and second embodiments of the semiconductor device of the present invention, the first and second coating portions are not peeled off after the above-mentioned 100 cycles, whereas the first and second embodiments. In the comparative example and the third comparative example, peeling of the covering portion after the above 100 cycles occurred. In particular, in the third comparative example, cracks occurred in the covering portion. Therefore, according to the first and second embodiments in which the first covering portion 16 is made of the second and third silicon-containing curable compositions having a linear expansion coefficient smaller than 200 ppm / ° C., the linear expansion coefficient is 200 ppm / It was found that the heat resistance was higher than that of the first and second comparative examples having a coating part (300 ppm / ° C.) and a coating part (400 ppm / ° C.) larger than ° C.

尚、上記第1,第2実施形態では、半導体素子としてSiCによるGTOサイリスタ素子を備えたが、SiCで作製された他の半導体素子を備えてもよく、GaNもしくは他のワイドギャップ半導体で作製された半導体素子を備えてもよく、ワイドギャップ半導体以外の半導体で作製された半導体素子を備えてもよい。   In the first and second embodiments, the GTO thyristor element made of SiC is provided as the semiconductor element. However, another semiconductor element made of SiC may be provided, and the semiconductor element is made of GaN or another wide gap semiconductor. A semiconductor element made of a semiconductor other than a wide gap semiconductor may be provided.

この発明は、高耐電圧かつ高耐熱のワイドギャップ半導体装置に利用可能であり、一例として耐熱性が高い高耐電圧パワー半導体装置として有用である。   The present invention can be used for a wide gap semiconductor device having high withstand voltage and high heat resistance, and is useful as a high withstand voltage power semiconductor device having high heat resistance as an example.

この発明の半導体装置の第1実施形態であるSiC−GTOサイリスタ装置を示す断面図である。It is sectional drawing which shows the SiC-GTO thyristor apparatus which is 1st Embodiment of the semiconductor device of this invention. この発明の半導体装置の第2比較例であるSiC−GTOサイリスタ装置を示す断面図である。It is sectional drawing which shows the SiC-GTO thyristor apparatus which is the 2nd comparative example of the semiconductor device of this invention. 従来のSiCダイオード装置の断面図である。It is sectional drawing of the conventional SiC diode apparatus. 上記第1,第2実施形態と第1,第2,第3比較例における耐熱性試験の結果を示す図である。It is a figure which shows the result of the heat resistance test in the said 1st, 2nd embodiment and a 1st, 2nd, 3rd comparative example.

符号の説明Explanation of symbols

1 GTOサイリスタ装置
2 アノード電極
3、7 リード線
5 アノード端子
6 ゲート電極
8 ゲート端子
10 カソード電極
11 支持体
12,13 絶縁材
15 第2の被覆部
16 第1の被覆部
DESCRIPTION OF SYMBOLS 1 GTO thyristor apparatus 2 Anode electrode 3, 7 Lead wire 5 Anode terminal 6 Gate electrode 8 Gate terminal 10 Cathode electrode 11 Support body 12,13 Insulation material 15 2nd coating | coated part 16 1st coating | coated part

Claims (3)

半導体素子と、
上記半導体素子を支持する金属製の支持体と、
上記半導体素子を外部機器に電気的に接続するための電気接続部と、
上記半導体素子を被覆すると共に上記電気接続部の少なくとも一部および上記支持体の一部を被覆する珪素含有硬化性組成物で作製された被覆部とを備え、
上記珪素含有硬化性組成物は、
下記の(A)成分、(B)成分および(C)成分のうちの少なくとも一つの珪素含有重合体を含有し、かつ、下記の(D)成分および(E)成分および(F)成分を含有し、上記(F)成分の含有量が体積充填率で40〜70%であり、かつ、上記(C)成分を含有しない場合は上記(A)成分および(B)成分の両方を含有する珪素含有硬化性組成物であり、
上記被覆部は、上記珪素含有硬化性組成物を熱硬化させた硬化物であり、上記硬化物の線膨張係数が50〜200ppm/℃であることを特徴とする半導体装置。
(A)成分:Si−CH=CH、Si−R−CH=CHおよびSi−R−OCOC(R)=CH [式中、Rは炭素数1〜9のアルキレン基またはフェニレン基であり、Rは水素またはメチル基である]からなる群から選ばれる反応基(A')を一種または二種以上有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらにSi−H基を有するものは除く)
(B)成分:Si−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体(ただし、さらに上記反応基(A')を有するものは除く)
(C)成分:上記反応基(A')を一種または二種以上有し、さらにSi−H基を有し、Si−O−Si結合による橋かけ構造を一箇所以上有し、分子量が100〜100万である珪素含有重合体
(D)成分:白金系触媒である硬化反応触媒
(E)成分:鉄族含有錯体
(F)成分:セラミックス粒子
A semiconductor element;
A metal support for supporting the semiconductor element;
An electrical connection for electrically connecting the semiconductor element to an external device;
A coating portion made of a silicon-containing curable composition that covers the semiconductor element and covers at least a portion of the electrical connection portion and a portion of the support;
The silicon-containing curable composition is
Contains at least one silicon-containing polymer of the following (A) component, (B) component and (C) component, and contains the following (D) component, (E) component and (F) component When the content of the component (F) is 40 to 70% by volume filling rate and the component (C) is not contained, silicon containing both the component (A) and the component (B) Containing curable composition,
The said coating | coated part is the hardened | cured material which heat-cured the said silicon-containing curable composition, The linear expansion coefficient of the said hardened | cured material is 50-200 ppm / degrees C, The semiconductor device characterized by the above-mentioned.
Component (A): Si-CH = CH 2, Si-R 1 -CH = CH 2 and Si-R 1 -OCOC (R 2 ) = CH 2 [ wherein, R 1 represents an alkylene group having 1 to 9 carbon atoms Or a phenylene group, and R 2 is hydrogen or a methyl group]. One or two or more reactive groups (A ′) selected from the group consisting of a group consisting of Si—O—Si bonds are provided at one place. Silicon-containing polymer having a molecular weight of 1,000,000 to 1,000,000 (excluding those further having Si-H groups)
Component (B): A silicon-containing polymer having Si—H groups, having one or more cross-linked structures by Si—O—Si bonds, and having a molecular weight of 1,000,000 to 1,000,000 (however, the above reactive groups ( (Excluding those with A '))
Component (C): One or more of the above reactive groups (A ′), a Si—H group, one or more bridged structures by Si—O—Si bonds, and a molecular weight of 100 Silicon-containing polymer that is ~ 1 million
Component (D): a curing reaction catalyst that is a platinum-based catalyst
Component (E): Iron group-containing complex
Component (F): Ceramic particles
請求項1に記載の半導体装置において、
上記被覆部を第1の被覆部とし、
上記半導体素子を覆うと共に上記第1の被覆部で覆われており、かつ、上記(A)成分、(B)成分および(C)成分のうちの少なくとも一つの珪素含有重合体を含有し、かつ、上記(D)成分および(E)成分を含有し、かつ、上記(C)成分を含有しない場合は上記(A)成分および(B)成分の両方を含有する珪素含有硬化性組成物からなる第2の被覆部を有することを特徴とする半導体装置。
The semiconductor device according to claim 1,
The covering portion is a first covering portion,
Covering the semiconductor element and covered with the first covering portion, and containing at least one silicon-containing polymer of the components (A), (B) and (C), and And a silicon-containing curable composition containing both the component (A) and the component (B) when the component (D) and the component (E) are contained and the component (C) is not contained. A semiconductor device comprising a second covering portion.
請求項1または2に記載の半導体装置において、
上記半導体素子が、ワイドギヤップ半導体であるSiCで作製されたSiC半導体素子またはワイドギヤップ半導体であるGaNで作製されたGaN半導体素子であることを特徴とする半導体装置。
The semiconductor device according to claim 1 or 2,
A semiconductor device, wherein the semiconductor element is a SiC semiconductor element made of SiC, which is a wide gear semiconductor, or a GaN semiconductor element made of GaN, which is a wide gear semiconductor.
JP2008054630A 2008-03-05 2008-03-05 Semiconductor device Expired - Fee Related JP5083822B2 (en)

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