JPH113836A - Laminated electronic part - Google Patents

Laminated electronic part

Info

Publication number
JPH113836A
JPH113836A JP9153843A JP15384397A JPH113836A JP H113836 A JPH113836 A JP H113836A JP 9153843 A JP9153843 A JP 9153843A JP 15384397 A JP15384397 A JP 15384397A JP H113836 A JPH113836 A JP H113836A
Authority
JP
Japan
Prior art keywords
electronic component
ground electrode
laminated
metal case
laminate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9153843A
Other languages
Japanese (ja)
Inventor
Norio Sakai
範夫 酒井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP9153843A priority Critical patent/JPH113836A/en
Publication of JPH113836A publication Critical patent/JPH113836A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a laminated electronic part that is low profile when a metal case is mounted, and has disposition pitches of an external electrode and a ground electrode which can be made narrow. SOLUTION: A laminated electrode part 10 has a rectangular parallelepiped- shaped laminate 11 constituted by laminating a plurality of insulation sheets with circuit elements put inside. By providing steps 12 to a plurality of positions of a rear surface 111 of the laminate 11, a first surface 111a and a plurality of second surfaces 111b recessed compared with the first surface 111a are formed. And a plurality of external electrodes 13 are formed on the first surface 111a, and one ground electrode 14 is formed on each of the second surfaces 111b.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、回路要素を内部に配置
した積層電子部品に関し、特に、積層電子部品のグラン
ド電極の構造の改良に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer electronic component having a circuit element disposed therein, and more particularly to an improvement in the structure of a ground electrode of the multilayer electronic component.

【0002】[0002]

【従来の技術】図8に、従来の積層電子部品の斜視図を
示す。例えば、積層コンデンサ、積層インダクタ、多層
回路基板、多層複合電子部品で代表される積層電子部品
50は、内部に内部配線パターン(図示せず)が形成さ
れる略直方体状の積層体51を有し、その積層体51の
裏面511には外部電極52、グランド電極53が形成
される。そして、図示していないが、積層体51の表面
にはICチップ、チップコンデンサなどの電子部品が搭
載される。また、図9に示すように、金属ケース付き積
層電子部品60の場合には、グランド電極53は、輻射
低減やシールド強化のために、積層電子部品50の表面
に被せられる金属ケース54とはんだ55にて接続され
る。なお、金属ケース54の側面の端部54aは、はん
だ55にてグランド電極53と接続しやすいように、積
層電子部品50の裏面で内側に折り曲げられる。
2. Description of the Related Art FIG. 8 is a perspective view of a conventional laminated electronic component. For example, a multilayer electronic component 50 represented by a multilayer capacitor, a multilayer inductor, a multilayer circuit board, and a multilayer composite electronic component has a substantially rectangular parallelepiped laminate 51 in which an internal wiring pattern (not shown) is formed. The external electrode 52 and the ground electrode 53 are formed on the back surface 511 of the multilayer body 51. Although not shown, electronic components such as an IC chip and a chip capacitor are mounted on the surface of the multilayer body 51. Further, as shown in FIG. 9, in the case of the laminated electronic component 60 with a metal case, the ground electrode 53 is formed of a metal case 54 and a solder 55 which are put on the surface of the laminated electronic component 50 in order to reduce radiation and strengthen shielding. Connected. The end 54 a of the side surface of the metal case 54 is bent inward on the back surface of the multilayer electronic component 50 so as to be easily connected to the ground electrode 53 by the solder 55.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記の
従来の積層電子部品においては、積層電子部品を回路基
板上に実装する際に、積層電子部品の裏面上の外部電極
と回路基板上の回路パターンとを接続するはんだと、積
層電子部品の裏面上のグランド電極と回路基板上のグラ
ンドパターンとを接続するはんだとが存在するため、は
んだの量が過多になると、それらのはんだが積層電子部
品の外部電極及びグランド電極の周囲に広がる。したが
って、外部電極とグランド電極とが短絡する危険性があ
り、外部電極及びグランド電極の配置ピッチを小さくす
ることが困難であるという問題があった。
However, in the above-mentioned conventional multilayer electronic component, when mounting the multilayer electronic component on the circuit board, the external electrodes on the back surface of the multilayer electronic component and the circuit pattern on the circuit board are not used. And the solder that connects the ground electrode on the back surface of the multilayer electronic component to the ground pattern on the circuit board.Therefore, when the amount of solder becomes excessive, Spreads around the external electrode and the ground electrode. Therefore, there is a risk that the external electrode and the ground electrode may be short-circuited, and it is difficult to reduce the arrangement pitch of the external electrode and the ground electrode.

【0004】また、金属ケースを取り付ける際に、金属
ケースの側面の端部を積層電子部品の裏面にて内側に折
り曲げるため、金属ケースの折り曲げ部及び金属ケース
とグランド電極とを接続するはんだの厚み(図9中の
t)で積層電子部品の低背化が困難であるという問題も
あった。
Further, when the metal case is attached, the end of the side surface of the metal case is bent inward at the back surface of the laminated electronic component, so that the bent portion of the metal case and the thickness of the solder connecting the metal case and the ground electrode are formed. (T in FIG. 9), there is also a problem that it is difficult to reduce the height of the multilayer electronic component.

【0005】本発明は、このような問題点を解消するた
めになされたものであり、外部電極及びグランド電極の
配置ピッチを細かくできるとともに、金属ケースを取り
付ける際にも低背化が可能な積層電子部品を提供するこ
とを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and the arrangement pitch of the external electrodes and the ground electrodes can be reduced, and the height can be reduced even when a metal case is attached. The purpose is to provide electronic components.

【0006】[0006]

【課題を解決するための手段】上述する問題点を解決す
るため本発明の積層電子部品は、内部に回路要素を介在
させた状態で複数の絶縁性シートを積層して、相対する
主面と該主面間を連結する側面からなる略直方体状の積
層体を構成し、該積層体の一方主面に、前記回路要素に
電気的に接続された複数の外部電極及びグランド電極を
備える積層電子部品において、前記積層体の一方主面
に、少なくとも1つの段差を設けることにより、第1の
面と該第1の面に比べて凹んでいる第2の面とを形成
し、前記第1の面に前記外部電極が設けられ、前記第2
の面に前記グランド電極が設けられることを特徴とす
る。
In order to solve the above-mentioned problems, a laminated electronic component according to the present invention has a structure in which a plurality of insulating sheets are laminated in a state in which circuit elements are interposed, and a plurality of insulating sheets are laminated to each other. A laminated electronic device comprising a substantially rectangular parallelepiped laminate including side surfaces connecting the main surfaces, and including, on one principal surface of the laminate, a plurality of external electrodes electrically connected to the circuit element and a ground electrode. In the component, a first surface and a second surface that is recessed as compared to the first surface are formed by providing at least one step on one main surface of the laminate, and forming the first surface. The external electrode is provided on the surface,
Wherein the ground electrode is provided on the surface of.

【0007】本発明の積層電子部品によれば、段差によ
り形成される第2の面が凹んでいるため、積層電子部品
を回路基板に実装する際に、積層電子部品の第2の面に
形成されるグランド電極と回路基板上のグランドパター
ンとを接続するはんだが、グランド電極が形成される第
2の面から外部電極が形成される第1の面へ広がらない
ため、グランド電極と外部電極とが短絡する危険性がな
い。
According to the multilayer electronic component of the present invention, since the second surface formed by the step is concave, the multilayer electronic component is formed on the second surface of the multilayer electronic component when the multilayer electronic component is mounted on a circuit board. The solder for connecting the ground electrode and the ground pattern on the circuit board does not spread from the second surface on which the ground electrode is formed to the first surface on which the external electrode is formed. There is no danger of short circuit.

【0008】また、積層電子部品を構成している積層体
の一方主面に、第1の面に比べて凹んでいる第2の面を
形成し、その第2の面上に、グランド電極を設けている
ため、金属ケース付き積層電子部品の場合には、金属ケ
ースの側面の端部が第2の面上に設けられるグランド電
極と接続される。したがって、金属ケースの側面の端部
が積層電子部品の一方主面から飛び出さない。
[0008] Further, a second surface that is recessed from the first surface is formed on one principal surface of the laminate that constitutes the laminated electronic component, and a ground electrode is formed on the second surface. In the case of a laminated electronic component with a metal case, the end of the side surface of the metal case is connected to the ground electrode provided on the second surface. Therefore, the end of the side surface of the metal case does not protrude from one main surface of the multilayer electronic component.

【0009】[0009]

【実施例】以下、図面を参照して本発明の実施例を説明
する。図1に、本発明に係る積層電子部品の一実施例の
斜視図を示す。積層電子部品10は、図示したチップ状
の形態で適宜の回路基板上に実装されるが、図1では、
積層電子部品10の裏面、すなわち回路基板側に向けら
れる面を上方に向けた状態で、図示されている。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a perspective view of one embodiment of a laminated electronic component according to the present invention. The multilayer electronic component 10 is mounted on an appropriate circuit board in the illustrated chip-like form.
The back surface of the multilayer electronic component 10, that is, the surface facing the circuit board side is shown facing upward.

【0010】積層電子部品10は、回路要素(図示せ
ず)を内部に介在させた状態で複数の絶縁性シートが積
層されてなる略直方体状の積層体11を有する。積層体
11の一方主面、すなわち積層体11の裏面111の複
数か所に、段差12を設けることにより、第1の面11
1aとその第1の面111aに比べて凹んでいる複数の
第2の面111bを形成する。そして、第1の面111
a上には、複数の外部電極13が形成され、複数の第2
の面111b上には、それぞれ1つずつのグランド電極
14が形成される。段差12の形状は、円形、角形、あ
るいはそれらを組合わせた形のいずれでもよい。また、
段差12の高さは、金属ケース(図示せず)の厚みより
高く0.01〜0.3mm程度である。
The laminated electronic component 10 has a substantially rectangular parallelepiped laminate 11 in which a plurality of insulating sheets are laminated with a circuit element (not shown) interposed therebetween. By providing steps 12 at one of the main surfaces of the laminate 11, that is, at a plurality of locations on the back surface 111 of the laminate 11, the first surface 11
1a and a plurality of second surfaces 111b that are concave relative to the first surface 111a are formed. Then, the first surface 111
a, a plurality of external electrodes 13 are formed on the
One ground electrode 14 is formed on each of the surfaces 111b. The shape of the step 12 may be any of a circle, a square, or a combination thereof. Also,
The height of the step 12 is higher than the thickness of the metal case (not shown) and is about 0.01 to 0.3 mm.

【0011】上述したような積層電子部品10を得るた
め、図2に示すようなマザー積層体15が用意される。
そして、マザー積層体15において、切断線16で区切
られた部分が個々の積層電子部品10となる。なお、図
2では、外部電極13及びグランド電極14は省略され
ている。
In order to obtain the above-described laminated electronic component 10, a mother laminate 15 as shown in FIG. 2 is prepared.
Then, in the mother laminated body 15, portions separated by the cutting lines 16 become individual laminated electronic components 10. In FIG. 2, the external electrode 13 and the ground electrode 14 are omitted.

【0012】図3及び図4にプレス前後のマザー積層体
15の断面図を示す。まず、図3に示すように、ドクタ
ーブレード法などにより、シート形成を行い、マザー積
層体15を構成するセラミックグリーンシート17a〜
17eを得る。そして、セラミックグリーンシート17
b〜17dには、シートの厚み方向の電気的導通を可能
とするため、シートを貫通するビアホール18がパンチ
ング等により形成される。
3 and 4 are cross-sectional views of the mother laminate 15 before and after pressing. First, as shown in FIG. 3, sheets are formed by a doctor blade method or the like, and ceramic green sheets 17 a to 17 m to form the mother laminate 15 are formed.
17e is obtained. And the ceramic green sheet 17
To allow electrical conduction in the thickness direction of the sheet, via holes 18 penetrating the sheet are formed in b to 17d by punching or the like.

【0013】次いで、セラミックグリーンシート17
b、17cには、回路要素(図示せず)となるべき導電
膜19あるいは抵抗膜20を構成する導電材が、セラミ
ックグリーンシート17dには、外部電極(図示せず)
あるいはグランド電極14を構成する導電材がそれぞれ
印刷される。この際、ビアホール18に、導電膜19、
抵抗膜20、外部電極あるいはグランド電極14を構成
する導電材が充填され、シートの厚み方向の電気的導通
が可能となる。そして、最下層のセラミックグリーンシ
ート17eの段差部となる部分21は、段差12を設け
るためにパンチング等により取り除かれる。
Next, the ceramic green sheet 17
A conductive material forming the conductive film 19 or the resistive film 20 to be a circuit element (not shown) is provided on the b and 17c, and an external electrode (not shown) is provided on the ceramic green sheet 17d.
Alternatively, a conductive material forming the ground electrode 14 is printed. At this time, a conductive film 19,
The conductive material constituting the resistance film 20, the external electrode or the ground electrode 14 is filled, and electrical conduction in the thickness direction of the sheet is enabled. Then, the portion 21 serving as the step portion of the lowermost ceramic green sheet 17 e is removed by punching or the like to provide the step 12.

【0014】次いで、セラミックグリーンシート17a
〜17eが積み重ねられ、プレスされる。これによっ
て、図4に示すようなマザー積層体15が得られる。な
お、図5に示すように、外部電極13及びグランド電極
14は、個々の積層電子部品10が独立するように分離
したパターンとして印刷されているため、互いに他のも
のに対して電気的に独立している。
Next, the ceramic green sheet 17a
1717e are stacked and pressed. Thus, a mother laminate 15 as shown in FIG. 4 is obtained. As shown in FIG. 5, since the external electrodes 13 and the ground electrodes 14 are printed as separate patterns so that the individual multilayer electronic components 10 are independent, they are electrically independent from each other. doing.

【0015】次いで、はんだ付性の確保とはんだ食われ
防止のため、外部電極13及びグランド電極14には、
Ni/Au、Ni/Sn等がめっき成膜される。次い
で、図5に示すように、マザー積層体15には、切断線
16(図2)に沿って、マザー積層体15の裏面と表面
とに、互いに対向してそれぞれブレイク用スリット2
2、23が設けられる。なお、ブレイク用スリット2
2、23は、いずれか一方が省略されてもよい。
Next, in order to secure solderability and prevent solder erosion, the external electrode 13 and the ground electrode 14
Ni / Au, Ni / Sn, etc. are formed by plating. Next, as shown in FIG. 5, the mother laminate 15 is provided along the cutting line 16 (FIG. 2) on the back surface and the front surface of the mother laminate 15 so as to be opposed to each other.
2, 23 are provided. In addition, the slit 2 for break
Either of 2 and 23 may be omitted.

【0016】次いで、マザー積層体15は、外部電極1
3及びグランド電極14、並びに回路要素(図示せず)
となるべき導電膜19あるいは抵抗膜20とともに、一
体焼成される。なお、外部電極13及びグランド電極1
4は、回路要素(図示せず)となるべき導電膜19ある
いは抵抗膜20と同時にマザー絶縁性シートに印刷し、
マザー積層体15とともに一体焼成するのが一般的であ
るが、マザー積層体15を焼成した後に、外部電極13
及びグランド電極14を印刷し、焼き付けてもよい。
Next, the mother laminate 15 is connected to the external electrode 1.
3 and ground electrode 14, and circuit elements (not shown)
Together with the conductive film 19 or the resistive film 20 to be formed. The external electrode 13 and the ground electrode 1
4 is printed on the mother insulating sheet at the same time as the conductive film 19 or the resistive film 20 to be a circuit element (not shown),
It is common to fire integrally with the mother laminate 15, but after firing the mother laminate 15, the external electrodes 13 are fired.
Alternatively, the ground electrode 14 may be printed and printed.

【0017】その後、必要に応じて、マザー積層体15
の表面に導電膜あるいは抵抗膜(図示せず)が形成さ
れ、そして、その上に、保護膜(図示せず)が形成され
る。次いで、良品と判断された積層電子部品10の表面
112(図1)上には、必要に応じて、複合化のための
他の電子部品(図示せず)が実装される。
Thereafter, if necessary, the mother laminated body 15
A conductive film or a resistive film (not shown) is formed on the surface of the substrate, and a protective film (not shown) is formed thereon. Next, on the surface 112 (FIG. 1) of the laminated electronic component 10 determined to be non-defective, another electronic component (not shown) for compounding is mounted as necessary.

【0018】上述の実施例では、ここまで述べた工程
が、マザー積層体15の状態で能率的に行うことができ
る。なお、積層電子部品10の出荷はこの段階で行って
もよい。
In the above-described embodiment, the steps described so far can be efficiently performed in the state of the mother laminate 15. The shipment of the multilayer electronic component 10 may be performed at this stage.

【0019】次いで、機械的に独立した複数の積層電子
部品10を得るため、マザー積層体15は、切断線16
(図2)に沿って形成されたブレイク用スリット22、
23を利用して、完全に分割される。このようにして、
図1に示した積層電子部品10が得られる。
Next, in order to obtain a plurality of mechanically independent laminated electronic components 10, the mother laminated body 15
Break slit 22 formed along (FIG. 2),
23 is completely divided. In this way,
The multilayer electronic component 10 shown in FIG. 1 is obtained.

【0020】そして、積層電子部品10は、図示しない
が、回路基板上に実装され、積層電子部品10の外部電
極13と回路基板上の回路パターン、積層電子部品10
のグランド電極14と回路基板上のグランドパターンと
がはんだにより接続される。
Although not shown, the multilayer electronic component 10 is mounted on a circuit board, and the external electrodes 13 of the multilayer electronic component 10 and the circuit patterns on the circuit board,
The ground electrode 14 and the ground pattern on the circuit board are connected by solder.

【0021】この際、グランド電極14を形成する第2
の面111bが、外部電極13を形成する第1の面11
1aに比べて凹んでいるため、積層電子部品10を回路
基板に実装する際に、第2の面111b上のグランド電
極14と回路基板上のグランドパターンとを接続するは
んだが、第2の面111bから第1の面111aへ広が
らない。したがって、外部電極13とグランド電極14
とが短絡する危険性がないため、外部電極13及びグラ
ンド電極14の配置ピッチを細かくでき、積層電子部品
10の小型化が可能となる。
At this time, the second electrode for forming the ground electrode 14 is formed.
Of the first surface 11b forming the external electrode 13
1a, the solder for connecting the ground electrode 14 on the second surface 111b and the ground pattern on the circuit board is mounted on the second surface when the electronic component 10 is mounted on the circuit board. It does not spread from 111b to the first surface 111a. Therefore, the external electrode 13 and the ground electrode 14
Since there is no danger of short-circuiting, the arrangement pitch of the external electrode 13 and the ground electrode 14 can be made fine, and the miniaturization of the multilayer electronic component 10 becomes possible.

【0022】図6に、このようにして得られた積層電子
部品10の表面に金属ケースを被せた場合の金属ケース
付き積層電子部品の断面図を示す。金属ケース付き積層
電子部品30において、積層電子部品10に被せられた
金属ケース24は、その側面の端部24aを積層電子部
品10に形成されたグランド電極14とはんだ25によ
り接続することにより、積層電子部品10と固定され
る。
FIG. 6 is a cross-sectional view of a laminated electronic component with a metal case in the case where a metal case is placed on the surface of the laminated electronic component 10 thus obtained. In the laminated electronic component 30 with a metal case, the metal case 24 covered on the laminated electronic component 10 is laminated by connecting the end 24 a of the side surface to the ground electrode 14 formed on the laminated electronic component 10 by solder 25. It is fixed to the electronic component 10.

【0023】この際、積層電子部品10が、第1の面1
11aに比べて凹ませて形成した第2の面111b上
に、グランド電極14を備えているため、金属ケース付
き積層電子部品30のように、金属ケース24の側面の
端部24aを、第2の面111b上に設けられたグラン
ド電極14と接続させても、金属ケース24の側面の端
部24aが積層電子部品10の一方主面から飛び出さな
い。したがって、金属ケース付き積層電子部品30にお
いて低背化が可能となる。
At this time, the laminated electronic component 10 is
Since the ground electrode 14 is provided on the second surface 111b formed to be depressed as compared to the second surface 11a, the end portion 24a on the side surface of the metal case 24 is formed like the laminated electronic component 30 with the metal case. Even when connected to the ground electrode 14 provided on the surface 111b, the end 24a of the side surface of the metal case 24 does not protrude from one main surface of the multilayer electronic component 10. Therefore, the height of the laminated electronic component 30 with a metal case can be reduced.

【0024】図7に、別の金属ケース付き積層電子部品
を示す断面図を示す。金属ケース付き積層電子部品30
aのように、金属ケース26の側面の端部26aが積層
電子部品10の段部12の方向に折り曲げられ、金属ケ
ース26の側面の端部26aとグランド電極14とがは
んだ27を介して接続されると、金属ケース26の側面
の端部26aとグランド電極14とがより強固な接続と
なる。
FIG. 7 is a sectional view showing another laminated electronic component with a metal case. Laminated electronic component 30 with metal case
a, the end 26a on the side surface of the metal case 26 is bent in the direction of the step 12 of the multilayer electronic component 10, and the end 26a on the side surface of the metal case 26 and the ground electrode 14 are connected via the solder 27. Then, the end 26a on the side surface of the metal case 26 and the ground electrode 14 are connected more firmly.

【0025】[0025]

【発明の効果】本発明の積層電子部品によれば、積層電
子部品を構成している積層体の一方主面に段差を設け、
外部電極が形成される第1の面と、その第1の面に比べ
て凹んでいるとともに、グランド電極が形成される第2
の面とを形成しているため、積層電子部品を回路基板に
実装する際に、第2の面上のグランド電極と回路基板上
のグランドパターンを接続するはんだが、グランド電極
が形成される第2の面から外部電極が形成される第1の
面へ広がらない。したがって、グランド電極と外部電極
とが短絡する危険性がないため、外部電極及びグランド
電極の配置ピッチを細かくでき、積層電子部品の小型化
が可能となる。
According to the multilayer electronic component of the present invention, a step is provided on one principal surface of the laminate constituting the multilayer electronic component,
A first surface on which an external electrode is formed and a second surface on which a ground electrode is formed while being recessed as compared with the first surface.
When the multilayer electronic component is mounted on the circuit board, the solder connecting the ground electrode on the second surface to the ground pattern on the circuit board is used for mounting the multilayer electronic component on the circuit board. The second surface does not spread to the first surface on which the external electrodes are formed. Therefore, there is no danger of short-circuiting between the ground electrode and the external electrode, so that the arrangement pitch of the external electrode and the ground electrode can be reduced, and the size of the multilayer electronic component can be reduced.

【0026】また、積層電子部品に金属ケースを取り付
けて金属ケース付き積層電子部品にする際には、第1の
面に比べて凹ませて形成した第2の面上に、グランド電
極を設けているため、金属ケースの側面の端部を、第2
の面上に設けられたグランド電極と接続させても、金属
ケースの側面の端部が積層電子部品の一方主面から飛び
出さない。したがって、金属ケース付き積層電子部品に
おいて低背化が可能となる。
When a metal case is attached to the laminated electronic component to form a laminated electronic component with a metal case, a ground electrode is provided on a second surface formed to be depressed with respect to the first surface. The end of the side of the metal case
Even when connected to the ground electrode provided on the surface of the laminated electronic component, the end of the side surface of the metal case does not protrude from one main surface of the multilayer electronic component. Therefore, the height of the laminated electronic component with a metal case can be reduced.

【0027】さらに、金属ケース付き積層電子部品にお
いても、金属ケースの側面の端部と、第2の面上に設け
られたグランド電極とを接続するはんだが、グランド電
極が形成される第2の面から外部電極が形成される第1
の面へ広がらないため、グランド電極と外部電極との短
絡を防止することができる。
Further, also in the laminated electronic component with a metal case, the solder for connecting the end of the side surface of the metal case and the ground electrode provided on the second surface is formed by the second electrode on which the ground electrode is formed. The first where the external electrode is formed from the surface
Therefore, a short circuit between the ground electrode and the external electrode can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る積層電子部品の一実施例を示す斜
視図である。
FIG. 1 is a perspective view showing one embodiment of a laminated electronic component according to the present invention.

【図2】図1に示した積層電子部品を得るために準備さ
れるマザー積層体を示す斜視図である。
FIG. 2 is a perspective view showing a mother laminate prepared for obtaining the multilayer electronic component shown in FIG.

【図3】図2に示したマザー積層体のプレス前を示す断
面図である。
FIG. 3 is a sectional view showing the mother laminate shown in FIG. 2 before pressing.

【図4】図2に示したマザー積層体のプレス後を示す断
面図である。
FIG. 4 is a cross-sectional view showing the mother laminate shown in FIG. 2 after pressing.

【図5】図2に示したマザー積層体を示す拡大斜視図で
ある。
FIG. 5 is an enlarged perspective view showing the mother laminate shown in FIG. 2;

【図6】金属ケース付き積層電子部品を示す断面図であ
る。
FIG. 6 is a cross-sectional view showing a laminated electronic component with a metal case.

【図7】別の金属ケース付き積層電子部品を示す断面図
である。
FIG. 7 is a cross-sectional view illustrating another laminated electronic component with a metal case.

【図8】従来の積層電子部品を示す斜視図である。FIG. 8 is a perspective view showing a conventional laminated electronic component.

【図9】従来の金属ケース付き積層電子部品を示す断面
図である。
FIG. 9 is a cross-sectional view showing a conventional laminated electronic component with a metal case.

【符号の説明】[Explanation of symbols]

10 積層電子部品 11 積層体 111 一方主面 111a 第1の面 111b 第2の面 12 段差 13 外部電極 14 グランド電極 17a〜17e 絶縁性シート REFERENCE SIGNS LIST 10 laminated electronic component 11 laminated body 111 one main surface 111 a first surface 111 b second surface 12 step 13 external electrode 14 ground electrode 17 a to 17 e insulating sheet

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 内部に回路要素を介在させた状態で複数
の絶縁性シートを積層して、相対する主面と該主面間を
連結する側面からなる略直方体状の積層体を構成し、該
積層体の一方主面に、前記回路要素に電気的に接続され
た複数の外部電極及びグランド電極を備える積層電子部
品において、 前記積層体の一方主面に、少なくとも1つの段差を設け
ることにより、第1の面と該第1の面に比べて凹んでい
る第2の面とを形成し、前記第1の面に前記外部電極が
設けられ、前記第2の面に前記グランド電極が設けられ
ることを特徴とする積層電子部品。
1. A laminate having a substantially rectangular parallelepiped shape comprising a plurality of insulating sheets laminated with a circuit element interposed therein to form opposing main surfaces and side surfaces connecting the main surfaces, A laminated electronic component comprising a plurality of external electrodes and a ground electrode electrically connected to the circuit element on one main surface of the laminate, wherein at least one step is provided on one principal surface of the laminate. Forming a first surface and a second surface that is recessed relative to the first surface, wherein the external electrode is provided on the first surface, and the ground electrode is provided on the second surface. A laminated electronic component characterized by being manufactured.
JP9153843A 1997-06-11 1997-06-11 Laminated electronic part Pending JPH113836A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9153843A JPH113836A (en) 1997-06-11 1997-06-11 Laminated electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9153843A JPH113836A (en) 1997-06-11 1997-06-11 Laminated electronic part

Publications (1)

Publication Number Publication Date
JPH113836A true JPH113836A (en) 1999-01-06

Family

ID=15571319

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9153843A Pending JPH113836A (en) 1997-06-11 1997-06-11 Laminated electronic part

Country Status (1)

Country Link
JP (1) JPH113836A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814026A (en) * 1987-02-03 1989-03-21 Ford Motor Company Method of producing composite welded components
US6751101B2 (en) 2000-11-02 2004-06-15 Murata Manufacturing Co., Ltd. Electronic component and method of producing the same
US6760227B2 (en) 2000-11-02 2004-07-06 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and manufacturing method thereof
JP2009099766A (en) * 2007-10-17 2009-05-07 Murata Mfg Co Ltd Coil component, and mounting structure thereof
US8064211B2 (en) 2006-08-31 2011-11-22 Tdk Corporation Passive component and electronic component module
JP2012084936A (en) * 2012-02-03 2012-04-26 Tdk Corp Coil component and manufacturing method therefor
WO2018159481A1 (en) * 2017-02-28 2018-09-07 株式会社村田製作所 Layered electronic component and method for manufacturing layered electronic component
WO2018159482A1 (en) * 2017-02-28 2018-09-07 株式会社村田製作所 Layered electronic component and method for manufacturing layered electronic component

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814026A (en) * 1987-02-03 1989-03-21 Ford Motor Company Method of producing composite welded components
US6751101B2 (en) 2000-11-02 2004-06-15 Murata Manufacturing Co., Ltd. Electronic component and method of producing the same
US6760227B2 (en) 2000-11-02 2004-07-06 Murata Manufacturing Co., Ltd. Multilayer ceramic electronic component and manufacturing method thereof
US8064211B2 (en) 2006-08-31 2011-11-22 Tdk Corporation Passive component and electronic component module
JP2009099766A (en) * 2007-10-17 2009-05-07 Murata Mfg Co Ltd Coil component, and mounting structure thereof
JP2012084936A (en) * 2012-02-03 2012-04-26 Tdk Corp Coil component and manufacturing method therefor
WO2018159481A1 (en) * 2017-02-28 2018-09-07 株式会社村田製作所 Layered electronic component and method for manufacturing layered electronic component
WO2018159482A1 (en) * 2017-02-28 2018-09-07 株式会社村田製作所 Layered electronic component and method for manufacturing layered electronic component
JPWO2018159481A1 (en) * 2017-02-28 2019-12-19 株式会社村田製作所 Multilayer electronic component and method of manufacturing multilayer electronic component
US10972066B2 (en) 2017-02-28 2021-04-06 Murata Manufacturing Co., Ltd. Laminated electronic component and method of manufacturing the same

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