JPH11353854A - Cartridge with semiconductor memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To preserve past record information by index data. SOLUTION: Each of a plurality of index areas G0-Gm is provide with a plurality of bank areas and corresponding to each of index area G0-Gm, bank switching control circuits 12a-12m are provided. When writing of index data is instructed by designating the address of the index area G0-Gm, the bank switching control circuit 12a-12m writes a new index data into an empty bank area while preserving old index data in the bank area. When the address of an index area is designated, up-to-date index data are read out and when the addresses of the index area and the bank area are designated, index data are read out from that bank area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cartridge containing a recording medium such as a silver halide photographic film or a magnetic recording film, and more particularly to a cartridge with a semiconductor memory provided with a semiconductor memory in addition to these storage media. It is about.

[0002]

2. Description of the Related Art Heretofore, as this type of cartridge with a semiconductor memory, there is a cartridge in which a semiconductor memory module is attached to a video tape cartridge conforming to the digital video recorder (DVCR) standard.

[0003] The cartridge with the semiconductor memory module can not only record a normal image on a built-in magnetic tape but also store image and character information in the semiconductor memory module.

It is also possible to attach a semiconductor memory to a photographic film cartridge. In this case, a plurality of index areas are reserved at specific addresses of the semiconductor memory module, and at the time of photographing, unique information such as an exposure condition and a photographing date set for each photographed frame is stored in the index area, or after development, Can store unique information such as the number of photo prints for each photographed frame in the index area. Furthermore, by using an electrically rewritable semiconductor memory, it is possible to update the unique information of each index area by rewriting it with the latest unique information.

[0005]

However, in the cartridge with a semiconductor memory module described above, if new unique information is written in the index area, there is a problem that, for example, history information processed in the past cannot be obtained. .

For example, when a semiconductor memory is attached to a photographic film cartridge, when a user creates a photographic print of a certain photographic frame a plurality of times and then tries to print the photographic print again, the user is asked to confirm the photographic frame. You may want to know the total number of photo prints. However, since only the latest (most recent) unique information is stored in the index area, there arises a problem that the total number of photographic prints performed in the past cannot be known. Also,
Even when a developer wants to know the development processing conditions performed in the past, there is a problem that such past history information cannot be obtained.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to overcome such problems, and a cartridge having a recording medium accommodated therein has information corresponding to recording information recorded on the recording medium. A cartridge with a semiconductor memory provided with a semiconductor memory having at least an index data storage area for storing index information, wherein the index data storage area is provided with a plurality of bank areas, and the recording area is stored in each of the bank areas. Index switching control means for storing a plurality of pieces of index information related to information while storing old index information is provided.

According to this configuration, a plurality of pieces of index information are stored in a plurality of bank areas while the old index information is stored. As a result, the history information on the record information recorded on the recording medium is stored without being destroyed. Also, when an instruction to write new index data to the index area is issued, writing to the bank area is automatically performed.

Further, the index switching control means includes:
When an instruction to read the index information stored in the index area is received, reading of the latest index information stored in the bank area is controlled.

With this configuration, the latest index information relating to the recording information recorded on the recording medium is read.

Further, the index switching control means includes:
When reading of the index information stored in the index area is designated by designating the bank area, reading of the index information stored in the designated bank area is controlled.

According to this configuration, not only the latest index data stored in the bank area, but also old index information in the arbitrarily designated bank area is read.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a cartridge with a semiconductor memory according to the present invention will be described below with reference to the drawings. A cartridge with a semiconductor memory in which a semiconductor memory is attached to a new standard film cartridge called an APS (advanced photo system) (hereinafter, referred to as an APS film cartridge with a semiconductor memory) will be described.

FIG. 1 is a perspective view showing an external structure of an APS film cartridge with a semiconductor memory, and FIG. 2 is a block diagram showing a circuit configuration of the semiconductor memory.

In FIG. 1, an APS film cartridge 1 with a semiconductor memory has a spool 3 on which a rolled silver halide photographic film 2 is wound so as to be rotatable in a bottomed cylindrical cartridge body 4 having good light shielding properties. It is stored. At the side end of the cartridge body 4, an opening 5 for taking in and out the silver halide photographic film 2, and a swingable light-shielding lid 6 for opening and closing the opening 5 are provided.

The respective ends of the spool 3 and the light-shielding lid 6 are exposed from the end surface of the cartridge body 4, and cutout key grooves 3a and 6a are formed at the respective ends. When the APS film cartridge 1 with the semiconductor memory is mounted in the camera system, the film transport mechanism in the camera system engages with the key grooves 3a, 6a, and the rotation of the spool 3 and the light shielding cover 6 are driven by the film transport mechanism. Opening and closing are performed.

When the cover 6 is opened by the above-described film transport mechanism and the spool 3 is further rotated in a predetermined direction,
The silver halide photographic film 2 is sent out one frame at a time through the opening 5, and a photograph can be taken. When the spool 3 is rotated in the opposite direction to the above, the silver halide photographic film 2 is wound into the cartridge body 4, and when the opening 5 is closed with the light-shielding lid 6 after the winding is completed, the silver halide photographic film 2 Can be prevented from being exposed to external light.

As described above, the APS film cartridge 1 with a semiconductor memory has a cartridge body 4 having good light-shielding properties.
And a spool 3 for feeding and winding the silver halide photographic film 2 and a light-shielding lid 6 for opening and closing the opening 5, so that the silver halide photographic film 2 in which unphotographed frames remain remains in the cartridge body. 4, the camera can be remounted in the camera system at a later date, and can be photographed using frames not yet photographed.

A modularized chip-shaped semiconductor memory 7 is fixed to the end face of the cartridge body 4.
At one end of the semiconductor memory 7, at least connection terminals such as a power supply input terminal, a clock signal input terminal, and a data input / output terminal are provided so as to be exposed. Electrical connection is made between the circuit shown in FIG. 2 and electronic equipment such as a camera system via these connection terminals.

Further, the semiconductor memory 7 of the present embodiment
It is composed of a serial semiconductor memory that performs data input / output on a bit-by-bit basis.
Programmable Read Only Memory, EEPROM (E
lectrically Erasable Programable Read Only Memor
y), manufacturing process of nonvolatile semiconductor memory such as flash memory, FRAM (Ferro Electric Random Acce
ss Memory).

In FIG. 2, the semiconductor memory 7 includes a memory matrix section 8 for storing data, a data transfer circuit 9, an address counter 10, a control circuit 11, and bank switching circuits 12a to 12m. .

In the memory matrix section 8, a large number of memory cells are arranged in 8-bit units (byte units). A memory bus DB composed of eight data lines is connected to each array of the same bits of these memory cells, and an address bus AB is connected to each array in byte units.

Further, the memory matrix section 8 has a plurality of file data storage areas (hereinafter, referred to as "file data storage areas") capable of storing a plurality of file data such as image data and audio data.
File areas F0 to Fn and index data storage areas (hereinafter, index areas) G0 to Gm for storing a plurality of index data are allocated.

More specifically, address # 10 set on upper address bus ABf of address bus AB
00 to $ 1n00, file areas F0 to Fn, and addresses $ 00xx to $ 0 set by lower address bus ABi
The index areas G0 to Gm are assigned to mxx. In each of the index areas G0 to Gm, 4
Each bank area is provided, and each bank area is configured in 1-byte units. Further, addresses% 00,% 01,% 10, and% 11 of each bank area are allocated by lower bits "xx" of addresses $ 00xx to $ 0mxx.

The data transfer circuit 9 is composed of an 8-bit bidirectional shift register, and has a 1-bit bidirectional serial data bus SB connected to the data input / output terminal.
And the memory bus DB. Then, it operates according to the clock signal CK externally input from the clock signal input terminal and the control signal Csp from the control circuit 11.

That is, when the data transfer circuit 9 receives the data write instruction by the control signal Csp, the data transfer circuit 9 receives the write data Din transferred from the bidirectional serial data bus SB in the form of a bit string for each bit, and then outputs 8 bits. The data is parallel-serial converted into unit data and transferred to the memory bus DB in parallel. Thereby, the data D input in the bit string
in is converted into 8-bit data and stored at the address specified by the address counter 10.

On the other hand, when a data read instruction is received by the control signal Csp, the data transfer circuit 9 inputs the data in byte units transferred from the memory matrix unit 8 via the memory bus DB in parallel, The data is parallel-serial converted into output data Dout for each and sent to the bidirectional serial data bus SB. That is, the address counter 1
Data read from the address specified by 0 is converted into a bit string and output to the bidirectional serial data bus SB.

The address decoder 10 has an address bus A
B, and a memory access control signal Cas supplied from the control circuit 11.
The clock signal CK is counted according to the following. By outputting the count value to the address bus AB, the memory matrix unit 8 is addressed in byte units.

The control circuit 11 is composed of a decoder circuit and firmware having a ROM structure, and determines the address data ADR and the command data COM in the input data Din externally input via the bidirectional serial bus SB. Thus, the control signals Csp and Cas and the bank designation control signal CBadr are generated.

Although the details will be described later, the command data C
OM includes a normal access command COM1 for instructing normal memory access (read and write).
And a bank access command COM2 for reading past history information stored in the bank area. The control circuit 11 controls the command data COM1, C
The memory access is controlled according to OM2.

The bank switching control circuits 12a to 12m are provided corresponding to the index areas G0 to Gm, as shown in FIG. Then, the lower address bus ABi
The address% 00,% 01,% 10,% 11 of each bank area provided in each index area G0-Gm in accordance with the instructions of the address signals AB00-AB0m and the bank designation control signal CBadr supplied through specify.

Further, the address data ADR included in the input data Din and the normal access command COM1
When an instruction to write index data to index areas G0 to Gm is issued, bank switching control circuits 12a to 12m
The bank switching control circuit specified by the address data ADR of the 12m writes the index data to a free bank area in the index area specified by the address data ADR. When an update of the index data is instructed to the same index area, the bank switching control circuits 12a to 12m automatically write the update index data to the other empty bank areas, and the old index data is replaced with the old index data. It is left in the bank area as it is.

The bank switching control circuits 12a to 12m
Holds pointer data specifying each bank area,
Each time the index data for updating is written to the empty bank area, the address of the bank area where the latest index data is written is held as pointer data. Thus, the pointer data always indicates the bank area in which the latest index data is stored.

Furthermore, the address data ADR included in the input data Din and the bank access command COM
2, when the reading of the index data in the bank area provided in the index areas G0 to Gm is instructed, the bank switching control circuits 12a to 12m execute the index area specified by the address data ADR and the bank access command COM2. And the index data stored in the bank area is read out.

When the reading of the index data is instructed by the bank access command COM2, the bank switching control circuits 12a to 12m perform the reading processing of the index data without changing the pointer data. . Thus, the pointer data always indicates the bank area in which the latest index data is stored.

Next, the semiconductor memory 7 having the above configuration
Will be described with reference to FIG. 4 and FIG.

FIG. 4A shows the configuration of input data Din for writing data, and FIG. 4B shows the configuration of input data Din for reading data. Also,
FIG. 3C shows the configuration of the normal access command COM1, and FIG. 4D shows the configuration of the bank access command COM2.

When writing data to the file areas F0 to Fn and the index areas G0 to Gm, as shown in FIG. 9A, address data ADR, command data COM and write data are written to the bidirectional serial bus SB. Data DW is sequentially input. Further, the command data C
OM is the normal access command COM shown in FIG.
Data writing is instructed using the instruction code OP of 1.

As a result, the write data DW is transferred to the memory matrix section 8 via the data transfer circuit 9 and stored at the address specified by the address data ADR.

When reading data stored in the file areas F0 to Fn, as shown in FIG.
Address data ADR and command data COM are sequentially input to the bidirectional serial bus SB. Further, the command data COM is instructed to read data by using the instruction code OP of the normal access command COM1 shown in FIG.

Thus, of the file areas F0 to Fn, the file area specified by the address data ADR is accessed. Then, the file data DR in the file area accessed by the memory is read out to the bidirectional serial bus SB as output data Dout via the data transfer circuit 9.

When data stored in the index areas G0 to Gn is read, address data ADR is supplied to the bidirectional serial bus SB as shown in FIG.
And command data COM are sequentially input. However, in this case, the command data COM is instructed to read data using the instruction code OP of the bank access command COM2 shown in FIG. Further, one of the addresses% 00,% 01,% 10, and% 11 of the bank area is designated by a binary code Badr in predetermined plural bits in the bank access command COM2.

Thus, the command data CO is stored in the index area specified by the address data ADR.
The index data DR stored in the bank area specified by the binary code Badr of M2 is read out to the bidirectional serial bus SB as output data Dout via the data transfer circuit 9.

Next, the operation of writing and reading index data to and from each of the index areas G0 to Gm will be described more specifically with reference to FIG. The index area G0 will be described as a representative.

First, the write operation of the index data will be described. When the APS film cartridge with semiconductor memory 1 is shipped, the file management areas F0 to Fn
No data is written in the index areas G0 to Gm. In other words, as shown in FIG. 5A, the empty area is in the same state as the state where the meaningless initial value data is written.

When index data having first information such as development conditions, development dates, and the number of photo prints is stored in the index area G0, the upper address # 0 of the index area G0 is stored in the address data ADR.
While specifying 0, the input data Din shown in FIG. 4A is input using the normal access command COM1 shown in FIG.

In response, control circuit 11 outputs control signals Csp, Cas, and CBadr to instruct data transfer circuit 9, address counter 10, and bank switching control circuits 12a-12m to write index data. I do.

Then, the index switching control circuit 12a
Are based on the address signal AB00 output from the address counter 10, and the address% 00,
That is, $ 00% 00 is designated, and the index data having the first information is stored in the 0th bank area as shown in FIG. 5B. Further, the index switch control circuit 12a holds pointer data indicating the 0th bank area.

Next, for example, when photoprints are additionally printed and index data having update information (second information) such as the number of photoprints is stored, the address data ADR is used to store the index area G0. While specifying the upper address $ 00 and using the normal access command COM1 shown in FIG.
Is input.

In response to this, control circuit 11 outputs control signals Csp, Cas and CBadr to instruct data transfer circuit 9, address counter 10 and bank switching control circuits 12a to 12m to write index data. I do.

The index switching control circuit 12a
Specifies the index area G0 based on the address signal AB00 output from the address counter 10, and further specifies the address% 01 of the vacant first bank area. That is, the second bank area at the address of $ 00% 01 is specified. As a result, as shown in FIG. 5C, the index data having the second information is stored in the first bank. Further, the index switch control circuit 12a holds pointer data indicating the first bank area.

When the index data having the information for the third and fourth times is written, the third and fourth times are respectively stored in the second and third bank areas as shown in FIGS. The fourth information is stored, and pointer data indicating the third bank area and the fourth bank area is held.

When the index data having the fifth information is written, the fifth information is overwritten on the 0th bank area storing the oldest index data as shown in FIG. The second to fourth information stored (stored) and stored in the remaining bank area is held as it is.

When the index data having the sixth and seventh information is written, as shown in FIGS. 7G and 7H, the oldest index data is stored in the bank area where the oldest index data is stored. In order, 6th and 7th
The information of the first time is stored, and the same processing is performed thereafter.

As described above, when storing the index data exceeding the number of bank areas secured in advance, the latest index data is stored by overwriting the oldest index data. While retaining the index data, past history information can also be saved.

Next, the index area G
A case where the index data stored in 0 is searched will be described. In this case, the normal access command C
Using either OM1 or the bank access command COM2, the reading of the index data is instructed.

When the normal access command COM1 is used, the index area G is stored in the address data ADR.
The input data Din shown in FIG. 4B is input by specifying the upper address $ 00 of 0 and using the normal access command COM1.

In response, control circuit 11 outputs control signals Csp, Cas, and CBadr to instruct data transfer circuit 9, address counter 10, and bank switching control circuits 12a-12m to write index data. I do.

Then, the index switching control circuit 12a
Designates the index area G0 based on the address signal AB00 output from the address counter 10.

Here, when data reading is instructed by the normal access command COM1, the index switching control circuit 12a specifies a bank area corresponding to the held pointer data. So, for example,
As shown in FIG. 5E, if the index data having the fourth information is stored, based on the pointer data, the address% 11 of the third bank area where the latest index data is stored is stored. Is specified. As a result, the index data having the fourth information in the third bank area is read.

Further, for example, as shown in FIG. 5B, when the data read by the normal access command COM1 is instructed after the index data having the first information is written, the latest index is read. Based on the pointer data indicating the storage area,
The index data having the first information stored in the bank area is read. Similarly, FIG.
In the case shown in FIG. 5C, the index data having the second information stored in the first bank area, as shown in FIG.
In the case shown in (d), the index data having the third information stored in the second bank area is read.

As described above, the normal access command COM
In the case where the data reading instruction is given by the number 1, only the latest (most recent) index data is read.

Next, when reading the index data in the index area G0 using the bank access command COM2, the upper address $ 00 of the index area G0 is specified by the address data ADR,
A predetermined plurality of bits in the bank access command COM2 are used to store addresses% 00,% 01,% 10,% of the bank area.
11 is designated by a binary code Badr. Then, as shown in FIG. 4B, input data Din is input.

In response, the control circuit 11 instructs the data transfer circuit 9 and the address counter 10 to read the index data by the bank access command COM2 by the control signals Csp and Cas. Further, the control circuit 11 supplies a bank designation control signal CBadr indicating a bank area designated by the binary code Badr to the bank switching control circuits 12a to 12m.

For example, in the state shown in FIG. 5E, when the first bank area (address% 01) is designated by the binary code Badr, the bank switching control circuit 12a
Are the address signal AB00 and the bank designation control signal CBadr.
, The first bank area at address $ 00% 01 is designated. As a result, the index data having the second information stored in the first bank area of the index area G0 is read. When the address of another bank area is specified by the binary code Badr in the bank access command COM2, the index data of that bank area is read.

As described above, the bank access command CO
By using M2, index data in each bank area provided in the index areas G0 to Gm can be arbitrarily read.

Further, when data reading is instructed using the bank access command COM2, the pointer data held in the bank switching control circuits 12a to 12m is not changed, so that the pointer data always contains the latest index data. Indicates the bank area in which is stored. As a result, the relationship between the developed frame and the latest index data is associated one-to-one,
Simply by searching the latest index data, it is possible to obtain the unique information of the corresponding frame.

As described above, according to the present embodiment, since a plurality of bank areas for storing past index data are provided, an excellent effect that past history information can be easily entered can be obtained. Can be

Further, when writing new index data, the new index data is automatically written in a vacant bank area only by specifying the address of the index area. Therefore, the user can easily update the index data without being aware of the existence of the bank area.

The bank switching control circuits 12a to 12m
Since the latest index data is always stored and the bank area is designated by the pointer data held in the, the most important latest index data can be easily searched.

Furthermore, since the relationship between the latest index data and the developed frame is associated one-to-one by the pointer data, the problem that index data of another frame is erroneously read is not caused. . As a result, a highly reliable search or the like can be realized.

In this embodiment, the serial semiconductor memory 7 for accessing data in 8-bit units has been described, but the present invention is not limited to this. The memory cells of the memory matrix unit 8 may be a serial semiconductor memory that performs memory access in word units (16-bit units) or other plural-bit units.

In the present embodiment, the serial semiconductor memory 7 has been described. However, the present invention is not limited to this, and a semiconductor memory that performs parallel input / output of write data and read data may be applied. .

Further, the case where the number of bank areas in each of the index areas G0 to Gm is set to four has been described. However, the present invention is not limited to this, and an arbitrary number of index areas and index areas are provided. Is what you can do.

Further, as one use mode, a case has been described where information such as development conditions at the time of development and the number of photographic prints is stored in the index area and the bank area. However, other information may be stored. For example, file areas F0 to Fn
In addition, the image data obtained by digitizing the image of the photographic film is stored, and the processing information when the image data is subjected to the image processing is stored in the index area and the bank area, and the processing information is updated. And other applications are possible.

Although the APS film cartridge 1 with a semiconductor memory has been described, this is merely an embodiment, and the present invention includes other cartridges. As an example, a DVCR used in a digital video recorder (DVCR) for digitally photographing a subject
For video tape cartridges. The storage medium stored in the cartridge is not limited to a silver halide photographic film or a magnetic recording medium, but may be another recording medium.

[0077]

According to the present invention as described above,
Since multiple index information is stored in multiple bank areas while preserving old index information,
It is possible to obtain history information on the recording information recorded on the recording medium.

Further, when an instruction to write new index data to the index area is issued, writing to the bank area is automatically performed, so that the user can easily understand the existence of the bank area without being aware of the existence of the bank area. The index data can be updated at the same time.

When an instruction to read out the index information stored in the index area is issued, the latest index information stored in the bank area is read out. Information can be easily searched.

If the reading of the index information stored in the index area is designated by designating the bank area, the index information stored in the designated bank area can be read. In addition, it is possible to arbitrarily designate past history information relating to record information and perform a search or the like.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an external structure of an APS film cartridge with a semiconductor memory according to the present embodiment.

FIG. 2 is a block diagram illustrating a circuit configuration of the semiconductor memory according to the embodiment;

FIG. 3 is a block diagram showing a configuration of a bank switching control circuit, an index area and a bank area.

FIG. 4 is an explanatory diagram showing a configuration of input data Din, a normal access command, and a bank access command.

FIG. 5 is an explanatory diagram for describing an operation of writing index data to a bank area and an operation of reading index data from the bank area;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... APS film cartridge with semiconductor memory 7 ... Semiconductor memory 8 ... Memory matrix part 9 ... Data transfer circuit 10 ... Address counter 12a-12m ... Bank switching control circuit G0-Gm ... Index data storage area

Claims (6)

[Claims] 1. A cartridge provided with a semiconductor memory having a semiconductor memory having an index data storage area for storing at least index information corresponding to recording information recorded on the recording medium, the cartridge having a recording medium accommodated therein. The index data storage area includes a plurality of bank areas, and each of the bank areas includes an index switching control unit for storing a plurality of pieces of index information regarding the recording information while storing old index information. A cartridge with a semiconductor memory. 2. The index switching control means, when receiving an instruction to read index information stored in the index area, performs read control of the latest index information stored in the bank area. The cartridge with a semiconductor memory according to claim 1. 3. The index switching control means, when instructed to read out index information stored in the index area by designating the bank area, specify the index stored in the designated bank area. 3. The cartridge with a semiconductor memory according to claim 1, wherein reading control of information is performed. 4. The cartridge with a semiconductor memory according to claim 1, wherein the semiconductor memory is a serial semiconductor memory. 5. The cartridge with a semiconductor memory according to claim 1, wherein
The cartridge with a semiconductor memory according to any one of claims 1 to 4, wherein the cartridge is a film cartridge conforming to the PS standard. 6. The cartridge with a semiconductor memory according to claim 1, wherein the cartridge with a semiconductor memory is a tape cartridge for a digital video recorder.