JPH11346120A - High efficiency power amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high efficiency power amplifier which realizes constitution minimizing an expensive passive filter, required for the high efficiency power amplifier and totally reduces cost and lowers high frequency noise as compared with an existing high efficiency power amplifier. SOLUTION: High frequency noise is suppressed effectively, while minimizing the constitution of the passive filter 3 by equivalently realizing an active filter by using a linear power amplifier 6 driven synchronously in parallel with a D-grade power amplifier 2. In addition, generation of unpleasant sound called popping sound is prevented by executing the disconnecting control of a signal inputted from a signal input terminal 21 and each operation control of the amplifier 2 and a linear voltage amplifier 15 by the use of first to third muting circuits 17 to 19 at the starting/stopping of the supply of a power source.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high efficiency power amplifier having a class D power amplifier, and more particularly to a low noise high efficiency power amplifier suitable for audio signal amplification.

[0002]

BACKGROUND OF THE INVENTION According to prior art high efficiency power amplifiers used in connection with loudspeakers, class D power amplifiers have heretofore been used in various forms as power efficient power amplifiers for audio. I have.

Hereinafter, a conventional example of a high-efficiency power amplifier of the class D power amplifier described above will be described with reference to the drawings. 15, reference numeral 301 denotes a signal input terminal, 302 denotes a class D power amplifier, 303 denotes a speaker input terminal, and 304 denotes a D input terminal.
Output terminal of the class D power amplifier 302, 305 is a positive power supply terminal of the class D power amplifier 302, 306 is a negative power supply terminal of the class D power amplifier 302, 307 is a passive low-pass filter, 31
Reference numerals 0A, 310B, and 310C denote coils that form the passive filter 307, 311A, 311B, and 311C denote capacitors that form the passive filter 307, and 326 denotes a speaker.

[0004] The operation of the conventional high-efficiency power amplifier configured as described above will be described below. First, an audio signal input to the signal input terminal 301 is power-amplified by a class D power amplifier 302 while performing a switching operation by a PWM (pulse width modulation) method. Therefore, a modulated carrier signal having a large PWM is output from the output terminal 304 of the class D power amplifier 302. In order to remove this modulated carrier signal, the passive low-pass filter 307
It operates as a 6th-order Butterworth-type steep filter composed of stage coils and capacitors.

FIG. 16 shows typical filter characteristics. As can be seen from FIG. 16, in order to transmit the audio signal to the speaker without attenuating, the cutoff frequency (fc) of the filter is usually set to a region of 20 kHz or more, which is the upper limit of the audio signal. Further, if the PWM modulation carrier frequency is, for example, 200 kHz, the attenuation determined by the characteristics of the passive low-pass filter indicates a certain finite value (for example, -60 dB). Therefore, the PWM modulation carrier frequency component is input to the speaker 326 as residual noise at the speaker input terminal 303.

[0006]

However, in the configuration of the conventional high-efficiency power amplifying apparatus as described above, no matter how steep the filter characteristics of the passive low-pass filter 307, a finite PWM modulation carrier frequency component is required. The residual noise of the value is superimposed on the audio signal, and this component is radiated through the speaker code, which may adversely affect all devices as so-called high-frequency noise. Alternatively, it is necessary to use expensive coils and capacitors in order to form a high-order passive low-pass filter, and there has been a problem that a high cost is generally spent on a noise suppression filter.

The present invention has been made in view of the above-mentioned conventional problems, and realizes a configuration for minimizing an expensive passive filter, and is generally less expensive than a conventional high-efficiency power amplifying apparatus and has less high-frequency noise. It is intended to provide an efficient power amplifier.

[0008]

SUMMARY OF THE INVENTION A first aspect of the present invention is as follows.
In a high-efficiency power amplifying device for amplifying an input signal input to a signal input terminal, a PWM power amplifier for amplifying an input signal from the signal input terminal by pulse width modulation and outputting the amplified signal, and an output from the PWM power amplifier A passive low-pass filter that demodulates and outputs the pulse width modulated signal, a positive floating voltage source that supplies a positive current by shifting the demodulated signal output from the passive low-pass filter by a predetermined voltage + DV, A negative floating voltage source that shifts the demodulated signal output from the low-pass filter by a predetermined voltage -DV and supplies a negative current, amplifies the voltage of the input signal from the signal input terminal, and sets the predetermined voltages + dV and -dV. And a linear voltage amplifier composed of a linear circuit, which is shifted and output by + dV, respectively. A voltage amplification signal with the positive direction current to current amplifier for generating a positive current amplifying signal, -
The voltage-amplified signal shifted by dV is current-amplified by a negative-direction current to generate a negative-direction current-amplified signal, and the positive-direction current-amplified signal and the negative-direction current-amplified signal are added in a push-pull form to generate a power-amplified signal. And an output device for generating and outputting.

A second aspect of the present invention is to provide a high-efficiency power amplifier for amplifying the power of an input signal input to a signal input terminal, by applying a positive bias voltage to an input signal from the signal input terminal. A first bias power supply, a first PWM power amplifier that outputs a first pulse width modulated signal generated by power-amplifying the positively biased input signal by pulse width modulation, and the first pulse A first passive low-pass filter for outputting a first demodulated signal generated by demodulating the width-modulated signal, a second bias power supply for applying a negative bias voltage to an input signal from a signal input end, A second PWM power amplifier that outputs a second pulse width modulated signal generated by power-amplifying the input signal biased in the negative direction by pulse width modulation, and demodulates and generates the second pulse width modulated signal. A second passive low-pass filter for outputting a second demodulated signal, a predetermined voltage + dV and -d with the input signal from the signal input terminal for voltage amplification
A linear voltage amplifier composed of a linear circuit, which is shifted and output by V, and a voltage-amplified signal shifted by + dV, which is current-amplified by a first demodulation signal to generate a positive-direction current-amplified signal; The voltage amplification signal shifted by dV is current-amplified by the second demodulation signal to generate a negative-direction current amplification signal, and the positive-direction current amplification signal and the negative-direction current amplification signal are added in a push-pull form to amplify the power. And an output device for generating and outputting a signal.

A third aspect of the present invention is the high-efficiency power amplifier according to the first or second aspect, wherein the output unit is constituted by a push-pull circuit formed by a complementary circuit. A high-efficiency power amplifying device characterized in that:

A fourth aspect of the present invention is the high efficiency power amplifier according to any one of the first to third aspects, wherein the linear voltage amplifier and the output unit form a class B power amplifier. Is a high-efficiency power amplifier.

A fifth aspect of the present invention is the high-efficiency power amplifier according to any one of the first to third aspects, wherein the linear voltage amplifier and the output unit form a class AB power amplifier. Is a high-efficiency power amplifier.

A sixth aspect of the present invention is the high-efficiency power amplifier according to any one of the first to third aspects, wherein the linear voltage amplifier and the output unit form a class A power amplifier. Is a high-efficiency power amplifier.

According to a seventh aspect of the present invention, there is provided a high-efficiency power amplifier according to any one of the first and second aspects, wherein the passive low-pass filter comprises a spiral electrode formed on a substrate. And a high efficiency power amplifying device.

An eighth aspect of the present invention is the high-efficiency power amplifier according to the seventh aspect, wherein the spiral electrode comprises:
This is a high-efficiency power amplifying device formed of a copper foil pattern and forming a coil.

According to a ninth aspect of the present invention, there is provided a high-efficiency power amplifier according to any one of the first and second aspects, wherein a PWM power amplifier and a linear voltage amplifier in an input signal input from a signal input terminal are provided. Control circuit for controlling the input to the power supply, a first operation control circuit for controlling the operation of the PWM power amplifier, a second operation control circuit for controlling the operation of the linear voltage amplifier, and start of supply of power supplied from the outside A high-efficiency power amplifying device, comprising: a control circuit for performing detection of a supply stop and an input control circuit, a first operation control circuit, and a second operation control circuit in accordance with the detection result. It is.

A tenth aspect of the present invention is the high-efficiency power amplifier according to the ninth aspect, wherein the control circuit detects the start of power supply and sends a signal to the input control circuit from the signal input terminal. The input of the input signal to the PWM power amplifier and the linear voltage amplifier is cut off for a predetermined time t1, the signal output of the PWM power amplifier is stopped for a first operation control circuit for a predetermined time t2, and the second operation control circuit Is a high-efficiency power amplifying device, wherein the signal output of the linear voltage amplifier is stopped for a predetermined time t3.

An eleventh aspect of the present invention is the high-efficiency power amplifier according to the tenth aspect, wherein the control circuit comprises: t
A high-efficiency power amplifying device characterized by controlling so that 1>t3> t2.

A twelfth aspect of the present invention is the high-efficiency power amplifying apparatus according to the ninth aspect, wherein the control circuit detects an interruption of the power supply and sends a signal from the signal input terminal to the input control circuit. Immediately cut off the input of the input signal to the PWM power amplifier and the linear voltage amplifier, stop the signal output of the PWM power amplifier to the first operation control circuit after a predetermined time t4, and set the linear voltage to the second operation control circuit. A high-efficiency power amplifying device wherein the signal output of the amplifier is stopped after a predetermined time t5.

A thirteenth aspect of the present invention is the high-efficiency power amplifier according to the twelfth aspect, wherein the control circuit comprises:
A high-efficiency power amplifying device characterized by performing control so that 4> t5.

The PWM power amplifier connected to the signal input terminal is a class D power amplifier, and the linear voltage amplifier and the output device connected to the signal input terminal are linear power amplifiers. The output device is a complementary output device and is equivalent to an active filter.

According to the present invention, from the viewpoint of power efficiency, the present invention is the sum of the power loss of the class D power amplifier and the power loss of the linear power amplifier. Minimizing the power loss of a linear power amplifier if the positive and negative floating voltage sources driving the complementary output of the linear power amplifier can be set to the lowest acceptable voltage Therefore, the original high efficiency of the class D power amplifier is not lost. In addition, the passive filter is made up of a pair of coil, capacitor and resistor to minimize the configuration, and the limit of the passive filter characteristic is reduced by using the complementary output of the linear power amplifier as an equivalent active filter. Since an extremely large attenuation characteristic can be provided for overcoming and removing the PWM modulation carrier frequency component, an audio signal having almost no high frequency noise can be reproduced on the output terminal of the high efficiency power amplifier.

On the other hand, an input control circuit connected to the signal input terminal is a first mute circuit, and a first operation control circuit is a second mute circuit.
This is a mute circuit, and the second operation control circuit is a third mute circuit. At the start and stop of the supply of power, by performing cutoff control of a signal input from a signal input terminal, operation control of a class D power amplifier, and operation control of a linear voltage amplifier, output of unnecessary signals, for example, signal input When amplifying the power of an audio signal input from the end, it is possible to prevent generation of an unpleasant sound called a pop sound.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail based on an embodiment shown in the drawings. (First Embodiment) FIG. 1 is a schematic block diagram showing a basic configuration of a high-efficiency power amplifier according to a first embodiment of the present invention.

In FIG. 1, a high efficiency power amplifying device 1
A class D power amplifier 2 for amplifying the power of an audio signal;
A passive filter 3 serving as a low-pass filter for removing unnecessary modulated carrier signals output from the class D power amplifier 2, a positive floating voltage source 4, a negative floating voltage source 5, and power amplification of an audio signal , A mute circuit section 7 formed by a plurality of mute circuits, and a power switch (not shown)
The control circuit 8 controls the operation of the mute circuit unit 7 in response to the start and stop of the supply of AC power to a power supply circuit (not shown) for supplying power to the high-efficiency power amplifying apparatus 1 in accordance with the operation of It is configured.

The passive filter 3 includes a capacitor 13 and a terminating resistor 14 in a series circuit of a resistor 11 and a coil 12.
Are connected and formed. Further, the linear power amplifier 6 is formed of a linear voltage amplifier 15 formed of a linear circuit and a complementary output device 16 formed of a complementary circuit forming a push-pull circuit. A current is supplied to a speaker (not shown) according to the amplified audio signal. Mute circuit section 7
Is used to prevent generation of an unpleasant pop sound when the power is turned on and when the power is turned off. The three mute circuits of the first mute circuit 17, the second mute circuit 18, and the third mute circuit 19 Is formed.

The signal input terminal 21 of the high efficiency power amplifier 1
Are connected to the input terminal 2a of the class D power amplifier 2 and the input terminal 15a of the linear voltage amplifier 15, respectively, and are connected to the output terminal 17a of the first mute circuit 17.
The class D power amplifier 2 further includes a positive power supply terminal 2b, a negative power supply terminal 2c, a control input terminal 2d to which a control signal for mute operation is input, and an output terminal 2e. Is connected to the input terminal 3a. Output terminal 3b of passive filter 3 and complementary output device 16
And a negative floating voltage source 5 between the output terminal 3b of the passive filter 3 and the negative power source terminal 16b of the complementary output device 16, respectively. It is connected.

On the other hand, the linear voltage amplifier 15 further includes a positive power supply terminal 15b, a negative power supply terminal 15c, a control input terminal 15d to which a control signal for mute operation is input, and two output terminals 15e and 15f. Output terminals 15e and 15f are:
Input terminals 16c and 16d of complementary output device 16
Connected corresponding to. Complementary output device 1
A speaker is connected to the output terminal 16e of the sixth.

The output terminal 18a of the second mute circuit 18
The output terminal 19a of the third mute circuit 19 is connected to the control input terminal 2d of the class D power amplifier 2 and is connected to the linear voltage amplifier 1
5 is connected to the control input terminal 15d. The control input terminals 17 b, 18 b, and 19 b to which control signals for controlling operations in the first mute circuit 17, the second mute circuit 18, and the third mute circuit 19 are input are connected to the control circuit 8.

FIG. 2 is a diagram showing a circuit example of the class D power amplifier 2 shown in FIG. The class D power amplifier 2 according to the first embodiment of the present invention is a PWM power amplifier that performs power amplification by pulse width modulation (PWM), and its basic configuration will be described.

In FIG. 2, 41 is an operational amplifier, and 42 and 43 are resistors for determining the voltage gain of the class D power amplifier 2. An integrator 38 includes capacitors 45 and 46 and a resistor 47.
, And the integrator 38 and the operational amplifier 41 form an integrating circuit. The pnp transistors 48 and 51, the diodes 49 and 50, and the resistors 52, 53 and 54 form a comparator 39. The NAND gates 55 and 56 form a phase inverter 40 for generating a phase inversion pulse, and 2d is a control input terminal for controlling the stop of the PWM carrier switching of the class D power amplifier 2. Although not shown in FIG. 2, the control input terminal 2d is pulled up in the class D power amplifier 2 using a pull-up resistor or the like.

Npn transistors 58 and 65, pnp transistors 60 and 66, resistors 59, 61, 62, 64,
The zener diode 63, the capacitor 67, and the diode 68 form a positive driver 80 that turns on and off an N-channel power MOS transistor 69 that functions as a positive power switch.

Npn transistors 70 and 77, pnp transistors 72 and 78, resistors 71, 73, 74, 76,
And Zener diode 75 are N-channel power MOS transistor 7 functioning as a negative power switch.
A negative-side driver 81 for turning ON / OFF 9 is formed.

The audio signal input from the signal input terminal 21 is converted into a sawtooth wave by an integrator 38 and an integrating circuit of an operational amplifier 41, and the sawtooth wave is converted into a rectangular wave by a comparator 39. When the control input terminal 2d is pulled down, the NAND gates 55 and 56 of the phase inverter 40 are turned off.
Are both at the high level, and the output of the signal from the output terminal 2e stops.

FIG. 3 shows the linear power amplifier 6 shown in FIG.
FIG. 3 is a diagram showing an example of a basic configuration circuit of FIG. In FIG.
The linear voltage amplifier 15 includes resistors 91 and 92, a capacitor 93, and an operational amplifier 94. The operational amplifier 94 includes a first voltage amplifying stage 95, a second voltage amplifying stage 96, and a bias current generator 97. ing. Resistance 91,
Reference numeral 92 denotes a resistor that determines the voltage gain of the linear power amplifier 6, and capacitor 93 is a phase compensation capacitor.

The first voltage amplifying stage 95 includes pnp transistors 101 to 103 and npn transistors 104 and 105.
The pnp transistors 101 and 102 form a differential amplifier circuit, and the npn transistors 104 and 105 form a current mirror circuit. The base of the pnp transistor 101 forms the inverted input of the operational amplifier 94, and the base of the pnp transistor 102 forms the non-inverted input of the operational amplifier 94 and is grounded.

The second voltage amplifying stage 96 includes a pnp transistor 110, npn transistors 111 and 112, a resistor 1
13 to 115, capacitor 116 and diode 11
7, 118. The capacitor 116 is a phase compensating capacitor that forms a dominant pole of the linear voltage amplifier 15, and includes diodes 117 and 118.
Form a constant voltage bias diode group 119 for determining the bias current of the complementary output device 16.

The bias current generator 97 includes pnp transistors 120 and 121 and npn transistors 122 and 1
23, Zener diode 124 and resistors 125 to 12
8. npn transistors 122 and 1
23 forms a current mirror circuit. Also, p
np transistors 103, 110, 120 and resistor 10
6, 113 and 125 are constant current sources.

When a negative bias voltage is applied to the control input terminal 15d, the pnp transistors 103, 110, 12
When a constant current is supplied from 0 and the control input terminal 15d is grounded, the supply of the constant current from the pnp transistors 103, 110, and 120 is stopped, and the operations of the first voltage amplification stage 95 and the second voltage amplification stage 96 are stopped. Stop. Therefore, the output of signals from the output terminals 15e and 15f of the linear voltage amplifier 15 stops.

The complementary output unit 16 includes a push-pull circuit 131 formed of a complementary circuit,
A resistor 132 and a capacitor 133 for ensuring the load stability of the complementary output device 16, a coil 134 and a dump resistor 13 for ensuring the stability of the speaker load
5. The push-pull circuit 131
p power transistor 141, the power transistor 1
Npn transistor 142, npn driving
Power transistor 143, power transistor 14
3 is composed of a pnp transistor 144 for driving the driving circuit 3 and resistors 145 to 148.

The power transistors 141 and 143 are
The transistors 142 and 144 have complementary characteristics with each other, and similarly, the transistors 142 and 144 have complementary characteristics with each other. The resistance 145 is the collector resistance of the npn transistor 142, and the resistance 146 is the pnp transistor 14
4 collector resistance. The resistor 147 serves as a collector resistor of the power transistor 141 and has npn
The resistor 148 forms the emitter resistance of the transistor 142,
Is the collector resistance of the power transistor 143 and the emitter resistance of the pnp transistor 144.

On the other hand, the transformer 150, the diode bridge circuit 151, and the smoothing capacitors 152 and 153 form a floating voltage source. Capacitor 15
2 and its associated transformer 150 and bridge circuit 151 correspond to the positive floating voltage source 4 of FIG.
The reference numeral 50 and the bridge circuit 151 correspond to the negative floating voltage source 5 in FIG.

From the connection point J1 of the bridge circuit 151,
A positive current flowing from the emitter to the collector of the power transistor 141 and flowing to the output terminal 131 a of the push-pull circuit 131 is supplied. At the same time, from the connection point J2 of the bridge circuit 151, a negative current flowing from the output terminal 131a of the push-pull circuit 131 to the collector of the power transistor 143, and further from the collector of the power transistor 143 to the connection point J2 via the emitter. Supplied. The currents flowing through the power transistors 141 and 143 are in a push-pull relationship.

An example of the operation of the high-efficiency power amplifier 1 configured as described above will be described. Signal input terminal 21
Are input to the class D power amplifier 2 and the linear voltage amplifier 15 at the same time. The class D power amplifier 2 operates as a high-speed and high-efficiency PWM (pulse width modulation) switching amplifier by using half-bridge type high-speed switching power MOS transistors 69 and 79.

A waveform S21 in FIG. 4A shows an audio signal (a sine wave is exemplified) input to the signal input terminal 21, and a waveform S2e is power-amplified by the class D power amplifier 2 and PWM-modulated. The output waveform is shown. Also, the waveform S3b in FIG.
3 shows an output waveform from an output terminal 3b of the passive filter 3. In the passive filter 3, a signal obtained by demodulating the PWM modulation signal and returning to the original audio signal is output.
As shown in FIG. 4B, a sine wave which is the original audio signal is output after adding fine wavy high frequency noise.

On the other hand, the audio signal input to the linear power amplifier 6 is first converted to the linear voltage amplifier 15 shown in FIG.
The bias voltage of + dV and -dV (for example, + 5V and -5V) is applied by a constant voltage bias diode group 119 composed of diodes 117 and 118, and the upper voltage amplified signal output from the output terminal 15e. S15e and the lower voltage amplified signal S15f output from the output terminal 15f are generated, and the respective output waveforms are shown in FIG. The upper voltage amplified signal S15e and the lower voltage amplified signal S15f
Are shifted up and down by a potential difference of 2 dV, and all have the same waveform as the input signal S21. The signal S15e is supplied to the input terminal 16c of the complementary output device 16 at the signal S15f.
Are input to the input terminals 16d of the complementary output device 16, respectively.

The complementary output unit 16 further receives the signal S3b from the output terminal 3b of the passive filter 3, which is shifted in the positive and negative directions, to the power supply terminals 16a and 16b, respectively. That is, the signal S3b
Are + DV and -DV by the capacitors 152 and 153.
(For example, + 10V and -10V), and then applied to the power supply terminals 16a and 16b, respectively. Waveform S16 of FIG.
a and S16b are voltage waveforms at the power supply terminals 16a and 16b,
It has the same waveform. As is apparent from FIG. 5, preferably, the waveforms S16a and S16b sandwich the waveforms S15e and S15f as close as possible from both upper and lower sides, and the waveforms S16a and S16b do not overlap with the waveforms S15e and S15f. To

Among the audio signals voltage-amplified by the linear voltage amplifier 15, the audio signal indicated by the waveform S15e is current-amplified by the power transistor 141. This current is supplied from the connection point J1 of the diode bridge circuit 151, flows from the emitter to the collector of the power transistor 141, and is output from the output terminal 131 of the push-pull circuit 131.
a is a positive current flowing through a. Similarly, of the audio signal voltage-amplified by the linear voltage amplifier 15, the waveform S15f
Are amplified by the power transistor 143. This current is supplied from the connection point J2 of the diode bridge circuit 151, and the push-pull circuit 1
31 is a negative current flowing from the output terminal 131a of the power transistor 143 to the collector of the power transistor 143 and from the collector to the emitter of the power transistor 143.

That is, the power transistor 141
The current amplification of the upper voltage amplified signal S15e is performed by the positive current from the connection point J1 to generate a positive current amplified signal.
The power transistor 143 is connected to the lower voltage amplified signal S15.
f is amplified by a negative current from the connection point J2 to generate a negative current amplified signal. Then, the positive current amplified signal and the negative current amplified signal are added in a push-pull form, and the power amplified signal is output from the output terminal 131a.

Since the power transistors 141 and 143 are configured as a push-pull, the current flowing through the power transistor 141 and the current flowing through the power transistor 143 are added and averaged, and the resulting current is added to the push-pull circuit. 131 is output from the output terminal 131a. Therefore, the signal waveform of the voltage from the output terminal 131a becomes the waveform S131a in FIG. 5, which is an intermediate point between the waveforms S15e and S15f.

Thus, the power of the audio signal S21 can be faithfully amplified. In addition, since the current source for power amplification is limited between the waveforms S16a and S16b, the current of the supply source is set to a low supply power when the current is small, and to a high supply power when a large current is required. Can be controlled. Therefore, the efficiency of current supply can be increased.

Hereinafter, more specific examples will be described.
It is possible to set the PWM switching carrier frequency of no signal around 500 KHz, which is much higher than the upper limit of the audio frequency of 20 KHz. Moreover, the power efficiency can be developed with a target of, for example, 90%. The voltage gain of this self-excited class D power amplifier 2 is
It is determined by the ratio of the resistance 42 and the resistance 43. If the resistance value of the resistor 42 is R42 and the resistance value of the resistor 43 is R43,
The voltage gain of the class D power amplifier 2 = R43 / R42.

On the other hand, the audio signal input to the linear power amplifier 6 is voltage-amplified by the linear voltage amplifier 15. The linear voltage amplifier 15 is supplied with a voltage from a fixed power supply to the positive power supply terminal 15b and the negative power supply terminal 15c of the linear voltage amplifier. It can be expected to function as a voltage amplifying unit for a simple audio signal.

Next, a pure audio output signal without high-frequency noise is input to the complementary output device 16 through the first output terminal 15e of the linear voltage amplifier 15 and the second output terminal 15f of the linear voltage amplifier 15, and The output signal is power-converted through the complementary output device 16 and the output terminal 1 serving as the output terminal of the high-efficiency power amplifier 1 is output.
6e.

The voltage gain of the linear power amplifier 6 is determined by the ratio between the resistors 91 and 92. Here, assuming that the resistance value of the resistor 91 is R91 and the resistance value of the resistor 92 is R92, the voltage gain of the linear power amplifier 6 = R92 / R91.

The PWM signal at the output terminal 2 e of the class D power amplifier 2 is demodulated by the secondary passive low-pass filter 3. Even if the PWM switching carrier frequency component can be attenuated by about 40 dB, for example, the PWM switching pulse Assuming that the amplitude is ± 50 V, a PW of about 1 V
The M switching carrier frequency component is generated at the output terminal 3b of the secondary passive filter 3. Therefore, an audio output signal having the same PWM switching carrier frequency component is input to the positive power supply terminal 16a and the negative power supply terminal 16b of the complementary output device 16 through the positive floating voltage source 4 and the negative floating voltage source 5. Can be considered.

Here, the voltage gain of the class D power amplifier 2 = R43
When / R42 and the voltage gain of the linear power amplifier 6 = R92 / R91 are set to substantially the same voltage gain, the audio output signal will have a substantially intermediate voltage value between the positive floating voltage source 4 and the negative floating voltage source 5. Work while maintaining. In order to minimize the power loss, the voltage value of the positive floating voltage source 4 and the voltage value of the negative floating voltage source 5 may be minimized. For example, if the operation can be performed at ± 5 V, a linear power amplifier of ± 50 V may be used. By comparison, the power loss will be reduced to about 1/10.

The principle of suppressing the high frequency noise of the complementary output unit 16 will be described with reference to FIGS. FIG. 6 is an equivalent circuit diagram for explaining the principle of suppressing the high-frequency noise of the complementary output device 16. In FIG. 6, 1
Reference numeral 60A denotes a high-frequency noise source that transmits from the positive floating voltage source 4 to the output terminal 16e of the high-efficiency power amplifier 1 through the positive power supply terminal 16a of the complementary output device 16. 160B is a high-frequency noise source that transmits from the negative floating voltage source 5 to the output terminal 16e of the high-efficiency power amplifier 1 through the negative power supply terminal 16b of the complementary output device 16. 161 is the positive equivalent output resistance of the complementary output unit 16, 162 is the positive equivalent output capacitance of the complementary output unit 16, and 163 is the complementary output unit 1
Reference numeral 6 denotes a negative equivalent output resistance, 164 denotes a negative equivalent output capacitance of the complementary output unit 16, and 165 denotes a speaker end load resistance.

Next, the operation of the equivalent circuit of FIG. 6 will be described. 2
With the next output terminal 3b of the passive filter 3 as a virtual ground, the high-frequency noise source 160A and the high-frequency noise source 160B can be regarded as mutually opposite-phase components. Therefore, if the positive equivalent output resistance 161 and the positive equivalent output capacitance 162 of the complementary output device 16 and the negative equivalent output resistance 163 and the negative equivalent output capacitance 164 of the complementary output device 16 have very well matched values, respectively. In addition, a large amount of attenuation can be provided from a low frequency region to a high frequency region. Therefore, as a circuit configuration of the complementary output device 16 that effectively suppresses high-frequency noise, a feedback type device having a large equivalent output resistance as in the present embodiment is excellent. In addition, since the collector electrode corresponds to the back surface of silicon due to the physical structure of the silicon power transistor, the stray capacitance between the ground and the ground is larger than that of the emitter electrode. From this point as well, it can be said that when the emitter electrode is in the high-frequency noise source, the stray capacitance between the ground and the ground is small, so that it is superior.

When calculated using actual numerical values, for example, the positive equivalent output resistance 161 is 10 KΩ, the negative equivalent output resistance 163 is 9 KΩ, and the speaker load resistance 165 is 10 Ω.
, The suppression ratio of high-frequency noise is 80 dB, and assuming that the noise source has an amplitude of 1 V,
/ 10000 to 100 μV.

FIG. 7 shows the frequency characteristic of the amount of attenuation of the complementary output device 16. As can be seen from FIG. 7, the positive equivalent output capacitance 162 and the negative equivalent output capacitance 164
Is completely matched, a certain amount of attenuation can be expected up to an infinite frequency.

Next, respective operations at the start and stop of the supply of AC power to a power supply circuit (not shown) for supplying power to the high-efficiency power amplifying apparatus 1 in response to operation of a power switch (not shown) and the like. Will be described. Control circuit 8
Detects the start and stop of the supply of AC power, and
When the start or stop of the supply of the C power is detected, each of the control input terminals 17b to 19 of the first to third mute circuits 17 to 19 is detected.
b outputs a predetermined signal.

When a predetermined signal indicating that the start or stop of the supply of the AC power, for example, a High level signal is input from the control circuit 8 to the control input terminal 17b, the first mute circuit 17 outputs the High signal. While the level signal is being input, the signal input terminal 21 is grounded. Also, the first
When the predetermined signal is not input from the control circuit 8, the mute circuit 17 opens the output terminal 17a.

When a predetermined signal indicating that the start or stop of the supply of the AC power, for example, a High level signal is input from the control circuit 8 to the control input terminal 18b, the second mute circuit 18 outputs the High signal. While the level signal is being input, the control input terminal 2d of the class D power amplifier 2 is grounded, and the signal output from the output terminal 2e of the class D power amplifier 2 stops.

When the predetermined signal is not input from the control circuit 8, the second mute circuit 18 sets the output terminal 18a to an open state, and the D-class power amplifier 2
A state where the signal input from a is subjected to class D power amplification and output. The control input terminal 2d of the class D power amplifier 2 may be pulled up by the second mute circuit 18 when a predetermined signal is not input from the control circuit 8. In this case, the class D power amplifier 2
It is not necessary to pull up the control input terminal 2d inside.

When a predetermined signal indicating that the start or stop of the supply of the AC power, for example, a high-level signal is input from the control circuit 8 to the control input terminal 19b, the third mute circuit 19 turns to the high level. While the level signal is being input, the control input terminal 15 of the linear voltage amplifier 15
d is grounded, and the signal output from each output terminal 15e and 15f of the linear voltage amplifier 15 is stopped.

When the predetermined signal is not input from the control circuit 8, the third mute circuit 19 applies a predetermined negative voltage to the control input terminal 15d of the linear voltage amplifier 15, Is set to a state in which the signal input from the input terminal 15a is amplified and output. In the third mute circuit 19, the control circuit 8
The control input terminal 15d of the linear voltage amplifier 15 may be grounded while a predetermined signal is being input from the control circuit 15; otherwise, the control input terminal 15d may be connected to the negative power supply terminal 15c.

FIG. 8 is a timing chart of control signals output from the control circuit 8 to the control input terminals 17b to 19b of the first to third mute circuits 17 to 19 in response to the operation of the power switch. The operation flow of the control circuit 8 when the supply of AC power is started or stopped will be described with reference to FIG. 8, the control circuit 8 detects the start of the supply of the AC power, and simultaneously outputs a predetermined signal, for example, a high-level signal to each of the control input terminals 17b to 19b of the first to third mute circuits 17 to 19. The signal input terminal 21 and each of the control input terminals 2d and 15d are grounded.

Next, the control circuit 8 sets the control input terminal 18b of the second mute circuit 18 to Hig after a predetermined time t2, for example, 100 milliseconds after detecting the start of the supply of the AC power.
Fall from the h level to the low level. Accordingly, the second mute circuit 18 opens the output terminal 18a, and the class D power amplifier 2 starts a predetermined amplification operation.
Further, the control circuit 8 lowers the control input terminal 19b of the third mute circuit 19 from a high level to a low level after a predetermined time t3, for example, one second after detecting the start of the supply of the AC power. Accordingly, the third mute circuit 1
9 applies a negative bias voltage to the control input terminal 15d of the linear voltage amplifier 15, and the linear voltage amplifier 15 starts a predetermined amplification operation.

Further, after detecting the start of the supply of the AC power, the control circuit 8 sets the first time after a predetermined time t1, for example, 2 seconds, to the first power supply.
The control input terminal 17b of the mute circuit 17 falls from a high level to a low level. Accordingly, the first mute circuit 17 sets the output terminal 17a to an open state, and the audio signal input from the signal input terminal 21 receives the input signals 2a and 15 of the class D power amplifier 2 and the linear voltage amplifier 15.
a, and the mute operation at the start of the supply of the AC power is released.

Next, the control circuit 8 outputs a predetermined signal, for example, a High level signal, to the control input terminal 17b of the first mute circuit 17 upon detecting the stop of the supply of the AC power. Accordingly, the first mute circuit 17 grounds the signal input terminal 21.

Next, the control circuit 8 sets the control input terminal 19b of the third mute circuit 19 to Low at a predetermined time t5, for example, 20 milliseconds after detecting the stop of the supply of the AC power.
Start from the level to the high level. Accordingly, the third mute circuit 19 grounds the control input terminal 15d of the linear voltage amplifier 15. Further, the control circuit 8
The control input terminal 18b of the second mute circuit 18 rises from a low level to a high level after a predetermined time t4, for example, 30 milliseconds, after detecting the supply stop of the C power supply. Accordingly, the second mute circuit 18 grounds the control input terminal 2d of the class D power amplifier 2.

The power supply circuit for supplying power to the high-efficiency power amplifier 1 can supply power to the high-efficiency power amplifier 1 for two to three seconds after the supply of AC power is stopped. Power supply stops. Accordingly, the operation of connecting the signal input terminal 21 to the ground by the first mute circuit 17 is stopped, the output terminal 17a is finally opened, and the mute operation when the supply of the AC power is stopped is released.

In this manner, when the start and stop of the supply of AC power to the power supply circuit for supplying power to the high-efficiency power amplifier 1 by operating a power switch, etc.
It is possible to prevent generation of an unpleasant sound called a pop sound.

Here, the push-pull circuit 131 of FIG. 3 may be configured so as to perform a complementary operation as a three-stage feedback type emitter follower. FIG. 9 shows the push-pull circuit 131 in such a case. FIG. 6 is a circuit diagram showing another example of the embodiment. 9 is different from FIG. 3 in that the power transistor 141 is driven by a pnp transistor 171 and the pnp transistor 171 is driven.
Are driven by an npn transistor 172, the power transistor 143 is driven by an npn transistor 173, and the npn transistor 173 is driven by a pnp transistor 174.

The transistors 171 and 173 have complementary characteristics with each other.
72 and 174 have complementary characteristics to each other. The resistor 175 forms the emitter resistance of the pnp transistor 171, and the resistor 176 forms the collector resistance of the npn transistor 172. The resistor 177 represents the emitter resistance of the npn transistor 173, and the resistor 178 represents the pn transistor.
It forms the collector resistance of the p-transistor 174. In this way, by performing a complementary operation as a feedback-type emitter follower having a three-stage configuration, a complementary output device 16 having a larger equivalent output resistance can be realized.

In the push-pull circuit 131 shown in FIGS. 3 and 9, the case where the complementary operation is performed as a feedback type emitter follower has been described as an example. However, the complementary operation may be performed as an emitter follower. In this case, 2
A circuit example of a push-pull circuit 131 having a staged emitter follower is shown as a push-pull circuit 131a in FIG.
FIG. 11 shows an example of a push-pull circuit 131b having a three-stage emitter follower as a push-pull circuit 131b.

In FIG. 10, a push-pull circuit 131
a includes an npn power transistor 141a, an npn transistor 142a that drives the power transistor 141a, an npn power transistor 143a, an npn transistor 144a that drives the power transistor 143a, and resistors 145a to 148a.

Power transistors 141a and 143a
Have complementary characteristics to each other, and similarly, the transistors 142a and 144a have complementary characteristics to each other. The resistor 145a forms the emitter resistance of the npn transistor 142a, the resistor 146a forms the collector resistance of the npn transistor 144a and the base resistance of the power transistor 143a, and the resistance 147a
Represents the emitter resistance of the power transistor 141a, and the resistor 148a represents the collector resistance of the npn transistor 143a.

In FIG. 11, a push-pull circuit 131
b denotes a pnp power transistor 141b, an npn transistor 171b driving the power transistor 141b, an npn transistor 172b driving the npn transistor 171b, a pnp power transistor 143b, a pnp transistor 173b driving the power transistor 143b, and the pnp transistor 173b. Drive transistor 174
b, and resistors 147b, 148b, 181, and 182.

Power transistors 141b and 143
b, transistors 171b and 173b, and transistors 172b and 174b have complementary characteristics with each other. The resistor 147b is an emitter resistor of the power transistor 141b, and the resistor 148b is a pnp
It forms the emitter resistance of the transistor 143b. The resistor 181 serves as an emitter resistor of each of the transistors 171b and 173b, and the resistor 182 serves as an emitter resistor of each of the transistors 172b and 174b.

As described above, in the push-pull circuit shown in FIGS. 10 and 11, the equivalent output resistance is not larger than that of the feedback type emitter follower. An output device can be realized. As shown in FIGS. 10 and 11, by changing the bias value by changing the number of diodes of the constant voltage bias diode group 119 of the linear voltage amplifier 6 that determines the idling current of the push-pull circuit, a so-called class A is achieved. , AB, and B biases can be set.

Next, FIG. 12 is a diagram showing a mounting example of the passive filter 3 of FIG. In FIG.
Denotes a metal substrate, and 191 denotes a copper foil pattern formed on the metal substrate 190 by insulation. That is, 192 forms an input end of the secondary passive filter, and 193 forms a coil with a spiral copper foil pattern having a predetermined width. 1
94 is an aluminum wire bonded by wire bonding, 195
Is a bonding pad, 196 is a chip capacitor, 1
Reference numeral 97 denotes a chip resistor, 198 denotes an output terminal of the secondary passive filter, and 199 denotes a ground terminal of the secondary passive filter. FIG. 13 shows a circuit diagram of the passive filter of FIG. 12, and the same reference numerals are used for corresponding parts in the circuit configuration.

FIGS. 12 and 13 show a basic structure for mounting the secondary passive filter 3 on a metal substrate.
If the sheet resistance value of the copper foil is used, it is possible to form a coil having a predetermined equivalent series resistance value by controlling the width of the copper foil, which indicates that a high power chip and low resistance are not required. . Therefore, the secondary passive filter 3 including the chip capacitor can realize an extremely inexpensive and highly reliable filter.

(Second Embodiment) In the first embodiment, when forming the positive floating voltage source 4 and the negative floating voltage source 5, the transformer 150, the diode bridge circuit 151, the smoothing capacitor 152, 153
Therefore, it was difficult to achieve further integration, and the cost could not be further reduced. Thus, in the second embodiment, a description will be given of a high-efficiency power amplifying device that can obtain the same effect as that of the first embodiment without using components that are difficult to integrate.

FIG. 14 is a schematic block diagram showing a basic configuration of a high-efficiency power amplifier according to the second embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will not be repeated. Only the differences from FIG. 1 will be described. The difference between FIG. 14 and FIG.
1. The two class D power amplifiers 2A and 2B and the two passive filters 3A and 3B having substantially the same circuit configuration without the positive floating voltage source 4 and the negative floating voltage source 5 of FIG. The first bias power supply 201 and the second bias power supply 202 are provided on the signal input terminal 21 side. For these reasons, the high-efficiency power amplifier 1 of FIG.
And

In FIG. 14, the output terminal 3Ab of one passive filter 3A is connected to the positive power supply terminal 16a of the complementary output device 16, and the input terminal 2Aa of the class-D power amplifier 2A connected to the passive filter 3A. A first bias power supply 201 is connected between the input terminal 15a of the linear voltage amplifier 15 and the input terminal 15a. The output terminal 3Bb of the other passive filter 3B is connected to the negative power supply terminal 16b of the complementary output device 16, and the input terminal 2Ba of the class D power amplifier 2B connected to the passive filter 3B and the linear voltage amplifier 15 The second bias power supply 202 is connected between the second bias power supply 202 and the input terminal 15a. The control input terminals 2Ad and 2Bd of the two class D power amplifiers 2A and 2B are connected to the output terminal 18a of the second mute circuit 18, respectively.

The high efficiency power amplifier 200 shown in FIG.
, The linear power amplifier 6 is the same as that shown in FIGS. Further, the class D power amplifiers 2A and 2B are the class D power amplifiers 2 shown in FIGS.
The passive filters 3A and 3B have substantially the same circuit configuration as the passive filter 3 shown in FIG.
However, compared to the high efficiency power amplifier 1 shown in FIG.
More current will flow through each class D power amplifier and each passive filter. As described above, in the present embodiment, the transformer 150, the diode bridge circuit 151, and the smoothing capacitors 152 and 153 shown in FIG.
Is unnecessary, and the circuit configuration can be further reduced and the cost can be reduced.

[0089]

As described above, according to the present invention, by inserting an equivalent active filter in the demodulation part of a class D power amplifier, a high-efficiency power device with extremely low high-frequency noise without sacrificing high efficiency. It is expected to have a wide range of applications not only in audio applications but also in the entire power control field where high efficiency is required.

Further, at the start and stop of the supply of power due to the operation of the power switch, etc., the control of the interruption of the signal input from the signal input terminal, the operation control of the PWM power amplifier, and the operation control of the linear voltage amplifier are performed. In addition, it is possible to prevent the output of unnecessary signals generated when the power supply is started and stopped, and to prevent the generation of unpleasant sound called pop sound when used for audio applications.

From the above description of the present invention, it will be apparent that the invention is capable of various modifications. These modifications should not be deemed to depart from the scope of the invention, and all such modifications that would be apparent to a person skilled in the art are included in the claims of the invention. It is said.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram showing a basic configuration of a high-efficiency power amplifier according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a circuit example of the class D power amplifier 2 shown in FIG.

FIG. 3 is a diagram showing an example of a basic configuration circuit of the linear power amplifier 6 shown in FIG.

FIG. 4 is a diagram showing signal waveforms at main points in FIG.

FIG. 5 is a diagram showing signal waveforms at main points in FIG. 1;

FIG. 6 is an equivalent circuit diagram for explaining the principle of suppressing high-frequency noise of the complementary output device 16;

FIG. 7 is a diagram showing a frequency characteristic of an attenuation amount of the complementary output device 16;

8 is a timing chart of each control signal output from the control circuit 8. FIG.

FIG. 9 is a circuit diagram showing another example of the push-pull circuit 131.

FIG. 10 is a circuit diagram showing another example of the push-pull circuit 131.

FIG. 11 is a circuit diagram showing another example of the push-pull circuit 131.

FIG. 12 is a diagram showing a mounting example of the passive filter 3 of FIG. 1;

FIG. 13 is a circuit diagram of the passive filter shown in FIG.

FIG. 14 is a schematic block diagram showing a basic configuration of a high-efficiency power amplifier according to a second embodiment of the present invention.

FIG. 15 is a diagram showing a basic configuration of a conventional high-efficiency power amplifier.

FIG. 16 is a diagram showing characteristics of a conventional passive filter.

[Explanation of symbols]

 1,200 High-efficiency power amplifier 2,2A, 2B Class D power amplifier 3,3A, 3B Passive low pass filter 4 Positive floating voltage source 5 Negative floating voltage source 6 Linear power amplifier 8 Control circuit 15 Linear voltage amplifier 16 Complementary Output device 17 First mute circuit 18 Second mute circuit 19 Third mute circuit 21 Signal input terminal 131, 131a, 131b Push-pull circuit 190 Metal substrate 191 Copper foil pattern 201 First bias power supply 202 Second bias power supply

Claims (13)

[Claims] 1. A high-efficiency power amplifier for amplifying power of an input signal input to a signal input terminal, comprising: a PWM power amplifier for power-amplifying an input signal from a signal input terminal by pulse width modulation and outputting the amplified signal; A passive low-pass filter for demodulating and outputting a pulse width modulation signal output from a PWM power amplifier; A voltage source, a negative floating voltage source that shifts the demodulated signal output from the passive low-pass filter by a predetermined voltage −DV to supply a negative current, and amplifies an input signal from the signal input terminal. A linear voltage booster configured by a linear circuit, which outputs a signal shifted by predetermined voltages + dV and −dV, respectively. And a current amplifier for generating a positive current amplified signal by current-amplifying the voltage amplified signal shifted by + dV with the positive current, and amplifying the voltage amplified signal shifted by -dV with the negative current. And an output unit for generating and outputting a power amplification signal by adding the positive current amplification signal and the negative current amplification signal in the form of a push-pull to generate a negative current amplification signal. High efficiency power amplifier. 2. A high-efficiency power amplifier for amplifying an input signal input to a signal input terminal, comprising: a first bias power supply for applying a positive bias voltage to an input signal from the signal input terminal; A first PWM power amplifier for outputting a first pulse width modulation signal generated by power-amplifying the positively biased input signal by pulse width modulation; and demodulating the first pulse width modulation signal. A first passive low-pass filter for outputting the generated first demodulated signal, a second bias power supply for applying a negative bias voltage to an input signal from a signal input terminal, and the negatively biased input A second PWM power amplifier that outputs a second pulse width modulation signal generated by power-amplifying the signal by pulse width modulation, and a second demodulation generated by demodulating the second pulse width modulation signal A second passive low-pass filter for outputting a signal, a linear voltage amplifier configured by a linear circuit configured to amplify an input signal from the signal input terminal and shift and output the input signal by predetermined voltages + dV and −dV, respectively; The voltage-amplified signal shifted by + dV is current-amplified by the first demodulated signal to generate a positive-direction current-amplified signal, and the voltage-amplified signal shifted by -dV is converted by the second demodulated signal. An output unit that generates a negative current amplified signal by current amplification, adds the positive current amplified signal and the negative current amplified signal in the form of a push-pull, and generates and outputs a power amplified signal. A high-efficiency power amplifier characterized by the following. 3. The high-efficiency power amplifying device according to claim 1, wherein said output device is constituted by a push-pull circuit formed by a complementary circuit. 4. The linear voltage amplifier and the output device include a B
The high-efficiency power amplifier according to any one of claims 1 to 3, wherein the high-efficiency power amplifier comprises a class power amplifier. 5. The linear voltage amplifier and the output device include: A
The high-efficiency power amplifier according to any one of claims 1 to 3, wherein the device comprises a class B power amplifier. 6. The linear voltage amplifier and the output device include: A
The high-efficiency power amplifier according to any one of claims 1 to 3, wherein the high-efficiency power amplifier comprises a class power amplifier. 7. The high-efficiency power amplifying device according to claim 1, wherein said passive low-pass filter comprises a spiral electrode formed on a substrate. 8. The coil according to claim 7, wherein the spiral electrode is formed of a copper foil pattern to form a coil.
2. The high-efficiency power amplifier according to 1. 9. An input control circuit for controlling input to the PWM power amplifier and the linear voltage amplifier in an input signal input from the signal input terminal, and a first operation control circuit for controlling operation of the PWM power amplifier A second operation control circuit for controlling the operation of the linear voltage amplifier, detecting the start and stop of the supply of power supplied from the outside, and according to the detection result, the input control circuit, the first operation control 3. The high-efficiency power amplifier according to claim 1, further comprising a control circuit that controls each operation of the circuit and the second operation control circuit. 10. When the control circuit detects the start of power supply, the control circuit cuts off input of an input signal from a signal input terminal to the PWM power amplifier and the linear voltage amplifier for a predetermined time t1 to the input control circuit. The signal output of the PWM power amplifier is supplied to the first operation control circuit for a predetermined time t2.
10. The high-efficiency power amplifier according to claim 9, wherein the signal output of the linear voltage amplifier to the second operation control circuit is stopped for a predetermined time t3. 11. The high-efficiency power amplifier according to claim 10, wherein the control circuit performs control so that t1>t3> t2. 12. The control circuit, upon detecting the stop of power supply, causes the input control circuit to immediately cut off the input of the input signal from the signal input terminal to the PWM power amplifier and the linear voltage amplifier. The signal output of the PWM power amplifier to the control circuit is stopped after a predetermined time t4, and the second
10. The high efficiency power amplifier according to claim 9, wherein the signal output of the linear voltage amplifier to the operation control circuit is stopped after a predetermined time t5. 13. The high-efficiency power amplifier according to claim 12, wherein the control circuit performs control so that t4> t5.