JPH11345906A - Manufacture of deformed metal core for metal cored printed wiring board - Google Patents

Manufacture of deformed metal core for metal cored printed wiring board

Info

Publication number
JPH11345906A
JPH11345906A JP16927198A JP16927198A JPH11345906A JP H11345906 A JPH11345906 A JP H11345906A JP 16927198 A JP16927198 A JP 16927198A JP 16927198 A JP16927198 A JP 16927198A JP H11345906 A JPH11345906 A JP H11345906A
Authority
JP
Japan
Prior art keywords
metal
wiring board
printed wiring
hole
metal core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16927198A
Other languages
Japanese (ja)
Inventor
Morio Take
杜夫 岳
Nobuyuki Ikeguchi
信之 池口
Toshihiko Kobayashi
敏彦 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Gas Chemical Co Inc
Original Assignee
Mitsubishi Gas Chemical Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Gas Chemical Co Inc filed Critical Mitsubishi Gas Chemical Co Inc
Priority to JP16927198A priority Critical patent/JPH11345906A/en
Priority to US09/237,840 priority patent/US6097089A/en
Priority to TW088101289A priority patent/TW401725B/en
Priority to EP99300654A priority patent/EP0933813A2/en
Priority to KR1019990002682A priority patent/KR19990068179A/en
Publication of JPH11345906A publication Critical patent/JPH11345906A/en
Priority to US09/583,148 priority patent/US6265767B1/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a metal core to be used for double sided metal clad laminate for a metal-cored semiconductor plastic package printed wiring board, which is good in adhesion with surface layer metal foil, excellent in heat dissipation and the heat resisting property after absorbing moisture. SOLUTION: Solder is printed on the position where a conical trapezoidal protrusion on the surface of a metal flat plate, an etching resist is arranged on the area other than the clearance hole forming part on the backside of the metal flat plate, and by forming an inner layer metal core by spraying an alkaline etchant at low pressure on the surface, and by spraying the alkaline etchant at higher pressure on the backside, a printed wiring board double sided metal clad laminate having excellent close contactness with the metal foil on the surface after formation of lamination, having the upper and the lower clearance holes almost in the same diameter, and having excellent insulating property of through hole and metal plate, can be obtained. As a result, the metal core to be used for the laminate can be obtained.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体チップを少
なくとも1個小型プリント配線板に搭載した形の、新規
な半導体プラスチックパッケージに使用する、片面に複
数個の円錐台形状の突起を有し、その円錐台形突起上に
ハンダが付着した金属芯入りプリント配線板用金属芯の
製造方法に関する。これを加工して得られたプリント配
線板を使用した半導体プラスチックパッケージは、マイ
クロプロセッサー、マイクロコントローラー、ASIC、グ
ラフィック等の比較的高ワットで、多端子高密度のパッ
ケージとして用いられる。本半導体プラスチックパッケ
ージは、ソルダーボールを用いてマザーボードプリント
配線板に実装して電子機器として使用される。
The present invention relates to a novel semiconductor plastic package having at least one semiconductor chip mounted on a small printed wiring board and having a plurality of truncated cone-shaped protrusions on one surface, The present invention relates to a method for manufacturing a metal core for a printed wiring board with a metal core having solder attached to the truncated conical protrusion. A semiconductor plastic package using a printed wiring board obtained by processing the same is used as a relatively high-wattage, multi-terminal, high-density package such as a microprocessor, a microcontroller, an ASIC, and a graphic. This semiconductor plastic package is mounted on a motherboard printed wiring board using solder balls and used as an electronic device.

【0002】[0002]

【従来の技術】従来、半導体プラスチックパッケージと
して、プラスチックボールグリッドアレイ(P-BGA)やプ
ラスチックランドグリッドアレイ(P-LGA)等、プラスチ
ックプリント配線板の上面に半導体チップを固定し、こ
のチップを、プリント配線板上面に形成された導体回路
にワイヤボンディングで結合し、プリント配線板の下面
にはソルダーボールを用いて、マザーボードプリント配
線板と接続するための導体パッドを形成し、表裏回路導
体がメッキされたスルーホールで接続されて、半導体チ
ップが樹脂封止されている構造の半導体プラスチックパ
ッケージが公知である。本公知構造において、半導体か
ら発生する熱をマザーボードプリント配線板に拡散させ
るため、半導体チップを固定するための上面の金属箔か
ら下面に接続するメッキされた熱拡散スルーホールが形
成されている。該スルーホールを通して、水分が半導体
固定に使われている銀粉入り樹脂接着剤に吸湿され、マ
ザーボードへの実装時の加熱により、また、半導体部品
をマザーボードから取り外す際の加熱により、層間フク
レを生じる危険性があり、これはポップコーン現象と呼
ばれている。このポップコーン現象が発生した場合、パ
ッケージは使用不能となることが多く、この現象を大幅
に改善する必要がある。また、半導体の高機能化、高密
度化は、ますます発熱量の増大を意味し、熱放散用のた
めの半導体チップ直下のスルーホールのみでは熱の放散
は不十分となってきている。
2. Description of the Related Art Conventionally, as a semiconductor plastic package, a semiconductor chip such as a plastic ball grid array (P-BGA) or a plastic land grid array (P-LGA) is fixed on the upper surface of a plastic printed wiring board. It is connected to the conductor circuit formed on the upper surface of the printed wiring board by wire bonding, and the lower surface of the printed wiring board is formed with conductor pads for connection with the motherboard printed wiring board using solder balls, and the front and back circuit conductors are plated 2. Description of the Related Art A semiconductor plastic package having a structure in which a semiconductor chip is sealed with a resin by connecting through a formed through hole is known. In the known structure, a plated heat diffusion through hole is formed from the upper metal foil for fixing the semiconductor chip to the lower surface in order to diffuse the heat generated from the semiconductor to the motherboard printed wiring board. Through the through holes, moisture is absorbed by the resin adhesive containing silver powder used for fixing the semiconductor, and there is a danger of causing interlayer blisters due to heating during mounting on the motherboard and heating when removing the semiconductor components from the motherboard. This is called the popcorn phenomenon. When this popcorn phenomenon occurs, the package often becomes unusable, and it is necessary to greatly improve this phenomenon. In addition, higher functionality and higher density of semiconductors mean more and more heat generation, and heat dissipation is insufficient with only through holes directly below the semiconductor chip for heat dissipation.

【0003】[0003]

【発明が解決しようとする課題】本発明は、以上の問題
点を改善した半導体プラスチックパッケージ用金属芯の
製造方法を提供する。
SUMMARY OF THE INVENTION The present invention provides a method of manufacturing a metal core for a semiconductor plastic package, which solves the above problems.

【0004】[0004]

【課題を解決するための手段】本発明によれば、少なく
とも1個の半導体チップを熱伝導性接着剤で直接固定す
るための、円錐台形金属突起部分と、表裏導通孔形成の
ためのクリアランスホール、またはスリット孔が形成さ
れている金属板の表裏に、半硬化状態の熱硬化性樹脂組
成物のプリプレグ、樹脂シート、樹脂付き金属箔、或い
は塗料層を配置し、さらに、その外側に、必要により金
属箔を配置し、加熱、加圧下に作成する半導体プラスチ
ックパッケージ用の金属芯入りプリント配線板の金属芯
の製造法であって、金属平板の片面の一部分に、円錐台
形の突起部形成用ハンダを、スクリーン印刷等で形成
し、反対面にはクリアランスホール或いはスリット孔を
エッチングで形成するためのエッチングレジストを残存
配置させ、エッチング工程で、円錐台形突起部形成面に
は、より低圧力のエッチング液を吹きかけ、反対面に
は、より高圧力でエッチング液を吹きかけることによ
り、円錐台形突起部分とクリアランスホール或いはスリ
ット孔を一度のエッチング工程で同時に形成できる金属
芯入りプリント配線板用金属芯の製造方法を提供され
る。
According to the present invention, a frustum-shaped metal projection portion for directly fixing at least one semiconductor chip with a heat conductive adhesive, and a clearance hole for forming a front and back conduction hole. Or a prepreg, a resin sheet, a resin-coated metal foil, or a paint layer of a thermosetting resin composition in a semi-cured state is disposed on the front and back of a metal plate having slit holes formed thereon. A method for producing a metal core of a printed wiring board containing a metal core for a semiconductor plastic package, wherein the metal foil is arranged under heating and pressurizing, and is formed on a part of one side of a metal flat plate to form a truncated cone-shaped protrusion. A solder is formed by screen printing or the like, and an etching resist for forming a clearance hole or a slit hole by etching is left on the opposite surface. In the process, an etching solution with a lower pressure is sprayed on the surface on which the truncated cone is formed, and an etching solution is sprayed with a higher pressure on the opposite surface, so that the truncated cone and the clearance hole or slit hole are formed at one time. Provided is a method for manufacturing a metal core for a printed wiring board containing a metal core which can be formed simultaneously in an etching step.

【0005】この金属芯を用いて、その表裏面に、半硬
化状態のプリプレグ、樹脂シート、樹脂付き金属箔、或
いは塗料塗布による樹脂層等を配置し、必要により、そ
の外側に金属箔を置いて、加熱、加圧下に積層成形して
両面金属箔張積層板を製造する。これを用いて、作成さ
れたプリント配線板は、金属芯円錐台形突起部上の金属
箔に熱伝導性接着剤で固定された半導体チップと、その
周囲の回路導体とがワイヤボンディングで接続されてお
り、少なくとも、該表面のプリント配線板上の信号伝播
回路導体が、プリント配線板の反対面に形成された回路
導体もしくは該ハンダボールでの接続用導体パッドとス
ルーホール導体で結線されており、少なくとも、半導体
チップ、ボンディングワイヤ、ボンディングパッドが樹
脂封止されている構造の半導体プラスチックパッケージ
であって、且つ、プリント配線板とほぼ同じ大きさの金
属板がプリント配線板の厚さ方向のほぼ中央に配置さ
れ、表裏回路導体と熱硬化性樹脂組成物で絶縁されてお
り、金属板に少なくとも1個以上のスルーホール径より
大きい径のクリアランスホール又はスリット孔があけら
れ、孔壁と金属板とは樹脂組成物で絶縁されており、半
導体チップ搭載部の金属箔下面に、複数個の円錐台形状
の突起が、低融点ハンダで接続されており、金属箔の表
面に半導体チップが熱伝導性接着剤で固定され、且つ、
少なくとも1個以上のスルーホールが直接内層の金属と
接続しており、又は裏面からビア孔で金属芯と接続し
て、発生した熱はこの放熱用スルーホール又はビア部の
導体を通してマザーボードに逃げるようにした半導体プ
ラスチックパッケージとすることにより、半導体チップ
の下面からの吸湿がなく、吸湿後の耐熱性、すなわちポ
ップコーン現象が大幅に改善できるとともに、熱放散性
を大幅に改善できた。加えて大量生産性にも適してお
り、経済性の改善された、新規な構造の半導体プラスチ
ックパッケージを得ることができ、本発明を完成するに
至った。
Using this metal core, a semi-cured prepreg, a resin sheet, a metal foil with a resin, or a resin layer formed by coating with a paint is disposed on the front and back surfaces of the metal core. Then, it is laminated under heat and pressure to produce a double-sided metal foil-clad laminate. Using this, the printed wiring board produced is such that a semiconductor chip fixed to a metal foil on a metal core truncated conical projection with a heat conductive adhesive and a circuit conductor around the semiconductor chip are connected by wire bonding. At least, the signal propagation circuit conductor on the printed wiring board on the front surface is connected to a circuit conductor formed on the opposite surface of the printed wiring board or a connection conductor pad with the solder ball by a through-hole conductor, At least a semiconductor plastic package having a structure in which a semiconductor chip, a bonding wire, and a bonding pad are sealed with a resin, and a metal plate having substantially the same size as the printed wiring board has a substantially center in the thickness direction of the printed wiring board. And is insulated from the front and back circuit conductors by the thermosetting resin composition. A large diameter clearance hole or slit hole is drilled, the hole wall and the metal plate are insulated with a resin composition, and a plurality of truncated cone-shaped projections are formed on the lower surface of the metal foil of the semiconductor chip mounting part, with a low melting point. Connected with solder, the semiconductor chip is fixed on the surface of the metal foil with a heat conductive adhesive, and
At least one or more through-holes are directly connected to the metal of the inner layer, or connected to the metal core via holes from the back, so that the generated heat can escape to the motherboard through the heat-radiating through-holes or the conductors in the vias. By adopting the semiconductor plastic package described above, there is no moisture absorption from the lower surface of the semiconductor chip, and the heat resistance after moisture absorption, that is, the popcorn phenomenon can be significantly improved, and the heat dissipation can be greatly improved. In addition, a semiconductor plastic package having a novel structure that is suitable for mass productivity and has improved economic efficiency can be obtained, and the present invention has been completed.

【0006】[0006]

【発明の実施の形態】本発明の半導体プラスチックパッ
ケージは、プリント配線板の厚み方向のほぼ中央に熱放
散性の良好な金属板を配置し、表裏の回路導体導通用の
メッキされたスルーホールは、金属板にあけられた該ク
リアランスホール又はスリット孔径より小さめの径の孔
とし、埋め込まれた樹脂のほぼ中央に形成することによ
り、金属板との絶縁性を保持する。
BEST MODE FOR CARRYING OUT THE INVENTION In the semiconductor plastic package of the present invention, a metal plate having good heat dissipation is arranged at substantially the center in the thickness direction of a printed wiring board, and plated through holes for conducting circuit conductors on the front and back are formed. By forming a hole having a diameter smaller than the diameter of the clearance hole or slit hole formed in the metal plate and forming the hole substantially at the center of the embedded resin, the insulation property with the metal plate is maintained.

【0007】公知のスルーホールを有する金属芯プリン
ト配線板の上面に半導体チップを固定する方法において
は、従来のP-BGAパッケージと同様に半導体チップから
の熱は直下の熱放散用スルーホールに落として熱放散せ
ざるを得ず、ポプコーン現象は改善できない。本発明
は、まず金属芯とする両面平滑な金属板を用意し、表面
の円錐台形突起部を形成する部分に、好適には鉛フリー
ハンダを、印刷等で形成し、裏面はクリアランスホー
ル、又はスリット孔以外の部分のエッチングレジストが
残るように加工し、表面はより低圧力で、裏面はより高
圧力で、エッチングにより表面の円錐台形状突起部を形
成すると同時に、裏面からクリアランスホールをあけ
る。エッチング液は、ハンダを溶解しないアルカリ性の
エッチング液を用いる。表面の円錐台形起部は、少なく
とも1個以上の半導体チップを固定する金属箔相当部分
の下に、その面積とほぼ同等の大きさの範囲に形成して
おく。金属板の表裏のエッチング圧力は、目的とする円
錐台形状突起部の高さ、金属板の厚さによっても変わる
が、一般には、表面は0.5〜1.5kgf/cm、裏
面は1.0〜2.5kgf/cmの圧力の範囲で適宜選
択する。
In a known method of fixing a semiconductor chip on the upper surface of a metal-core printed wiring board having a through hole, heat from the semiconductor chip is dropped to a heat-dissipating through hole immediately below, similarly to a conventional P-BGA package. Heat must be dissipated, and the popcorn phenomenon cannot be improved. The present invention firstly prepares a metal plate having a metal core as a flat surface on both sides, and preferably forms a lead-free solder on a portion of the front surface where a frustoconical projection is formed by printing or the like, and the back surface has a clearance hole, or Processing is performed so that the etching resist in the portions other than the slit holes remains, and the front surface is formed with a lower pressure and the back surface is formed with a higher pressure. At the same time, a truncated cone-shaped projection is formed by etching, and a clearance hole is formed from the back surface. As an etchant, an alkaline etchant that does not dissolve solder is used. The truncated conical portion on the surface is formed below a portion corresponding to a metal foil for fixing at least one or more semiconductor chips in a range substantially equal to the area thereof. The etching pressure on the front and back surfaces of the metal plate varies depending on the desired height of the truncated cone-shaped protrusion and the thickness of the metal plate, but generally, the surface is 0.5 to 1.5 kgf / cm and the back surface is 1. The pressure is appropriately selected within the range of 0 to 2.5 kgf / cm.

【0008】該金属円錐台形突起部とクリアランスホー
ル又はスリット孔が形成された金属板の表面を、ハンダ
が溶解してなくならない公知の処理を、必要に応じて施
す。該表面処理され、円錐台形状突起部とクリアランス
ホール又はスリット孔が形成された金属板の、ハンダが
付着した円錐台形突起先端部以外は、すべて熱硬化性樹
脂組成物で絶縁部を形成する。熱硬化性樹脂組成物によ
る絶縁部の形成は、半硬化状態の熱硬化性樹脂組成物を
含浸、乾燥したプリプレグ、樹脂シート、樹脂付き金属
箔、或いは塗料等を表裏面に配置し、必要により金属箔
を、その外側に配置し、加熱、加圧下に、好適には真空
下に積層成形する。プリプレグ等の厚みは、積層成形し
て、クリアランスホール、又はスリット孔に樹脂を充填
した後に、金属円錐台形状突起部上のハンダが溶融して
表面の金属箔に接続できるに十分な厚みとする。
[0008] The surface of the metal plate on which the metal truncated conical protrusions and the clearance holes or slit holes are formed is subjected to a known treatment as necessary so that the solder is not dissolved. Except for the tip of the truncated cone-shaped protrusion to which solder is attached, the insulating portion is formed of the thermosetting resin composition, except for the metal plate on which the surface treatment is performed and the truncated cone-shaped protrusion and the clearance hole or the slit hole are formed. The formation of the insulating portion by the thermosetting resin composition is performed by impregnating the thermosetting resin composition in a semi-cured state, placing a dried prepreg, a resin sheet, a metal foil with resin, or a paint on the front and back surfaces, as necessary. The metal foil is placed outside and laminated under heat and pressure, preferably under vacuum. The thickness of the prepreg or the like is formed by laminating and filling the clearance hole or the slit hole with a resin, and then the thickness of the solder on the metal truncated cone-shaped protruding portion is set to a thickness sufficient to melt and connect to the metal foil on the surface. .

【0009】クリアランスホール又はスリット孔内は、
樹脂の未充填が起こり易いため、あらかじめ無溶剤液状
の熱硬化性樹脂組成物をクリアランスホール等に流し込
み、硬化しておく方法も使用できるが、いずれの方法に
おいても、金属板のクリアランスホール又はスリット孔
内を熱硬化性樹脂組成物で充填されるように加工する。
In the clearance hole or the slit hole,
Since unfilling of the resin is likely to occur, a method in which a solventless liquid thermosetting resin composition is poured into a clearance hole or the like in advance and cured can be used, but in any method, a clearance hole or a slit in a metal plate can be used. The hole is processed so as to be filled with the thermosetting resin composition.

【0010】少なくとも1個以上のスルーホールを、内
層金属芯と直接接続させ、放熱用として使用するか、或
いは裏面にビア孔を形成し、金属メッキで金属芯と裏面
の表層金属箔と導体接続するか、熱伝導性接着剤を充填
して接続する。
At least one or more through holes are directly connected to the inner metal core and used for heat dissipation, or a via hole is formed on the back surface, and the metal core and the surface metal foil on the back surface are connected to the conductor by metal plating. Or, it is filled with a heat conductive adhesive and connected.

【0011】金属板の側面については、熱硬化性樹脂組
成物で埋め込まれている形、露出している形、いずれの
形でも良い。錆等の発生の点からも、側面は樹脂で被覆
されていることが好ましい。
[0011] The side surface of the metal plate may be any of a shape embedded with a thermosetting resin composition and an exposed shape. From the viewpoint of occurrence of rust and the like, it is preferable that the side surface is covered with the resin.

【0012】上記方法で作成した板の、半導体チップを
固定する部分以外の箇所に表裏の回路を導通するスルー
ホール用孔をドリル、レーザー等、公知の方法にて小径
の孔をあける。
A hole having a small diameter is formed in a portion of the plate prepared by the above method other than the portion where the semiconductor chip is fixed, by a well-known method such as a drill or a laser, for drilling a hole for conducting the front and back circuits.

【0013】表裏信号回路用のスルーホール用孔は、樹
脂の埋め込まれた金属板クリアランスホール又はスリッ
ト孔のほぼ中央に、金属板と接触しないように形成す
る。次いで無電解メッキや電解メッキによりスルーホー
ル内部の金属層を形成して、メッキされたスルーホール
を形成する。
The through hole for the front and back signal circuits is formed substantially at the center of the metal plate clearance hole or slit hole in which the resin is embedded so as not to contact the metal plate. Next, a metal layer inside the through hole is formed by electroless plating or electrolytic plating to form a plated through hole.

【0014】また、表裏の回路形成工程で、半導体チッ
プ固定部分の、内層金属芯円錐台形突起部が接触した金
属箔部分を残存させる。更に、その表面の、半導体チッ
プ搭載金属箔部分以外に樹脂層を形成し、ビアをレーザ
ー、プラズマ等で作成してから、必要によりデスミア処
理、プラズマ処理、近紫外線処理を施し、金属メッキを
行い、回路形成後、貴金属メッキを、少なくともワイヤ
ボンディングパッド表面に形成してプリント配線板を完
成させることも可能である。この場合、貴金属メッキの
必要のない箇所は、事前にメッキレジストで被覆してお
く。または、メッキ後に、必要により公知の熱硬化性樹
脂組成物、或いは光選択熱硬化性樹脂組成物で、少なく
とも、半導体チップ搭載部、ボンディングパッド部、反
対面のハンダボール接着用パッド部以外の表面に皮膜を
形成する。
Further, in the circuit forming process of the front and back sides, the metal foil portion of the semiconductor chip fixing portion which is in contact with the inner layer metal core truncated conical protrusion is left. Further, a resin layer is formed on the surface other than the metal foil portion on which the semiconductor chip is mounted, a via is formed by laser, plasma, etc., and then, if necessary, desmearing, plasma processing, near-ultraviolet processing is performed, and metal plating is performed. After the circuit is formed, a noble metal plating can be formed on at least the surface of the wire bonding pad to complete the printed wiring board. In this case, a portion that does not require noble metal plating is covered with a plating resist in advance. Alternatively, after plating, if necessary, at least a semiconductor chip mounting portion, a bonding pad portion, and a surface other than the solder ball bonding pad portion on the opposite surface with a known thermosetting resin composition or a photo-selective thermosetting resin composition. A film is formed on

【0015】ブラインドビア部を形成する層に使用する
材料としては、上記の基材補強プリプレグ、銅箔に熱硬
化性樹脂組成物を塗布、乾燥して半硬化した樹脂付き銅
箔、或いは塗料等、一般に公知のものが使用される。ブ
ラインドビアを形成する方法は、一般に公知の方法が使
用できる。具体的には、炭酸ガスレーザー、プラズマで
ビアをあける方法、フォトビア法であける方法等が挙げ
られる。
Materials used for the layer forming the blind via portion include the above-mentioned base material reinforcing prepreg, a resin-cured copper foil coated with a thermosetting resin composition on a copper foil, dried and semi-cured, or a paint. A generally known one is used. A generally known method can be used for forming a blind via. Specifically, a method of opening a via with a carbon dioxide laser, plasma, a method of opening with a photo via method, and the like can be given.

【0016】該プリント配線板の半導体を接着する金属
箔部分の表面に接着剤や金属粉混合接着剤を用いて、半
導体チップを固定し、さらに半導体チップとプリント配
線板回路のボンディングパッドとをワイヤボンディング
法で接続し、少なくとも、半導体チップ、ボンディング
ワイヤ、及びボンディングパッドを公知の封止樹脂で封
止する。
The semiconductor chip is fixed to the surface of the metal foil portion of the printed wiring board to which the semiconductor is bonded by using an adhesive or a metal powder mixed adhesive, and the semiconductor chip and the bonding pads of the printed wiring board circuit are connected by wires. Connection is made by a bonding method, and at least the semiconductor chip, bonding wires, and bonding pads are sealed with a known sealing resin.

【0017】半導体チップと反対面のソルダーボール接
続用導体パッドに、ソルダーボールを接続してP-BGAを
作り、マザーボードプリント配線板上の回路にソルダー
ボールを重ね、熱によってボールを溶融接続するか、ま
たはパッケージにソルダーボールをつけずにP-LGAを作
り、マザーボードプリント配線板に実装する時に、マザ
ーボードプリント配線板面に形成されたソルダーボール
接続用導体パッドとP-LGA用のソルダーボール用導体パ
ッドとを、ソルダーボールを加熱熔融することにより接
続する。
A solder ball is connected to the solder ball connecting conductor pad on the opposite side of the semiconductor chip to form a P-BGA, and the solder ball is superimposed on a circuit on a motherboard printed wiring board, and the ball is melt-connected by heat. When making a P-LGA without attaching a solder ball to the package or mounting it on the motherboard printed wiring board, the solder ball connection conductor pad formed on the motherboard printed wiring board surface and the solder ball conductor for the P-LGA The pads are connected by heating and melting the solder balls.

【0018】本発明に用いる金属板は、特に限定しない
が、高弾性率、高熱伝導性で、厚さ30〜300μmのものが
好適である。具体的には、純銅、無酸素銅、その他、銅
が95重量%以上のFe、Sn、P、Cr、Zr、Zn等との合金、或
いは合金の表面を銅メッキした金属板等が好適に使用さ
れる。
The metal plate used in the present invention is not particularly limited, but preferably has a high elastic modulus, a high thermal conductivity and a thickness of 30 to 300 μm. Specifically, pure copper, oxygen-free copper, and other alloys with 95% or more by weight of copper, such as Fe, Sn, P, Cr, Zr, and Zn, or a metal plate or the like in which the surface of the alloy is copper-plated are preferably used. used.

【0019】本発明の金属円錐台形部の高さは、30〜15
0μmが好適である。また、エッチング前にスクリーン印
刷等で金属板の上に形成するハンダとしては、一般に公
知のものが使用できるが、環境面からも、好適には、融
点110〜250℃の鉛フリーハンダが使用される。具体的に
は、Sn-In,Sn-Bi,Sn-Ag-Bi,Sn-Zn,Sn-Bi-Cu,Sn-Ag-Cu,S
n-Cu,Sn-Al等のハンダが挙げられる。金属板上にハンダ
を印刷する方法は、特に限定しないが、例えば、円形の
孔があいた金属板を表面に置き、その孔に溶融したハン
ダを刷り込む方法等、一般に公知の方法が使用し得る。
また、一般に公知のアルカリ性エッチング液に耐性のあ
る、熱伝導性の金属ペーストも使用し得る。
The height of the metal truncated cone of the present invention is 30 to 15
0 μm is preferred. In addition, as the solder to be formed on the metal plate by screen printing or the like before etching, generally known solders can be used, but from an environmental viewpoint, preferably, a lead-free solder having a melting point of 110 to 250 ° C. is used. You. Specifically, Sn-In, Sn-Bi, Sn-Ag-Bi, Sn-Zn, Sn-Bi-Cu, Sn-Ag-Cu, S
Solder such as n-Cu, Sn-Al is mentioned. The method of printing solder on the metal plate is not particularly limited, but a generally known method such as a method of placing a metal plate having a circular hole on the surface and printing molten solder in the hole may be used.
In addition, a heat conductive metal paste that is resistant to a generally known alkaline etchant may be used.

【0020】円錐台形の突起を作る範囲は、半導体チッ
プ搭載部金属箔面積と同等以下とし、一般的には5〜20m
m角の範囲に形成する。円錐台形の大きさは特に限定し
ないが、一般には、円錐台形下部は径0.1〜5mm、上部は
径0.05〜1mmとする。
The range in which the truncated cone-shaped protrusion is formed is equal to or less than the area of the metal foil on the semiconductor chip mounting portion, and is generally 5 to 20 m.
It is formed in the range of m square. The size of the truncated cone is not particularly limited, but generally, the diameter of the truncated cone lower part is 0.1 to 5 mm, and the diameter of the upper part is 0.05 to 1 mm.

【0021】本発明で使用される熱硬化性樹脂組成物の
樹脂としては、一般に公知の熱硬化性樹脂が使用され
る。具体的には、エポキシ樹脂、多官能性シアン酸エス
テル樹脂、 多官能性マレイミドーシアン酸エステル樹
脂、多官能性マレイミド樹脂、不飽和基含有ポリフェニ
レンエーテル樹脂等が挙げられ、1種或いは2種類以上が
組み合わせて使用される。耐熱性、耐湿性、耐マイグレ
ーション性、吸湿後の電気的特性等の点から多官能性シ
アン酸エステル樹脂組成物が好適である。
As the resin of the thermosetting resin composition used in the present invention, generally known thermosetting resins are used. Specifically, an epoxy resin, a polyfunctional cyanate ester resin, a polyfunctional maleimide-cyanate ester resin, a polyfunctional maleimide resin, an unsaturated group-containing polyphenylene ether resin, and the like, and one or more kinds Are used in combination. Polyfunctional cyanate ester resin compositions are preferred from the viewpoints of heat resistance, moisture resistance, migration resistance, electrical properties after moisture absorption, and the like.

【0022】本発明の好適な熱硬化性樹脂分である多官
能性シアン酸エステル化合物とは、分子内に2個以上の
シアナト基を有する化合物である。具体的に例示する
と、1,3-又は1,4-ジシアナトベンゼン、1,3,5-トリシア
ナトベンゼン、1,3-、1,4-、1,6-、1,8-、2,6-又は2,7-
ジシアナトナフタレン、1,3,6-トリシアナトナフタレ
ン、4,4-ジシアナトビフェニル、ビス(4-ジシアナトフ
ェニル)メタン、2,2-ビス(4-シアナトフェニル)プロパ
ン、2,2-ビス(3,5-ジブロモー4-シアナトフェニル)プロ
パン、ビス(4-シアナトフェニル)エーテル、ビス(4-シ
アナトフェニル)チオエーテル、ビス(4-シアナトフェニ
ル)スルホン、トリス(4-シアナトフェニル)ホスファイ
ト、トリス(4-シアナトフェニル)ホスフェート、および
ノボラックとハロゲン化シアンとの反応により得られる
シアネート類などである。
The polyfunctional cyanate compound which is a preferred thermosetting resin component of the present invention is a compound having two or more cyanato groups in a molecule. Specific examples include 1,3- or 1,4-dicyanatobenzene, 1,3,5-tricyanatobenzene, 1,3-, 1,4-, 1,6-, 1,8-, 2 , 6- or 2,7-
Dicyanatonaphthalene, 1,3,6-tricyanatonaphthalene, 4,4-dicyanatobiphenyl, bis (4-dicyanatophenyl) methane, 2,2-bis (4-cyanatophenyl) propane, 2,2- Bis (3,5-dibromo-4-cyanatophenyl) propane, bis (4-cyanatophenyl) ether, bis (4-cyanatophenyl) thioether, bis (4-cyanatophenyl) sulfone, tris (4-cy (Anatophenyl) phosphite, tris (4-cyanatophenyl) phosphate, and cyanates obtained by reacting novolak with cyanogen halide.

【0023】これらのほかに特公昭41-1928、同43-1846
8、同44-4791、同45-11712、同46-41112、同47-26853及
び特開昭51-63149号公報等に記載の多官能性シアン酸エ
ステル化合物類も用いら得る。また、これら多官能性シ
アン酸エステル化合物のシアナト基の三量化によって形
成されるトリアジン環を有する分子量400〜6,000のプレ
ポリマーが使用される。このプレポリマーは、上記の多
官能性シアン酸エステルモノマーを、例えば鉱酸、ルイ
ス酸等の酸類;ナトリウムアルコラート等、第三級アミ
ン類等の塩基;炭酸ナトリウム等の塩類等を触媒として
重合させることにより得られる。このプレポリマー中に
は一部未反応のモノマーも含まれており、モノマーとプ
レポリマーとの混合物の形態をしており、このような原
料は本発明の用途に好適に使用される。一般には可溶な
有機溶剤に溶解させて使用する。
In addition to these, Japanese Patent Publication Nos. 41-1928 and 43-1846
8, polyfunctional cyanate compounds described in JP-A-44-4791, JP-A-45-11712, JP-A-46-41112, JP-A-47-26853 and JP-A-51-63149 can also be used. Further, a prepolymer having a molecular weight of 400 to 6,000 and having a triazine ring formed by trimerization of a cyanato group of these polyfunctional cyanate compounds is used. This prepolymer is obtained by polymerizing the above-mentioned polyfunctional cyanate ester monomer with a catalyst such as an acid such as a mineral acid or a Lewis acid; a base such as a tertiary amine such as sodium alcoholate; or a salt such as sodium carbonate. It can be obtained by: The prepolymer also contains some unreacted monomers and is in the form of a mixture of the monomer and the prepolymer, and such a raw material is suitably used for the purpose of the present invention. Generally, it is used after being dissolved in a soluble organic solvent.

【0024】エポキシ樹脂としては、一般に公知のもの
が使用できる。具体的には、液状或いは固形のビスフェ
ノールA型エポキシ樹脂、ビスフェノールF型エポキシ樹
脂、フェノールノボラック型エポキシ樹脂、クレゾール
ノボラック型エポキシ樹脂、脂環式エポキシ樹脂;ブタ
ジエン、ペンタジエン、ビニルシクロヘキセン、ジシク
ロペンチルエーテル等の結合をエポキシ化したポリエポ
キシ化合物類;ポリオール、水酸基含有シリコン樹脂類
とエポハロヒドリンとの反応によって得られるポリグリ
シジル化合物類等が挙げられる。これらは1種或いは2種
類以上が組み合わせて使用され得る。
As the epoxy resin, generally known epoxy resins can be used. Specifically, liquid or solid bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolak type epoxy resin, cresol novolak type epoxy resin, alicyclic epoxy resin; butadiene, pentadiene, vinylcyclohexene, dicyclopentyl ether, etc. And polyglycidyl compounds obtained by the reaction of a polyol, a hydroxyl group-containing silicone resin and an ephalohydrin, and the like. These may be used alone or in combination of two or more.

【0025】ポリイミド樹脂としては、一般に公知のも
のが使用され得る。具体的には、多官能性マレイミド類
とポリアミン類との反応物、特公昭57-005406号公報に
記載の末端三重結合のポリイミド類が挙げられる。
As the polyimide resin, generally known ones can be used. Specific examples include a reaction product of a polyfunctional maleimide and a polyamine, and a polyimide having a terminal triple bond described in JP-B-57-005406.

【0026】これらの熱硬化性樹脂は、単独でも使用さ
れるが、特性のバランスを考え、適宜組み合わせて使用
するのが良い。
These thermosetting resins may be used alone, but it is preferable to use them in an appropriate combination in consideration of the balance of properties.

【0027】本発明の熱硬化性樹脂組成物には、組成物
本来の特性が損なわれない範囲で、所望に応じて種々の
添加物を配合することができる。これらの添加物として
は、不飽和ポリエステル等の重合性二重結合含有モノマ
ー類及びそのプレポリマー類;ポリブタジエン、エポキ
シ化ブタジエン、マレイン化ブタジエン、ブタジエン-
アクリロニトリル共重合体、ポリクロロプレン、ブタジ
エン-スチレン共重合体、ポリイソプレン、ブチルゴ
ム、フッ素ゴム、天然ゴム等の低分子量液状〜高分子量
のelasticなゴム類;ポリエチレン、ポリプロピレン、ポ
リブテン、ポリ-4-メチルペンテン、ポリスチレン、AS
樹脂、ABS樹脂、MBS樹脂、スチレン-イソプレンゴム、
ポリエチレン-プロピレン共重合体、4-フッ化エチレン-
6-フッ化エチレン共重合体類;ポリカーボネート、ポリ
フェニレンエーテル、ポリスルホン、ポリエステル、ポ
リフェニレンサルファイド等の高分子量プレポリマー若
しくはオリゴマー;ポリウレタン等が例示され、適宜使
用される。また、その他、公知の無機或いは有機の充填
剤、染料、顔料、増粘剤、滑剤、消泡剤、分散剤、レベ
リング剤、光増感剤、難燃剤、光沢剤、重合禁止剤、チ
キソ性付与剤等の各種添加剤が、所望に応じて適宜組み
合わせて用いられる。必要により、反応基を有する化合
物は硬化剤、触媒が適宜配合される。
Various additives can be added to the thermosetting resin composition of the present invention, if desired, as long as the inherent properties of the composition are not impaired. These additives include polymerizable double bond-containing monomers such as unsaturated polyesters and prepolymers thereof; polybutadiene, epoxidized butadiene, maleated butadiene, butadiene-
Low molecular weight liquid to high molecular weight elastic rubbers such as acrylonitrile copolymer, polychloroprene, butadiene-styrene copolymer, polyisoprene, butyl rubber, fluororubber, natural rubber; polyethylene, polypropylene, polybutene, poly-4-methyl Penten, polystyrene, AS
Resin, ABS resin, MBS resin, styrene-isoprene rubber,
Polyethylene-propylene copolymer, 4-fluoroethylene-
6-fluorinated ethylene copolymers; high molecular weight prepolymers or oligomers such as polycarbonate, polyphenylene ether, polysulfone, polyester, and polyphenylene sulfide; and polyurethane are exemplified and used as appropriate. Other known inorganic or organic fillers, dyes, pigments, thickeners, lubricants, defoamers, dispersants, leveling agents, photosensitizers, flame retardants, brighteners, polymerization inhibitors, thixotropic Various additives such as imparting agents are used in combination as needed. If necessary, the compound having a reactive group is appropriately blended with a curing agent and a catalyst.

【0028】本発明の熱硬化性樹脂組成物は、それ自体
は加熱により硬化するが硬化速度が遅く、作業性、経済
性等に劣るため使用した熱硬化性樹脂に対して公知の熱
硬化触媒を用い得る。使用量は、熱硬化性樹脂100重量
部に対して0.005〜10重量部、好ましくは0.01〜5重量部
である。
The thermosetting resin composition of the present invention can be cured by heating itself, but has a low curing rate and is inferior in workability and economic efficiency. Can be used. The amount used is 0.005 to 10 parts by weight, preferably 0.01 to 5 parts by weight, per 100 parts by weight of the thermosetting resin.

【0029】プリプレグの補強基材として使用するもの
は、一般に公知の無機或いは有機の織布、不織布が使用
される。具体的には、Eガラス、Sガラス、Dガラス等の
公知のガラス繊維布、全芳香族ポリアミド繊維布、液晶
ポリエステル繊維布等が挙げられる。これらは、混抄で
も良い。 また、ポリイミドフィルム等のフィルムの表
裏に熱硬化性樹脂組成物を塗布、加熱して半硬化状態に
したものも使用できる。
As the reinforcing base material of the prepreg, generally known inorganic or organic woven or nonwoven fabrics are used. Specific examples include known glass fiber cloths such as E glass, S glass, and D glass, wholly aromatic polyamide fiber cloths, and liquid crystal polyester fiber cloths. These may be mixed. Alternatively, a thermosetting resin composition applied to the front and back of a film such as a polyimide film and heated to a semi-cured state can be used.

【0030】最外層の金属箔は、一般に公知のものが使
用できる。好適には厚さ3〜18μmの銅箔、ニッケル箔等
が使用される。
As the outermost metal foil, generally known ones can be used. Preferably, a copper foil, a nickel foil or the like having a thickness of 3 to 18 μm is used.

【0031】金属板に形成するクリアランスホール、又
はスリット孔の径は、表裏導通用スルーホール径よりや
や大きめに形成する。具体的には、該スルーホール壁と
金属板クリアランスホール、又はスリット孔壁とは50μ
m以上の距離が、熱硬化性樹脂組成物で絶縁されている
ことが好ましい。表裏導通用スルーホール径について
は、特に限定はないが、50〜300μmが好適である。
The diameter of the clearance hole or slit hole formed in the metal plate is slightly larger than the diameter of the through hole for front and back conduction. Specifically, the through hole wall and the metal plate clearance hole, or the slit hole wall is 50μ
It is preferable that the distance of at least m is insulated by the thermosetting resin composition. The diameter of the through hole for front / back conduction is not particularly limited, but is preferably 50 to 300 μm.

【0032】本発明の多層プリント配線板用プリプレグ
を作成する場合、基材に熱硬化性樹脂組成物を含浸、乾
燥し、半硬化状態の積層材料とする。また基材を使用し
ない半硬化状態とした樹脂シート、樹脂付き金属箔或い
は塗料も使用できる。プリプレグ等の半硬化状態の樹脂
を作成する温度は一般的には100〜180℃である。時間は
5〜60分であり、目的とするフローの程度により、適宜
選択する。
When preparing a prepreg for a multilayer printed wiring board of the present invention, a substrate is impregnated with a thermosetting resin composition and dried to obtain a semi-cured laminated material. Further, a resin sheet, a resin-coated metal foil or a paint in a semi-cured state without using a base material can also be used. The temperature at which a resin in a semi-cured state such as a prepreg is formed is generally 100 to 180 ° C. the time is
The time is 5 to 60 minutes, and is appropriately selected depending on the desired flow rate.

【0033】本発明で得られた異形状金属芯の入った半
導体プラスチックパッケージを作成する方法は以下(図
1)の方法による。 (1) 内層となる金属板b表面の、半導体チップ搭載相
当面積部分に、鉛フリーハンダaを用いて、複数個の円
形のハンダを残す。反対面にはクリアランスホール部以
外に液状エッチングレジストcを残し、 (2) エッチングにて、表面は低圧力、裏面は高圧力で
加工して、表面には複数個の円錐台形突起を形成すると
同時に、裏面からクリアランスホールfの上下ほぼ同じ
径の孔があけ、エッチングレジストを除去する。 (3) 上下にプリプレグeを配置し、その外側に金属箔
dを置いて、加熱、加圧、真空下に積層成形した後、所
定の位置にドリル等でスルーホールを内層金属箔に接触
しないようにあけ、一部のスルーホールは金属芯と接触
して孔あけし、金属メッキを行う。 (5) 公知の方法にて上下に回路を作成し、メッキレジ
ストで被覆後、貴金属メッキを施し、半導体チップ搭載
金属箔部の表面に熱伝導性接着剤で半導体チップを接着
し、ワイヤボンディングを行い、その後、樹脂封止し
て、必要によりハンダボールを接着する。
The method of producing the semiconductor plastic package containing the irregularly shaped metal core obtained by the present invention is as follows (FIG. 1). (1) A plurality of circular solders are left on the surface of the metal plate b serving as the inner layer in the area equivalent to the semiconductor chip mounting area by using lead-free solder a. The liquid etching resist c is left on the opposite surface except for the clearance hole, and (2) the surface is processed by low pressure and the back surface is processed by high pressure to form a plurality of truncated conical protrusions on the surface. Then, holes having substantially the same diameter as the upper and lower sides of the clearance hole f are formed from the back surface, and the etching resist is removed. (3) Pre-preg e is placed on the upper and lower sides, and metal foil d is placed on the outside of the pre-preg e. After heating, pressurizing and laminating under vacuum, the through hole is not brought into contact with the inner metal foil with a drill at a predetermined position. Some of the through-holes are drilled in contact with the metal core and plated with metal. (5) Create circuits up and down by a known method, cover with a plating resist, apply noble metal plating, adhere the semiconductor chip to the surface of the semiconductor chip mounting metal foil part with a heat conductive adhesive, and perform wire bonding. Then, after sealing with a resin, a solder ball is bonded if necessary.

【0034】[0034]

【実施例】以下に実施例、比較例で本発明を具体的に説
明する。尚、特に断らない限り、『部』は重量部を表
す。
The present invention will be specifically described below with reference to examples and comparative examples. Unless otherwise specified, “parts” indicates parts by weight.

【0035】実施例1 2,2-ビス(4-シアナトフェニル)プロパン900部、ビス(4-
マレイミドフェニル)メタン100部を150℃に溶融させ、
攪拌しながら4時間反応させ、プレポリマーを得た。こ
れをメチルエチルケトンとジメチルホルムアミドの混合
溶剤に溶解した。これにビスフェノールA型エポキシ樹
脂(商品名:エピコート1001、油化シェルエポキシ<株>
製)400部、クレゾールノボラック型エポキシ樹脂(商品
名:ESCN-220F、住友化学工業<株>製)600部を加え、均
一に溶解混合した。更に触媒としてオクチル酸亜鉛0.4
部を加え、溶解混合し、これに無機充填剤(商品名:焼成
タルクBST#200、日本タルク<株>製)500部を加え、均
一攪拌混合してワニスAを得た。このワニスを厚さ100
μmのガラス織布に含浸し150℃で乾燥して、ゲル化時間
(at170℃)50秒となるように作成した、厚さ110μmの半
硬化状態のプリプレグBを得た。一方、内層金属板とな
る厚さ250μm、純度99.9%の銅板を用意し、その表面に
は、大きさ50mm角のパッケージ内の中央の、半導体チッ
プ搭載面積13mm角内に、厚さ20μmのステンレス板に2m
m間隔に円形孔径0.3mmの孔をあけたものの上から、銅/
錫/銀=0.5/96/3.5wt%(融点:221℃)よりなる鉛フリ
ーハンダを260℃に溶融して、刷り込み、反対面には金
属箔全面に液状エッチングレジストを厚さ20μm塗布、
乾燥した後、クリアランスホール部のエッチングレジス
トが除去されるように紫外線を照射して、1%炭酸ナト
リウム溶液で現像後、表面は1.5kgf/cm2、裏面は
2.5kgf/cm2にて同時に両側からエッチングし、表
面の大きさ50mm角のパッケージの中央13mm角内に、ハン
ダを含む高さ117μmの円錐台形状突起を16個作成し、同
時に0.6mmφのクリアランスホールをあけた。このクリ
アランスホ−ルの孔径は、上下ほとんど同じであった。
この上下に上記プリプレグBを被せ、その両外側に厚さ
12μmの電解銅箔を配置し、230℃、20kgf/cm2、30mmHg
以下の真空下で2時間積層成形し、一体化した。クリア
ランスホール箇所は、クリアランスホール部の金属に接
触しないように、中央に孔径0.25mmのスルーホールをド
リルにてあけ、放熱用スルーホールを4隅内層金属板と
接続してあけ、銅メッキを無電解、電解メッキで行い、
孔内に17μmの銅メッキ層を形成した。表裏に液状エッ
チングレジストを塗布、乾燥してからポジフィルムを重
ねて露光、現像し、表裏回路を形成し、次いで半導体チ
ップ搭載部、ボンディングパッド部及びボールパッド部
以外にメッキレジストを形成し、ニッケル、金メッキを
施してプリント配線板Cを完成した。表面の半導体チッ
プ搭載部にに、大きさ13mm角の半導体チップを銀ペース
トで接着固定した後、ワイヤボンディングを行い、次い
でシリカ入りエポキシ封止用液状樹脂を用い、半導体チ
ップ、ワイヤ、ボンディングパッド部を樹脂封止して半
導体パッケージを作成した(図1)。このパッケージの評
価結果を表1に示す。
Example 1 900 parts of 2,2-bis (4-cyanatophenyl) propane,
100 parts of (maleimidophenyl) methane are melted at 150 ° C,
The mixture was reacted for 4 hours while stirring to obtain a prepolymer. This was dissolved in a mixed solvent of methyl ethyl ketone and dimethylformamide. Add bisphenol A type epoxy resin (trade name: Epicoat 1001, Yuka Shell Epoxy Co., Ltd.)
) And 600 parts of a cresol novolac type epoxy resin (trade name: ESCN-220F, manufactured by Sumitomo Chemical Co., Ltd.) were uniformly mixed and dissolved. Further, as a catalyst, zinc octylate 0.4
Was added and dissolved and mixed. To this, 500 parts of an inorganic filler (trade name: calcined talc BST # 200, manufactured by Nippon Talc Co., Ltd.) was added, and uniformly stirred and mixed to obtain Varnish A. Apply this varnish to thickness 100
μm glass woven cloth and dried at 150 ℃, gel time
(at 170 ° C.) A prepreg B in a semi-cured state having a thickness of 110 μm, which was prepared so as to be 50 seconds, was obtained. Meanwhile, a copper plate with a thickness of 250 μm and a purity of 99.9% to be used as the inner metal plate was prepared, and a 20 μm thick stainless steel plate was placed on the surface in a 13 mm square semiconductor chip mounting area in the center of a 50 mm square package. 2m on board
0.3mm round hole with a hole diameter of 0.3mm
A lead-free solder consisting of tin / silver = 0.5 / 96 / 3.5wt% (melting point: 221 ° C) is melted at 260 ° C and imprinted. On the other side, a liquid etching resist is applied over the entire surface of the metal foil to a thickness of 20µm.
After drying, the film was irradiated with ultraviolet rays so as to remove the etching resist in the clearance hole, developed with a 1% sodium carbonate solution, the surface was 1.5 kgf / cm 2 , and the back was
Simultaneously etched from both sides at 2.5kgf / cm 2 , 16 pieces of 117μm-height truncated cone-shaped protrusions including solder were created within a 13mm square at the center of a 50mm square package, and a 0.6mmφ clearance at the same time I opened a hole. The hole diameter of this clearance hole was almost the same in the upper and lower directions.
Put the prepreg B on top and bottom, and put the thickness on both outer sides
Place 12μm electrolytic copper foil, 230 ° C, 20kgf / cm 2 , 30mmHg
It was laminated and molded under the following vacuum for 2 hours and integrated. Drill a through hole with a hole diameter of 0.25 mm at the center of the clearance hole so that it does not come into contact with the metal in the clearance hole, and connect the heat dissipation through holes to the four corner inner layer metal plates. Performed by electrolysis and electroplating,
A 17 μm copper plating layer was formed in the hole. Apply a liquid etching resist on the front and back, dry, apply a positive film, expose and develop, form a front and back circuit, then form a plating resist other than the semiconductor chip mounting part, bonding pad part and ball pad part, nickel The printed wiring board C was completed by applying gold plating. A 13 mm square semiconductor chip is bonded and fixed to the surface semiconductor chip mounting part with silver paste, wire bonding is performed, and then a semiconductor chip, wire, bonding pad part is formed using a liquid epoxy resin containing silica. Was sealed with a resin to prepare a semiconductor package (FIG. 1). Table 1 shows the evaluation results of this package.

【0036】比較例1 実施例1のプリプレグB(g)を2枚使用し、上下に12
μmの電解銅箔dを配置し、200℃、20kgf/cm2、真空下
に2時間積層成形し、両面銅張積層板を得た。所定の位
置に孔径0.25mmφのスルーホールをドリルであけ、デス
ミア処理後に銅メッキを施した。この板の上下に公知の
方法で回路を形成し、ニッケルメッキ、金メッキを施し
た。これは半導体チップを搭載する箇所に放熱用のスル
ーホールhが形成されており、この上に銀ペーストで半
導体チツプiを接着し、ワイヤボンディング後、エポキ
シ封止用コンパウンドで実施例1と同様に樹脂封止lし
た(図2)。このパッケージの評価結果を表1に示す。
COMPARATIVE EXAMPLE 1 Two prepregs B (g) of Example 1 were used.
An electrolytic copper foil d having a thickness of μm was placed and laminated and molded at 200 ° C., 20 kgf / cm 2 under vacuum for 2 hours to obtain a double-sided copper-clad laminate. A through hole having a hole diameter of 0.25 mmφ was drilled at a predetermined position, and copper plating was performed after desmear treatment. Circuits were formed on and under the plate by a known method, and nickel plating and gold plating were performed. A through hole h for heat dissipation is formed at a place where a semiconductor chip is mounted. A semiconductor chip i is bonded on the through hole h with a silver paste, and after wire bonding, an epoxy sealing compound is used in the same manner as in the first embodiment. Resin sealing was performed (FIG. 2). Table 1 shows the evaluation results of this package.

【0037】比較例2 エポキシ樹脂(商品名:エピコート5045)700
部、及びエポキシ樹脂(商品名:ESCN220F)3
00部、ジシアンジアミド35部、2−エチルー4−メ
チルイミダゾール1部をメチルエチルケトンとジメチル
ホルムアミドの混合溶剤に溶解し、これを厚さ100μ
mのガラス織る布に含浸、乾燥させて、ゲル化時間15
秒、170℃のローフロープリプレグCを作成した。ま
た、ゲル化時間150秒、樹脂流れ18mmのハイフロ
ープリプレグDを作成した。プリプレグDを2枚使用
し、190℃、20kgf/cm2、30mmHg以下の真空下
で2時間積層成形し、両面銅張積層板を作成した。後は
比較例1と同様にしてプリント配線板を作成し、半導体
チップ搭載部分をザグリマシーンにてくり抜き、裏面に
厚さ200μmの銅板を上記プリプレグCを打ち抜いた
ものを使用して、加熱、加圧下に同様に接着させ、放熱
板付きプリント配線板を作成した。これはややそりが発
生した。この放熱板に直接銀ペーストで半導体チップを
接着させ、ワイヤボンディングで接続後、液状エポキシ
樹脂封止剤で封止した(図3)。このパッケージの評価
結果を表1に示す。
Comparative Example 2 Epoxy resin (trade name: Epicoat 5045) 700
Part and epoxy resin (trade name: ESCN220F) 3
00 parts, 35 parts of dicyandiamide, and 1 part of 2-ethyl-4-methylimidazole were dissolved in a mixed solvent of methyl ethyl ketone and dimethylformamide, and this was dissolved to a thickness of 100 μm.
m glass woven cloth, dried and gelled for 15 minutes
A low flow prepreg C at 170 ° C. for 2 seconds was prepared. In addition, a high flow prepreg D having a gelling time of 150 seconds and a resin flow of 18 mm was prepared. Two prepregs D were laminated and molded at 190 ° C., 20 kgf / cm 2 and a vacuum of 30 mmHg or less for 2 hours to prepare a double-sided copper-clad laminate. Thereafter, a printed wiring board was prepared in the same manner as in Comparative Example 1, the mounting portion of the semiconductor chip was cut out with a counterbore machine, and a 200-μm-thick copper plate was punched out of the above-mentioned prepreg C on the back surface, and heated and heated. In the same manner, the printed circuit board with the heat radiating plate was made to adhere under pressure. This caused a slight sled. A semiconductor chip was directly bonded to the heat sink with a silver paste, connected by wire bonding, and then sealed with a liquid epoxy resin sealant (FIG. 3). Table 1 shows the evaluation results of this package.

【0038】比較例3 実施例1の内層金属芯を、エッチングする場合、表裏面
の両側から、圧力2kgf/cm2でエッチングを行な
った。同一高さの円錐台形特記を得た時点でエッチング
を止めた。得られた金属板のクリアランスホールは、表
面の孔径0.3mmφ、裏面の孔径0.6mmφであ
り、均一に表裏があかず、0.25mmのスルーホール
をあけた時、多数の孔壁が金属板と接続した。
COMPARATIVE EXAMPLE 3 When the inner metal core of Example 1 was etched, etching was performed from both the front and back surfaces at a pressure of 2 kgf / cm 2 . Etching was stopped when the same height of the truncated cone was obtained. The clearance hole of the obtained metal plate has a front surface with a hole diameter of 0.3 mmφ and a rear surface with a hole diameter of 0.6 mmφ. Connected to the board.

【0039】 表1 項 目 実 施 例 比 較 例 1 1 2 表面半導体チップ搭載部 と内層金属板円錐台突起 との接続性 良好 ー ー 吸湿後の耐熱性1) 常 態 異常なし 異常なし 異常なし 24hrs. 異常なし 異常なし 異常なし 48hrs. 異常なし 異常なし 異常なし 72hrs. 異常なし 異常なし 異常なし 96hrs. 異常なし 異常なし 異常なし 120hrs. 異常なし 一部剥離 一部剥離 144hrs. 異常なし 一部剥離 一部剥離 168hrs. 異常なし 一部剥離 一部剥離 吸湿後の耐熱性2) 常 態 異常なし 異常なし 異常なし 24hrs. 異常なし 一部剥離 一部剥離 48hrs. 異常なし 剥離大 剥離大 72hrs. 異常なし ワイヤ切れ ワイヤ切れ 96hrs. 異常なし ワイヤ切れ ワイヤ切れ 120hrs. 異常なし ワイヤ切れ ワイヤ切れ 144hrs. 異常なし ― ー 168hrs. 異常なし ― ― ガラス転移温度(℃) 237 235 160 放熱性(℃) 36 55 48 Table 1 Item Practical example Comparative example 1 1 2 Good connectivity between the surface semiconductor chip mounting portion and the inner layer metal plate truncated conical projections ー ー Heat resistance after moisture absorption 1) Normal No abnormalities No abnormalities No abnormalities 24hrs. No abnormalities No abnormalities No abnormalities 48hrs. No abnormalities No abnormalities No abnormalities 72hrs. No abnormalities No abnormalities No abnormalities 96hrs. No abnormalities No abnormalities No abnormalities 120hrs. No abnormalities Partial peeling 144hrs. No abnormalities Partial peeling one Partial peeling 168hrs. No abnormality Partial peeling Partial peeling Heat resistance after moisture absorption 2) Normal condition No abnormality No abnormality No abnormality No abnormality 24hrs. No abnormality Partial peeling Partial peeling 48hrs. No abnormality Large peeling Large 72hrs. No abnormality Wire Break Wire break 96hrs. No fault Wire break Wire break 120hrs. No fault Wire break Wire break 144hrs. No fault--168hrs. No fault--Glass transition temperature (℃) 237 235 160 Heat dissipation (℃) 36 55 48

【0040】<測定方法>(1) 半導体チップ搭載金属
箔と内層金属円錐台形突起との接続性 9個の円錐台形突起部の断面を観察し、接続の有無を見
た。 (2) 吸湿後の耐熱性1) JEDEC STANDARD TEST METHOD A113-A LEVEL3:30℃・60%
RHで所定時間処理後、220℃リフローソルダー3サイクル
後の基板の異常の有無について、断面観察及び電気的チ
ェックによって確認した。 (3) 吸湿後の電気絶縁性2) JEDEC STANDARD TEST METHOD A113-A LEVEL2:85℃・60%
RHで所定時間(Max.168hrs.)処理後、220℃リフローソル
ダー3サイクル後の基板の異常の有無を断面観察及び電
気的チェックによって確認した。 (4) ガラス転移温度 DMA法にて測定した。 (5) 放熱性 パッケージを同一マザーボードプリント配線板にハンダ
ボールで接着させ、1000時間連続使用してから、パッケ
ージの温度を測定した。 (7) 金属芯と円錐台形金属突起部との密着性 全ての金属突起部の断面を観察した。
<Measurement Method> (1) Connectivity between Semiconductor Chip-Mounted Metal Foil and Inner-Layer Metal Truncated Conical Protrusion The cross sections of the nine truncated conical protrusions were observed to determine whether or not there was connection. (2) Heat resistance after moisture absorption 1) JEDEC STANDARD TEST METHOD A113-A LEVEL3: 30 ℃ ・ 60%
After the treatment with RH for a predetermined time, the presence or absence of an abnormality in the substrate after three cycles of reflow soldering at 220 ° C. was confirmed by cross-sectional observation and electrical check. (3) Electrical insulation after moisture absorption 2) JEDEC STANDARD TEST METHOD A113-A LEVEL2: 85 ℃ ・ 60%
After processing at RH for a predetermined time (Max. 168 hrs.), The presence or absence of abnormality in the substrate after three cycles of reflow soldering at 220 ° C. was confirmed by cross-sectional observation and electrical check. (4) Glass transition temperature Measured by the DMA method. (5) Heat dissipation The package was bonded to the same motherboard printed wiring board with solder balls and used continuously for 1000 hours, and then the temperature of the package was measured. (7) Adhesion between metal core and frustoconical metal protrusions Cross sections of all metal protrusions were observed.

【0041】[0041]

【発明の効果】プリント配線板の片面に、半導体チップ
が固定され、半導体回路導体がその周囲のプリント配線
板表面に形成された回路導体とワイヤボンディングで接
続されており、少なくとも、該表面のプリント配線板上
の信号伝播回路導体が、プリント配線板の反対面に形成
された回路導体もしくは該ハンダボールでの接続用導体
パッドとが、スルーホール導体で結線されており、少な
くとも1個以上のスルーホールが金属芯と直接接合する
か、金属芯の裏面と金属メッキされた或いは熱伝導性接
着剤で充填されたビア孔で接続しており、裏面半導体チ
ップが樹脂封止されている構造の半導体プラスチックパ
ッケージに用いる金属芯入りプリント配線板用金属芯の
製造法であって、平滑な金属板の表面の、円錐台形突起
を形成する部分に、ハンダを付着させ、裏面にはクリア
ランスホール又はスリット孔をあける部分以外にエッチ
ングレジストを付着させ、アルカリ性エッチング液に
て、表面からはより低圧力で、裏面からは、より高圧力
でエッチングすることにより、円錐台形突起上にハンダ
が付着し、且つクリアランスホール又はスリット孔の上
下がほぼ同径のものが得られ、積層成形して両面金属箔
張積層板としたものを用いたプリント配線板は、スルー
ホール孔壁と金属板とは樹脂組成物で絶縁されており、
半導体チップ搭載部分の下部に形成た複数個の円錐台形
突起とは、ハンダで強固に接続しており、少なくとも1
個以上のスルーホールが内層金属板と接続しており、又
は金属芯と裏側のボールパッドとがビア孔で接合されて
おり、発生した熱はこの金属板を通して逃げるようにし
た半導体プラスチックパッケージの製造方法を本発明は
提供する。本発明の製造方法によれば、内層金属芯と表
層の金属箔との接続信頼性に優れ、半導体チップの下面
からの吸湿がなく、吸湿後の耐熱性、すなわちポップコ
ーン現象が大幅に改善できるとともに、熱放散性も改善
でき、加えて大量生産性にも適しており、経済性の改善
された、新規な構造の半導体プラスチックパッケージに
用いるプリント配線板用の金属芯を得ることができる。
According to the present invention, a semiconductor chip is fixed to one surface of a printed wiring board, and a semiconductor circuit conductor is connected by wire bonding to a circuit conductor formed on the surface of the printed wiring board around the semiconductor chip. The signal propagation circuit conductor on the wiring board is connected to the circuit conductor formed on the opposite surface of the printed wiring board or the connection conductor pad with the solder ball by a through-hole conductor, and at least one through-hole conductor is provided. A semiconductor with a structure in which the hole is directly bonded to the metal core or connected to the back surface of the metal core by a via hole plated with metal or filled with a heat conductive adhesive, and the back surface semiconductor chip is sealed with resin. A method of manufacturing a metal core for a printed wiring board containing a metal core used for a plastic package, the method comprising forming a truncated conical projection on a smooth metal plate surface. Attach solder, attach an etching resist to the back surface except for the part where a clearance hole or slit hole is made, and etch with an alkaline etchant at a lower pressure from the front surface and at a higher pressure from the back surface. Solder adheres to the truncated cone-shaped projection, and the upper and lower clearance holes or slit holes have substantially the same diameter, and a printed wiring board using a double-sided metal foil-clad laminate is obtained by laminating. The through-hole hole wall and the metal plate are insulated by the resin composition,
The plurality of truncated conical protrusions formed at the lower portion of the semiconductor chip mounting portion are firmly connected by solder, and
Manufacture of a semiconductor plastic package in which more than one through hole is connected to the inner metal plate, or the metal core and the ball pad on the back side are joined by via holes, and the generated heat is released through this metal plate The present invention provides a method. According to the production method of the present invention, the connection reliability between the inner metal core and the surface metal foil is excellent, there is no moisture absorption from the lower surface of the semiconductor chip, and the heat resistance after moisture absorption, that is, the popcorn phenomenon can be significantly improved. In addition, it is possible to obtain a metal core for a printed wiring board used for a semiconductor plastic package having a novel structure, which has improved heat dissipation, is suitable for mass productivity, and has improved economic efficiency.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施例1の金属芯の製造工程及びそれを用いた
半導体プラスチックパッケージ用両面銅張積層板。
FIG. 1 is a manufacturing process of a metal core of Example 1 and a double-sided copper-clad laminate for a semiconductor plastic package using the same.

【図2】比較例1の半導体プラスチックパッケージの製
造工程。
FIG. 2 shows a manufacturing process of the semiconductor plastic package of Comparative Example 1.

【図3】比較例2の半導体プラスチックパッケージの製
造工程。
FIG. 3 shows a manufacturing process of the semiconductor plastic package of Comparative Example 2.

【符号の説明】[Explanation of symbols]

a ハンダ b 金属板 c エッチングレジスト d 金属箔 e ガラス布基材熱硬化性樹脂層 f クリアランスホール g プリプレグB h 放熱用スルーホール i 半導体チップ j 銀ペースト k ボンディングワイヤ l 封止樹脂 m ハンダボール n メッキレジスト o 表裏回路導通用スルーホール p プリプレグC a Solder b Metal plate c Etching resist d Metal foil e Glass cloth base thermosetting resin layer f Clearance hole g Prepreg B h Heat dissipation through hole i Semiconductor chip j Silver paste k Bonding wire l Sealing resin m Solder ball n plating Resist o Front and back circuit conduction through hole p Prepreg C

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも1個の半導体チップを熱伝導
性接着剤で直接固定するための金属芯プリント配線板に
おいて、複数個の円錐台形金属突起部と、表裏導通孔形
成のためのクリアランスホール又はスリット孔が形成さ
れている金属板の表裏に、半硬化状態の熱硬化性樹脂組
成物のプリプレグ、樹脂シート、樹脂付き金属箔或いは
塗料層を配置し、さらに、その外側に、必要により金属
箔を配置し、加熱、加圧下に積層成形して得られる半導
体プラスチックパッケージ用の金属芯入り両面金属箔張
積層板の金属芯の製造方法であって、金属板の片面の一
部分に円錐台形突起部形成用ハンダを配置し、反対面に
はクリアランスホール或いはスリット孔をエッチングで
形成するためのエッチングレジストを配置し、エッチン
グ工程で円錐台形突起部形成面に、より低圧力でアルカ
リ性エッチング液を吹きかけ、反対面には、より高圧力
でアルカリ性エッチング液を吹きかけることにより、円
錐台形突起部分とクリアランスホール或いはスリット孔
を同時に形成することを特徴とする異形状金属芯入りプ
リント配線板用金属芯の製造方法。
A metal core printed wiring board for directly fixing at least one semiconductor chip with a heat conductive adhesive, a plurality of truncated conical metal protrusions, and a clearance hole for forming front and back conduction holes. A prepreg, a resin sheet, a resin-coated metal foil or a paint layer of a thermosetting resin composition in a semi-cured state is arranged on the front and back of the metal plate on which the slit holes are formed, and further, if necessary, a metal foil A method of manufacturing a metal core of a double-sided metal foil-clad laminate containing a metal core for a semiconductor plastic package obtained by laminating and molding under heat and pressure, comprising a truncated cone-shaped projection on a part of one surface of the metal plate. A solder for forming is arranged, and an etching resist for forming a clearance hole or a slit hole by etching is arranged on the opposite surface. By spraying an alkaline etchant at a lower pressure on the raised surface and spraying an alkaline etchant on the opposite surface at a higher pressure, a truncated cone-shaped projection and a clearance hole or a slit hole are simultaneously formed. A method for producing a metal core for a printed wiring board containing a metal core having an irregular shape.
【請求項2】 該金属板が、銅95重量%以上の銅合金、或
いは純銅であることを特徴とする請求項1記載のプリン
ト配線板用金属芯の製造方法。
2. The method for producing a metal core for a printed wiring board according to claim 1, wherein said metal plate is a copper alloy of 95% by weight or more of copper or pure copper.
【請求項3】 該ハンダが、融点110〜250℃の鉛フリー
ハンダであることを特徴とする請求項1又は2記載のプ
リント配線板用金属芯の製造方法。
3. The method for manufacturing a metal core for a printed wiring board according to claim 1, wherein said solder is a lead-free solder having a melting point of 110 to 250 ° C.
JP16927198A 1919-04-03 1998-06-02 Manufacture of deformed metal core for metal cored printed wiring board Pending JPH11345906A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP16927198A JPH11345906A (en) 1998-06-02 1998-06-02 Manufacture of deformed metal core for metal cored printed wiring board
US09/237,840 US6097089A (en) 1998-01-28 1999-01-27 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
TW088101289A TW401725B (en) 1998-01-28 1999-01-28 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
EP99300654A EP0933813A2 (en) 1998-01-28 1999-01-28 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
KR1019990002682A KR19990068179A (en) 1998-01-28 1999-01-28 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
US09/583,148 US6265767B1 (en) 1919-04-03 2000-05-30 Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16927198A JPH11345906A (en) 1998-06-02 1998-06-02 Manufacture of deformed metal core for metal cored printed wiring board

Publications (1)

Publication Number Publication Date
JPH11345906A true JPH11345906A (en) 1999-12-14

Family

ID=15883423

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16927198A Pending JPH11345906A (en) 1919-04-03 1998-06-02 Manufacture of deformed metal core for metal cored printed wiring board

Country Status (1)

Country Link
JP (1) JPH11345906A (en)

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