JPH11345825A - Mounting device for semiconductor chip - Google Patents
Mounting device for semiconductor chipInfo
- Publication number
- JPH11345825A JPH11345825A JP15264098A JP15264098A JPH11345825A JP H11345825 A JPH11345825 A JP H11345825A JP 15264098 A JP15264098 A JP 15264098A JP 15264098 A JP15264098 A JP 15264098A JP H11345825 A JPH11345825 A JP H11345825A
- Authority
- JP
- Japan
- Prior art keywords
- mounting
- adhesive layer
- anisotropic conductive
- semiconductor chip
- conductive adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L2224/743—Apparatus for manufacturing layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体チップの実
装装置に関し、更に詳しくは、半導体チップと実装基板
との電気的接続の信頼性を高めるようにした半導体チッ
プの実装装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor chip mounting apparatus, and more particularly, to a semiconductor chip mounting apparatus for improving the reliability of electrical connection between a semiconductor chip and a mounting board.
【０００２】[0002]
【従来の技術】近年、ノート型パーソナルコンピュータ
などの様々な情報通信機器は、益々、薄型化、軽量化、
小型化、高速化される傾向にある。このため、多ピン侠
ピッチ領域への実装をベアチップを用いて行うことが要
望されており、これに伴い、半導体チップの実装方法と
して、マルチチップモジュールを形成するフリップチッ
プ実装が注目されている。このフリップチップ実装での
電気的接続方法として、（１）半導体チップ接続パッド
上に高融点のはんだバンプを形成し、実装配線基板上に
はんだプリコートを行って接続するはんだフリップチッ
プ法、（２）半導体チップ接続パッド上に金バンプを形
成し、銀等の導電性材料からなるペーストを塗布し、実
装基板上にマウントして接続する導電性樹脂フリップチ
ップ法、（３）半導体チップ接続パッド上に金バンプを
形成し、フィルム状の異方性導電接着剤を介して実装す
るフリップチップ法などがある。このうち（３）は、プ
ロセスが簡素であり、多用されている。以下、図面を参
照し、例を挙げて、（３）の方法で用いる従来の半導体
チップの実装装置（以下、簡単に実装装置と言う）を説
明する。2. Description of the Related Art In recent years, various types of information communication devices such as notebook personal computers have become increasingly thinner and lighter.
It tends to be smaller and faster. For this reason, there is a demand for mounting in a multi-pin pitch region using a bare chip, and accordingly, flip-chip mounting for forming a multi-chip module has attracted attention as a semiconductor chip mounting method. (1) A solder flip chip method in which a high melting point solder bump is formed on a semiconductor chip connection pad, and a solder pre-coat is performed on a mounting wiring board for connection, and (2) an electrical connection method in the flip chip mounting. A conductive resin flip chip method in which a gold bump is formed on a semiconductor chip connection pad, a paste made of a conductive material such as silver is applied, and mounted and connected on a mounting substrate. (3) On a semiconductor chip connection pad There is a flip chip method in which a gold bump is formed and mounted via a film-like anisotropic conductive adhesive. Of these, (3) has a simple process and is frequently used. Hereinafter, a conventional semiconductor chip mounting device (hereinafter simply referred to as a mounting device) used in the method (3) will be described with reference to the drawings and an example.
【０００３】（３）の方法に用いる実装装置としては、
フルカット方式、及び、ハーフカット方式の実装装置が
多用されている。フルカット方式は、異方性導電接着剤
を有するテープを半導体チップサイズに合わせて切断
し、実装配線板上に貼り付ける方式であり、貼り付けた
後、接着テープのセパレータ（非接着層）を剥がす。図
４は、従来のフルカット方式の実装装置の部分斜視図で
ある。図４に示す実装装置１０は、実装基板１２の半導
体チップ実装領域上に異方性導電接着剤層を介して半導
体チップを接着、実装する装置である。実装装置１０
は、カッタ１３を有して、異方性導電接着剤層１４を片
面に有するテープ１６を実装領域とほぼ同じ寸法に切断
する切断機構１８と、切断機構１８により切断されたテ
ープ１７を実装領域上に押圧して、異方性導電接着剤層
１４を実装領域上に被着させる押圧部材２０とを備えて
いる。異方性導電接着剤とは、導電性粒子を絶縁性の接
着剤中に分散させたものである。押圧部材（ボンディン
グツールとも言われる）は、通常、金属製で、平坦な下
面を押圧面として有する。The mounting apparatus used in the method (3) includes:
Full-cut type and half-cut type mounting devices are frequently used. The full-cut method is a method in which a tape having an anisotropic conductive adhesive is cut according to the size of a semiconductor chip and is attached on a mounting wiring board. After attaching, a separator (non-adhesive layer) of the adhesive tape is removed. Peel off. FIG. 4 is a partial perspective view of a conventional full-cut mounting device. The mounting apparatus 10 shown in FIG. 4 is an apparatus for bonding and mounting a semiconductor chip on a semiconductor chip mounting area of a mounting board 12 via an anisotropic conductive adhesive layer. Mounting device 10
Is a cutting mechanism 18 having a cutter 13 for cutting a tape 16 having an anisotropic conductive adhesive layer 14 on one side to approximately the same size as a mounting area, and a tape 17 cut by the cutting mechanism 18 to a mounting area. And a pressing member 20 that presses upward to adhere the anisotropic conductive adhesive layer 14 on the mounting area. The anisotropic conductive adhesive is obtained by dispersing conductive particles in an insulating adhesive. The pressing member (also called a bonding tool) is usually made of metal and has a flat lower surface as a pressing surface.
【０００４】一方、ハーフカット方式の実装装置は、異
方性導電接着剤の接着剤部分のみすなわち樹脂部分のみ
を切断して貼り付ける方式であり、セパレータを切断せ
ずに巻き取る。図５は、従来のハーフカット方式の実装
装置の部分斜視図である。図５に示す実装装置２４は、
テープ１６を実装領域上に走行させるリール２６Ａ、Ｂ
と、カッタ２８を有して、テープ片面に形成された異方
性導電接着剤層１４に切り溝を入れて実装領域とほぼ同
じ寸法の領域に分割する分割機構３０とを備えている。
また、実装装置２４は、分割された異方性導電接着剤層
を有するテープ１６を実装領域上に押圧して、異方性導
電接着剤層１４を実装領域上に被着させる押圧部材２０
を備えている。図６は、異方性導電接着剤の構造を示す
側面断面図である。異方性導電接着剤は、絶縁性のバイ
ンダー２７の中に導電性の粒子２９を分散させたもので
ある。On the other hand, a half-cut type mounting apparatus is a method in which only the adhesive portion of the anisotropic conductive adhesive, that is, only the resin portion is cut and attached, and the separator is wound without cutting. FIG. 5 is a partial perspective view of a conventional half-cut mounting device. The mounting device 24 shown in FIG.
Reels 26A, B for running the tape 16 over the mounting area
And a dividing mechanism 30 having a cutter 28 to cut a groove in the anisotropic conductive adhesive layer 14 formed on one surface of the tape to divide the tape into a region having substantially the same size as the mounting region.
Further, the mounting device 24 presses the tape 16 having the divided anisotropic conductive adhesive layer onto the mounting area, and presses the tape 16 having the anisotropic conductive adhesive layer 14 onto the mounting area.
It has. FIG. 6 is a side sectional view showing the structure of the anisotropic conductive adhesive. The anisotropic conductive adhesive is obtained by dispersing conductive particles 29 in an insulating binder 27.
【０００５】図７（ａ）から（ｄ）は、それぞれ、フル
カット方式の実装装置１０を用いて半導体チップを実装
することを示す工程毎の斜視図である。配線３１及びパ
ッド３２を上面に有する実装基板１２（図７（ａ）参
照）の実装領域上に、切断したテープ１７を押圧部材２
０により被着させる（図７（ｂ）参照）。尚、被着させ
るときには、実装領域上のレジスト膜を予め除去してお
く。次いで、テープ１７のセパレータ３４を剥離し（図
７（ｃ）参照）、異方性導電接着剤層上に、はんだバン
プ３６を有する半導体チップ（ベアチップ）３８を実装
する（図７（ｄ）参照）。ハーフカット方式の実装装置
２４を用いても、異方性導電接着剤層１４が実装領域上
に同様に接着されて（図７（ｃ）参照）、半導体チップ
３８が実装される。FIGS. 7A to 7D are perspective views for each process showing that a semiconductor chip is mounted using the mounting apparatus 10 of the full cut system. The cut tape 17 is pressed onto the mounting region of the mounting substrate 12 (see FIG. 7A) having the wirings 31 and the pads 32 on the upper surface.
0 (see FIG. 7B). Note that the resist film on the mounting area is removed in advance before the deposition. Next, the separator 34 of the tape 17 is peeled off (see FIG. 7C), and a semiconductor chip (bare chip) 38 having solder bumps 36 is mounted on the anisotropic conductive adhesive layer (see FIG. 7D). ). Even when the mounting device 24 of the half-cut type is used, the anisotropic conductive adhesive layer 14 is similarly bonded onto the mounting area (see FIG. 7C), and the semiconductor chip 38 is mounted.
【０００６】尚、両方式とも、所定温度に制御した上
で、押圧部材２０により、所定時間、所定圧力で半導体
チップ２８を実装基板上に押圧し、異方性導電接着剤を
実装基板１２に充分に馴染ませている。In both systems, the semiconductor chip 28 is pressed onto the mounting substrate by the pressing member 20 at a predetermined pressure for a predetermined time after the temperature is controlled to a predetermined temperature, and an anisotropic conductive adhesive is applied to the mounting substrate 12. We are fully familiar.
【０００７】[0007]
【発明が解決しようとする課題】ところで、半導体チッ
プ、実装基板、接着剤（樹脂）、及び空気のそれぞれの
熱膨張係数（体積膨張率）βa 、βb 、βc 及びβ
d は、 βa ＜βb ＜βc ＜βd の関係にあり、気泡の熱膨張係数が最も大きい。このた
め、接着後、フリップチップ実装する際、図８に示すよ
うに、異方性導電接着剤と実装基板との間に残存する空
気により隙間が生じ、半導体チップと実装基板との電気
的接続の信頼性が低下するという問題があった。この空
気（気泡）を除去して信頼性を向上させることが要望さ
れている。The thermal expansion coefficients (volume expansion coefficients) β a , β b , β c and β of the semiconductor chip, the mounting board, the adhesive (resin), and the air, respectively.
d is in the relationship of β a <β b <β c <β d, is the largest thermal expansion coefficient of the bubbles. Therefore, when flip-chip mounting is performed after bonding, as shown in FIG. 8, a gap is generated due to air remaining between the anisotropic conductive adhesive and the mounting substrate, and an electrical connection between the semiconductor chip and the mounting substrate is generated. There is a problem that the reliability of the device decreases. There is a demand to improve the reliability by removing the air (bubbles).
【０００８】以上のような事情に照らして、本発明の目
的は、異方性導電接着剤層と実装基板とを密着させて、
両者の間に空気が残存することを防止した半導体チップ
の実装装置を提供することである。[0008] In view of the above circumstances, an object of the present invention is to provide an anisotropic conductive adhesive layer in close contact with a mounting substrate,
An object of the present invention is to provide a semiconductor chip mounting device in which air is prevented from remaining between the two.
【０００９】[0009]
【課題を解決するための手段】本発明者は、気泡の発生
する原因を検討した。そして、フィルム状の異方性導電
接着剤層を貼り付ける際、実装基板上のパッドやレジス
トによって、空気は逃げることができずに残存して気泡
が生じると推定した。更に、押圧部材が剛性で、押圧部
材の先端形状すなわち下面の形状が平坦であるため、フ
ィルム状の異方性導電接着剤層を実装基板に貼り付ける
際、実装基板上に形成されている段差によって、異方性
導電接着剤層に加えられる押圧圧力を均一にすることが
できず、気泡が生じると推定した（図８参照）。そこ
で、本発明者は、鋭意検討の結果、押圧部材の下面を柔
にすることにより、押圧部材下部が実装基板上面の段差
に追従して変形可能になることを見い出し、本発明を完
成するに至った。Means for Solving the Problems The present inventors have studied the causes of the generation of bubbles. Then, when the film-like anisotropic conductive adhesive layer was attached, it was presumed that air could not escape and remained and bubbles were generated due to pads and resist on the mounting substrate. Furthermore, since the pressing member is rigid and the tip shape of the pressing member, that is, the shape of the lower surface is flat, the step formed on the mounting substrate when the film-like anisotropic conductive adhesive layer is attached to the mounting substrate. Due to this, it was presumed that the pressing pressure applied to the anisotropic conductive adhesive layer could not be made uniform and bubbles were generated (see FIG. 8). Therefore, the present inventor has found that, as a result of diligent examination, by softening the lower surface of the pressing member, the lower portion of the pressing member can be deformed following the step of the upper surface of the mounting board, and to complete the present invention. Reached.
【００１０】上記目的を達成するために、本発明に係る
第１発明の半導体チップの実装装置は、実装基板の半導
体チップ実装領域上に異方性導電接着剤層を介して半導
体チップを接着、実装する装置であって、異方性導電接
着剤層を片面に有するテープを実装領域とほぼ同じ寸法
に切断する切断機構と、切断機構により切断されたテー
プを実装領域上に押圧して、異方性導電接着剤層を実装
領域上に被着させる押圧部材とを備えた半導体チップの
実装装置において、押圧部材が、テープを押圧する押圧
面に弾性体を備えていることを特徴としている。異方性
導電接着剤層とは、前述のように、導電性粒子が絶縁性
の接着剤層中に分散している接着剤層である。In order to achieve the above object, a semiconductor chip mounting apparatus according to a first aspect of the present invention provides a semiconductor chip mounting apparatus for bonding a semiconductor chip onto a semiconductor chip mounting area of a mounting board via an anisotropic conductive adhesive layer. A mounting mechanism that cuts a tape having an anisotropic conductive adhesive layer on one side to approximately the same size as a mounting area; In a semiconductor chip mounting apparatus including a pressing member for applying an isotropic conductive adhesive layer on a mounting region, the pressing member includes an elastic body on a pressing surface for pressing the tape. As described above, the anisotropic conductive adhesive layer is an adhesive layer in which conductive particles are dispersed in an insulating adhesive layer.
【００１１】また、本発明に係る第２発明の半導体チッ
プに実装装置は、実装基板の半導体チップ実装領域上に
異方性導電接着剤層を介して半導体チップを接着、実装
する装置であって、テープ片面に形成された異方性導電
接着剤層に切り溝を入れて実装領域とほぼ同じ寸法の領
域に分割する分割機構と、分割された異方性導電接着剤
層を有するテープを実装領域上に押圧して、異方性導電
接着剤層を実装領域上に被着させる押圧部材とを備えた
半導体チップの実装装置において、押圧部材が、テープ
を押圧する押圧面に弾性体を備えていることを特徴とし
ている。A semiconductor chip mounting apparatus according to a second aspect of the present invention is an apparatus for bonding and mounting a semiconductor chip on a semiconductor chip mounting area of a mounting substrate via an anisotropic conductive adhesive layer. , A dividing mechanism that cuts a groove in the anisotropic conductive adhesive layer formed on one side of the tape to divide it into an area of approximately the same size as the mounting area, and mounts the tape having the divided anisotropic conductive adhesive layer A semiconductor chip mounting device comprising: a pressing member that presses on the region and applies the anisotropic conductive adhesive layer on the mounting region, wherein the pressing member includes an elastic body on a pressing surface that presses the tape. It is characterized by having.
【００１２】第１、第２発明により、異方性導電接着剤
と実装基板との間に気泡が発生することが防止され、異
方性導電接着剤は実装基板上面に密着する。第１、第２
発明では、弾性体は、例えばシリコーンゴムからなる。According to the first and second aspects of the present invention, bubbles are prevented from being generated between the anisotropic conductive adhesive and the mounting substrate, and the anisotropic conductive adhesive adheres to the upper surface of the mounting substrate. 1st, 2nd
In the invention, the elastic body is made of, for example, silicone rubber.
【００１３】[0013]
【発明の実施の形態】以下に、実施形態例を挙げ、添付
図面を参照して、本発明の実施の形態を具体的かつより
詳細に説明する。実施形態例 本実施形態例は、本発明の一実施形態例である。図１
（ａ）及び（ｂ）は、それぞれ、本実施形態例の半導体
チップの実装装置（以下、簡単に実装装置と言う）の押
圧部材の斜視図及び部分側面図である。本実施形態例の
実装装置は、従来の実装装置１０や２４に比べ、押圧部
材４２が、テープを押圧する押圧面である下面に弾性体
４４を備えている。本実施形態例では、従来と同じもの
には同じ符号を付してその説明を省略する。弾性体４４
は、例えば板状でシリコーンゴムからなり、弾性体４４
の厚さは、押圧部材４２が押圧時に実装基板上の段差に
充分に追従できるよう、段差形状や異方性導電接着剤の
材質等に応じて決定されている。Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Embodiment Example The embodiment is an embodiment of the present invention. FIG.
1A and 1B are a perspective view and a partial side view, respectively, of a pressing member of a semiconductor chip mounting device (hereinafter simply referred to as a mounting device) of the present embodiment. In the mounting apparatus of the present embodiment, the pressing member 42 includes an elastic body 44 on the lower surface, which is a pressing surface for pressing the tape, as compared with the conventional mounting apparatuses 10 and 24. In the present embodiment, the same components as those in the related art are denoted by the same reference numerals, and description thereof is omitted. Elastic body 44
Is, for example, a plate-like member made of silicone rubber,
Is determined according to the shape of the step and the material of the anisotropic conductive adhesive so that the pressing member 42 can sufficiently follow the step on the mounting substrate when pressed.
【００１４】図２は、押圧部材４２により、異方性導電
接着剤層１４を有するテープ１７を実装領域上に押圧し
て接着させた状態を示す側面断面図である。本実施形態
例では、押圧時、弾性体４４が変形して異方性導電接着
剤層１４と実装基板１２との間に空気が残存しない。従
って、異方性導電接着剤層１４は実装基板上面に密着す
る。尚、図３は、このようにして異方性導電接着剤層１
４を接着させた様子を示す斜視図である。図３では、判
りやすく説明するために、セパレータを図示していな
い。これにより、半導体チップ３８と実装基板１２との
電気的接続の信頼性が、従来に比べて遥かに向上する。FIG. 2 is a cross-sectional side view showing a state in which the tape 17 having the anisotropic conductive adhesive layer 14 is pressed and adhered onto the mounting area by the pressing member 42. In the present embodiment, at the time of pressing, the elastic body 44 is deformed and no air remains between the anisotropic conductive adhesive layer 14 and the mounting substrate 12. Therefore, the anisotropic conductive adhesive layer 14 comes into close contact with the upper surface of the mounting substrate. FIG. 3 shows the anisotropic conductive adhesive layer 1 thus obtained.
FIG. 4 is a perspective view showing a state in which No. 4 is bonded. In FIG. 3, the separator is not shown for easy understanding. As a result, the reliability of the electrical connection between the semiconductor chip 38 and the mounting substrate 12 is much improved as compared with the related art.
【００１５】[0015]
【発明の効果】本発明によれば、押圧部材が、テープを
押圧する押圧面に弾性体を備えている。本発明に係る半
導体チップの実装装置を用いることにより、弾性体が、
押圧部材による押圧時に実装領域上の段差に追従して変
形する。従って、異方性導電接着剤と実装基板との間に
空気が残存せず、異方性導電接着剤は実装基板上面に密
着する。よって、半導体チップと実装基板との電気的接
続の信頼性が、従来に比べて遥かに向上する。According to the present invention, the pressing member has the elastic body on the pressing surface for pressing the tape. By using the semiconductor chip mounting device according to the present invention, the elastic body,
When pressed by the pressing member, it deforms following the step on the mounting area. Therefore, no air remains between the anisotropic conductive adhesive and the mounting substrate, and the anisotropic conductive adhesive adheres to the upper surface of the mounting substrate. Therefore, the reliability of the electrical connection between the semiconductor chip and the mounting board is much improved as compared with the related art.
【図面の簡単な説明】[Brief description of the drawings]
【図１】図１（ａ）及び（ｂ）は、それぞれ、実施形態
例の半導体チップの実装装置の押圧部材の斜視図及び部
分側面図である。FIGS. 1A and 1B are a perspective view and a partial side view, respectively, of a pressing member of a semiconductor chip mounting apparatus according to an embodiment;
【図２】実施形態例で、押圧部材により、異方性導電接
着剤層を有するテープを実装領域上に押圧して接着させ
た状態を示す側面断面図である。FIG. 2 is a side cross-sectional view showing a state in which a tape having an anisotropic conductive adhesive layer is pressed onto a mounting region and adhered by a pressing member in the embodiment.
【図３】実施形態例で、異方性導電接着剤層を接着させ
た様子を示す斜視図である。FIG. 3 is a perspective view showing a state where an anisotropic conductive adhesive layer is adhered in the embodiment.
【図４】従来のフルカット方式の実装装置の部分斜視図
である。FIG. 4 is a partial perspective view of a conventional full-cut mounting device.
【図５】従来のハーフカット方式の実装装置の部分斜視
図である。FIG. 5 is a partial perspective view of a conventional half-cut mounting device.
【図６】異方性導電接着剤の構造を示す側面断面図であ
る。FIG. 6 is a side sectional view showing a structure of an anisotropic conductive adhesive.
【図７】図７（ａ）から（ｄ）は、それぞれ、従来のフ
ルカット方式の実装装置を用いて半導体チップを実装す
ることを示す工程毎の斜視図である。FIGS. 7A to 7D are perspective views for each process showing that a semiconductor chip is mounted using a conventional full-cut mounting device.
【図８】従来の半導体チップの実装装置で異方性導電接
着剤層を押圧して接着することを示す側面断面図であ
る。FIG. 8 is a side cross-sectional view showing that an anisotropic conductive adhesive layer is pressed and bonded by a conventional semiconductor chip mounting apparatus.
１０……半導体チップの実装装置、１２……実装基板、
１４……異方性導電接着剤層、１３……カッタ、１６…
…テープ、１７……テープ、１８……切断機構、２０…
…押圧部材、２４……半導体チップの実装装置、２６
Ａ、Ｂ……リール、２７……バインダー、２８……カッ
タ、２９……導電性の粒子、３０……分割機構、３１…
…配線、３２……パッド、３４……セパレータ、３６…
…はんだバンプ、３８……半導体チップ（ベアチッ
プ）、４２……押圧部材、４４……弾性体。10 mounting device for semiconductor chip, 12 mounting substrate,
14 ... anisotropic conductive adhesive layer, 13 ... cutter, 16 ...
... Tape, 17 ... Tape, 18 ... Cutting mechanism, 20 ...
... Pressing member, 24 ... Semiconductor chip mounting device, 26
A, B ... reel, 27 ... binder, 28 ... cutter, 29 ... conductive particles, 30 ... dividing mechanism, 31 ...
... wiring, 32 ... pad, 34 ... separator, 36 ...
... solder bumps, 38 ... semiconductor chips (bare chips), 42 ... pressing members, 44 ... elastic bodies.
Claims (3)
方性導電接着剤層を介して半導体チップを接着、実装す
る装置であって、異方性導電接着剤層を片面に有するテ
ープを実装領域とほぼ同じ寸法に切断する切断機構と、
切断機構により切断されたテープを実装領域上に押圧し
て、異方性導電接着剤層を実装領域上に被着させる押圧
部材とを備えた半導体チップの実装装置において、 押圧部材が、テープを押圧する押圧面に弾性体を備えて
いることを特徴とする半導体チップの実装装置。1. An apparatus for bonding and mounting a semiconductor chip on a semiconductor chip mounting area of a mounting board via an anisotropic conductive adhesive layer, wherein a tape having an anisotropic conductive adhesive layer on one surface is mounted. A cutting mechanism for cutting to approximately the same size as the area,
A semiconductor chip mounting device comprising: a pressing member that presses the tape cut by the cutting mechanism onto the mounting region, and applies the anisotropic conductive adhesive layer onto the mounting region. An apparatus for mounting a semiconductor chip, comprising an elastic body provided on a pressing surface to be pressed.
方性導電接着剤層を介して半導体チップを接着、実装す
る装置であって、テープ片面に形成された異方性導電接
着剤層に切り溝を入れて実装領域とほぼ同じ寸法の領域
に分割する分割機構と、分割された異方性導電接着剤層
を有するテープを実装領域上に押圧して、異方性導電接
着剤層を実装領域上に被着させる押圧部材とを備えた半
導体チップの実装装置において、 押圧部材が、テープを押圧する押圧面に弾性体を備えて
いることを特徴とする半導体チップの実装装置。2. An apparatus for bonding and mounting a semiconductor chip on a semiconductor chip mounting area of a mounting substrate via an anisotropic conductive adhesive layer, wherein the device is provided with an anisotropic conductive adhesive layer formed on one surface of a tape. A dividing mechanism that divides the tape into a region having substantially the same size as the mounting region by forming a kerf, and pressing the tape having the divided anisotropic conductive adhesive layer onto the mounting region, thereby forming the anisotropic conductive adhesive layer A device for mounting a semiconductor chip, comprising: a pressing member to be attached on a mounting area; wherein the pressing member includes an elastic body on a pressing surface for pressing a tape.
を特徴とする請求項１又は２に記載の半導体チップの実
装装置。3. The semiconductor chip mounting apparatus according to claim 1, wherein the elastic body is made of silicone rubber.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15264098A JPH11345825A (en) | 1998-06-02 | 1998-06-02 | Mounting device for semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15264098A JPH11345825A (en) | 1998-06-02 | 1998-06-02 | Mounting device for semiconductor chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11345825A true JPH11345825A (en) | 1999-12-14 |
Family
ID=15544832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15264098A Pending JPH11345825A (en) | 1998-06-02 | 1998-06-02 | Mounting device for semiconductor chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11345825A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1148540A3 (en) * | 2000-04-19 | 2004-06-16 | Texas Instruments Deutschland Gmbh | Method and device for attaching a semiconductor chip to a chip carrier |
-
1998
- 1998-06-02 JP JP15264098A patent/JPH11345825A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1148540A3 (en) * | 2000-04-19 | 2004-06-16 | Texas Instruments Deutschland Gmbh | Method and device for attaching a semiconductor chip to a chip carrier |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4338834B2 (en) | Semiconductor chip mounting method using ultrasonic vibration | |
| JP2005064362A (en) | Manufacturing method of electronic device and electronic device thereof, and manufacturing method of semiconductor apparatus | |
| JP2005064362A5 (en) | ||
| JPH0927516A (en) | Connection structure of electronic component | |
| US5789820A (en) | Method for manufacturing heat radiating resin-molded semiconductor device | |
| JP2000182995A (en) | Manufacture of semiconductor device | |
| US20040061240A1 (en) | Semiconductor device and fabrication process thereof | |
| JP2000286299A (en) | Method for connecting semiconductor device | |
| JP2002009108A (en) | Semiconductor device, its manufacturing method, circuit board and electronic equipment | |
| KR100868616B1 (en) | Semiconductor flip-chip package component and fabricating method | |
| KR100883807B1 (en) | Semiconductor Device Package and Method of Fabricating the Same | |
| JP2001144123A (en) | Method of manufacturing semiconductor device and the semiconductor device | |
| JP3892359B2 (en) | Mounting method of semiconductor chip | |
| JPH11135551A (en) | Semiconductor device and method of mounting semiconductor element | |
| JPH11345825A (en) | Mounting device for semiconductor chip | |
| CN110828327A (en) | Method and apparatus for electrical connection of components | |
| JP2007294575A (en) | Method for manufacturing semiconductor device | |
| JPH11204567A (en) | Anisotropic conductive bonding agent and forming method thereof to substrate and semiconductor-chip mounting method and semiconductor device | |
| JPH10335384A (en) | Method and component for mounting semiconductor device or electronic component | |
| JP2003023034A (en) | Flip-chip mounting method | |
| EP4191644A1 (en) | Electronic apparatus | |
| JPH10341068A (en) | Printed wiring board and method for mounting electronic parts | |
| JP2004327724A (en) | Semiconductor device and manufacturing method therefor | |
| KR100790461B1 (en) | Method for manufacturing electronic package | |
| JP2007049100A (en) | Sticking device, method for sticking membrane, semiconductor device, and display |