JPH11344715A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device which prevents a display inferiority even if air bubbles are generated within liquid crystal. SOLUTION: The first transparent insulating substrate SUB2, which comprises a plurality of films containing a light shielding film BM dividing pixels, and the second transparent insulating substrate SUB1 comprising a plurality of films are placed so as to make their planes laminated with the films confronted with each other keeping a gap between them, are provided with a frame-shaped sealant located on the periphery of the two substrates and liquid crystal is filled inside the sealant to form a liquid crystal display. A groove is formed in the part of the display region, shielded by the film BM, formed inside the sealant of the liquid crystal display so as to make the gap of the liquid crystal layer LC in the region shielded by the film BM wider than the gap of liquid crystal layer in the region not shielded by the film BM.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display, and more particularly to a first transparent insulating substrate having a plurality of films including a light-shielding film for partitioning pixels, and a second transparent insulating substrate having a plurality of films. And a surface where the plurality of films are laminated is opposed to each other with a gap therebetween, and is attached by a sealing material provided in a frame shape around an edge between the first and second transparent insulating substrates. The present invention relates to a liquid crystal display device having a liquid crystal display element into which liquid crystal is injected.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device is provided with a non-linear element (switching element) corresponding to each of a plurality of pixel electrodes arranged in a matrix. Since the liquid crystal in each pixel is theoretically always driven (duty ratio 1.0), the contrast is better than that of a so-called simple matrix system that employs a time-division driving system. Then it is becoming an indispensable technology. A typical example of the switching element is a thin film transistor (TFT).

Incidentally, an active matrix type liquid crystal display device using thin film transistors is disclosed in, for example, Japanese Patent Application Laid-Open No. 63-309921 or "1.
2.5-inch active matrix color liquid crystal display ", Nikkei Electronics, pp. 193-210,
3-210 (Nikkei McGraw-Hill, December 15, 1986).

A liquid crystal display (also referred to as a liquid crystal display module) has, for example, a structure in which a light-shielding film, a color filter, an alignment film, an insulating film, and the like are stacked on one side, and a common electrode for display, a pixel electrode, an alignment film, and the like on the other side. It is composed of two transparent insulating substrates on which insulating films are laminated (a so-called in-plane switching (IPS) liquid crystal display device), or one of them has a transparent common electrode for display and an alignment film, a light-shielding film or a color filter and an insulating film. A surface of a so-called vertical electric field type (TN type) liquid crystal display device, which is composed of two transparent insulating substrates in which a film or the like is laminated and an insulating film such as a transparent pixel electrode for display or an alignment film is laminated on the other. The two substrates are overlapped with a predetermined gap therebetween so as to face each other, and both substrates are bonded to each other by a sealing material provided in a frame shape (a square shape) on a peripheral portion between the two substrates. Liquid crystal filling as notch After injecting liquid crystal into the sealing material between the two substrates to form a liquid crystal layer, the sealing port is sealed with a sealing material made of a photocurable resin, and a polarizing plate is further provided outside the two substrates. Liquid crystal display panel (liquid crystal display element, LCD: liquid crystal display (L
liquid Crystal Display)),
A backlight that is arranged on the back of the liquid crystal display panel and supplies illumination light to the liquid crystal display panel, a circuit board for driving the liquid crystal that is arranged outside the outer periphery of the liquid crystal display panel, and plastic mold molding that stores and holds the backlight A lower case, which is a product, and a metal shield case (upper case) that houses the above members and has an open display window.

[0005]

In a conventional liquid crystal display device, a light-shielding film (black matrix) formed on an inner surface, a color filter, a sealing material, or the impact or thermal stress of a liquid crystal, or the two substrates are used. When the liquid crystal is injected into the gap, bubbles may be generated inside the liquid crystal layer. Since there is no liquid crystal in the bubbles, the amount of transmitted light cannot be controlled, resulting in display failure.

In order to solve this problem, it is necessary to use a liquid crystal in which bubbles are unlikely to be generated, to examine manufacturing process conditions,
Suppression of outgassing from constituent materials is conceivable, but complete measures are difficult.

An object of the present invention is to provide a liquid crystal display device which does not cause display failure even when bubbles are generated inside the liquid crystal.

[0008]

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention is characterized by having the following constitutions (1) to (8).

(1) A first transparent insulating substrate having a plurality of films including a light-shielding film for partitioning a pixel and a second transparent insulating substrate having a plurality of films are provided on a surface on which the plurality of films are laminated. And a liquid crystal display element in which liquid crystal is injected inside the sealing material by bonding them together with a sealing material provided in a frame shape around an edge between the first and second transparent insulating substrates. A portion of the liquid crystal display element that is shielded by the light-shielding film in a display region formed inside the sealant of the liquid crystal display element; Grooves formed by making the gap larger than the gap between the liquid crystal layers were provided.

With this configuration, the bubbles generated in the liquid crystal move into the above-described groove having a large gap. Since this groove is a portion covered with a light-shielding film that partitions the pixels, even if the light modulation function due to the elimination of the liquid crystal due to bubbles does not affect the display, display defects due to bubbles are not affected. Thus, a liquid crystal display device with high display quality can be obtained.

(2) A first transparent insulating substrate in which a plurality of films including a light shielding film and an insulating film for partitioning pixels are laminated on a surface, a scanning signal line, a video signal line, a common electrode (a counter electrode), and a pixel. A second transparent insulating substrate, on which a plurality of films including electrodes are laminated on a surface, faces each other with a gap between the surfaces on which the plurality of films are laminated, and a periphery of an edge between the first and second transparent insulating substrates. A liquid crystal display element in which liquid crystal is injected inside the seal material, and a light-shielding film in a display area formed inside the seal material of the liquid crystal display element. The light-shielded portion has a groove formed by making the gap between the liquid crystal layers in the portion shielded by the light-shielding film larger than the gap between the liquid crystal layers in the portion not shielded by the light-shielding film.

In this configuration, the present invention is applied to a so-called horizontal electric field type liquid crystal display device, which does not have a transparent electrode (common electrode: counter electrode) on a transparent insulating substrate side having a light shielding film.
Remove the insulating film or alignment film in the part shielded by the light-shielding film, or reduce the film thickness so that the space between the parts is larger than the other parts so that the bubbles generated in the liquid crystal can be removed from the above-mentioned groove with a large gap. Move inside. Since this groove is a portion covered with a light-shielding film that partitions the pixels, even if the light modulation function due to the elimination of the liquid crystal due to bubbles does not affect the display, display defects due to bubbles are not affected. Thus, a liquid crystal display device with high display quality can be obtained.

(3) A first transparent insulating substrate in which a plurality of films including a light-shielding film for partitioning pixels, a transparent common electrode (counter electrode), and an insulating film are laminated on a surface, a scanning signal line, a video signal line, A second transparent insulating substrate on which a plurality of transparent electrode films including a transparent pixel electrode are laminated on a surface thereof, the surfaces on which the plurality of films are laminated are opposed to each other with a gap therebetween, and the first and second transparent insulating substrates are A liquid crystal display element in which liquid crystal is injected inside the seal material is attached by a seal material provided in a frame shape around an edge between, and a display region formed inside the seal material of the liquid crystal display element is formed. A groove formed by making the gap between the liquid crystal layers in the portion shielded by the light-shielding film larger than the gap between the liquid crystal layers in the portion not shielded by the light-shielding film was provided in the portion shielded by the light-shielding film.

In this structure, the present invention is applied to a so-called vertical electric field type liquid crystal display device, in which a transparent electrode (common electrode: counter electrode) is provided on a transparent insulating substrate side having a light shielding film, and is shielded by the light shielding film. The thickness of the insulating film or the alignment film in the portion to be removed is reduced or removed so that the interval between the portions is made larger than the other portions. Bubbles generated in the liquid crystal move into the above-described groove having a large gap. Since this groove is a portion covered with a light-shielding film that partitions the pixels, even if the light modulation function due to the elimination of the liquid crystal due to bubbles does not affect the display, display defects due to bubbles are not affected. Thus, a liquid crystal display device with high display quality can be obtained.

(4) The groove in (2) or (3) is formed by removing at least one of the insulating films in a portion of the first transparent insulating substrate which is shielded by the light shielding film.

According to this structure, the bubbles generated in the liquid crystal move into the above-mentioned groove having a large gap. Since this groove is a portion covered with a light-shielding film that partitions the pixels, even if the light modulation function due to the elimination of the liquid crystal due to bubbles does not affect the display, display defects due to bubbles are not affected. Thus, a liquid crystal display device with high display quality can be obtained.

(5) In the groove of (2) or (3), the thickness of at least one portion of the insulating film of the first transparent insulating substrate which is shielded by the light shielding film is not shielded by the light shielding film. It is formed by making it thinner than the film thickness of the part.

According to this structure, the bubbles generated in the liquid crystal move into the above-mentioned groove having a large gap. Since this groove is a portion covered with a light-shielding film that partitions the pixels, even if the light modulation function due to the elimination of the liquid crystal due to bubbles does not affect the display, display defects due to bubbles are not affected. Thus, a liquid crystal display device with high display quality can be obtained.

(6) The groove in (2) or (3) is composed of both a groove formed in parallel with the scanning signal line and a groove formed in parallel with the video signal line.

Since the display pixels are surrounded by the scanning signal lines and the video signal lines, by forming the grooves in parallel with these signal lines, the bubbles generated in the pixels are efficiently absorbed in both grooves. There is no deterioration in display quality.

(7) The groove in (2) or (3) is formed in parallel with the scanning signal line.

Since the display pixel is adjacent to the scanning signal line, by forming the groove in parallel with the scanning signal line, bubbles generated in the pixel are efficiently absorbed in both grooves and display quality is deteriorated. Nothing.

(8) The groove in (2) or (3) is formed in parallel with the video signal line.

Since the display pixel is adjacent to the video signal line, by forming the groove in parallel with the video signal line, air bubbles generated in the pixel are efficiently absorbed in both grooves and display quality is deteriorated. Nothing.

That is, when bubbles are generated inside the liquid crystal constituting the liquid crystal display element, the liquid crystal (liquid) and the bubbles (gas)
And the surface tension of the bubbles tends to decrease due to the surface tension. In the present invention, since a groove is formed in a portion (light-shielding portion) that is shielded by the light-shielding film and the thickness of the liquid crystal layer of the light-shielding portion is made larger than that in the portion (opening portion) that is not shielded from light, bubbles have a smaller surface area. It will move to the groove and be present. It is the opening (display pixel portion) that actually performs display even in the display area,
The light shield does not contribute to the display. Therefore, according to the present invention, even if bubbles are generated, the occurrence of display defects can be reduced because no bubbles exist in the opening.

[0026]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. In the drawings described below, components having the same function are denoted by the same reference numerals, and repeated description thereof will be omitted.

Here, an embodiment in which the present invention is applied to an active matrix type color liquid crystal display device will be described in detail.

<< Planar Configuration of Matrix Unit (Pixel Unit) >> FIG. 1 is a plan view showing one pixel of a lateral electric field type active matrix type color liquid crystal display device and its periphery for explaining a configuration example of a liquid crystal display device according to the present invention. FIG.

As shown in FIG. 1, each pixel has a scanning signal line (gate signal line or horizontal signal line) GL, a counter voltage signal line (counter electrode wiring) CL, and two adjacent video signal lines (drain). The signal line or the vertical signal line) is arranged in an intersecting region with the DL (in a region surrounded by four signal lines).

Each pixel includes a thin film transistor TFT, a storage capacitor Cstg, a pixel electrode PX, and a counter electrode CT. The scanning signal lines GL and the counter voltage signal lines CL extend in the left-right direction in FIG. The video signal lines DL extend in the up-down direction, and a plurality of video signal lines DL are arranged in the left-right direction. The pixel electrode PX is connected to the thin film transistor TFT, and the counter electrode CT is integrated with the counter voltage signal line CL.

The pixel electrode PX and the counter electrode CT face each other, and the display is controlled by controlling the optical state of the liquid crystal LC by the electric field between each pixel electrode PX and the counter electrode CT. The pixel electrode PX and the counter electrode CT are formed in a comb shape, and each is an electrode that is elongated in the vertical direction in the figure.

These electrodes, signal lines, etc. are formed on the inner surface of a lower transparent substrate (glass substrate) which is a second transparent insulating substrate, and a light shielding film (black matrix) and a color The upper transparent substrate (glass substrate), which is the first transparent insulating substrate on which a filter and the like are formed, is a liquid crystal L
It is piled up across C.

<< Cross-Sectional Structure of Matrix Part (Pixel Part) >> FIG. 2 is a cross-sectional view taken along the line 3-3 in FIG. 1 for explaining the first embodiment of the present invention, and FIG. , FIG. 4 is a cross-sectional view of the thin film transistor TFT taken along section line 4-4 in FIG. 1, and FIG. 5 is a cross-sectional view of the storage capacitor Cstg along section line 5-5 in FIG.

As shown in FIGS. 2 to 5, a liquid crystal (liquid crystal layer)
On the lower transparent glass substrate SUB1 side, a thin film transistor TFT, a storage capacitor Cstg and an electrode group are formed on the lower transparent glass substrate SUB1 side, and on the upper transparent glass substrate SUB2 side, a color filter FIL and a light-shielding black matrix pattern BM are formed.
Are formed.

The flattening film OC is formed only in the opening of the light-shielding black matrix BM (light-shielding film) pattern by photolithography and etching. The thickness of the black matrix BM is about 1.2 μm, the thickness of the color filter FIL is about 1.4 μm, and the thickness of the flattening film OC is about 1.4 μm. At this time, the difference in the thickness of the liquid crystal layer LC between the portion where the flattening film OC is provided and the portion where the flattening film OC is not provided is about 2 μm.

Further, the transparent glass substrates SUB1, SUB2
Are provided with alignment films ORI1 and ORI2 for controlling the initial alignment of the liquid crystal on the inner surface (on the liquid crystal LC side), respectively, and the polarizing axes are provided on the outer surfaces of the transparent glass substrates SUB1 and SUB2. A polarizing plate arranged orthogonally (crossed Nicols arrangement) is provided.

In the conventional liquid crystal display device, when bubbles are mixed in when the liquid crystal is filled, or when bubbles are generated in the liquid crystal layer LC due to impact or thermal stress, the bubble generating portion controls the amount of transmitted light without the liquid crystal. This has been a cause of display defects that remain black because they cannot be performed. Also in the present embodiment, the generation of bubbles per se cannot be suppressed. However, in the present embodiment, the bubbles are present in the grooves of the flattening film OC formed on the back of the pattern of the black matrix BM, so that the display does not become defective. The reason is shown below.

In the conventional liquid crystal display device, the flattening film OC is formed on the entire surface of the upper transparent glass substrate SUB2 including the light-shielding black matrix BM. The thickness of the liquid crystal layer LC hardly changes in a portion (opening) where the thickness of the liquid crystal layer LC is not shielded from light.

What actually displays an image is the opening surrounded by the black matrix BM, and the light-shielding portion does not affect the display. At this time, bubbles exist without distinction between the light-shielding portion and the opening. In other words, display defects are caused by bubbles existing in the openings. In the present embodiment, a groove is formed in the light-shielding portion constituted by the black matrix BM, and the thickness of the liquid crystal layer LC (interval between the inner surfaces of both substrates) of the light-shielding portion is made larger than the opening (display pixel portion).

When bubbles are generated in the liquid crystal layer LC, a surface tension is generated between the liquid crystal (liquid) and the bubbles (gas).
At this time, since the bubble is in the most stable state when the surface area is minimized, the bubble tends to have a small surface area. Therefore, the bubbles are present in the grooves having a larger thickness of the liquid crystal layer LC having a smaller surface area. Therefore, according to the present embodiment, even if bubbles are generated, there is no bubble in the opening, so that display failure does not occur.

In this embodiment, the upper transparent glass substrate SUB
Although the groove was formed in the light-shielding portion by removing the flattening film OC of No. 2, if the structure of the liquid crystal layer LC in the light-shielding portion is larger than the thickness of the liquid crystal layer LC in the opening, the present embodiment is adopted. Instead, the grooves may be formed by removing various films on the lower transparent glass substrate SUB1 side, or may be formed by removing various films on both the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2. May be.

In the present embodiment, the grooves are formed in parallel with the scanning signal lines GL, the counter voltage signal lines CL, and the video signal lines DL, but not all of them need be formed. It is most effective to form all the grooves, but even if only one groove is formed, it is effective for the display failure countermeasures when bubbles are generated.

FIG. 6 is a sectional view taken along the line 6-6 in FIG. 1 similar to FIG. 3 for explaining the second embodiment of the present invention. This embodiment is different from the first embodiment in that the planarizing film OC remains on the black matrix BM. The thickness of the liquid crystal layer LC (the distance between the two substrates) is larger than that of the other portions by the amount that the alignment film ORI2 is not provided on the flattening film OC, and a groove for accommodating bubbles is formed in this portion. However, in order to further increase the interval due to the groove, the planarizing film OC on the black matrix BM is required.
Should be made thinner than the other parts. Other configurations and effects are the same as those of the first embodiment, and thus description thereof is omitted.

FIG. 7 is a sectional view taken along the line 6-6 of FIG. 1 similar to FIG. 3 for explaining the third embodiment of the present invention. This embodiment is different from the first embodiment in that a thin planarizing film OC and an alignment film ORI2 are left on a black matrix BM. The thickness of the liquid crystal layer LC (the distance between the two substrates) is larger than that of the other portion by the thickness of the flattening film OC that is smaller than that of the other portion, and a groove for accommodating bubbles is formed in this portion. Other configurations and effects are the same as those of the first embodiment, and thus description thereof is omitted.

<< Thin Film Transistor >> The thin film transistor TFT operates so that the channel resistance between the source and the drain decreases when a positive bias is applied to the gate electrode GT, and the channel resistance increases when the bias is set to zero.

As shown in FIG. 4, the thin-film transistor TFT has a gate electrode GT, a gate insulating film GI, and an i-type (intrinsic, intrinsic, not doped with conductivity type determining impurities) amorphous silicon (Si). Type semiconductor layer A
S, a pair of source electrode SD1 and drain electrode SD2. It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the circuit of the liquid crystal display device, the polarity is inverted during the operation, and therefore, it should be understood that the source and the drain are switched during the operation. However, in the following description, for convenience, one is fixed as a source and the other is fixed as a drain.

<< Gate Electrode GT >> The gate electrode GT is formed continuously with the scanning signal line GL.
Is configured to be a gate electrode GT. The gate electrode GT is a portion exceeding the active region of the thin film transistor TFT, and is formed to be larger (as viewed from below) so as to completely cover the i-type semiconductor layer AS.

Thus, in addition to the role of the gate electrode GT, it is designed so that external light and backlight do not hit the i-type semiconductor layer AS. In this example, the gate electrode GT
Is formed of a single-layer conductive film g1. As the conductive film g1, for example, aluminum (A
1) A film is used, on which an anodic oxide film AOF of Al
Is provided.

<< Scanning Signal Line GL >> The scanning signal line GL is formed of the conductive film g1. The conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, and is integrally formed. This scanning signal line G
L, the gate voltage Vg is applied from an external circuit to the gate electrode G.
Supply to T. An anodic oxide film AOF of Al is also provided on the scanning signal line GL. Note that the video signal line DL
The portion that intersects with the video signal line DL is made thin in order to reduce the probability of short-circuiting with the video signal line DL, and is made bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

<< Counter Electrode CT >> The counter electrode CT is formed of the same conductive film g1 as the gate electrode GT and the scanning signal line GL. An Al anodic oxide film AOF is also provided on the counter electrode CT. Since the counter electrode CT is completely covered with the anodic oxide film AOF, even when the counter electrode CT is brought as close as possible to the video signal line, they are not short-circuited. Further, they may be configured to cross each other. The counter electrode CT is configured to apply a counter voltage Vcom. In the present embodiment, the counter voltage Vcom is the minimum level of the driving voltage Vdmi applied to the video signal line DL.
The potential is set to be lower than the intermediate DC potential between n and the maximum level of the drive voltage Vdmax by a feedthrough voltage ΔVs generated when the thin film transistor element TFT is turned off, and is used in the video signal drive circuit. When it is desired to reduce the power supply voltage of the integrated circuit to about half, an AC voltage may be applied.

<< Counter Voltage Signal Line CL >> Counter Voltage Signal Line C
L is composed of the conductive film g1. The conductive film g1 of the counter voltage signal line CL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, the scanning signal line GL, and the counter electrode CT, and is formed integrally with the counter electrode CT. The opposing voltage signal line CL allows the opposing voltage Vcom
Is supplied to the counter electrode CT. Also, the counter voltage signal line CL
An anodic oxide film AOF of Al is also provided thereon. The portion that intersects with the video signal line DL is the scanning signal line GL.
In the same manner as described above, the width is made thinner in order to reduce the probability of short-circuiting with the video signal line DL, and it is made bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

<< Insulating Film GI >> The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI includes the gate electrode GT and the scanning signal line GL.
Is formed in the upper layer. As the insulating film GI, for example, a silicon nitride film formed by plasma CVD is selected.
In a thickness of 200 to 2700 ° (in this embodiment, 2400
Å) formed. The gate insulating film GI is formed so as to surround the entire matrix part AR, and the peripheral part is removed so as to expose the external connection terminals DTM and GTM. The insulating film GI also contributes to electrical insulation between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL.

<< i-Type Semiconductor Layer AS >> The i-type semiconductor layer AS is made of amorphous silicon and has a thickness of 200 to 2200 ° (in this embodiment, a thickness of about 2000 °). Layer d
Numeral 0 denotes an N (+) type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact, wherein an i-type semiconductor layer AS is present on the lower side, and a conductive layer d1 (d2) is present on the upper side. It is left only in places.

The i-type semiconductor layer AS is also provided between the scanning signal line GL and the intersection (crossover portion) between the counter voltage signal line CL and the video signal line DL. The i-type semiconductor layer AS at the intersection reduces a short circuit between the scanning signal line GL and the counter voltage signal line CL and the video signal line DL at the intersection.

<< Source electrode SD1, Drain electrode SD
2 >> Each of the source electrode SD1 and the drain electrode SD2 is composed of a conductive film d1 in contact with the N (+) type semiconductor layer d0 and a conductive film d2 formed thereon.

The conductive film d1 is formed of a chromium (Cr) film formed by sputtering and having a thickness of 500 to 1000 ° (about 600 ° in this embodiment). When the Cr film is formed with a large thickness, the stress becomes large.
The film is formed in a range not exceeding about 膜厚. Cr film is N
To improve the adhesion to the (+) type semiconductor layer d0,
2 is used for the purpose of preventing the diffusion of Al into the N (+) type semiconductor layer d0 (so-called barrier layer). As the conductive film d1, a refractory metal (Mo, Ti,
Ta, W) film, refractory metal silicide (MoSi ₂ , T
_{iSi 2, TaSi 2, WSi 2} ) film may be used.

The conductive film d2 has a thickness of 30
To a thickness of 00 to 5000 mm (in this embodiment, 4000 mm).
Degree) is formed. The Al film has a smaller stress than the Cr film and can be formed to have a large thickness, and can reduce the resistance values of the source electrode SD1, the drain electrode SD2 and the video signal line DL, and can reduce the gate electrode GT and the i-type semiconductor. Layer AS
Has the function of ensuring that the vehicle gets over a step (improves step coverage).

After patterning the conductive films d1 and d2 with the same mask pattern, N (+) is applied using the same mask or using the conductive films d1 and d2 as masks.
The type semiconductor layer d0 is removed. That is, the i-type semiconductor layer A
The N (+) type semiconductor layer d0 remaining on S is a conductive film d.
1. The portion other than the conductive film d2 is removed by self-alignment. At this time, since the N (+)-type semiconductor layer d0 is etched so as to entirely remove the thickness thereof, the i-type semiconductor layer AS is also slightly etched at its surface, but the degree is controlled by the etching time. do it.

<< Video Signal Line DL >> The video signal line DL is composed of the second conductive film d2 and the third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. The video signal line DL is formed integrally with the drain electrode SD2.

<< Pixel Electrode PX >> The pixel electrode PX is a second conductive film d of the same layer as the source electrode SD1 and the drain electrode SD2.
2, the third conductive film d3. Further, the pixel electrode PX is formed integrally with the source electrode SD1.

<< Storage Capacitor Cstg >> The pixel electrode PX is formed so as to overlap the counter voltage signal line CL at the end opposite to the end connected to the thin film transistor TFT. This superposition is apparent from FIG.
The pixel electrode PX is used as one electrode PL2, and the counter voltage signal C
Storage capacitance (capacitance element) where L is the other electrode PL1
Construct Cstg. The dielectric film of the storage capacitor Cstg includes an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodic oxide film AOF.

<< Storage Capacitor Cstg >> The pixel electrode PX is formed so as to overlap the counter voltage signal line CL at the end opposite to the end connected to the thin film transistor TFT. This superposition is apparent from FIG.
A storage capacitor (capacitance element) Cstg having the pixel electrode PX as one electrode PL2 and the counter voltage signal line CL as the other electrode PL1 is formed. The dielectric film of the storage capacitor Cstg includes an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodic oxide film AOF.

As shown in FIG. 1, the storage capacitance Cst
g is formed at a portion where the width of the conductive film g1 of the counter voltage signal line CL is increased. In this case, the storage capacity Cstg is
Since the material of the electrode positioned on the lower side of the insulating film GI is made of Al and the surface thereof is anodized, the point defect caused by so-called whiskers of Al (positioned on the upper side) (A short-circuit with the electrode to be used) can be obtained.

FIG. 8 shows a liquid crystal display panel PN including upper and lower glass substrates SUB1 and SUB2.
FIG. 4 is a diagram illustrating a main part plane around an L matrix (AR) part. FIG. 9 is a cross-sectional view illustrating the vicinity of the external connection terminal GTM to which the scanning circuit is to be connected on the left side and the vicinity of the seal portion where no external connection terminal is provided on the right side.

In the manufacture of this liquid crystal display panel, if the size is small, a plurality of devices are simultaneously processed on one glass substrate and then divided in order to improve the throughput. If the size is large, the manufacturing equipment is shared. any varieties be processed glass substrates standardized size and small size suitable to each kind from, in each case the glass is cut through the one way process for.

FIG. 8 and FIG. 9 show the latter example. Both figures show the upper and lower substrates SUB1 and SUB2 after cutting, and LN indicates the edge of both substrates before cutting. In any case, in the completed state, the external connection terminal groups Tg, Td and the terminal CTM are present (the upper side and the left side in the figure) at the portions where the size of the upper substrate SUB2 is reduced so that they are exposed.
It is restricted to inside of UB1.

The terminal groups Tg and Td are respectively a scanning circuit connection terminal GTM and a video signal circuit connection terminal DTM described later.
The tape carrier package TCP on which the integrated circuit chip CHI is mounted (see FIGS. 19 and 2)
A plurality of units are collectively named in the unit of 0). The lead wiring from the matrix section of each group to the external connection terminal section is inclined as approaching both ends. This is because the terminals DTM, DTM of the display panel PNL are added to the arrangement pitch of the package TCP and the connection terminal pitch of each package TCP.
This is for matching GTM.

The counter electrode terminal CTM is connected to the counter electrode C
A terminal for applying a counter voltage to T from an external circuit.
The counter electrode signal line CL of the matrix portion is drawn out to the opposite side (right side in the figure) of the scanning circuit terminal GTM, and the respective counter voltage signal lines are grouped together by a common bus line CB and connected to the counter electrode terminal CTM. .

Between the transparent glass substrates SUB1 and SUB2, except for the liquid crystal inlet INJ along the edge thereof, the liquid crystal LC
Pattern SL made of a sealing material so as to seal
(Hereinafter, also simply referred to as a sealing material) is formed. The sealing material is made of, for example, an epoxy resin.

The layers of the orientation films ORI1 and ORI2 are formed inside the seal pattern SL. Polarizing plates POL1, PO
L2 is formed on the outer surfaces of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2, respectively. The liquid crystal LC is a lower alignment film ORI1 for setting the direction of liquid crystal molecules.
And the upper alignment film ORI2 is sealed in a region partitioned by the seal pattern SL. The lower alignment film ORI1 is formed above the protective film PSV1 on the lower transparent glass substrate SUB1 side (FIG. 2).

In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and a seal pattern SL is formed on the substrate SUB2.
The lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 are overlapped with each other, liquid crystal LC is injected from the opening INJ of the sealing material SL, the inlet INJ is sealed with epoxy resin or the like, and the upper and lower substrates are sealed. Assembled by cutting.

<< Gate Terminal Portion >> FIGS. 10A and 10B are explanatory diagrams of a connection structure from the scanning signal line GL of the display matrix to its external connection terminal GTM, where FIG. 10A is a plane view and FIG. 10B is a view B of FIG. 4 shows a cross section taken along section line -B. This figure corresponds to the vicinity of the lower left of FIG. 8, and the diagonal wiring portion is represented by a straight line for convenience.

AO is a boundary line for direct drawing of photoresist, in other words, a photoresist pattern of selective anodic oxidation. Therefore, this photoresist is removed after anodization,
The pattern AO shown in the figure does not remain as a finished product, but the locus remains because the oxide film AOF is selectively formed on the gate wiring GL as shown in the cross-sectional view. In the plan view of (A), the left side is a region covered with the resist and not subjected to anodic oxidation with reference to the boundary line AO of the photoresist, and the right side is a region exposed from the resist and anodized. The anodized AL layer g1 has an oxide Al ₂ O ₃ film AOF on its surface.
Are formed and the volume of the lower conductive portion is reduced. Of course, anodic oxidation is performed by setting an appropriate time, voltage and the like so that the conductive portion remains.

The gate terminal GTM protects the surface of the Al layer g1 and the surface thereof, and also uses TCP (Tape Carriage).
er Package) and a transparent conductive layer g2 for improving the reliability of connection. This transparent conductive film g2 is a transparent conductive film (I
ndium-Tin-Oxide ITO (Nesa film), and is formed to a thickness of 1000 to 2000 (in this embodiment, about 1400). Al layer g
1 and conductive layers d1 and d2 formed on side surfaces thereof
In order to compensate for poor connection between the Al layer and the transparent conductive layer g2, Cr having good connectivity to both the Al layer and the transparent conductive layer g2 is used.
This is for connecting the layer d1 to reduce the connection resistance, and the conductive layer d2 remains because the same mask is formed as the conductive layer d1.

In the plan view of FIG. 10A, the gate insulating film GI is formed on the right side of the boundary line, the protective film PSV1 is formed on the right side of the boundary line, and the terminal portion GTM located on the left end is They are exposed from them and can make electrical contact with external circuits. In the figure, the gate line GL
And only one pair of gate terminals is shown, but in practice a plurality of such pairs are arranged up and down as shown in FIG. 17 to form a terminal group Tg (FIG. 8). In the manufacturing process, the wiring is extended beyond the cutting region of the substrate and short-circuited by the wiring SHg (not shown). Such a short-circuit line SHg in the manufacturing process is supplied with power during anodization,
This is useful for preventing electrostatic breakdown at the time of rubbing or the like of the alignment film ORI1.

<< Drain Terminal DTM >> FIGS. 11A and 11B are explanatory diagrams of a connection structure from the video signal line DL to its external connection terminal DTM, where FIG.
2 shows a cross section taken along line BB of FIG. FIG. 8 shows FIG.
Corresponding to the vicinity of the upper right, the direction of the drawing is changed for convenience, but the right end corresponds to the upper end of the substrate SUB1.

TSTd is a test terminal, which is not connected to an external circuit, but is wider than a wiring portion so that a probe needle or the like can be contacted. Similarly, the drain terminal D
The TM is also wider than the wiring part so that it can be connected to an external circuit. The external connection drain terminals DTM are vertically arranged, and the drain terminals DTM constitute a terminal group Td (subscript omitted) as shown in FIG. 15 and are further extended beyond the cutting line of the substrate SUB1. All of them are short-circuited to each other by a wiring SHd (not shown) to prevent electric breakdown. The inspection terminal TSTd is formed on every other video signal line DL as shown in FIG.

The drain connection terminal DTM is connected to the transparent conductive layer g2.
It is formed of a single layer, and is connected to the video signal line DL at a portion where the gate insulating film GI is removed. Gate insulating film G
The semiconductor layer AS formed on the end of the gate insulating film G
This is for etching the edge of I into a tapered shape.
On the terminal DTM, a protective film P for connection with an external circuit is provided.
SV1 has of course been removed.

The lead wiring from the matrix portion to the drain terminal portion DTM is a layer d of the same level as the video signal line DL.
1 and d2 are partially formed in the protective film PSV1,
The protective film PSV1 is connected to the transparent conductive film g2. This aims to protect the easily contacted Al layer d2 with the protective film PSV1 and the seal pattern SL as much as possible.

<< Counter Electrode Terminal CTM >> FIG. 12 is an explanatory view of a connection structure from the counter electrode signal line CL (FIG. 1) to its external connection terminal CTM, and FIG.
(B) shows a cross section taken along the line BB of (A). This figure corresponds to the vicinity of the upper left of FIG.

Each counter voltage signal line CL is connected to a common bus line C
B collectively leads to the counter electrode terminal CTM. The common bus line CB has a conductive layer d on the conductive layer g1.
1, a structure in which a conductive layer d2 is laminated. this is,
This is to reduce the resistance of the common bus line CB so that the opposing voltage is sufficiently supplied from the external circuit to each opposing voltage signal line CL. As a result, the counter electrode CT is sufficiently transmitted to the terminal pixel, and crosstalk (particularly, crosstalk in the horizontal direction of the screen) due to distortion according to the video signal supplied to the video signal line DL of each counter electrode CT is generated. Generation can be reduced. This structure is characterized in that the resistance of the common bus line can be reduced without particularly adding a new conductive layer. The conductive layer g1 of the common bus line CB is a conductive layer d.
1. Anodization is not performed so as to be electrically connected to the conductive layer d2. Also, it is exposed from the gate insulating film GI.

The counter electrode terminal CTM has a structure in which a transparent conductive layer g2 is laminated on a conductive layer g1. The transparent conductive layer g2 covers the conductive layer g1 with a durable transparent conductive layer g2 to protect the surface and prevent electric contact and the like.

<< Equivalent Circuit of Entire Display Device >> FIG. 13 is a circuit diagram showing the connection of the equivalent circuit of the display matrix section and its peripheral circuits. Although the figure is a circuit diagram, it is drawn corresponding to an actual geometric arrangement. AR is a matrix array in which a plurality of pixels are two-dimensionally arranged.

In the figure, X indicates a video signal line DL, and suffixes G, B and R are added corresponding to green, blue and red pixels, respectively. Y indicates the scanning signal line GL, and the suffixes 1, 2, 3,..., End are added according to the order of the scanning timing. The scanning signal line Y (subscript omitted) is connected to the vertical scanning circuit V, and the video signal line X (subscript omitted) is connected to the video signal driving circuit H.

The SUP uses a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source and information for a CRT (cathode ray tube) from a host (upper processing unit) as a TFT liquid crystal display device. This is a circuit that includes a circuit that exchanges information for use.

<< Driving Method >> FIG. 14 is a waveform diagram illustrating an example of a driving method of the liquid crystal display device of the present invention. The counter voltage V _C to the AC rectangular type wave binary of V _CH and V _CL, the scanning signal V _G (i-1) in synchronism therewith, 1 unselected voltage V _G (i)
V _GLH and _VGLL are changed for each scanning period. The amplitude value of the counter voltage and the amplitude value of the non-selection voltage are the same. The video signal voltage is a voltage obtained by subtracting の of the amplitude of the counter voltage from the voltage to be applied to the liquid crystal layer.

The counter voltage may be DC, but by converting it to AC, the maximum amplitude of the video signal voltage can be reduced, and a video signal drive circuit (signal-side driver) having a low withstand voltage can be used.

<< Function of Storage Capacitance Cstg >> Storage Capacitance Cstg
Is provided in order to accumulate video information (after the thin film transistor TFT is turned off) written in the pixel for a long time.
In the method of applying an electric field parallel to the substrate surface used in the present invention, unlike the method of applying the electric field perpendicular to the substrate surface, there is almost no capacitance (so-called liquid crystal capacitance) formed by the pixel electrode and the counter electrode. However, the storage capacity Cstg cannot store video information in the pixel. Therefore, in a system in which an electric field is applied in parallel with the substrate surface, the storage capacitor Cstg is an essential component.

[0089] The storage capacitor Cstg, when the thin film transistor TFT is switched, also works to reduce the influence of the gate potential change △ V _G to the pixel electrode potential V _S. This situation is represented by the following equation.

[0090] _{△ V S = {Cgs / (} Cgs + Cstg + Cpix)} × △ V G where, Cgs is of the thin film transistor TFT gate electrode G
Parasitic capacitance formed between T and the source electrode SD1, C
pix is the capacitance formed between the pixel electrode PX and the counter electrode CT, △ V _S represents the change in the so-called feed-through voltage of the pixel electrode potential due to △ V _G. This change ΔV _S causes a DC component applied to the liquid crystal LC, but the storage capacitance Cst
The larger the value of g, the smaller the value. The reduction of the DC component applied to the liquid crystal LC
The life of C can be improved, and so-called burn-in in which the previous image remains when the liquid crystal display screen is switched can be reduced.

<< Manufacturing Method >> Next, a method of manufacturing the liquid crystal display device on the substrate SUB1 side will be described with reference to FIGS.
This will be described with reference to FIG. In the same figure, the letters in the center are the abbreviations of the process names, and the left side shows the flow of processing as viewed from the cross-sectional shape near the gate terminal shown in FIG.

Steps A to I except for Steps B and D are classified according to the respective photographic processes. Each of the cross-sectional views of each of the processes corresponds to the stage where the processing after the photographic process is completed and the photoresist is removed. Is shown. In the present description, photographic processing refers to a series of operations from application of a photoresist to selective exposure using a mask to development thereof, and a repeated description will be omitted. Description will be given below according to the divided steps.

Step A, FIG. 15 A 3000 .ANG.-thick Al--Pd, Al-- layer is formed on a lower transparent glass substrate SUB1 made of AN635 glass (trade name).
A conductive film g1 made of Si, Al—Ta, Al—Ti—Ta, or the like is provided by sputtering. After the photographic processing, the conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, nitric acid, and glacial acetic acid. Thereby, the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, and the electrode P
L1, gate terminal GTM, first conductive layer of common bus line CB, first conductive layer of counter electrode terminal CTM, gate terminal G
Anodizing bus line SHg for connecting TM (not shown)
Then, an anodic oxidation pad (not shown) connected to the anodic oxidation bus line SHg is formed.

Step B, FIG. 15 After the formation of the anodic oxidation mask AO by direct writing, a solution in which 3% tartaric acid is adjusted to PH 6.25 ± 0.05 with ammonia and diluted 1: 9 with ethylene glycol liquid is used. The substrate SUB1 is immersed in an anodizing solution and adjusted so that the formation current density becomes 0.5 mA / cm2 (constant current formation). Next, anodic oxidation is performed until the formation voltage 125 V necessary for obtaining a predetermined Al ₂ O ₃ film thickness is reached. Thereafter, it is desirable to maintain this state for several tens of minutes (constant voltage formation). This is important for obtaining a uniform Al ₂ O ₃ film. Thereby, the conductive film g1 is anodized, and the gate electrode GT, the scanning signal line GL, the counter electrode CT,
The film thickness of 180 is formed on the counter voltage signal line CL and the electrode PL1.
A 0 ° anodic oxide film AOF is formed.

Step C, FIG. 15 A transparent conductive film g2 made of an ITO film having a thickness of 1400 ° is provided by sputtering. After the photoprocessing, the transparent conductive film g2 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant to form the uppermost layer of the gate terminal GTM, the drain terminal DTM, and the second conductive layer of the counter electrode terminal CTM. I do.

Step D, FIG. 16 An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to provide a SiN film having a thickness of 2200 °, and a silane gas and a hydrogen gas are introduced into the plasma CVD apparatus. Is provided with an i-type amorphous Si film of 2000 .ANG., And then a hydrogen gas and a phosphine gas are introduced into a plasma CVD apparatus to form an N (+)-type amorphous Si film having a thickness of 300 .mu.m.

Step E, FIG. 16 After photographic processing, SF ₆ , CC is used as a dry etching gas.
Using l ₄ , an N (+)-type amorphous Si film and an i-type amorphous S
By selectively etching the i-film, islands of the i-type semiconductor layer AS are formed.

Step F, FIG. 16 After photo processing, the Si nitride film is selectively etched using SF ₆ as a dry etching gas.

Step G, FIG. 17 A conductive film d1 made of Cr having a thickness of 600 .ANG. Is provided by sputtering, and an Al-P film having a thickness of 4000 .ANG.
A conductive film d2 made of d, Al-Si, Al-Ta, Al-Ti-Ta, or the like is provided by sputtering. After the photographic processing, the conductive film d2 is etched with the same liquid as in Step B,
The conductive film d1 is etched with the same liquid as in step A, and the video signal line DL, the source electrode SD1, the drain electrode SD2, the pixel electrode PX, the electrode PL2, the second conductive layer, the third conductive layer and the drain of the common bus line CB are formed. A bus line SHd (not shown) for short-circuiting the terminal DTM is formed. Next, CCl ₄ and SF ₆ were introduced into a dry etching apparatus,
The N (+) type semiconductor layer d0 between the source and the drain is selectively removed by etching the (+) type amorphous Si film.

Step H, FIG. 17 An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to form a 1 μm-thick Si nitride film. After the photo processing, the protective film PSV1 is formed by selectively etching the Si nitride film by a photo etching technique using SF ₆ as a dry etching gas.

<< Display Panel PNL and Drive Circuit Board PCB
1 >> FIG. 18 is a plan view showing a state in which a video signal driving circuit H and a vertical scanning circuit V are connected to the liquid crystal display panel PNL shown in FIG. 8 and the like.

CHI is a drive IC chip for driving the display panel PNL (the lower five are drive ICs on the vertical scanning circuit side)
The left and right chips are the driving I on the video signal driving circuit side.
C chip). TCP is a tape carrier package in which a driving IC chip CHI is mounted by a tape automated bonding method (TAB), as will be described later with reference to FIGS. 19 and 20, and PCB1 is a driving circuit in which the above-described TCP, capacitors and the like are mounted. The substrate is divided into two, one for a video signal drive circuit and one for a scan signal drive circuit. FG
P is a frame ground pad, and a shield case S
A spring-shaped fragment provided by cutting into the HD is soldered. FC is a flat cable that electrically connects the lower drive circuit board PCB1 and the left drive circuit board PCB1.

As shown in the figure, the flat cable FC is formed by sandwiching and supporting a plurality of lead wires (phosphor bronze material plated with Sn) with a striped polyethylene layer and a polyvinyl alcohol layer. use.

<< Connection Structure of TCP >> FIG. 19 is a diagram showing a sectional structure of a tape carrier package TCP in which an integrated circuit chip CHI constituting the scanning signal driving circuit V and the video signal driving circuit H is mounted on a flexible wiring board. FIG. 20 is a cross-sectional view of a main part showing a state in which it is connected to a liquid crystal display panel, in this example, a scanning signal circuit terminal GTM.

In the figure, TTB is an input terminal / wiring portion of the integrated circuit CHI, and TTM is an output terminal / wiring portion of the integrated circuit CHI, which is made of, for example, Cu. The bonding pads PAD of the integrated circuit CHI are connected by a so-called face-down bonding method. The outer ends (commonly called outer leads) of the terminals TTB and TTM correspond to the input and output of the semiconductor integrated circuit chip CHI, respectively, and are connected to the CRT / TFT conversion circuit / power supply circuit SUP by anisotropic conductive film ACF by soldering or the like. Connected to liquid crystal display panel PNL. The tip of the package TCP is a panel PNL
It is connected to the panel so as to cover the protective film PSV1 exposing the connection terminal GTM on the side. Therefore, the external connection terminal G
Since the TM (DTM) is covered with at least one of the protective film PSV1 and the package TCP, the TM (DTM) becomes strong against electric contact.

BF1 is a base film made of polyimide or the like, and SRS is a solder resist film for masking so that solder does not stick to unnecessary portions during soldering. The gap between the upper and lower glass substrates outside the seal pattern SL is washed and protected by an epoxy resin EPX or the like, and the space between the package TCP and the upper substrate SUB2 is further filled with a silicone resin SIL to multiplex protection.

<< Drive Circuit Board PCB2 >> The drive circuit board PCB2 shown in FIG. 18 has electronic components such as ICs, capacitors, and resistors mounted thereon. This drive circuit board PCB
Reference numeral 2 denotes a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source, and information for a CRT (cathode ray tube) from a host (upper processing unit) for a TFT liquid crystal display device. A circuit SUP including a circuit for converting the information into the above information is mounted. CJ is a connector connection portion to which a connector (not shown) connected to the outside is connected. Drive circuit board P
CB1 and drive circuit board PCB2 are flat cable F
It is electrically connected by C.

FIG. 21 is a plan view showing one pixel of a vertical electric field type active matrix type color liquid crystal display device and its periphery for explaining another configuration example of the liquid crystal display device according to the present invention.

Each pixel is located within an intersection area between two adjacent scanning signal lines (gate signal lines or horizontal signal lines) GL and two adjacent video signal lines (drain signal lines or vertical signal lines) DL. (In a region surrounded by four signal lines).

Each pixel includes a thin film transistor TFT, a transparent pixel electrode ITO1, and a storage capacitor Cadd. The scanning signal lines GL extend in the column direction, and a plurality of the scanning signal lines GL are arranged in the row direction. The video signal lines DL extend in the row direction, and a plurality of video signal lines DL are arranged in the column direction.

In the vertical electric field type aluminum matrix type liquid crystal display device, each electrode for display shown in FIG. 21 is formed on a lower transparent glass substrate (second transparent insulating substrate) and a light shielding film (black matrix: In the figure, only the position is shown, a color filter (only the position is shown), and a counter transparent electrode (common electrode) are formed on the inner surface of an upper glass substrate (first transparent insulating substrate) not shown. The liquid crystal is controlled by an electric field formed between a pixel electrode PX (ITO) on a lower transparent glass substrate and a counter electrode formed on an upper glass substrate.

FIG. 22 is a sectional view taken along the line 3-3 in FIG. 21 for explaining the fourth embodiment of the present invention. A thin film transistor TFT and a transparent pixel electrode PX (ITO1) are formed on the lower transparent glass substrate side SUB1 based on the liquid crystal, and the thin film transistor TFT for driving the thin film transistor TFT is shown in FIG.
It is formed with the same structure as described above. On this thin film transistor TFT, an alignment film ORI1 is formed via an insulating film PSV1.

On the other hand, a black matrix BM and a plurality of color filters FIL are formed on the inner surface of the upper transparent glass substrate SUB2, and an insulating film PSV2 (a film similar to the smoothing layer OC in FIG. 2) is formed thereon. Common transparent electrode I
TO2 (counter electrode COM) is formed. And
An alignment film ORI2 is formed to cover the upper surface. In this embodiment, the liquid crystal layer is formed by reducing the thickness of the portion of the insulating film PSV2 which is shielded by the black matrix BM which is the light shielding film formed on the upper glass substrate SUB2, and removing the alignment film ORI2 in this portion. The groove is formed by making the thickness of the LC (the interval between the inner surfaces of both substrates) larger than the other portions.

With this configuration, the air bubbles generated in the liquid crystal layer LC are accommodated in the above-mentioned grooves, so that no air bubbles exist in the display pixel portion. In FIG. 22, the interval between the grooves is not shown to be larger than the other portions because it is hidden by the thin film transistor TFT1, but since the thin film transistor is located in front of the figure, the interval between the grooves is Larger than other parts.

In this embodiment, the alignment film ORI2 is removed at the groove portion. However, if the insulating film PSV2 can be made sufficiently thin, the alignment film ORI2 may be present at this groove portion. Also, the insulating film PSV2 and the orientation film ORI in the groove portion are formed.
2 may be removed together.

In this embodiment, as in the above-described embodiments, bubbles are formed in the liquid crystal layer LC having a smaller surface area.
Is present in a groove having a large thickness, and even if bubbles are generated, there is no bubble in the opening, so that display failure does not occur.

<< Overall Configuration of Liquid Crystal Display Module >> FIG.
FIG. 2 is an exploded perspective view showing each component of the liquid crystal display module MDL to which the present invention is applied. SHD is a frame-shaped shield case (metal frame) made of a metal plate, LCW and its display window, PNL is a liquid crystal display panel, SPB is a light diffusion plate,
LCB is a light guide, RM is a reflection plate, BL is a fluorescent tube for backlight, LCA is a backlight case, and the members are stacked in a vertical arrangement as shown in the figure to assemble a module MDL.

The module MDL is a shield case SH
The entirety is fixed by claws and hooks provided on D. The backlight case LCA includes a backlight fluorescent tube BL, a light diffusion plate SPB light diffusion plate, and a light guide LC.
B, a shape for storing the reflection plate RM, and the light guide L
The light of the backlight fluorescent tube BL arranged on the side surface of the CB is made uniform on the display surface by the light guide LCB, the reflection plate RM, and the light diffusion plate SPB, and the liquid crystal display panel PN is formed.
Light is emitted to the L side. An inverter circuit board PCB3 is connected to the backlight fluorescent tube BL, and serves as a power supply for the backlight fluorescent tube BL.

Although the present invention has been described in detail with reference to the embodiments, the present invention is not limited to the above-described embodiments, and may be variously modified without departing from the gist thereof. Of course. Although the present invention has been described with reference to an example in which the present invention is applied to an active matrix type liquid crystal display device using TCP for mounting a drive circuit, a COG (chip-on-glass) in which a drive circuit chip is directly mounted around one of the transparent insulating substrates. It is needless to say that the present invention can be applied to a liquid crystal display device of a simple matrix system and a liquid crystal display device of a simple matrix system.

[0120]

As described above, according to the present invention,
Since bubbles generated inside the liquid crystal layer can be removed from the opening of the light-shielding film, the occurrence of display defects can be reduced, and a liquid crystal display device with high image quality and high reliability can be provided. .

[Brief description of the drawings]

FIG. 1 is a plan view of a principal part showing an example of a pixel of a liquid crystal display unit and a peripheral structure thereof in an active matrix type color liquid crystal display device to which the present invention is applied.

FIG. 2 is a sectional view of a pixel taken along section line 3-3 in FIG. 1 for explaining the first embodiment of the present invention.

FIG. 3 is a sectional view of a pixel taken along section line 6-6 in FIG. 1 for explaining the first embodiment of the present invention;

FIG. 4 is a sectional view of the thin film transistor element TFT taken along section line 4-4 in FIG. 1;

FIG. 5 is a cross-sectional view of the storage capacitor Cstg taken along section line 5-5 in FIG. 1;

FIG. 6 is a sectional view of a pixel taken along section line 6-6 in FIG. 1 for explaining a second embodiment of the present invention;

FIG. 7 is a sectional view of a pixel taken along section line 6-6 in FIG. 1 for explaining a third embodiment of the present invention.

FIG. 8 is a plan view for explaining a configuration of a matrix peripheral portion of a liquid crystal display panel constituting the liquid crystal display device of the present invention.

FIG. 9 is a cross-sectional view showing an edge portion of the liquid crystal display panel having no scanning signal terminal on the left side and no external connection terminal on the right side.

10A and 10B are a plan view and a cross-sectional view illustrating the vicinity of a connection portion between a gate terminal GTM and a gate wiring GL.

11A and 11B are a plan view and a cross-sectional view illustrating the vicinity of a connection between a drain terminal DTM and a video signal line DL.

FIGS. 12A and 12B are a plan view and a cross-sectional view showing the vicinity of a connection portion of a common electrode terminal CTM, a common bus line CB, and a common voltage signal line CL.

FIG. 13 is a circuit diagram including a matrix portion and its periphery of the active matrix type color liquid crystal display device of the present invention.

FIG. 14 is a driving waveform diagram of the active matrix type color liquid crystal display device of the present invention.

FIG. 15 is a cross-sectional view illustrating a step of manufacturing a pixel portion and a gate terminal portion for explaining a method of manufacturing the lower insulating substrate side.

FIG. 16 is a cross-sectional view showing a step of manufacturing the pixel portion and the gate terminal portion for explaining the manufacturing method subsequent to FIG. 15 on the lower insulating substrate side.

FIG. 17 is a cross-sectional view showing a step of manufacturing the pixel portion and the gate terminal portion, for explaining the manufacturing method following the FIG. 16 on the lower insulating substrate side.

FIG. 18 is a plan view showing a state where peripheral driving circuits are mounted on the liquid crystal display panel.

FIG. 19 is a cross-sectional view illustrating a structure of a tape carrier package in which an integrated circuit chip forming a driving circuit is mounted on a flexible wiring board.

FIG. 20 is a cross-sectional view of a main part showing a state where the tape carrier package is connected to a scanning signal circuit terminal of the liquid crystal display panel.

FIG. 21 is a plan view showing one pixel of a vertical electric field type active matrix type color liquid crystal display device and its periphery, illustrating another configuration example of the liquid crystal display device according to the present invention.

FIG. 22 illustrates a fourth embodiment of the present invention.
It is sectional drawing in the 3 cutting line.

FIG. 23 is an exploded perspective view of a liquid crystal display module according to the present invention.

[Explanation of symbols]

 SUB1 Lower transparent glass substrate SUB1 Upper transparent glass substrate GL Scan signal line DL Video signal line CL Counter voltage signal line PX Pixel electrode CT Counter electrode GI Insulating film GT Gate electrode AS i-type semiconductor layer SD Source electrode or drain electrode PSV1,2 Film (insulating film) BM Light shielding film (black matrix) LC Liquid crystal (liquid crystal layer) TFT Thin film transistor OC Smoothing layer ORI1, Alignment film g, d Conductive film Cstg Storage capacitance AOF Anodized film AO Anodized mask GTM Gate terminal DTM Drain terminal CB Common bus line DTM Common electrode terminal SHD Shield case PNL Liquid crystal display panel SPB Light diffusion plate LCB Light guide BL Backlight fluorescent tube LCA Backlight case RM Reflector (abbreviated above).

Claims (6)

[Claims] A first transparent insulating substrate having a plurality of films including a light-shielding film for partitioning a pixel, and a second transparent insulating substrate having a plurality of films, and A liquid crystal display having a liquid crystal display element in which a liquid crystal is injected into a space around the edge between the first and second transparent insulating substrates with a gap provided therebetween, and a liquid crystal is injected inside the seal material. In the device, a portion of the liquid crystal display element, which is formed inside the sealing material and is shielded by the light-shielding film, is not shielded by the light-shielding film from a gap between the liquid crystal layers in a portion shielded by the light-shielding film. A liquid crystal display device having a groove formed by making a gap larger than a gap between liquid crystal layers in a portion. 2. A first transparent insulating substrate in which a plurality of films including a light-shielding film and an insulating film for partitioning pixels are laminated on a surface, a plurality of films including a scanning signal line, a video signal line, a common electrode, and a pixel electrode. The surfaces of the second transparent insulating substrate on which the films are laminated are opposed to each other with a gap therebetween, and are provided in a frame shape around the edge between the first and second transparent insulating substrates. In a liquid crystal display device having a liquid crystal display element in which liquid crystal is injected inside the seal material, the light is shielded by the light shielding film in a display area formed inside the seal material of the liquid crystal display element. A liquid crystal display device comprising: a groove formed in a portion of the liquid crystal layer where the light is shielded by the light shielding film so as to be larger than a gap of the liquid crystal layer where the light is not shielded by the light shielding film. 3. A light-shielding film for partitioning pixels, a first transparent insulating substrate having a plurality of films including a transparent common electrode and an insulating film laminated on a surface, a scanning signal line, a video signal line, and a transparent pixel electrode. A surface of the second transparent insulating substrate, on which a plurality of transparent electrode films are laminated, is opposed to each other with a gap between the surfaces on which the plurality of films are laminated, and is formed around an edge between the first and second transparent insulating substrates. In a liquid crystal display device having a liquid crystal display element in which liquid crystal is injected into the inside of the seal material, the liquid crystal display element is bonded by a seal material provided in a frame shape, and the light shielding of a display area formed inside the seal material of the liquid crystal display element is Liquid crystal having a groove formed in a portion shielded by a film by making a gap between liquid crystal layers in a portion shielded by the light-shielding film larger than a gap between liquid crystal layers in a portion not shielded by the light-shielding film. Display device. 4. The method according to claim 2, wherein the groove is formed by removing at least one of the insulating films in a portion of the first transparent insulating substrate which is shielded from light by the light shielding film. The liquid crystal display device as described in the above. 5. The groove according to claim 1, wherein the thickness of at least one portion of the insulating film of the first transparent insulating substrate which is shielded from light by the light shielding film is smaller than the thickness of the portion of the insulating film which is not shielded by the light shielding film. 4. The device according to claim 2, wherein
3. The liquid crystal display device according to 1. 6. A groove formed in parallel with the scanning signal line,
4. The liquid crystal display device according to claim 2, wherein the liquid crystal display device has one or both of grooves formed in parallel with the video signal line.