JPH11284896A - Image pickup device and image recording and reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow the device to have provision for both the NTSC and PAL systems while a scale of the device, power consumption and cost are reduced. SOLUTION: A timing generating section 18 uses a crystal vibrator 19 to generate a signal of a horizontal frequency in compliance with both the NTSC and PAL systems. Thus, in the case of selecting the PAL system, a CCD 11 outputs each of line data while including one pause line to 5 lines each. A 5:6 conversion section 14 synthesizes sequentially preceding and succeeding line data at a prescribed rate to generate data by 6 lines from the data by 5 lines.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image pickup apparatus for picking up a moving image or a still image using a fixed image pickup device, and an image recording / reproducing apparatus for recording and reproducing the picked-up image. And an image recording / reproducing apparatus capable of processing both types of composite video signals.

[0002]

2. Description of the Related Art FIG. 7 shows a configuration of a conventional moving image or still image recording / reproducing apparatus using a solid-state imaging device. In the image recording / reproducing apparatus 80 shown in FIG. 7, a CCD 81 is a solid-state image sensor, and a video image formed on the CCD 81 is photoelectrically converted and output as an electric signal. The signal conversion unit 82
The output signal of CD81 is sampled and held (S /
H) and then perform analog / digital (A / D) conversion to convert to digital data. Thereafter, the processing until the output composite video signal is generated by the encoder 84 is digital signal processing.

[0003] Digital signal processor (DSP) 8
In step 3, the CCD signal converted to a digital signal is processed.
The signal is output as a signal such as Y, Cr, Cb or R, G, B required in the recording / reproducing unit 85. The recording / reproducing unit 85 records an input signal on a medium for recording image information digitally or analogly, such as a magnetic recording tape, a CD-R, or a card having a built-in flash memory. Further, in response to a request, it reproduces a signal recorded on the recording medium and outputs the signal to the encoder 84.

[0004] An encoder (ENC) 84 includes a DSP 83
And an arithmetic circuit for outputting video signals such as Y, Cr, and Cb input from the recording / reproducing unit 85 from an output terminal 89. The output terminal 89 is an output terminal for a composite video signal generated by the encoder 84. If an NTSC monitor or the like is connected to this terminal, the recorded video can be viewed.

A timing generator (TG) 86 generates an MCK pulse (also referred to as an MCK signal) as a control signal for each part of the image recording / reproducing apparatus 80 based on a signal oscillated by the crystal oscillator 87. Generate. CC
D81 is driven by the pulse output from the TG 86,
A signal is output in synchronization with this. The signal conversion unit 8
2, DSP 83, encoder 84 and recording / reproducing unit 85
Perform desired signal processing in synchronization with the MCK pulse.

The frequency of the MCK pulse depends on the number of horizontal pixels of the CCD 81 and the number of vertical lines. An example is shown in FIG. In the example shown in FIG. 8, 640 clocks are allocated to the effective range of the video signal, and the entire one horizontal line including the period of the horizontal blanking is 780 clocks. According to the NTSC system, the time of 1H is 6
Since 3.5555 μsec is 780 clocks, the frequency of the MCK pulse is 12.2727 MHz. Therefore, a crystal oscillator 87 having a transmission frequency of 24.5454 MHz, which is twice as large as 12.2727, is used.
An MCK signal of 2727 MHz is generated and output from the TG 86.

[0007]

By the way, there is no image recording / reproducing apparatus which can cope with both the NTSC system and the PAL system. This is because the NTSC method and the PAL method have different horizontal lines, different horizontal line frequencies, and so on, so that different quartz resonators have been used to implement the system. Therefore, even if the image recording / reproducing device 80 shown in FIG. 7 configured as the NTSC system is to be converted to the PAL system, it cannot be appropriately converted.

[0008] This will be specifically described with reference to an example of a problem that occurs when the image recording / reproducing apparatus 80 shown in FIG. 7 is diverted to the PAL system. First, the CCD 81 of the image recording / reproducing apparatus 80 has a problem that the number of output lines is small. Generally, a CCD imager made for the NTSC system or a CCD imager based on the NTSC system has 240 output effective lines. However, the number of effective lines required in the interlace screen of the PAL system is about 290, which is not enough about 50. The above-described NTSC-compliant CCD imager is, for example, a case where a VGA imager is monitored and driven, and the number of lines is reduced to half.

Second, there is a problem that the horizontal synchronization frequency is different. One horizontal period (1H period) is 64 μm of the PAL system.
sec, the oscillation frequency of the crystal unit 87 is set to 24.
375 MHz, and the frequency of the MCK signal must be 12.1875 MHz as shown in FIG. This means that the crystal resonator 87 cannot be used as it is in the PAL system.

To solve these problems and to construct an image recording / reproducing apparatus applicable to both the NTSC system and the PAL system, for example, a video RAM (VRAM) is provided in front of the encoder 97 as shown in FIG. ) Is inserted so that a video signal for each frame can be read in a desired form. In the image recording / reproducing device 90, the image is converted into an electric signal by photoelectric conversion in the CCD 91, and
2 is converted to digital data by the DSP 93 and is generated by the DSP 93 into image data such as Y, Cr, Cb,
This data is recorded in the recording / reproducing unit 98.

The generated image data or the image data reproduced from the recording / reproducing unit 98 is stored in the VRAM 95 by the VRAM writing unit 94. As a result, image data for one screen is sequentially stored in the VRAM 95, and this image data is
Reading is performed sequentially so as to conform to the TSC system or the PAL system. The data output from the VRAM read unit 96 is converted into an analog signal N by the encoder 97.
The signal is output from the output terminal 99 as a TSC signal or a PAL signal.

In this image recording / reproducing apparatus 90, C
All components of the CD 31 to the recording / reproducing unit 98 operate by the MCK signal output from the timing generator (TG) 100. The TG 100 includes a quartz oscillator 101 having an oscillation frequency of 24.5454 MHz for the NTSC system and a quartz oscillator 1 having an oscillation frequency of 24.3750 MHz for the PAL system.
02 are connected, and depending on the method used, these 2
One of the oscillation signals of the two crystal units is selected, and TG
The MCK signal is generated by dividing the frequency by 1/2 in 100.

However, such an image recording / reproducing apparatus 90 has the following problem. In this method, since the image data is once recorded in the internal memory to adjust the signal method, the VRAM 95 or the DR
An image recording memory such as an AM and a control unit such as a VRAM writing unit 94 or a VRAM reading unit 96 for reading / writing image data from / to the memory are required. Further, a crystal oscillator 101 for NTSC system
And a crystal unit 102 for the PAL system.

In general, a VRAM or a crystal oscillator is expensive, and a control unit constituting a VRAM write unit or a VRAM read unit of a peripheral circuit consumes large power. Therefore, the image recording / reproducing device 90 goes against all the problems of miniaturization, low power consumption, and low cost.
With such a configuration, it is possible to set up a system for both the NTSC system and the PAL system.
It is necessary to mount two switches for the PAL system for the TSC system and switch between them, and the system is equipped with a memory for recording an image frame such as a VRAM, which is not efficient in terms of mounting area, cost and power consumption.

Therefore, an object of the present invention is to provide an apparatus,
An object of the present invention is to provide an imaging device that can prevent an increase in power consumption and cost and can cope with both the NTSC system and the PAL system. Another object of the present invention is to prevent an increase in apparatus scale, power consumption and cost, and to improve NTSC.
An object of the present invention is to provide an image recording / reproducing apparatus for image data which can support both of the system and the PAL system.

[0016]

Therefore, the image pickup apparatus according to the present invention is capable of processing a plurality of video signals in which the horizontal line frequency and the number of horizontal lines are respectively set to predetermined values.
An imaging device that outputs captured image data according to a desired method among the plurality of methods, and captures a desired imaging target with a predetermined number of horizontal lines equal to or less than the least number of horizontal lines among the plurality of methods. Imaging means for performing the imaging based on the horizontal line frequency of the desired method,
The obtained video signal for each of the predetermined number of horizontal lines,
While interposing horizontal line periods in which effective video signals are not output evenly arranged in one vertical period corresponding to the difference between the number of horizontal lines of the desired system and the predetermined number of horizontal lines, the desired system Imaging means for sequentially outputting based on the horizontal line frequency, and video signals for each horizontal line having the desired number of horizontal lines based on the input predetermined number of horizontal line video signals. Signal interpolating means.

Further, the image recording / reproducing apparatus of the present invention records captured image data with respect to video signals of a plurality of systems in which the horizontal line frequency and the number of horizontal lines are respectively set to predetermined values. A recording / reproducing apparatus that outputs a desired image among a plurality of methods, and is an imaging unit that captures an image of a desired imaging target with a predetermined number of horizontal lines equal to or less than the least number of horizontal lines among the plurality of methods. The shooting is performed based on the horizontal line frequency of the desired method, and the obtained video signal for each of the predetermined number of horizontal lines is obtained by dividing the video signal of the desired method into the number of horizontal lines and the predetermined number of horizontal lines. Imaging means for sequentially outputting based on the horizontal line frequency of the desired system while interposing horizontal line periods in which no effective video signal is output evenly arranged in one vertical period corresponding to the difference of Recording and reproducing means for sequentially recording the output video signals for each horizontal line, and reproducing the video signals for each horizontal line based on the reproduced video signals for the predetermined number of horizontal lines, Signal interpolating means for generating a video signal for each horizontal line of the number of horizontal lines.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. In the present embodiment, NT
An example of an image recording / reproducing apparatus capable of capturing and recording an image by a CCD according to a selected one of the SC method and the PAL method and outputting the captured image and the recorded image in a reproducible manner. The present invention will now be described. FIG. 1 shows the image recording / reproducing apparatus 1
FIG. 3 is a block diagram showing a configuration of a 0. Image recording / reproducing device 1
0 indicates CCD 11, signal converter 12, DSP 13, 5:
It has a timing generator (TG) 18 having a 6-converter 14, an encoder 15, a recording / reproducing unit 16, an output terminal 17, and a crystal unit 19.

First, the configuration of each unit will be described. CC
D11 is a solid-state imaging device, which photoelectrically converts a formed image and outputs it as an electric signal. The CCD 11 is driven by an MCK pulse (also referred to as an MCK signal) output from the timing generator 18 and outputs a signal in synchronization with the MCK pulse. When the signal system required for the image recording / reproducing device 10 is the NTSC system, the CCD 11 performs photoelectric conversion normally for each horizontal line according to the MCK pulse input from the timing generator 18 to generate the signal. Outputs signals sequentially. When the required signal system is the PAL system, the pixel data is generated continuously for five horizontal lines according to the MCK pulse input from the timing generator 18, and then the operation is performed for one horizontal line period. Signals are sequentially generated by an operation of pausing.

The signal converter 12 performs sampling / hold (S / H) on the output signal of the CCD 11, converts the signal into analog / digital (A / D), and converts it into digital data.

Digital signal processor (DSP) 1
In step 3, a predetermined process is performed on the CCD signal converted into a digital signal, and a signal such as a luminance signal Y, a color difference signal Cr, Cb, or an RGB signal R, G, B that can be recorded on a recording medium in the recording / reproducing unit 16 is generated. Then, the data is output to the recording / reproducing unit 16 and the 5: 6 converting unit 14.

The recording / reproducing unit 16 includes a magnetic recording tape and a CD.
-R or a card with built-in flash memory
The input signal is recorded on a medium for recording digital or analog image information. In response to the request, it reproduces the signals recorded on those recording media and outputs the signals to the 5: 6 converter 14.

The 5: 6 converter 14 operates in conjunction with the CCD 11, and converts an input image signal into a PAL system and outputs the converted image signal when the requested signal is in the PAL system. The 5: 6 conversion unit 14 is requested to use the NTS
If the signal is of the C type, the input signal is output to the encoder 15 as it is. What is required is PA
In the case of an L-type signal, 5 of the input image signal
The signal for 6 lines is converted into the signal for 6 lines, and the encoder 15
Output to Switching of these operations is performed based on a control signal indicating a required system, which is input from a control unit of the image recording / reproducing apparatus 10 (not shown). The configuration and operation of the 5: 6 converter 14 will be described later in more detail.

An encoder (ENC) 15 converts a video signal such as Y, Cr, Cb or the like input from the 5: 6 conversion section 14 into a composite NTSC signal or a PAL signal which is an analog signal, and outputs the signal. Terminal 17
Output to

An output terminal 17 is an output terminal for a composite video signal generated by the encoder 15. By connecting an NTSC system monitor or a PAL system monitor to this terminal, an imaged or recorded image can be obtained. You can see.

The timing generator 18 has a single crystal oscillator 19, and based on a signal oscillated by the crystal oscillator 19, a control signal for each unit of the image recording / reproducing apparatus 10 is controlled by a built-in PLL circuit. Is generated. CCD 11, signal converter 12, DSP 13,
5: 6 conversion unit 14, encoder 15 and recording / reproducing unit 1
6 performs desired signal processing in synchronization with the MCK pulse. The timing generation unit 18 has a frequency of 12.2727 MHz when the required system is the NTSC system, and 12.1875 MHz when the required system is the PAL system.
Is generated. Switching of the frequency of the generated MCK pulse is performed by an image recording / reproducing apparatus 10 (not shown).
Is performed based on a control signal indicating a required system, which is input from the control unit of the first embodiment. The method of generating MCK pulses of these frequencies and the detailed configuration and operation of the timing generator 18 will be described later in detail.

Next, the configuration and operation of the 5: 6 converter 14 will be described in detail with reference to FIGS.
In the present embodiment, it is assumed that the video signal to be processed has a 4: 2: 2 format.

First, the circuit configuration of the 5: 6 converter 14 is shown in FIG.
This will be described with reference to FIG. As shown, the 5: 6 converter 14 includes a processing system for the luminance signal Y and the color difference signals Cr and Cb.
And each independently. The processing system for the luminance signal Y has an input terminal 21, a delay line 22, coefficient multipliers 23 and 24, an adder 25, and an output terminal 26. The processing system for the color difference signals Cr and Cb is as follows.
An input terminal 31, a delay line 32, a coefficient multiplier 33,
34, an adder 35 and an output terminal 36. The processing system for the luminance signal Y and the color difference signals Cr, C
Since the processing system for b performs exactly the same operation for each signal, the processing system for the luminance signal Y will be described below as an example.

The terminal 21 is an input terminal to which the luminance signal Y is input. The CCD 11 is connected via the input terminal 21.
Thus, the signals generated as described above and converted by the signal conversion unit 12 and the DSP 13 are sequentially input. That is, if the requested system is the NTSC system, 1
Pixel data for each horizontal line is sequentially input. Also,
When the requested system is the PAL system, image data is input at a timing that data of five horizontal lines are sequentially input and the input stops for one horizontal line period.

The delay line (DL) 22 outputs a signal
This is a delay line for delaying a horizontal period (1H period). In the present embodiment, since the number of clocks of the MCK signal in one horizontal period is 780, the delay line 22
An 80-stage FIFO. Note that this delay line 2
The number of delay stages of 2 can be switched according to the system frequency.

The coefficient multipliers 23 and 24 provide a predetermined coefficient k1, within a predetermined range of 0.0 to 1.0, for the input signal.
This is a multiplication circuit that multiplies and outputs the result. When the required signal system is the NTSC system, 1 is set as the coefficient k1 and 0 is set as the coefficient k2. As a result, the input luminance signal Y is output to the output terminal 26 as it is. On the other hand, when the required signal system is the PAL system, the coefficients k1 and k2 are substantially equal to 0.
Within the range of 0 to 1.0, values that complement each other and whose sum becomes 1.0 are sequentially set for each horizontal line. Based on the set coefficients k1 and k2, the mixing ratio of the pixel data input from the input terminal 21 and the pixel data of the previous line recorded on the delay line 22 is determined. Data for six lines is generated.

The adder 25 is an adding circuit for adding the output of the coefficient multiplier 23 and the output of the coefficient multiplier 24. Then, the signal added by the adder 25 is output from the output terminal 26 as a converted luminance signal Y.

As described above, the processing system from the input terminal 31 to the output terminal 36 for the color difference signals Cr and Cb operates exactly the same as the input terminal 21 to the output terminal 26. In addition,
The video signal to be processed is Y, C in 4: 4: 4 format
In the case of r and Cb signals, and in the case of R, G and B signals, another such independent processing system, namely, 3
And the same processing may be performed on each signal in each processing system.

Next, the operation of the 5: 6 converter 14 will be described with reference to FIG. The required signal type is N
In the case of the TSC system, as described above, the coefficient multiplier 2
1, 0 is set to 3, 24, respectively, and the input image data is output as it is. When the required signal format is the PAL system, the 5: 6 converter 14 generates and outputs 6 lines of image data from the input 5 lines of image data. The operation of the 5: 6 converter 14 at this time will be described with reference to FIG.

In FIG. 3, the vertical axis represents image data C for each line generated by the CCD 11 and sequentially input.
3 shows CD1 to CCD5. As described above, in the case of the PAL system, the CCD 11 repeatedly reads out data by repeating the 5-line driving and 1-line pause. 1 shown in FIG.
BLKD corresponding to the input for the line indicates this pause time. One horizontal period at this time is one horizontal period of the PAL system. The horizontal axis indicates one horizontal line period output from the 5: 6 conversion unit 14. That is, FIG.
Output data is shown for a period during which data for six lines of the AL system 1 to the PAL system 6 is output.

Then, each data shown in FIG.
The generation state of data to be output in each line period of the PAL system 1 to the PAL system 6 is shown. In FIG. 3, 0H indicates data input to the 5: 6 conversion unit 14, 1H indicates data one line before recorded in the delay line 22, and the multiplied value is a coefficient multiplier 23 And values set in the coefficient multiplier 24 and multiplied by the data.

As shown in FIG. 3, in the output time PAL system 1 of the first line, 1 is set as the coefficient k1 of the coefficient multiplier 23.
Is set to 0 as the coefficient k2 of the coefficient multiplier 24.
In this time zone, the 5: 6 conversion unit 14 includes a CCD.
The data of the first line of the series of five lines generated in 11 is input, and is output as it is as an output signal from the 5: 6 converter 14. Further, during the period of the output time PAL method 2 on the second line, 0.8 is set as the coefficient k1 of the coefficient multiplier 23 and 0.2 is set as the coefficient k2 of the coefficient multiplier 24. And in this time, 5: 6
The data of the second line of the series of five lines generated by the CCD 11 is input to the conversion unit 14, and the data of the first line is transmitted from the delay line 22 to the coefficient multiplier 24.
Is applied to As a result, in the adder 25, the data obtained by adding the data of the first line to the data at the rate of 0.2 and the data of the second line at the rate of 0.8 are output from the 5: 6 converter 14 as the line data in this period. Is done.

Similarly, the output time PAL of the third to fifth lines
In the period of the method 3 to the PAL method 5, the coefficient k1 of the coefficient multiplier 23 and the coefficient k2 of the coefficient multiplier 24 are 0.6
And 0.4, 0.4 and 0.6, and 0.2 and 0.8, respectively. And during these hours, 5: 6
The data of the third to fifth lines of the series of five lines generated by the CCD 11 are sequentially input to the conversion unit 14, and the second line which is one line before the input data is input to the delay line 22. The data of the fourth line from is stored and applied to the coefficient multiplier 24. As a result, in the adder 25, the data of the second line is 0.4, the data of the third line is 0.6, the data of the third line is 0.6, and the data of the fourth line is 0.4, Data obtained by adding the data of the line 0.8 at a ratio of 0.8 and the data of the line 5 at a ratio of 0.2 is 5: 6 as line data in these periods.
The data is sequentially output from the conversion unit 14.

In the output time PAL system 6 of the fifth line, 0 is set as the coefficient k1 of the coefficient multiplier 23 and 1 is set as the coefficient k2 of the coefficient multiplier 24. In this time period, no new data is input to the 5: 6 conversion unit 14 because the CCD 11 is in the idle period. As a result, the data of the fifth line stored in the delay line 22 is output as it is as an output signal from the 5: 6 converter 14.

As described above, the 5: 6 conversion unit 14
The data for 5 lines output from CD11 is
Is converted into data for 6 lines in the system. When these series of operations are further repeated 48 times, 240 lines of data output from the CCD 11 can be extracted as 288 lines of data.

Next, the configuration and operation of the timing generator 18 will be described with reference to FIG. FIG. 4 is a circuit diagram showing a part of the configuration of the timing generator 18. The timing generator 18 includes a crystal oscillator 19, a first frequency divider 41, a second frequency divider 42, a first switch 43, a phase comparator 44, a VCO 45, a third frequency divider 46, , And a second switch 48.

The crystal oscillator 19 is a crystal oscillation circuit that operates at an oscillation frequency that is an integral multiple of 2.25 MHz. To make a crystal unit an integral multiple of 2.25 MHz is 2.25M
143 frequency division is NTSC system, 144 frequency division is PAL
Since they are equal to the horizontal synchronization frequency of the system, any of these can be handled by selecting an integer multiple of this. In the present embodiment, the oscillation frequency of the crystal unit 19 is 2.
The frequency is 13.5 MHz, which is six times 25 MHz.

First frequency divider 41, second frequency divider 4
The second, third and fourth frequency dividers 46 and 47 are frequency dividers, respectively, and input clocks of 1/77,
The frequency is divided into 1/72, 1/70, and 1/65. Each of the first switch 43 and the second switch 48 is a switching device that switches a frequency dividing circuit to be used based on a required signal system. When the required signal system is the NTSC system, the first switch 43 selects the output of the first frequency divider 41 and the second switch 4
8 selects the output of the third frequency dividing circuit 46. If the requested signal system is the PAL system, the first
Switch 43 selects the output of the second frequency dividing circuit 42,
The second switch 48 selects the output of the fourth divider 47.

The phase comparator 44 includes a first switch 4
The VCO 45 is controlled so that the phase of the clock selected and output by 3 and the phase of the clock selected and output by the second switch 48 become equal. VCO45
Is an oscillation circuit for an MCK signal whose frequency can be varied by a voltage. MCK signals required in the NTSC system and the PAL system are output by the VCO.

In the timing generator 18 having such a configuration, when the required signal system is the NTSC system, a signal of 13.5 MHz is generated by the crystal oscillator 19, and the first frequency dividing circuit 41 generates a 13.5 MHz signal. / 77 divided by 17
The signal of 5.3246 KHz is selected by the first switch 43 and is input to the phase comparator 44. VCO
45 generates the MCK signal in the third frequency dividing circuit 4
The signal divided by 1/70 in 6 is selected by the second switch 48 and input to the phase comparator 44. And
The phase of these signals is compared by a phase comparator 44,
The correction signal is input to the VCO 45. Therefore, PL
When L locks, the output of VCO 45 is 175.32
12.272727 MHz, which is 70 times 46 KHz, that is, the system frequency of the NTSC system.

Similarly, if the required signal system is PAL
In the case of the method, 13.5 MH generated by the quartz oscillator 19 is used.
The 187.5 KHz signal obtained by dividing the signal of z by 1/72 in the second frequency dividing circuit 42 is selected by the first switch 43 and input to the phase comparator 44. VCO4
5, the MCK signal generated by the fourth frequency dividing circuit 47
The signal divided by 1/65 is selected by the second switch 48 and input to the phase comparator 44. Then, the phases of these signals are compared by the phase comparator 44, and the correction signal is input to the VCO 45. Therefore, the PLL
Is locked, the output of VCO 45 is 187.5 KH
12.1875 MHz, which is 65 times z, that is, PAL
System frequency.

As described above, the timing generator 18 can generate the MCK signal of the system frequency of both the NTSC system and the PAL system by switching the first switch 43 and the second switch 48. .

As described above, according to the image recording / reproducing device 10 of the present embodiment, the imaging device for the NTSC system can be used by switching to the PAL system without largely changing the conventional system. .

As described above, according to the image recording / reproducing apparatus 10 of the present embodiment, by operating the CCD 11 and the 5: 6 converter 14 in conjunction with each other, the NTSC system /
Switching of the PAL system is enabled. This can be configured by adding a small number of circuits as compared with the related art. Therefore, as compared with a system via a memory such as a VRAM, for example, it is possible to realize a smaller device, a faster operation, and lower power consumption.

The image recording / reproducing apparatus 10 incorporates a PLL so as to switch the system frequency between the NTSC system and the PAL system.
It is possible to output both signals of the C system and the PAL system. Since the crystal unit is quite large and expensive as a part, this contributes to the miniaturization of the apparatus body and the reduction of the part cost.

Note that the present invention is not limited to the present embodiment, and various suitable modifications can be made. For example, the configuration itself of the image recording / reproducing device 10 is not limited to the present embodiment as shown in FIG. For example, in the image recording / reproducing apparatus 10 described above, the CCD
The operation of all components such as 11 to 15 is M
By switching the frequency of the CK signal itself, the switching has been performed in accordance with the required system. But C
Starting with the CD 11, the signal converter 12, DSP 13, 5:
6 The high-speed phase critical circuits such as the conversion unit 14 and the encoder 15 may be operated at a single predetermined frequency which is an integral multiple of 2.25 MHz, and may be switched to a signal corresponding to a method required in an output part. Good.

FIG. 5 shows the configuration of such an image recording / reproducing apparatus.
Shown in The image recording / reproducing device 50 shown in FIG.
Is provided with a PLL circuit 53, and the clock C
The data is read from the FIFO 51 based on L
Image data is inserted into an effective area of the SC system or the PAL system. In the image recording / reproducing device 50, the configuration of the timing generator (TG) 54 is the same as the conventional configuration that generates a single-frequency MCK signal. The oscillation frequency of the crystal unit 19 is
It is an integral multiple of 2.25 MHz, and here it is 13.5 MHz as in the image recording / reproducing apparatus 10.

FIG. 6 shows an example of the operation clock. First,
In the NTSC system, from the CCD 11 to the FIFO 51, for example, one horizontal period (1H) 85 of 13.5 MHz is used.
It operates with eight clocks. Of the 858 clocks, 640 clocks are the image data of the effective screen, and the rest are blanking data. The FIFO 51 has a clock CL of a frequency of 12.2727 MHz generated by the PLL circuit 53.
Is read by In this case, one horizontal period is 780
640 clocks of which are valid data. When switching to the PAL system, the input frequency to the FIFO 51, 13.5 MHz, does not change, and the PLL circuit 5
3. The data is read out by the clock CL having the frequency of 12.1875 MHz generated by the clock CL. in this case,
One horizontal period is 780 clocks, of which 640 clocks are valid image data.

According to the image recording / reproducing apparatus 50 having such a configuration, a circuit such as the FIFO 51 is required.
Since the high-speed phase circuits such as the CD11 to FIFO51 operate by the oscillation by the crystal oscillator, there is an advantage that there is no jitter caused by the VCO and that the operation is always performed at the same frequency regardless of the NTSC system and the PAL system, so that it is stable. . The present invention may be implemented in such a form.

In the 5: 6 conversion unit 14, the coefficients set in the coefficient multiplier 23 and the coefficient multiplier 24 are changed evenly for each line as described above, and the coefficient is continuously changed between the lines. The image changed. However, the coefficient values set in the coefficient multiplier 23 and the coefficient multiplier 24 are not limited to the case of the present embodiment, and may be arbitrary values.

Further, for example, during the period from the first line to the fifth line, the data input from the CCD 11 is output as it is, and the same data as the fifth line is output during the sixth line. The data may be converted into data for six lines. In this case, the image quality is slightly reduced because the line is not interpolated.
A 5: 6 conversion circuit can be configured by a simple switching circuit without holding the coefficient multiplier 23, the coefficient multiplier 24, and the adder 25.

Also, the function of the 5: 6 conversion unit 14 is
3 may be performed. By doing so, the 5: 6 conversion unit 14 itself as shown in FIG. 2 can be deleted.

In this embodiment, the crystal oscillator 19 in the timing generator 18 has an oscillation frequency of 13.5 MHz (2.25 × 6). However, the oscillation frequency of the crystal unit 19 is not limited to this, and may be any value as long as it is an integer multiple of 2.25 MHz as described above. For example, in the future, CCD
Even in a system in which the imager has a high pixel count and the driving frequency exceeds 20 MHz, if the crystal oscillator NO oscillation frequency is set to an integral multiple of 2.25 MHz, the NTSC / PAL system can be supported.

Also, a PLL is built into the NTSC system / P
The timing generator 18 configured to switch the system frequency of the AL system is not only applicable to the image recording / reproducing apparatus such as the present embodiment in which the image is switched by the 5: 6 converter 14, but requires a memory such as a VRAM. Even onboard systems can be applied, and such systems are also within the scope of the present invention.

[0060]

As described above, according to the present invention,
NTS prevents increase in equipment size, power consumption and cost
An imaging device that can support both the C system and the PAL system can be provided. In addition, equipment scale,
It is possible to provide an image data recording / reproducing apparatus capable of preventing an increase in power consumption and cost and supporting both the NTSC system and the PAL system.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an image recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram 5 of the image recording / reproducing apparatus shown in FIG.
6 is a block diagram illustrating a configuration of a 6 conversion unit. FIG.

FIG. 3 is a block diagram of the image recording / reproducing apparatus shown in FIG.
FIG. 6 is a diagram for explaining the operation of a conversion unit.

FIG. 4 is a block diagram showing a configuration of a timing generator of the image recording / reproducing apparatus shown in FIG. 1;

FIG. 5 is a block diagram showing a modified example of the image recording / reproducing apparatus shown in FIG. 1;

FIG. 6 is a diagram for explaining an operation of the image recording / reproducing apparatus shown in FIG. 5;

FIG. 7 is a block diagram showing a configuration of a conventional image recording / reproducing apparatus.

FIG. 8 is a diagram showing MC in the case of supporting the NTSC system.
FIG. 5 is a diagram for explaining a method of setting the frequency of a K pulse.

FIG. 9 is a diagram illustrating an example of MCK in the case of supporting the PAL system.
FIG. 4 is a diagram for explaining a method of setting a pulse frequency.

FIG. 10 is a diagram showing NT that can be considered from the conventional method.
FIG. 2 is a block diagram illustrating a configuration of an image recording / reproducing apparatus that can support both the SC system and the PAL system.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Image recording / reproducing apparatus, 11 ... CCD, 12 ... Signal conversion part, 13 ... DSP, 14 ... 5: 6 conversion part, 15 ... Encoder, 16 ... Recording / reproduction part, 17 ... Output terminal, 18 ... Timing generation part, 19: crystal oscillator, 21: input terminal,
22 delay line, 23 coefficient multiplier, 24 coefficient multiplier, 25 adder, 26 output terminal, 31 input terminal, 32 delay line, 33 coefficient multiplier, 34
Coefficient multiplier, 35 adder, 36 output terminal, 41 first divider circuit, 42 second divider circuit, 43 first switch, 44 phase comparator, 45 VCO, 46 …
Third frequency divider, 47: fourth frequency divider, 48: second switch, 50: image recording / reproducing device, 51: FIFO,
52 encoder, 53 PLL circuit, 54 timing generator, 80 image recording / reproducing device, 81 CCD, 8
2 ... Signal converter, 83 ... DSP, 84 ... Encoder, 8
Reference numeral 5: recording / reproducing unit, 86: timing generating unit, 87: crystal oscillator, 89: output terminal, 90: image recording / reproducing device, 9
1: CCD, 92: signal conversion unit, 93: DSP, 94:
VRAM write unit, 95 VRAM, 96 VRAM read unit, 97 encoder, 98 recording / reproducing unit, 99
Output terminal, 100: timing generator, 101: NTS
Crystal oscillator for C system, 102 ... Crystal oscillator for PAL system

Claims (10)

[Claims] 1. A method for outputting captured image data in accordance with a desired one of a plurality of methods for video signals of a plurality of methods in which a horizontal line frequency and the number of horizontal lines are specified to predetermined values. An imaging device, which is an imaging unit that captures a desired imaging target with a predetermined number of horizontal lines equal to or less than the minimum number of horizontal lines among the plurality of types, based on a horizontal line frequency of the desired type. The photographing is performed, and the obtained video signals for each of the predetermined number of horizontal lines are equally distributed in one vertical period of a number corresponding to a difference between the number of horizontal lines of the desired method and the predetermined number of horizontal lines. Imaging means for sequentially outputting based on the horizontal line frequency of the desired system while sandwiching the arranged horizontal line period in which the effective video signal is not output, and for each of the predetermined number of input horizontal lines, Based on the image signal, the desired imaging device and a signal interpolation means for generating a video signal for each horizontal line of the number of horizontal lines of the system. 2. The signal interpolating means comprises: video storing means for storing at least one horizontal line video signal sequentially inputted for each horizontal line period of the desired system; And a video synthesizing means for synthesizing a video signal of a horizontal line before the input one horizontal line video signal stored in the video storage means at a predetermined ratio, The imaging apparatus according to claim 1, wherein a video signal having a desired number of horizontal lines is generated based on a video signal having a predetermined number of horizontal lines. 3. The method according to claim 1, wherein the plurality of predetermined systems are an NTSC system and a PAL system, and the signal generation unit generates a video signal of six horizontal lines based on the input video signal of five horizontal lines. The imaging device according to claim 2. 4. Oscillation means for oscillating at a predetermined frequency which is a value obtained by further multiplying each horizontal line frequency of said plurality of types of video signals by a predetermined integer, and further dividing said horizontal line frequency by a predetermined integer. Frequency dividing means for dividing the oscillated signal by the predetermined integer multiple of the desired method to generate a reference signal; a signal obtained by dividing the generated signal by a predetermined integer; and the reference signal. 2. The imaging device according to claim 1, further comprising: a PLL circuit that generates a clock of the desired type of horizontal line frequency based on the clock signal, and further comprising a clock generator that generates a clock of the desired type of horizontal line frequency. apparatus. 5. The predetermined plurality of systems are an NTSC system and a PAL system, wherein the oscillating means oscillates at a predetermined oscillating frequency that is an integral multiple of 2.25 MHz, When the system is the NTSC system, the oscillated signal is divided by the integer multiple of 77, and when the desired system is the PAL system, the oscillated signal is divided by the integer multiple of 72. And the reference circuit generates the reference signal. If the desired system is the NTSC system, the PLL circuit divides the clock based on the signal obtained by dividing the generated signal by an integer multiple of 70 and the reference signal. Generate
If the desired system is the PAL system, the generated signal is
The imaging device according to claim 4, wherein the clock is generated based on the signal divided at a ratio of the integral multiple of 5 and the reference signal. 6. A video signal of a plurality of systems in which the horizontal line frequency and the number of horizontal lines are respectively set to predetermined values, and imaged image data is recorded, and a desired system among the plurality of systems is recorded. A recording / reproducing apparatus that outputs an image of a desired imaging target with a predetermined number of horizontal lines equal to or less than the least number of horizontal lines among the plurality of methods, wherein the horizontal line of the desired method is used. The photographing is performed based on the frequency, and the obtained video signal for each of the predetermined number of horizontal lines is converted into the number of 1 vertical lines corresponding to the difference between the number of horizontal lines of the desired method and the predetermined number of horizontal lines. Imaging means for sequentially outputting based on the horizontal line frequency of the desired method while sandwiching a horizontal line period in which a valid video signal is not output evenly arranged in a period, and for each of the output horizontal lines A recording / reproducing means for sequentially recording video signals and reproducing the video signals on demand, based on the reproduced video signals for the predetermined number of horizontal lines, the video for each horizontal line having the desired number of horizontal lines in the desired format; An image recording / reproducing apparatus having signal interpolating means for generating a signal. 7. The image interpolating means includes: a video storing means for storing a video signal for each horizontal line sequentially inputted for each horizontal line for at least one horizontal line period of the desired system; And a video synthesizing means for synthesizing a video signal of a horizontal line before the input one horizontal line video signal stored in the video storage means at a predetermined ratio, 7. The image recording / reproducing apparatus according to claim 6, wherein a video signal having a desired number of horizontal lines is generated based on a video signal having a predetermined number of horizontal lines. 8. The predetermined plurality of systems are an NTSC system and a PAL system, and the signal generation means generates a video signal of six horizontal lines based on the input video signal of five horizontal lines. An image recording / reproducing apparatus according to claim 7. 9. Oscillation means for oscillating at a predetermined frequency which is a value obtained by further multiplying each horizontal line frequency of said plurality of types of video signals by a predetermined integer, and further dividing said horizontal line frequency by a predetermined integer. Frequency dividing means for dividing the oscillated signal by the predetermined integer multiple of the desired method to generate a reference signal; a signal obtained by dividing the generated signal by a predetermined integer; and the reference signal. 7. The image according to claim 6, further comprising: a PLL circuit configured to generate a clock of the horizontal line frequency of the desired type based on the clock signal, and further comprising a clock generation unit configured to generate a clock of the horizontal line frequency of the desired type. Recording and playback device. 10. The predetermined plurality of systems are an NTSC system and a PAL system, wherein the oscillating means oscillates at a predetermined oscillating frequency which is an integral multiple of 2.25 MHz, When the system is the NTSC system, the oscillated signal is divided by the integer multiple of 77, and when the desired system is the PAL system, the oscillated signal is divided by the integer multiple of 72. And the reference circuit generates the reference signal. When the desired system is the NTSC system, the PLL circuit divides the clock based on the signal obtained by dividing the generated signal by an integer multiple of 70 and the reference signal. Generate
If the desired system is the PAL system, the generated signal is
The image recording / reproducing apparatus according to claim 9, wherein the clock is generated based on the signal divided at a ratio of the integral multiple of 5 and the reference signal.