JPH11283981A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a Cu wiring, which has good adhesion, never generates the peeling of the film constituting the Cu wiring during the processes for manufacturing a semiconductor device, and moreover has a good electromigration resistance. SOLUTION: This method of manufacturing this semiconductor device is conducted using a method is which a Cu diffusion preventive film, such as a TiN film 3 is formed, a film consisting of a semiconductor film or a metal film, such as an Si film 4 is formed, transition metal films, such as a Ti film and a Cu film are formed in order on a substrate. After these films have been patterned into the shape of a wiring, heat treatment is performed on these films, whereby a film consisting of a semiconductor film or a metal film is reacted with the transition metal films to form a film consisting of the semiconductor film or the metal film and the transition metal films, such as a TiSix film 7, and at the same time, a very small amount of a transition metal is caused to diffuse from a transition metal film into a Cu film to form a Cu-Ti film 8, and the wiring is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device using a Cu-based material as a wiring material.

[0002]

2. Description of the Related Art ULSI (Ultra Large Scale Integrat)
2. Description of the Related Art Highly integrated semiconductor devices such as ed-Circuit) require both a high processing speed and high resistance to electromigration, which becomes more serious due to an increase in power consumption.

Conventionally, Al alloys (Al-0.5% Cu, Al-1% Si-0.5% Cu) have been used as wiring materials for LSIs.
Etc.) have been used exclusively, but in order to further increase the speed of LSI, it is necessary to use Cu, Ag, or the like having a lower specific resistance as a wiring material. In particular, Cu has a low specific resistance of 1.8 μΩcm, which is advantageous in increasing the speed of LSIs, and has an electromigration resistance that is about one digit higher than that of Al alloys. ing.

However, since the Cu film has poor adhesion to a diffusion prevention film (barrier metal) such as a TiN film, there is a problem that film peeling occurs during the process.
Problems such as a decrease in the yield of SI and an increase in particles in the semiconductor manufacturing apparatus have occurred.

In order to enhance the adhesion of the Cu film, it is conceivable to insert a metal which easily reacts with Cu, for example, Ti, between the diffusion prevention film such as a TiN film and the Cu film. However, in a structure in which a Ti film is simply inserted between the diffusion preventing film and the Cu film, it is necessary to form a Ti film having a sufficient thickness to obtain sufficient adhesion. There is a problem that a considerable amount of Ti is mixed in by diffusion and the resistance of the wiring increases.

Therefore, while ensuring the adhesion of the Cu film,
There is a demand for a method of manufacturing a semiconductor device in which an increase in wiring resistance due to excessive mixing of impurities into the Cu film is suppressed as much as possible.

[0007]

As described above,
In the future ULSI, wiring with low resistance is required to increase the processing speed, and wiring with high allowable current density is required due to the increase in power consumption. Cu
Although the use of wiring is effective as a measure to achieve both high speed and high reliability of the ULSI, improvement of the adhesion of the Cu film is required for realizing the same.

Accordingly, an object of the present invention is to provide a semiconductor device having a Cu-based wiring which has good adhesion, does not cause film peeling during the process, and has good electromigration resistance, and a method of manufacturing the same. is there.

[0009]

In order to achieve the above object, a semiconductor device according to a first aspect of the present invention comprises a Cu diffusion preventing film, a film made of a semiconductor or a metal, a semiconductor or a metal and a transition metal. And a wiring and / or an electrode having a structure in which a film formed of a metal and an alloy film of Cu and a transition metal are sequentially laminated.

A semiconductor device according to a second aspect of the present invention has a wiring and / or a structure in which a Cu diffusion preventing film, a film of a semiconductor or a metal and a transition metal and an alloy film of Cu and a transition metal are sequentially laminated. Alternatively, it is characterized by having an electrode.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a Cu diffusion preventing film, a film made of a semiconductor or metal, a transition metal film and a Cu film are sequentially formed on a substrate, and heat treatment is performed. Forming a film made of a semiconductor or a metal and a transition metal by reacting a film made of a semiconductor or a metal with a transition metal film, and diffusing a transition metal from the transition metal film to a Cu film. It is characterized by the following.

In the present invention, the diffusion prevention film may be basically any material as long as it can prevent the diffusion of Cu.
It is made of iN / Ti or the like. Also, semiconductors or metals are
Basically, any material may be used as long as it can form a film having good adhesion of a Cu-based film by reaction with a transition metal. For example, Si, Ge, S
iGe, Al and the like. The thickness of the film made of a semiconductor or a metal can be selected as necessary, but is generally 5 nm or more and 100 nm or less, preferably 5 n
m or more and 50 nm or less. The transition metal may be any material that can improve the electromigration resistance when diffused into the Cu film. For example, Ti, Zr, Ta, W, Hf, Mo, Ni, Zn, M
g, Co and the like. The diffusion amount of these transition metals into the Cu film is usually about several percent by weight or less, so that sufficient electromigration resistance can be improved. Further, a film made of a semiconductor or a metal and a transition metal is, for example, Ti, Zr, Ta, W, Hf, Mo, N
a film made of silicide such as i, Zn, Mg, Co,
An alloy of Al and these transition metals, for example, a film made of Al-Ti.

In the third aspect of the present invention, the heat treatment may be performed in any atmosphere of an inert gas (Ar gas, N ₂ gas, etc.), a reducing gas, a vacuum, or the like. Also,
The temperature and the time of the heat treatment are set so that a film of the semiconductor or metal and the transition metal having a necessary and sufficient thickness to obtain good adhesion of the Cu-based film by a reaction between the film of the semiconductor or metal and the transition metal film is obtained. And an amount that can sufficiently improve the electromigration resistance while suppressing the diffusion amount of the transition metal into the Cu film to such an extent that the increase in the resistance of the Cu film does not cause a practical problem. The temperature and time at which the transition metal can be diffused into the Cu film are selected. When the film made of a semiconductor or metal is, for example, a Si film, the heat treatment temperature is generally 300 ° C. or more and 600 ° C. or less, preferably 300 ° C. or more and 500 ° C.
It is as follows. In the case where a low dielectric constant film (low dielectric film) is used as the interlayer insulating film, the heat treatment temperature needs to be kept below its heat-resistant temperature (generally, about 400 ° C.).
Further, this heat treatment may be stopped when a part of the semiconductor or metal film is consumed by the reaction with the transition metal film, or may be performed until the semiconductor or metal film is completely consumed. You may.

In the first or second aspect of the present invention constructed as described above, an alloy film of Cu and a transition metal is formed on a film of a semiconductor or a metal and a transition metal having good adhesion. By being stacked, film peeling during the process can be prevented. Also, Cu
An alloy film of a metal and a transition metal has good electromigration resistance due to the presence of the transition metal therein.

[0015] In the third aspect of the present invention configured as described above, by performing a heat treatment, a film made of a semiconductor or a metal and a transition metal film are reacted to form a semiconductor or a metal and a transition metal. While forming a film,
Since the transition metal is diffused from the transition metal film to the Cu film, an alloy film of Cu and the transition metal has good adhesion, and is formed on a film made of a semiconductor or a metal and a transition metal. Thus, peeling of the film during the process can be prevented, and the transition metal can be diffused into the Cu film to improve the electromigration resistance.

Here, the improvement of the electromigration resistance due to the transition metal entering the Cu film is based on the following mechanism. That is, when a transition metal enters the Cu film, a compound (alloy) of Cu and the transition metal is formed at a crystal grain boundary of the Cu film. This compound plays a role in preventing grain boundary diffusion of Cu. Since the electromigration phenomenon of Cu is governed by grain boundary diffusion, the electromigration resistance of Cu is improved by preventing the grain boundary diffusion.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

FIGS. 1 and 2 show a method of manufacturing an LSI according to a first embodiment of the present invention, and particularly show a wiring forming step thereof.

In the first embodiment, first, as shown in FIG. 1, a semiconductor substrate 1 such as a Si substrate on which elements such as transistors (not shown) are formed in advance by a normal LSI manufacturing process. After forming an interlayer insulating film 2 such as a SiO ₂ film by a CVD method or a thermal oxidation method, a predetermined portion of the interlayer insulating film 2 is removed by etching to form a contact hole (not shown). Next, a TiN film 3 and S
An i film 4, a Ti film 5, and a Cu film 6 serving as a main wiring material are sequentially formed. One example of the thickness of these films is Ti
The N film 3 is 50 nm, the Si film 4 is 20 nm, and the Ti film 5 is 3 nm.
0 nm and the thickness of the Cu film 6 is 500 nm. An example of conditions for forming these films is as follows. That is, in forming the TiN film 3, a mixed gas of Ar and N ₂ is used as a process gas, and the flow rates thereof are set to 60
SCCM and 120SCCM, pressure 0.9P
a, DC power is 8 kW, temperature is 150 ° C. In forming the Si film 4, Ar gas is used as a process gas, the flow rate is set to 120 SCCM, the pressure is set to 0.67 Pa,
The C power is 3 kW and the temperature is 150 ° C. To form the Ti film 5, Ar gas is used as a process gas, the flow rate is set to 120 SCCM, the pressure is set to 0.67 Pa, the DC power is set to 4 kW, and the temperature is set to 150 ° C. For the formation of the Cu film 6, Ar gas is used as a process gas and the flow rate is 1
20 SCCM, pressure 0.67 Pa, DC power 1
2 kW and the temperature is 150 ° C.

Next, the TiN film 3, the Si film 4, the Ti film 5, and the Cu film 6 are subjected to, for example, reactive ion etching (RI
Patterning into a desired wiring shape by the method E). As an example of conditions for the etching by the RIE method, a mixed gas of SiCl ₄ and N ₂ is used as an etching gas, and the flow rates thereof are 10 SCCM and 100 SCCM, respectively.
SCCM, pressure 26 Pa, RF power 500 W,
The temperature is set to 300 ° C.

Next, by heat-treating the semiconductor substrate 1, as shown in FIG. 2, by reacting the Si film 4 and the Ti film 5 to form a TiSi _x film 7, the Ti from the Ti film 5 Cu The Cu—Ti film 8 is formed by diffusing a small amount into the film 6. As an example of the conditions of this heat treatment, for example, a mixed gas of Ar and H ₂ is used as an atmosphere gas,
At 50 ° C., the time is 60 minutes. The thickness of the TiSi _x film 7 is approximately 40nm, for example. In addition, Cu-Ti
The Ti content in the film 8 is, for example, about 0.5% by weight. As described above, the TiN film 3, the Si film 4, the TiSi _x
A wiring composed of the film 7 and the Cu—Ti film 8 is formed.
The adhesion between the films constituting the wiring is sufficiently good.

Thereafter, the target LSI is completed through a process of forming an interlayer insulating film, a wiring protection film, and the like by a normal LSI manufacturing process.

[0023] As described above, according to this first embodiment, Cu-Ti film 8 which is a main material of the wiring by the adhesion is formed on sufficiently good TiSi _x film 7, The peeling of the Cu—Ti film 8 during the process can be prevented. Similarly, since the adhesiveness of the other films constituting the wiring is sufficiently good, peeling of these films can be prevented. In addition, Cu-Ti
The film 8 has higher electromigration resistance than the Cu film, so that the reliability of the wiring can be improved. As described above, a high-performance LSI with high reliability and high-speed operation can be realized with a high yield.

FIGS. 3 to 5 show a method of manufacturing an LSI according to a second embodiment of the present invention, and particularly show a wiring forming step thereof. In the second embodiment, a so-called dual damascene (Du Damascene) in which wiring is formed and connection holes are buried simultaneously.
al Damascene) method.

In the second embodiment, first, as shown in FIG. 3, an element (not shown) such as a transistor is formed in advance by a normal LSI manufacturing process.
After an interlayer insulating film 12 such as a SiO ₂ film is formed on a semiconductor substrate 11 such as an i-substrate by a CVD method or a thermal oxidation method, a predetermined portion of the interlayer insulating film 12 is removed by etching to form a contact hole (see FIG. (Not shown). next,
A first-layer wiring is formed on the interlayer insulating film 12. This first layer wiring is made of, for example, Ti as a diffusion prevention film.
It has a structure in which an N / Ti film 13, a Cu film 14 as a main wiring material, and a TiN film 15 as an antireflection film required in a lithography step are sequentially laminated. Next, after an interlayer insulating film 16 such as a SiO ₂ film is formed on the first layer wiring by a CVD method or the like, a predetermined portion of the interlayer insulating film 16 is removed by etching to form the wiring groove 17 and the first wiring. The connection hole 18 reaching the wiring of the layer is formed.

Next, a TiN film 19 and a Si film 20 as diffusion preventing layers are formed on the entire surface of the substrate by, for example, a sputtering method.
And a Ti film 21 are sequentially formed. The thicknesses and forming conditions of these films are the same as in the first embodiment. next,
A Cu film 22 serving as a main wiring material is formed on the Ti film 21. In forming the Cu film 22, first, a Cu film having a thickness of 50 nm is formed on the entire surface of the substrate by, for example, a sputtering method, and then the Cu film is used as a seed layer on which a Cu film is formed by an electrolytic plating method. Thickness 1.
5 μm is formed. The conditions for forming the Cu film as the seed layer are the same as in the first embodiment. In addition, as an example of conditions for forming a Cu film by an electrolytic plating method, CuSO ₄ (5H ₂ O) is used as a plating solution, the solution temperature is 30 ° C.
The voltage is 10 V, the current density is 20 A / dm ^2, and a Cu plate is used as an anode plate.

Next, the Cu film 22, the Ti film 21, the Si film 20 and the Ti film 22 are formed by, for example, a chemical mechanical polishing (CMP) method.
The N film 19 is polished, and these films are left only in the wiring groove 17 as shown in FIG.

Next, by heat-treating the semiconductor substrate 11, as shown in FIG. 5, to form a TiSi _x film 23 by reacting the Si film 20 and the Ti film 21, Ti
A small amount of Ti is diffused from the film 21 into the Cu film 22 so that Cu-T
An i film 24 is formed. The conditions of this heat treatment are the same as in the first embodiment. The thickness of the TiSi _x film 23 is approximately 40nm, for example. Further, T in the Cu—Ti film 24
The i content is, for example, about 0.5% by weight. This heat treatment is also effective in eliminating microvoids that tend to occur in the Cu-Ti film 24 in the portion of the connection hole 18 having a high aspect ratio. Further, the Cu-Ti
The grain size of the crystal grains of the film 24 increases. This increase in particle size
This is effective for improving electromigration resistance.
Thus, the second layer of wiring is formed as a groove interconnection made of TiN film 19, Si layer 20, TiSi _x film 23 and the Cu-Ti film 24. The adhesion between the films constituting the second-layer wiring is sufficiently good.

After that, through a normal LSI manufacturing process, a target LSI is completed through a process of forming a wiring protective film, a contact opening of a bonding pad, and the like.

As described above, according to the second embodiment, the wiring of the second layer having the Cu-Ti film 24 as the main wiring material is completely formed inside the connection hole 18 and inside the wiring groove 17. The dual damascene wiring can be formed as a dual damascene wiring, and the Cu-Ti film 24, which is a main wiring material of the dual damascene wiring, is formed on the TiSi _x film 23 having good adhesion. The peeling of the film can be prevented, and the Cu-Ti film 24 has good electromigration resistance, so that a highly reliable dual damascene wiring can be obtained. As described above, a high-performance LSI with high reliability and high-speed operation can be realized with a high yield.

FIGS. 6 and 7 show a method of manufacturing an LSI according to a third embodiment of the present invention, and particularly show a wiring forming step thereof.

In the third embodiment, first, as shown in FIG. 6, a semiconductor substrate 31 such as a Si substrate on which elements such as transistors (not shown) are formed in advance by a normal LSI manufacturing process. After forming an interlayer insulating film 32 such as a SiO ₂ film by a CVD method or a thermal oxidation method, a predetermined portion of the interlayer insulating film 32 is removed by etching to form a contact hole (not shown). Next, TiN is applied to the entire surface of the substrate by, for example, a sputtering method.
A film 33, an Al film 34, a Ti film 35, and a Cu film 36 serving as a main wiring material are sequentially formed. To give an example of the film thickness of these films, the TiN film 33 is 50 nm, and the Al film 34 is
nm, the Ti film 35 is 30 nm, and the Cu film 36 is 500 n
m. In addition, as an example of the conditions for forming these films, the TiN film 33, the Ti film 35, and the Cu film 36 are the same as in the first embodiment, and the Al film 34 uses Ar gas as a process gas. , The flow rate is S
The pressure is Pa, the DC power is kW, and the temperature is ° C.

Next, the TiN film 33, the Al film 34, the Ti film 35, and the Cu film 36 are patterned into a desired wiring shape by, for example, RIE. The conditions for the etching by the RIE method are the same as in the first embodiment.

Next, by heat-treating the semiconductor substrate 21, the Al film 34 and the Ti film 35 react with each other to form an Al-Ti film 37 as shown in FIG.
A small amount of Ti is diffused from the film 35 into the Cu film 36 to form Cu-T
An i film 38 is formed. The conditions of this heat treatment are the same as in the first embodiment. Here, the thickness of the Al—Ti film 37 is, for example, about nm. Further, T in the Cu-Ti film 38
The i content is, for example, about 0.5% by weight. As described above, the TiN film 33, the Al-Ti film 37, and the Cu-
A wiring made of the Ti film 38 is formed. The adhesion between the films constituting the wiring is sufficiently good.

Thereafter, the target LSI is completed through the steps of forming an interlayer insulating film, a wiring protection film, and the like in a normal LSI manufacturing process.

As described above, according to the third embodiment, the Cu-Ti film 38, which is the main material of the wiring, is formed on the Al-Ti film 37 having good adhesion.
The peeling of the Cu—Ti film 38 during the process can be prevented. Similarly, peeling of other films constituting the wiring can be prevented. In addition, Cu-Ti
The film 38 has higher electromigration resistance than the Cu film, so that the reliability of the wiring can be improved. As described above, a high-performance LSI with high reliability and high-speed operation can be realized with a high yield.

FIGS. 8 to 10 show a method of manufacturing an LSI according to a fourth embodiment of the present invention, and particularly show a wiring forming step thereof. The fourth embodiment is an example of using a dual damascene method for simultaneously forming a wiring and filling a connection hole.

In the fourth embodiment, first, as shown in FIG. 8, an element (not shown) such as a transistor is formed in advance by a normal LSI manufacturing process.
After an interlayer insulating film 42 such as a SiO ₂ film is formed on a semiconductor substrate 41 such as an i-substrate by a CVD method or a thermal oxidation method, a predetermined portion of the interlayer insulating film 42 is removed by etching to form a contact hole (see FIG. (Not shown). next,
A first-layer wiring is formed on the interlayer insulating film 42. This first layer wiring is made of, for example, Ti as a diffusion prevention film.
It has a structure in which an N / Ti film 43, a Cu film 44 as a main wiring material, and a TiN film 45 as an antireflection film required in a lithography step are sequentially laminated. Next, after an interlayer insulating film 46 such as a SiO ₂ film is formed on the first layer wiring by a CVD method or the like, a predetermined portion of the interlayer insulating film 46 is removed by etching to form a wiring groove 47 and a first groove. A connection hole 48 reaching the wiring of the layer is formed.

Next, a TiN film 49 and an Al film 50 as diffusion preventing films are formed on the entire surface of the substrate by, for example, a sputtering method.
And a Ti film 51 are sequentially formed. The thicknesses and forming conditions of these films are the same as in the first embodiment. next,
A Cu film 52 serving as a main wiring material is formed on the Ti film 51. In the formation of the Cu film 52, first, a Cu film having a thickness of 50 nm is formed on the entire surface of the substrate by, for example, a sputtering method, and then the Cu film is used as a seed layer, and a Cu film is formed thereon by electrolytic plating. Thickness 1.
5 μm is formed. The conditions for forming the Cu film as the seed layer are the same as in the first embodiment. The conditions for forming the Cu film by the electrolytic plating method are the same as those in the first embodiment.

Next, the Cu film 5 is formed by, eg, CMP.
2. The Ti film 51, the Al film 50, and the TiN film 49 are polished to leave these films only in the wiring groove 47 as shown in FIG.

Next, by heat-treating the semiconductor substrate 41, the Al film 50 and the Ti film 51 react with each other to form an Al-Ti film 53, as shown in FIG.
Ti is diffused from the i-film 51 into the Cu film 52 to form Cu-Ti
A film 54 is formed. The conditions of this heat treatment are the same as in the first embodiment. Here, the thickness of the Al—Ti film 53 is, for example, about 20 nm. Further, the Ti in the Cu—Ti film 54
The content is, for example, about 0.5% by weight. This heat treatment is generally performed by removing the C of the portion of the connection hole 48 having a high aspect ratio.
This is also effective in eliminating microvoids that easily occur in the u-Ti film 54. Further, the Cu—Ti film 5 is formed by this heat treatment.
The grain size of the crystal grain of No. 4 increases. This increase in particle size is effective in improving electromigration resistance. As described above, the TiN film 49, the Al—Ti film 53, and the Cu—
The second layer wiring made of the Ti film 54 is formed as a groove wiring. The adhesion between the films constituting the second-layer wiring is sufficiently good.

Thereafter, through a normal LSI manufacturing process, a target LSI is completed through a process of forming a wiring protection film and a contact opening of a bonding pad.

As described above, according to the fourth embodiment, the wiring of the second layer using the Cu—Ti film 54 as the main wiring material is completely formed in the connection hole 48 and the wiring groove 47. The dual damascene wiring can be formed as a dual damascene wiring, and the Cu-Ti film 54, which is a wiring main material of the dual damascene wiring, is formed on the Al-Ti film 53 having good adhesion. The peeling of the film during the process can be prevented, and the Cu—Ti film 54 has good electromigration resistance, so that a dual damascene wiring with good reliability can be obtained. As described above, a high-performance LSI with high reliability and high-speed operation can be realized with a high yield.

Although the embodiments of the present invention have been specifically described above, the present invention is not limited to the above-described embodiments, and various modifications based on the technical idea of the present invention are possible.

For example, numerical values, structures, substrates, raw materials, and the like described in the first, second, third, and fourth embodiments described above.
The process is only an example, and if necessary,
Numerical values, structures, substrates, raw materials, processes, and the like different from these may be used.

Specifically, the first, second, third and fourth
In the embodiment, various films formed by a sputtering method may be formed by a CVD method, a plating method, a vacuum evaporation method, or the like, as necessary.

[0047]

As described above, according to the semiconductor device of the present invention, a structure in which an alloy film of Cu and a transition metal is laminated on a semiconductor or a film of a metal and a transition metal having good adhesion. As a result, it is possible to prevent film peeling during the process,
The electromigration resistance of the wiring and / or the electrode can be improved.

According to the method of manufacturing a semiconductor device of the present invention, a film made of a semiconductor or a metal and a transition metal is formed by reacting a film made of a semiconductor or a metal with a transition metal film by performing a heat treatment. In addition, since the transition metal is diffused from the transition metal film to the Cu film, an alloy film of Cu and the transition metal is formed on a semiconductor or a film of the metal and the transition metal having good adhesion. This can prevent film peeling during the process and improve the electromigration resistance of the wiring and / or electrode.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining an LSI manufacturing method according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining the LSI manufacturing method according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view for explaining an LSI manufacturing method according to a second embodiment of the present invention;

FIG. 4 is a cross-sectional view for explaining a method for manufacturing an LSI according to a second embodiment of the present invention;

FIG. 5 is a cross-sectional view for explaining an LSI manufacturing method according to a second embodiment of the present invention;

FIG. 6 is a cross-sectional view for explaining an LSI manufacturing method according to a third embodiment of the present invention.

FIG. 7 is a cross-sectional view for explaining an LSI manufacturing method according to a third embodiment of the present invention;

FIG. 8 is a sectional view for explaining a method for manufacturing an LSI according to a fourth embodiment of the present invention;

FIG. 9 is a cross-sectional view for explaining the LSI manufacturing method according to the fourth embodiment of the present invention.

FIG. 10 is a sectional view for explaining the LSI manufacturing method according to the fourth embodiment of the present invention;

[Explanation of symbols]

1, 11, 31, 41 ... semiconductor substrate, 3, 19, 3
3, 49 ... TiN film, 4, 20 ... Si film, 5,
21, 35, 51 ... Ti film, 6, 22, 36, 52
··· Cu film, 7,23 ··· TiSi _x film, 8,2
4, 38, 54 ... Cu-Ti film, 37, 53 ...
Al-Ti film

Claims (15)

[Claims] 1. A wiring and / or electrode having a structure in which a Cu diffusion preventing film, a film made of a semiconductor or metal, a film made of the semiconductor or metal and a transition metal, and an alloy film of Cu and a transition metal are sequentially laminated. A semiconductor device comprising: 2. The method according to claim 1, wherein the diffusion preventing film is made of TiN or TiN /
2. The semiconductor device according to claim 1, wherein the semiconductor device is made of Ti. 3. The semiconductor or metal is Si, Ge, S
2. The semiconductor device according to claim 1, wherein the semiconductor device is iGe or Al. 4. The transition metal is Ti, Zr, Ta, W,
2. The semiconductor device according to claim 1, wherein the semiconductor device is Hf, Mo, Ni, Zn, Mg, or Co. 5. The film comprising a semiconductor or a metal and a transition metal is made of Ti, Zr, Ta, W, Hf, Mo, Ni,
2. The semiconductor device according to claim 1, wherein the semiconductor device is a film made of a silicide of Zn, Mg or Co. 6. A semiconductor having a wiring and / or electrode having a structure in which a Cu diffusion preventing film, a film made of a semiconductor or a metal and a transition metal, and an alloy film of Cu and a transition metal are sequentially laminated. apparatus. 7. The anti-diffusion film is made of TiN or TiN /
7. The semiconductor device according to claim 6, comprising Ti. 8. The semiconductor or metal is Si, Ge, S
7. The semiconductor device according to claim 6, wherein the semiconductor device is iGe or Al. 9. The transition metal is Ti, Zr, Ta, W,
7. The semiconductor device according to claim 6, wherein the semiconductor device is Hf, Mo, Ni, Zn, Mg, or Co. 10. The film comprising a semiconductor or a metal and a transition metal is made of Ti, Zr, Ta, W, Hf, Mo, N
7. The semiconductor device according to claim 6, wherein the semiconductor device is a film made of silicide of i, Zn, Mg or Co. 11. A step of sequentially forming a Cu diffusion preventing film, a film made of a semiconductor or a metal, a transition metal film and a Cu film on a substrate, and performing a heat treatment so that the film made of the semiconductor or the metal and the transition Forming a film comprising the semiconductor or the metal and the transition metal by reacting with the metal film, and diffusing the transition metal from the transition metal film to the Cu film. Method. 12. The diffusion prevention film is made of TiN or TiN.
12. The method of manufacturing a semiconductor device according to claim 11, comprising: / Ti. 13. The semiconductor or metal is Si, Ge,
12. The semiconductor device according to claim 11, which is SiGe or Al.
The manufacturing method of the semiconductor device described in the above. 14. The transition metal film is made of Ti, Zr, Ta,
The method of manufacturing a semiconductor device according to claim 11, comprising W, Hf, Mo, Ni, Zn, Mg, or Co. 15. The film comprising a semiconductor or a metal and a transition metal is made of Ti, Zr, Ta, W, Hf, Mo, N
12. The method of manufacturing a semiconductor device according to claim 11, wherein the film is made of a silicide of i, Zn, Mg, or Co.