JP2006216787A - Semiconductor device and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a copper wiring layer excellent in reliability, and to provide its fabrication process. <P>SOLUTION: Above a first interlayer insulation film 1 and a first copper wiring layer 3, a diffusion prevention film 4, a second interlayer insulation film 5 and a third interlayer insulation film 11 are formed sequentially followed by formation of a contact hole 6 reaching the first copper wiring layer 3. After a wiring trench 7 corresponding to the contact hole 6 is formed in the third interlayer insulation film 11, a second barrier metal film 8 is formed on the third interlayer insulation film 11 to cover the inner surface of the contact hole 6 and the wiring trench 7. The second barrier metal film 8 on the bottom of the contact hole 6 is removed and after the upper surface of the first copper wiring layer 3 is processed to have a recessed cross-section when viewed on the upper surface, a film of one material selected from a group of tantalum nitride, titanium, tungsten, and their nitrides and nitride silicides is formed on the second barrier metal film 8 and the first copper wiring layer 3 by ALD or CVD. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a multilayer wiring structure and a manufacturing method thereof.

  In recent years, with the miniaturization and speeding up of semiconductor devices, multilayered wiring structures have been advanced. However, as such miniaturization, speeding up, and multilayering progress, signal delay due to increased wiring resistance and parasitic capacitance between wiring layers becomes a problem. Here, the signal delay T is proportional to the product of the wiring resistance R and the parasitic capacitance C. Therefore, in order to reduce the signal delay T, it is necessary to reduce the resistance of the wiring layer and reduce the parasitic capacitance.

  In order to prevent signal delay due to increase in wiring resistance and parasitic capacitance, copper wiring has been introduced instead of aluminum wiring, and attempts have been made to use an insulating film having a low dielectric constant as an interlayer insulating film. It was.

  As a method for forming the copper wiring, there is a damascene method. This is known as a technique for forming a wiring without etching copper, considering that it is difficult to control the etching rate of copper compared to aluminum (see, for example, Patent Document 1).

  Specifically, the damascene method is a technique in which an opening is formed in an interlayer insulating film by dry etching, and a copper layer is buried in the opening via a barrier metal film to form a copper wiring layer. The copper layer is embedded by forming a copper layer so as to embed the opening by a plating method, and then depositing the copper layer only in the opening by a chemical mechanical polishing method (hereinafter referred to as a CMP method). This can be achieved by polishing the surface to leave.

  By the way, as the miniaturization of wiring advances, it is important to ensure reliability such as stress migration and electromigration in a semiconductor device.

  On the other hand, after the barrier metal film is formed, in-situ physical etching is performed to completely remove the barrier metal film at the bottom of the connection hole, and then the lower copper wiring layer is processed into a concave shape. Techniques to do this have been proposed. In this method, the barrier metal film in the portion other than the connection hole such as the wiring groove is not removed by adjusting the etching conditions and making the etching rate at the bottom of the connection hole relatively higher than the speed of other portions. Yes.

JP 2000-323571 A

  However, the etching rate in the connection hole and the wiring groove varies depending on the structure and positional relationship. Therefore, the barrier metal film at the bottom of all the connection holes is completely removed, while the barrier metal film in the other part such as the wiring groove. It is difficult to ensure that it remains. Therefore, in practice, when the barrier metal film at the bottom of the connection hole is completely removed, the barrier metal film is also locally removed at the bottom of the wiring trench and the like, and the underlying interlayer insulating film in this portion is exposed. Was produced.

  In order to solve such a problem, an attempt is made to cover the exposed interlayer insulating film by forming a barrier metal film again after the etching process. In this case, since the formation and etching of the barrier metal film are usually performed in-situ in the same PVD (Physical Vapor Deposition) chamber, the second barrier metal film is formed in the same chamber. It is the mainstream to do. However, with the barrier metal film formed by the PVD method, it is difficult to sufficiently cover the step caused by the local removal of the barrier metal film at the bottom of the wiring groove. For this reason, a portion where the copper layer forming the wiring and the interlayer insulating film are in direct contact is generated, and there is a problem that the reliability of the semiconductor device is lowered.

  The present invention has been made in view of such problems. That is, an object of the present invention is to provide a semiconductor device having a copper wiring layer excellent in reliability and a method for manufacturing the same.

  Other objects and advantages of the present invention will become apparent from the following description.

  1st invention of this application is a semiconductor device provided with the multilayer wiring structure, Comprising: This multilayer wiring structure is a 1st interlayer insulation film, and the 1st copper wiring formed in this 1st interlayer insulation film A layer, a diffusion prevention film formed on the first interlayer insulation film, a second interlayer insulation film formed on the diffusion prevention film, and a connection formed on the second interlayer insulation film A second copper wiring layer electrically connected to the first copper wiring layer through the hole, a barrier metal film formed on the side wall of the connection hole and the inner surface of the second copper wiring layer, and the barrier metal A metal-containing film formed on the film and on the first copper wiring layer and covering the second interlayer insulating film exposed from a portion other than the bottom of the connection hole; and the metal-containing film. Selected from the group consisting of tantalum, tantalum, titanium and tungsten and their nitrides and nitrides And a metal contained in the metal-containing film is a metal having a high ductility and a diffusion coefficient smaller than copper in the second interlayer insulating film. .

  According to a second aspect of the present invention, there is provided a semiconductor device having a multilayer wiring structure, wherein the multilayer wiring structure includes a first interlayer insulating film and a first interlayer insulating film formed on the first interlayer insulating film. A copper wiring layer, a diffusion preventing film formed on the first interlayer insulating film, a second interlayer insulating film formed on the diffusion preventing film, and the second interlayer insulating film A second copper wiring layer electrically connected to the first copper wiring layer through the connection hole, a barrier metal film formed on the side wall of the connection hole and the inner surface of the second copper wiring layer, and A metal-containing film that is formed on the barrier metal film and on the first copper wiring layer and covers the second interlayer insulating film exposed from a portion other than the bottom of the connection hole, and formed on the metal-containing film A tantalum nitride film, a tantalum film, a titanium film and a tungsten film, and their nitride films and And a laminated film composed of two or more films selected from the group consisting of nitride films, and the metal contained in the metal-containing film is highly ductile and has a diffusion coefficient in the second interlayer insulating film. Is a metal smaller than copper.

  A third invention of the present application is a method of manufacturing a semiconductor device having a multilayer wiring structure, the step of forming a first copper wiring layer on the first interlayer insulating film, a first interlayer insulating film, Forming a diffusion preventing film on the first copper wiring layer; forming a second interlayer insulating film on the diffusion preventing film; and a third on the second interlayer insulating film. A step of forming an interlayer insulating film, a step of processing the second interlayer insulating film and the diffusion prevention film to form a connection hole reaching the first copper wiring layer, and a connection hole in the third interlayer insulating film. A step of forming a corresponding wiring groove, a step of forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove, and a bottom portion of the connection hole by physical etching The barrier metal film is removed, and the top surface of the first copper wiring layer is concave when viewed in cross section. Over the barrier metal film and the first copper wiring layer so as to cover the second interlayer insulating film exposed from the portion other than the bottom of the connection hole by the processing step and the ALD method or the CVD method Forming a film made of one material selected from the group consisting of tantalum nitride, titanium and tungsten, and nitrides and nitrides thereof, and embedding a copper layer in the connection hole and the wiring trench, And a step of forming a second copper wiring layer electrically connected to the wiring layer.

  A fourth invention of the present application is a method for manufacturing a semiconductor device having a multilayer wiring structure, the step of forming a first copper wiring layer on a first interlayer insulating film, a first interlayer insulating film, Forming a diffusion preventing film on the first copper wiring layer; forming a second interlayer insulating film on the diffusion preventing film; and a third on the second interlayer insulating film. A step of forming an interlayer insulating film, a step of processing the second interlayer insulating film and the diffusion prevention film to form a connection hole reaching the first copper wiring layer, and a connection hole in the third interlayer insulating film. A step of forming a corresponding wiring groove, a step of forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove, and a bottom portion of the connection hole by physical etching The second barrier metal film is removed, and the top surface of the first copper wiring layer is viewed in cross section. A step of processing into a concave shape, and covering the second interlayer insulating film exposed from the portion other than the bottom of the connection hole, on the barrier metal film and on the first copper wiring layer, a titanium nitride film, A step of forming a laminated film composed of two or more films selected from the group consisting of a tantalum film, a titanium film and a tungsten film, and a nitride film and a nitride nitride thereof, and a copper layer in the connection hole and the wiring groove And forming a second copper wiring layer that is embedded and electrically connected to the first copper wiring layer, and at least one film constituting the laminated film is formed by an ALD method or a CVD method. The present invention relates to a method for manufacturing a semiconductor device.

  According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device having a multilayer wiring structure, the step of forming a first copper wiring layer on the first interlayer insulating film, and the first interlayer insulating film. And a step of forming a diffusion preventive film on the first copper wiring layer, a step of forming a second interlayer insulating film on the diffusion preventive film, and a third on the second interlayer insulating film. Forming a second interlayer insulating film, processing the second interlayer insulating film and the diffusion prevention film to form a connection hole reaching the first copper wiring layer, and a connection hole in the third interlayer insulating film A step of forming a wiring groove corresponding to the step, a step of forming a barrier metal film on the second interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove, and a physical etching The second barrier metal film at the bottom is removed, and the top surface of the first copper wiring layer is viewed in cross section. Forming a metal-containing film on the barrier metal film and on the first copper wiring layer so as to cover the second interlayer insulating film exposed from the step other than the bottom of the connection hole and the step of processing into the concave shape A step of forming a film made of one material selected from the group consisting of tantalum, titanium and tungsten and nitrides and nitrides of nitride on the metal-containing film, and a connection hole and a wiring groove. And forming a second copper wiring layer that is electrically connected to the first copper wiring layer by embedding the copper layer, and the metal contained in the metal-containing film is highly ductile and has a second interlayer The present invention relates to a method for manufacturing a semiconductor device, wherein the diffusion coefficient in an insulating film is a metal smaller than copper.

  Furthermore, a sixth invention of the present application is a method of manufacturing a semiconductor device having a multilayer wiring structure, the step of forming a first copper wiring layer on the first interlayer insulating film, and the first interlayer insulating film And a step of forming a diffusion preventive film on the first copper wiring layer, a step of forming a second interlayer insulating film on the diffusion preventive film, and a third on the second interlayer insulating film. Forming a second interlayer insulating film, processing the second interlayer insulating film and the diffusion prevention film to form a connection hole reaching the first copper wiring layer, and a connection hole in the third interlayer insulating film A step of forming a wiring groove corresponding to the step, a step of forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove, and a physical etching The second barrier metal film at the bottom is removed, and the top surface of the first copper wiring layer is cross-sectioned. And forming a metal-containing film on the barrier metal film and the first copper wiring layer so as to cover the second interlayer insulating film exposed from the portion other than the bottom of the connection hole A step of forming, and on the metal-containing film, a tantalum nitride film, a tantalum film, a titanium film, and a tungsten film, and two or more films selected from the group consisting of these nitride films and nitride nitride films. Including a step of forming a laminated film and a step of forming a second copper wiring layer that is electrically connected to the first copper wiring layer by embedding a copper layer in the connection hole and the wiring groove. The present invention relates to a method for manufacturing a semiconductor device, wherein the metal contained in the film is a metal having high ductility and a diffusion coefficient in the second interlayer insulating film smaller than that of copper.

  According to the first invention of the present application, a film made of one material selected from the group consisting of tantalum, titanium and tungsten and nitrides and nitrides thereof is formed on the metal-containing film. The second interlayer insulating film exposed by removing the second barrier metal film at the bottom of the substrate can be completely covered with these films including the stepped portion.

  According to the second invention of the present application, on the metal-containing film, two selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film and a tungsten film, and these nitride films and nitride nitride films. Since the laminated film composed of the above films is formed, higher step coverage with respect to the base can be obtained, and adhesion with the seed copper can be improved.

  According to the third invention of the present application, tantalum nitride, titanium and tungsten, and nitrides and nitride nitrides thereof are formed on the barrier metal film and on the first copper wiring layer by ALD or CVD. Since the film made of one material selected from the group consisting of the above is formed, the second interlayer insulating film exposed by removing the second barrier metal film at the bottom of the wiring trench is completely removed including the step portion. Can be coated.

  According to the fourth invention of the present application, a titanium nitride film, a tantalum film, a titanium film and a tungsten film, and their nitride film and nitride nitride are formed on the barrier metal film and the first copper wiring layer. Since the laminated film composed of two or more films selected from the group consisting of these is formed by the ALD method or the CVD method, the second barrier metal film exposed by removing the second barrier metal film at the bottom of the wiring trench The interlayer insulating film can be completely covered including the step portion. Moreover, adhesiveness with seed copper can also be improved.

  According to the fifth invention of the present application, on the metal-containing film, a film made of one material selected from the group consisting of tantalum, titanium and tungsten, and nitrides and nitrides thereof is formed. The second interlayer insulating film exposed by removing the second barrier metal film at the bottom of the wiring trench can be completely covered with these films including the stepped portion.

  Further, according to the sixth invention of the present application, on the metal-containing film, two films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film and a tungsten film, and a nitride film and a nitride nitride film thereof. Since the laminated film composed of the above films is formed, higher step coverage with respect to the base can be obtained, and adhesion with the seed copper can be improved.

Embodiment 1 FIG.
With reference to FIGS. 1-7, the manufacturing method of the semiconductor device by this invention is demonstrated. Note that a normal LSI manufacturing process such as transistor, diffusion layer, and plug formation will be omitted for the sake of convenience, and the metal wiring forming process will be described. Moreover, in FIGS. 1-7, it has shown that the part which attached | subjected the same code | symbol is the same.

  First, as shown in FIG. 1, a semiconductor substrate on which a lower copper wiring layer is formed is prepared. In FIG. 1, 1 is a first interlayer insulating film, 2 is a first barrier metal film, and 3 is a first copper wiring layer. As the first barrier metal film 2, for example, a laminated film made of a tantalum nitride (TaN) film and a tantalum (Ta) film can be used. For example, a silicon substrate can be used as the semiconductor substrate, but the semiconductor substrate is omitted in FIG.

  Next, after forming the diffusion prevention film 4 on the first copper wiring layer 3 and the first interlayer insulation film 1, the second interlayer insulation film 5 and the third interlayer insulation are formed on the diffusion prevention film 4. The film 11 is formed in this order (FIG. 2). An etching stopper film (not shown) such as a SiC film or a SiN film may be provided between the second interlayer insulating film 5 and the third interlayer insulating film 11.

The first interlayer insulating film 1, the second interlayer insulating film 5, and the third interlayer insulating film 11 may be the same film or different films. Further, any two of them may be the same film. For example, in addition to inorganic insulating films such as SiO ₂ film, SiOC film, HSQ (hydrogen silsesquioxane) film, MSQ (methyl silsesquioxane) film, porous HSQ film, and porous MSQ film, organic materials containing fluorine A polymer insulating film or the like can also be used. As the diffusion preventing film 4, for example, a SiN film, a SiC film, a SiCN film, or the like can be used.

  Next, the second interlayer insulating film 5 and the third interlayer insulating film 11 are processed to form a connection hole 6 reaching the first copper wiring layer 3 and a wiring groove 7 corresponding to the connection hole 6 ( FIG. 3). For example, after the second interlayer insulating film 5 and the diffusion preventing film 4 are dry-etched to form the connection hole 6 reaching the first copper wiring layer 3, the third interlayer insulating film 11 corresponds to the connection hole 6. A wiring groove 7 to be formed is formed.

  Next, a second barrier metal film 8 is formed on the third interlayer insulating film 11 so as to cover the inner surfaces of the connection hole 6 and the wiring groove 7 (FIG. 4). For example, the second barrier metal film 8 can be formed by forming a tantalum nitride (TaN) film and a tantalum (Ta) film in this order by the PVD method. Note that the tantalum nitride film may be formed after the tantalum film is formed.

  After the second barrier metal film 8 is formed, physical etching is performed in the same chamber. Thus, after the second barrier metal film 8 formed at the bottom of the connection hole 6 is completely removed, the first copper wiring layer 3 is further processed into a concave shape when viewed in cross section to obtain the structure of FIG. . The etching conditions are adjusted so that the etching rate at the bottom of the connection hole 6 is relatively faster than the etching rate at other portions such as the wiring grooves 7.

  As shown in FIG. 5, by performing physical etching, not only the bottom of the connection hole 6 but also the second barrier metal film 8 at the bottom of the wiring trench 7 is partially removed. Thereby, the second interlayer insulating film 5 is exposed on the surface.

  In the present embodiment, after the physical etching, a tantalum nitride (TaN) film 9 is formed on the entire surface by an ALD (Atomic Layer Deposition) method or a CVD (Chemical Vapor Deposition) method ( FIG. 6). Since the ALD method and the CVD method are film forming methods having excellent step coverage, the second barrier metal film 8 is removed at the bottom of the wiring trench 7 by forming the tantalum nitride film 9 by these methods. The exposed second interlayer insulating film 5 can be completely covered with the tantalum nitride film 9 including the stepped portion.

  After the tantalum nitride film 9 is formed, the second copper wiring layer 10 can be formed by filling the connection holes 6 and the wiring grooves 7 with a copper layer (FIG. 7). The copper layer can be embedded, for example, by using a plating method after forming a copper film (not shown) as seed copper by a sputtering method.

  As described above, according to the present embodiment, after the second barrier metal film 8 at the bottom of the connection hole 6 is removed by physical etching, the tantalum nitride film 9 is formed using the ALD method or the CVD method. Therefore, the step formed by locally removing the second barrier metal film 8 at the bottom of the wiring trench 7 can be completely covered with the tantalum nitride film 9. Therefore, since it is possible to prevent the copper layer 10 and the second interlayer insulating film 5 from coming into direct contact with each other, it is possible to suppress the diffusion of copper into the second interlayer insulating film 5 and to improve the reliability of the semiconductor device. It is possible to improve.

  In the present embodiment, the second barrier metal film 8 is exemplified by a laminated film made of a tantalum nitride film and a tantalum film formed by the PVD method. However, the present invention is not limited to this. is not. For example, as the second barrier metal film 8, a single layer film made of a tantalum nitride film or a tantalum film can be used. Further, as the second barrier metal film 8, a single-layer film or a laminated film made of a refractory metal such as titanium (Ti) and tungsten (W) or a nitride or nitride nitride thereof can be used. The same applies to the first barrier metal film 2.

  In the present embodiment, the tantalum nitride film 9 is formed by ALD or CVD after the second barrier metal film 2 is removed by physical etching. However, the present invention is limited to this. It is not a thing. For example, instead of the tantalum nitride film 9, a film made of refractory metal such as titanium (Ti) and tungsten (W) or nitride or nitride nitride formed by ALD or CVD is formed. Also good. In other words, the second barrier metal film 2 and the first copper wiring layer 3 are made of one material selected from the group consisting of tantalum nitride, titanium and tungsten, and nitrides and nitrides thereof. A film can be formed.

Embodiment 2
A method for manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. Note that a normal LSI manufacturing process such as transistor, diffusion layer, and plug formation will be omitted for the sake of convenience, and the metal wiring forming process will be described. Moreover, in FIGS. 8-10, it has shown that the part which attached | subjected the same code | symbol is the same.

  First, similarly to FIGS. 1 to 3 described in the first embodiment, on the first interlayer insulating film 21 in which the first copper wiring layer 23 is embedded via the first barrier metal film 22. After the diffusion prevention film 24, the second interlayer insulating film 25, and the third interlayer insulating film 32 are formed in this order, the second interlayer insulating film 25 and the third interlayer insulating film 32 are processed, whereby the first A connection hole 26 reaching one copper wiring layer 23 and a wiring groove 27 corresponding to the connection hole 26 are formed. For example, after the second interlayer insulating film 25 and the diffusion prevention film 24 are dry-etched to form the connection hole 26 reaching the first copper wiring layer 23, the third interlayer insulating film 32 corresponds to the connection hole 26. A wiring groove 27 to be formed is formed. An etching stopper film (not shown) such as a SiC film or a SiN film may be provided between the second interlayer insulating film 25 and the third interlayer insulating film 32.

The first interlayer insulating film 21, the second interlayer insulating film 25, and the third interlayer insulating film 32 may be the same film or different films. Further, any two of them may be the same film. For example, in addition to inorganic insulating films such as SiO ₂ film, SiOC film, HSQ (hydrogen silsesquioxane) film, MSQ (methyl silsesquioxane) film, porous HSQ film, and porous MSQ film, organic materials containing fluorine A polymer insulating film or the like can also be used. As the diffusion preventing film 24, for example, a SiN film, a SiC film, a SiCN film, or the like can be used.

  Next, in the same manner as in FIG. 4 described in the first embodiment, the second barrier metal film 28 is formed on the third interlayer insulating film 32 so as to cover the inner surfaces of the connection holes 26 and the wiring grooves 27. Form.

  As the first barrier metal film 22 and the second barrier metal film 28, for example, a laminated film in which a tantalum nitride (TaN) film and a tantalum (Ta) film are formed in this order by the PVD method is used. it can. In this case, the tantalum nitride film may be formed after the tantalum film is formed.

  After the second barrier metal film 28 is formed, the second barrier metal film 28 formed at the bottom of the connection hole 26 by physical etching is completely formed in the same manner as in FIG. 5 described in the first embodiment. Then, the first copper wiring layer 23 is processed into a concave shape when viewed in cross section to obtain the structure shown in FIG. The etching conditions are adjusted so that the etching rate at the bottom of the connection hole 26 is relatively higher than the etching rate at other portions.

  As shown in FIG. 8, by performing physical etching, not only the bottom of the connection hole 26 but also the second barrier metal film 28 at the bottom of the wiring trench 27 is partially removed. As a result, the second interlayer insulating film 25 is exposed on the surface.

  In the present embodiment, after the physical etching described above, a tantalum nitride (TaN) film 29 is formed on the entire surface by using the ALD method or the CVD method, and then further on the tantalum nitride film 29 by the PVD method. A tantalum (Ta) film 30 is formed on the substrate (FIG. 9).

  After the tantalum film 30 is formed, the second copper wiring layer 31 can be formed by filling the connection hole 26 and the wiring groove 27 with a copper layer (FIG. 10). The copper layer can be embedded, for example, by using a plating method after forming a copper film (not shown) as seed copper by a sputtering method.

  According to the present embodiment, the second interlayer insulating film 25 exposed by removing the second barrier metal film 28 at the bottom of the wiring groove 27 is completely covered with the tantalum nitride film 29 including the step portion. Since it can coat | cover, it can suppress that copper diffuses in the 2nd interlayer insulation film 25, and can aim at the improvement of the reliability of a semiconductor device. Further, by providing the tantalum film 30 on the tantalum nitride film 29, the adhesion with the seed copper can be improved, so that the reliability of the semiconductor device can be further improved.

  In the present embodiment, as the second barrier metal film 28, a laminated film composed of a tantalum film and a tantalum nitride film formed by the PVD method is taken as an example, but the present invention is limited to this. is not. For example, a single layer film made of a tantalum film or a tantalum nitride film can be used as the second barrier metal film 28. Further, as the second barrier metal film 28, a single-layer film or a laminated film made of a refractory metal such as titanium (Ti) and tungsten (W) or a nitride or nitride nitride thereof can be used. The same applies to the first barrier metal film 22.

  In the present embodiment, after the second barrier metal film 28 is removed by physical etching, a tantalum nitride film 29 is formed on the entire surface using the ALD method or the CVD method, and then the PVD method is further performed. Thus, the tantalum film 30 is formed on the tantalum nitride film 29, but the present invention is not limited to this. For example, in addition to these films, a stacked film can be formed using a film made of a refractory metal such as titanium (Ti) and tungsten (W), or a nitride or nitride nitride thereof. In other words, tantalum nitride, titanium nitride film, tantalum film, titanium film and tungsten film, and their nitride film and nitride nitride are formed on the second barrier metal film 28 and the first copper wiring layer 23. A laminated film composed of two or more films selected from the group can be formed. However, in any case, the second interlayer insulating film 25 exposed at the bottom of the wiring groove 27 must be completely covered with at least one film constituting the laminated film. For this reason, it is necessary that at least one film constituting the laminated film is formed by the ALD method or the CVD method.

Embodiment 3 FIG.
A method of manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. Note that a normal LSI manufacturing process such as transistor, diffusion layer, and plug formation will be omitted for the sake of convenience, and the metal wiring forming process will be described. Moreover, in FIGS. 11-13, it has shown that the part which attached | subjected the same code | symbol is the same.

  First, similarly to FIGS. 1 to 3 described in the first embodiment, on the first interlayer insulating film 41 in which the first copper wiring layer 43 is embedded via the first barrier metal film 42. After the diffusion prevention film 44, the second interlayer insulating film 45, and the third interlayer insulating film 52 are formed in this order, the second interlayer insulating film 45 and the third interlayer insulating film 52 are processed, whereby the first A connection hole 46 reaching one copper wiring layer 43 and a wiring groove 47 corresponding to the connection hole 46 are formed. For example, after the second interlayer insulating film 45 and the diffusion prevention film 44 are dry-etched to form the connection hole 46 reaching the first copper wiring layer 43, the third interlayer insulating film 52 corresponds to the connection hole 46. A wiring groove 47 to be formed is formed. An etching stopper film (not shown) such as a SiC film or a SiN film may be provided between the second interlayer insulating film 45 and the third interlayer insulating film 52.

The first interlayer insulating film 41, the second interlayer insulating film 45, and the third interlayer insulating film 52 may be the same film or different films. Further, any two of them may be the same film. For example, in addition to inorganic insulating films such as SiO ₂ film, SiOC film, HSQ (hydrogen silsesquioxane) film, MSQ (methyl silsesquioxane) film, porous HSQ film, and porous MSQ film, organic materials containing fluorine A polymer insulating film or the like can also be used. Further, as the diffusion preventing film 44, for example, a SiN film, a SiC film, a SiCN film, or the like can be used.

  Next, as in FIG. 4 described in the first embodiment, the second barrier metal film 48 is formed on the third interlayer insulating film 52 so as to cover the inner surfaces of the connection holes 46 and the wiring grooves 47. Form.

  As the first barrier metal film 42 and the second barrier metal film 48, for example, a laminated film in which a tantalum nitride (TaN) film and a tantalum (Ta) film are formed in this order by the PVD method is used. it can. In this case, the tantalum nitride film may be formed after the tantalum film is formed.

  After the second barrier metal film 48 is formed, the second barrier metal film 48 formed at the bottom of the connection hole 46 by physical etching is completely formed in the same manner as in FIG. 5 described in the first embodiment. Then, the first copper wiring layer 43 is processed into a concave shape when viewed in cross section to obtain the structure of FIG. The etching conditions are adjusted so that the etching rate at the bottom of the connection hole 46 is relatively higher than the etching rate at other portions.

  As shown in FIG. 11, by performing physical etching, not only the bottom of the connection hole 46 but also the second barrier metal film 48 at the bottom of the wiring groove 47 is partially removed.

  In the present embodiment, after the physical etching, an aluminum (Al) film 49 is formed on the entire surface by PVD, and then tantalum (Ta) is formed on the aluminum film 49 by PVD. The film 50 is formed (FIG. 12). Here, the aluminum film 49 is a metal-containing film in the present invention.

  Since aluminum is excellent in ductility, it is generated by softening by heating at the time of film formation by the PVD method or after film formation, and the second barrier metal film 48 is locally removed at the bottom of the wiring groove 47. Relieve the step. Therefore, even if the tantalum film 50 formed thereon is a film formed by the PVD method, it is possible to completely cover the exposed second interlayer insulating film 45 including the steps. That is, the second interlayer insulating film 45 exposed by the removal of the second barrier metal film 48 at the bottom of the wiring groove 47 by the aluminum film 49 and the tantalum film 50 is formed of these films including the step portion. It can be completely coated.

  Since aluminum has a diffusion coefficient smaller than that of copper in the interlayer insulating film, there is no problem even if the aluminum film 49 is in direct contact with the second interlayer insulating film 45.

  After the tantalum film 50 is formed, the second copper wiring layer 51 can be formed by filling the connection holes 46 and the wiring grooves 47 with a copper layer (FIG. 13). The copper layer can be embedded, for example, by using a plating method after forming a copper film (not shown) as seed copper by a sputtering method.

  In the present embodiment, the first copper wiring layer 43 and the aluminum film 49 are in direct contact with each other at the bottom of the connection hole 46. For this reason, in the heat treatment process when forming the second copper wiring layer 51, the alloying of copper and aluminum proceeds, and this also improves the reliability of the semiconductor device. Further, since the tantalum film 50 is formed by the PVD method, it is possible to form a more stable film as compared with the case of forming the film by the ALD method.

  In the present embodiment, the second barrier metal film 48 is exemplified by a laminated film made of a tantalum film and a tantalum nitride film formed by the PVD method, but the present invention is not limited to this. is not. For example, a single layer film made of a tantalum film or a tantalum nitride film can be used as the second barrier metal film 48. Further, as the second barrier metal film 48, a single-layer film or a laminated film made of a refractory metal such as titanium (Ti) and tungsten (W) or a nitride or nitride nitride thereof can be used. The same applies to the first barrier metal film 42.

  In the present embodiment, after the second barrier metal film 48 is removed by etching, an aluminum film 49 is formed on the entire surface using the PVD method, and then the aluminum film 49 is further formed on the aluminum film 49 by the PVD method. However, the present invention is not limited to this.

  In the present invention, if the metal contained in the metal-containing film is a metal having high ductility and a diffusion coefficient in the second interlayer insulating film 45 smaller than copper, a metal-containing film other than the aluminum film 49 is also used. Can do. Further, instead of the tantalum film 50, a film made of a refractory metal such as titanium (Ti) and tungsten (W) or a nitride or nitride nitride thereof can be used. In other words, a film made of one material selected from the group consisting of tantalum nitride, titanium and tungsten, and nitrides and nitrides thereof can be formed on the metal-containing film.

Embodiment 4 FIG.
With reference to FIGS. 14-16, the manufacturing method of the semiconductor device by this invention is demonstrated. Note that a normal LSI manufacturing process such as transistor, diffusion layer, and plug formation will be omitted for the sake of convenience, and the metal wiring forming process will be described. Moreover, in FIGS. 14-16, the part which attached | subjected the same code | symbol has shown that it is the same.

  First, similarly to FIGS. 1 to 3 described in the first embodiment, on the first interlayer insulating film 61 in which the first copper wiring layer 63 is embedded through the first barrier metal film 62. After the diffusion prevention film 64, the second interlayer insulating film 65, and the third interlayer insulating film 73 are formed in this order, the second interlayer insulating film 65 and the third interlayer insulating film 73 are processed, whereby the first A connection hole 66 reaching one copper wiring layer 63 and a wiring groove 67 corresponding to the connection hole 66 are formed. For example, after the second interlayer insulating film 65 and the diffusion preventing film 64 are dry-etched to form the connection hole 66 reaching the first copper wiring layer 63, the third interlayer insulation 73 corresponds to the connection hole 66. A wiring groove 67 is formed. An etching stopper film (not shown) such as a SiC film or a SiN film may be provided between the second interlayer insulating film 65 and the third interlayer insulating film 73.

The first interlayer insulating film 61, the second interlayer insulating film 65, and the third interlayer insulating film 73 may be the same film or different films. Further, any two of them may be the same film. For example, in addition to inorganic insulating films such as SiO ₂ film, SiOC film, HSQ (hydrogen silsesquioxane) film, MSQ (methyl silsesquioxane) film, porous HSQ film, and porous MSQ film, organic materials containing fluorine A polymer insulating film or the like can also be used. Further, as the diffusion preventing film 64, for example, a SiN film, a SiC film, a SiCN film, or the like can be used.

  Next, in the same manner as in FIG. 4 described in the first embodiment, the second barrier metal film 68 is formed on the third interlayer insulating film 73 so as to cover the inner surfaces of the connection holes 66 and the wiring grooves 67. Form.

  As the first barrier metal film 62 and the second barrier metal film 68, for example, a laminated film in which a tantalum nitride (TaN) film and a tantalum (Ta) film are formed in this order by the PVD method is used. it can. In this case, the tantalum nitride film may be formed after the tantalum film is formed.

  After the formation of the second barrier metal film 68, the second barrier metal film 68 formed on the bottom of the connection hole 66 by physical etching is completely removed as in FIG. 5 described in the first embodiment. Then, the first copper wiring layer is processed into a concave shape when viewed in cross section to obtain the structure shown in FIG. The etching conditions are adjusted so that the etching rate at the bottom of the connection hole 66 is relatively faster than the etching rate at other portions.

  As shown in FIG. 14, by performing physical etching, not only the bottom of the connection hole 66 but also the second barrier metal film 68 at the bottom of the wiring groove 67 is partially removed. As a result, the second interlayer insulating film 65 is exposed on the surface.

  In the present embodiment, after the physical etching, an aluminum (Al) film 69 is formed on the entire surface using the PVD method, and then a tantalum nitride (TaN) film 70 is formed using the PVD method. Further, a tantalum (Ta) film 71 is formed by the PVD method (FIG. 15). Here, the aluminum film 69 is a metal-containing film in the present invention.

  As described in the third embodiment, the aluminum film 69 is softened during the PVD deposition or by heating after the deposition, and the second barrier metal film 68 is locally removed at the bottom of the wiring trench 67. The level difference caused by this is alleviated. Therefore, even if the tantalum nitride film 70 formed thereon is a film formed by the PVD method, it is possible to completely cover the exposed second interlayer insulating film 65 including the steps. Furthermore, in the present embodiment, since the tantalum film 71 is further formed on the tantalum nitride film 70, a higher step coverage can be obtained as compared with the third embodiment, and adhesion with seed copper described later is achieved. It can also improve the performance.

  Since aluminum has a diffusion coefficient smaller than that of copper in the interlayer insulating film, there is no problem even if the aluminum film 69 is in direct contact with the second interlayer insulating film 65.

  After the tantalum film 71 is formed, the second copper wiring layer 72 can be formed by filling the connection holes 66 and the wiring grooves 67 with a copper layer (FIG. 16). The copper layer can be embedded, for example, by using a plating method after forming a copper film (not shown) as seed copper by a sputtering method.

  In the present embodiment, the first copper wiring layer 63 and the aluminum film 69 are in direct contact with each other at the bottom of the connection hole 66. For this reason, the alloying of copper and aluminum proceeds in the heat treatment process when forming the second copper wiring layer 72, and this also improves the reliability of the semiconductor device. Further, since the tantalum nitride film 70 and the tantalum film 71 are formed by the PVD method, more stable film formation is possible as compared with the case of forming the film by the ALD method.

  Further, by providing the tantalum film 71 on the tantalum nitride film 70, the adhesion with the seed copper can be improved, so that the reliability of the semiconductor device can be further improved.

  In the present embodiment, as the second barrier metal film 68, a laminated film made of a tantalum film and a tantalum nitride film formed by the PVD method is taken as an example, but the present invention is limited to this. is not. For example, as the second barrier metal film 68, a single layer film made of a tantalum film or a tantalum nitride film can be used. Further, as the second barrier metal film 68, a single-layer film or a laminated film made of a refractory metal such as titanium (Ti) and tungsten (W) or a nitride or nitride nitride thereof can be used. The same applies to the first barrier metal film 62.

  In the present embodiment, after the second barrier metal film 68 is removed by physical etching, an aluminum film 69 is formed on the entire surface using the PVD method, and then the tantalum nitride film 70 is formed by the PVD method. A tantalum film 71 is formed by PVD method. However, the present invention is not limited to this.

  That is, if the metal contained in the metal-containing film has high ductility and the diffusion coefficient in the second interlayer insulating film 65 is smaller than copper, a metal-containing film other than the aluminum film 69 can also be used. .

  In addition to the tantalum nitride film 70 and the tantalum film 71, a laminated film can be formed using a film made of a refractory metal such as titanium (Ti) and tungsten (W), or a nitride or nitride nitride thereof. . In other words, a laminated film composed of two or more films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film, a tungsten film, and a nitride film and a nitride nitride film on the metal-containing film. Can be formed. However, in any case, the second interlayer insulating film 65 exposed at the bottom of the wiring groove 67 must be completely covered with at least one film constituting the laminated film. For this reason, it is necessary that at least one film constituting the laminated film is formed by the ALD method or the CVD method.

8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. 8 is a diagram for describing the method for manufacturing the semiconductor device in Embodiment 1. FIG. FIG. 10 illustrates a method for manufacturing a semiconductor device in a second embodiment. FIG. 10 illustrates a method for manufacturing a semiconductor device in a second embodiment. FIG. 10 illustrates a method for manufacturing a semiconductor device in a second embodiment. 10 is a diagram for explaining the method for manufacturing the semiconductor device in Embodiment 3. FIG. 10 is a diagram for explaining the method for manufacturing the semiconductor device in Embodiment 3. FIG. 10 is a diagram for explaining the method for manufacturing the semiconductor device in Embodiment 3. FIG. FIG. 10 illustrates a method for manufacturing a semiconductor device in a fourth embodiment. FIG. 10 illustrates a method for manufacturing a semiconductor device in a fourth embodiment. FIG. 10 illustrates a method for manufacturing a semiconductor device in a fourth embodiment.

Explanation of symbols

1, 2, 41, 61 First interlayer insulating film 2, 22, 42, 62 First barrier metal film 3, 23, 43, 63 First copper wiring layer 4, 24, 44, 64 Diffusion prevention film 5 , 25, 45, 65 Second interlayer insulating film 6, 26, 46, 66 Connection hole 7, 27, 47, 67 Wiring groove 8, 28, 48, 68 Second barrier metal film 9, 29, 70 Tantalum nitride Films 10, 31, 51, 72 Second copper wiring layer 30, 50, 71 Tantalum film 49, 69 Aluminum film 11, 32, 52, 73 Third interlayer insulating film

Claims (10)

A semiconductor device having a multilayer wiring structure,
The multilayer wiring structure includes a first interlayer insulating film,
A first copper wiring layer formed on the first interlayer insulating film;
A diffusion barrier film formed on the first interlayer insulating film;
A second interlayer insulating film formed on the diffusion barrier film;
A second copper wiring layer electrically connected to the first copper wiring layer through a connection hole formed in the second interlayer insulating film;
A barrier metal film formed on the side wall of the connection hole and the inner surface of the second copper wiring layer;
A metal-containing film that is formed on the barrier metal film and on the first copper wiring layer and covers the second interlayer insulating film exposed from a portion other than the bottom of the connection hole;
A film made of one material selected from the group consisting of tantalum, titanium and tungsten, and nitrides and nitrides thereof, formed on the metal-containing film,
The metal contained in the metal containing film is a metal having high ductility and a diffusion coefficient smaller than copper in the second interlayer insulating film. A semiconductor device having a multilayer wiring structure,
The multilayer wiring structure includes a first interlayer insulating film,
A first copper wiring layer formed on the first interlayer insulating film;
A diffusion barrier film formed on the first interlayer insulating film;
A second interlayer insulating film formed on the diffusion barrier film;
A second copper wiring layer electrically connected to the first copper wiring layer through a connection hole formed in the second interlayer insulating film;
A barrier metal film formed on the side wall of the connection hole and the inner surface of the second copper wiring layer;
A metal-containing film that is formed on the barrier metal film and on the first copper wiring layer and covers the second interlayer insulating film exposed from a portion other than the bottom of the connection hole;
A laminate formed on the metal-containing film and composed of two or more films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film and a tungsten film, and a nitride film and a nitride nitride film thereof. And having a membrane
The metal contained in the metal containing film is a metal having high ductility and a diffusion coefficient smaller than copper in the second interlayer insulating film.   The semiconductor device according to claim 1, wherein the metal is aluminum.   The barrier metal film is composed of any one single layer film or two or more films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film, a tungsten film, and a nitride film and a nitride nitride film thereof. The semiconductor device according to claim 1, wherein the semiconductor device is a laminated film. A method of manufacturing a semiconductor device having a multilayer wiring structure,
Forming a first copper wiring layer on the first interlayer insulating film;
Forming a diffusion barrier film on the first interlayer insulating film and the first copper wiring layer;
Forming a second interlayer insulating film on the diffusion barrier film;
Forming a third interlayer insulating film on the second interlayer insulating film;
Processing the second interlayer insulating film and the diffusion barrier film to form a connection hole reaching the first copper wiring layer;
Forming a wiring groove corresponding to the connection hole in the third interlayer insulating film;
Forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove;
Removing the barrier metal film at the bottom of the connection hole by physical etching, and further processing the upper surface of the first copper wiring layer into a concave shape when viewed in cross section;
Nitrid on the barrier metal film and on the first copper wiring layer so as to cover the second interlayer insulating film exposed from the portion other than the bottom of the connection hole by ALD or CVD. Forming a film made of one material selected from the group consisting of tantalum, titanium and tungsten and nitrides and nitrides thereof;
And a step of forming a second copper wiring layer that is electrically connected to the first copper wiring layer by embedding a copper layer in the connection hole and the wiring groove. . A method of manufacturing a semiconductor device having a multilayer wiring structure,
Forming a first copper wiring layer on the first interlayer insulating film;
Forming a diffusion barrier film on the first interlayer insulating film and the first copper wiring layer;
Forming a second interlayer insulating film on the diffusion barrier film;
Forming a third interlayer insulating film on the second interlayer insulating film;
Processing the second interlayer insulating film and the diffusion barrier film to form a connection hole reaching the first copper wiring layer;
Forming a wiring groove corresponding to the connection hole in the third interlayer insulating film;
Forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove;
Removing the second barrier metal film at the bottom of the connection hole by physical etching and further processing the upper surface of the first copper wiring layer into a concave shape when viewed in cross section;
A titanium nitride film, a tantalum film, on the barrier metal film and on the first copper wiring layer so as to cover the second interlayer insulating film exposed from a portion other than the bottom of the connection hole Forming a laminated film composed of two or more films selected from the group consisting of a titanium film and a tungsten film and a nitride film and a nitride nitride thereof;
Burying a copper layer in the connection hole and the wiring groove to form a second copper wiring layer electrically connected to the first copper wiring layer,
At least one film constituting the laminated film is formed by an ALD method or a CVD method. A method of manufacturing a semiconductor device having a multilayer wiring structure,
Forming a first copper wiring layer on the first interlayer insulating film;
Forming a diffusion barrier film on the first interlayer insulating film and the first copper wiring layer;
Forming a second interlayer insulating film on the diffusion barrier film;
Forming a third interlayer insulating film on the second interlayer insulating film;
Processing the second interlayer insulating film and the diffusion barrier film to form a connection hole reaching the first copper wiring layer;
Forming a wiring groove corresponding to the connection hole in the third interlayer insulating film;
Forming a barrier metal film on the second interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove;
Removing the second barrier metal film at the bottom of the connection hole by physical etching and further processing the upper surface of the first copper wiring layer into a concave shape when viewed in cross section;
Forming a metal-containing film on the barrier metal film and on the first copper wiring layer so as to cover the second interlayer insulating film exposed from a portion other than the bottom of the connection hole;
Forming a film made of one material selected from the group consisting of tantalum, titanium and tungsten, and nitrides and nitrides thereof on the metal-containing film;
Burying a copper layer in the connection hole and the wiring groove to form a second copper wiring layer electrically connected to the first copper wiring layer,
The method of manufacturing a semiconductor device, wherein the metal contained in the metal-containing film is a metal having high ductility and a diffusion coefficient smaller than copper in the second interlayer insulating film. A method of manufacturing a semiconductor device having a multilayer wiring structure,
Forming a first copper wiring layer on the first interlayer insulating film;
Forming a diffusion barrier film on the first interlayer insulating film and the first copper wiring layer;
Forming a second interlayer insulating film on the diffusion barrier film;
Forming a third interlayer insulating film on the second interlayer insulating film;
Processing the second interlayer insulating film and the diffusion barrier film to form a connection hole reaching the first copper wiring layer;
Forming a wiring groove corresponding to the connection hole in the third interlayer insulating film;
Forming a barrier metal film on the third interlayer insulating film so as to cover the inner surface of the connection hole and the wiring groove;
Removing the second barrier metal film at the bottom of the connection hole by physical etching and further processing the upper surface of the first copper wiring layer into a concave shape when viewed in cross section;
Forming a metal-containing film on the barrier metal film and on the first copper wiring layer so as to cover the second interlayer insulating film exposed from a portion other than the bottom of the connection hole; ,
On the metal-containing film, a laminated film composed of two or more films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film, a tungsten film, and these nitride films and nitride nitride films is formed. And a process of
Burying a copper layer in the connection hole and the wiring groove to form a second copper wiring layer electrically connected to the first copper wiring layer,
The metal contained in the metal-containing film is a metal having a high ductility and a diffusion coefficient in the second interlayer insulating film smaller than that of copper.   The method for manufacturing a semiconductor device according to claim 5, wherein the metal is aluminum.   The barrier metal film is composed of any one single layer film or two or more films selected from the group consisting of a tantalum nitride film, a tantalum film, a titanium film, a tungsten film, and a nitride film and a nitride nitride film thereof. The method for manufacturing a semiconductor device according to claim 5, wherein the method is a laminated film.

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