JPH11275063A - Digital transmitter - Google Patents

Digital transmitter

Info

Publication number
JPH11275063A
JPH11275063A JP10094043A JP9404398A JPH11275063A JP H11275063 A JPH11275063 A JP H11275063A JP 10094043 A JP10094043 A JP 10094043A JP 9404398 A JP9404398 A JP 9404398A JP H11275063 A JPH11275063 A JP H11275063A
Authority
JP
Japan
Prior art keywords
power supply
clock
transmitter
digital transmission
standby
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10094043A
Other languages
Japanese (ja)
Inventor
Toru Tsuchida
徹 土田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Engineering Ltd
Original Assignee
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Engineering Ltd filed Critical NEC Engineering Ltd
Priority to JP10094043A priority Critical patent/JPH11275063A/en
Publication of JPH11275063A publication Critical patent/JPH11275063A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To obtain a digital transmitter of simple configuration and low power consumption. SOLUTION: Interface sections 25-28 and clock sections 21-24 of a signal processing section 29 between data transmitter-receiver sets are configured redundantly. Furthermore, a couple of clock reception sections and clock distribution sections are connected redundantly to the signal processing section 29. Furthermore, an individual on-board power supply is provided to each section connected redundantly. Moreover, the transmitter is provided with a 2:1 selector that supplied power from the on-board power supply energized by a supplied power and selects either of two clock inputs, whether the transmitter is in an active state or in a standby state is recognized by an active/standby control signal. When the transmitter is in the active state, the transmitter is operated normally. When the transmitter is in a standby state, a function of stopping power supply, of stopping the output power of the on-board power supply or stopping a clock input is brought into the standby state.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、デジタル伝送装
置、特に冗長構成をとっているデジタル伝送装置に関す
る。
The present invention relates to a digital transmission apparatus, and more particularly to a digital transmission apparatus having a redundant configuration.

【0002】[0002]

【従来の技術】ネットワークの発達により、伝送線を介
して多量のデジタルデータを伝送する必要性は益々増加
している。現代社会はコンピュータに高度に依存してお
り、万一これらコンピュータを接続するデジタル伝送装
置に故障が発生した場合の影響は極めて大きい。
BACKGROUND OF THE INVENTION With the development of networks, the need to transmit large amounts of digital data over transmission lines is increasing. Modern society is highly dependent on computers, and if a failure occurs in a digital transmission device connecting these computers, the effect is extremely large.

【0003】そこで、デジタル伝送装置にあっては、信
頼性の向上と、万一故障が生じた場合の復旧を迅速に行
うことが必須である。その為に、デジタル伝送装置にあ
っては冗長構成を採用し、一方の装置に万一故障が発生
した場合には、直ちに予備装置に切替えることにより故
障を復旧させサービスのダウンタイムを最小にすること
が一般的に行われている。
Therefore, it is essential for a digital transmission device to improve reliability and to quickly recover from a failure should it occur. For this reason, the digital transmission device adopts a redundant configuration, and in the event that a failure occurs in one of the devices, immediately switches to the spare device to recover from the failure and minimize service downtime. This is commonly done.

【0004】斯る冗長構成のデジタル伝送装置として
は、図3に示す如き構成が考えられる。装置17と装置
20間でデジタルデータの送受信を行うものとする。装
置17,20には夫々送信回路17a,20aと、相手
装置からの受信データを選択する2対1セレクタ17
b,20bとを含んでいる。両装置17,20間には、
冗長構成の1対の装置18,19が配置され、両装置1
8,19には電源供給回路PSから動作電力が供給され
ると共にクロック発生器CLKからクロックパルスが入
力される。
As a digital transmission device having such a redundant configuration, a configuration as shown in FIG. 3 can be considered. It is assumed that digital data is transmitted and received between the device 17 and the device 20. The devices 17 and 20 include transmission circuits 17a and 20a, respectively, and a two-to-one selector 17 for selecting data received from a partner device.
b, 20b. Between the two devices 17 and 20,
A pair of devices 18 and 19 in a redundant configuration are arranged,
Operating power is supplied to power supply circuits 8 and 19 from a power supply circuit PS, and a clock pulse is input from a clock generator CLK.

【0005】斯る冗長構成のデジタル伝送装置による
と、装置17の送信データは送信回路17aから装置1
8又は19を介して2対1セレクタ20bにより受信さ
れる。同様に、装置20の送信データは、送信回路20
aから装置18又は19を介して装置17の2対1セレ
クタ17bにより受信される。このように、装置18,
19を冗長構成とすることにより、現用装置(例えば1
8)が万一故障した場合には予備装置(例えば19)に
迅速に切り替えられて通信が維持されることとなる。こ
の構成によると、両装置18,19が同時に故障する確
率は極めて低いので、両装置17,20間のデータ通信
の信頼性が向上する。換言すると、実質的に常時デジタ
ル伝送を可能にする。
According to the digital transmission device having such a redundant configuration, the transmission data of the device 17 is transmitted from the transmission circuit 17a to the device 1
8 or 19 via the 2: 1 selector 20b. Similarly, the transmission data of the device 20 is
a is received by the two-to-one selector 17b of the device 17 via the device 18 or 19. Thus, the device 18,
19 has a redundant configuration, so that the active device (for example, 1
In the event that 8) fails, it is quickly switched to a standby device (for example, 19) and communication is maintained. According to this configuration, the probability that both devices 18 and 19 will fail at the same time is extremely low, so that the reliability of data communication between both devices 17 and 20 is improved. In other words, it enables digital transmission substantially always.

【0006】[0006]

【発明が解決しようとする課題】図3に示す如き冗長デ
ジタル伝送装置によると、1対の装置18,19を迅速
に交代(切り替え)可能であるが、1対の冗長装置1
8,19を必要とするので高価となるのみならず、両装
置18,19には電源供給回路PSから動作電力が常時
供給され且つクロックCLKが入力されるので、消費電
力が大きく運転効率が悪いという欠点がある。
According to the redundant digital transmission device as shown in FIG. 3, the pair of devices 18 and 19 can be quickly replaced (switched), but the pair of redundant devices 1
In addition to the fact that the devices 8 and 19 are required, not only is the device expensive, but also the devices 18 and 19 are constantly supplied with operating power from the power supply circuit PS and input with the clock CLK, so that the power consumption is large and the operation efficiency is poor. There is a disadvantage that.

【0007】そこで、本発明の目的は、比較的簡単な構
成で且つ比較的低消費電力であるデジタル伝送装置を提
供することにある。
It is an object of the present invention to provide a digital transmission device having a relatively simple configuration and relatively low power consumption.

【0008】[0008]

【課題を解決するための手段】前述の課題を解決するた
め、本発明によるデジタル伝送装置は、次のような特徴
的構成を採用している。
In order to solve the above-mentioned problems, a digital transmission device according to the present invention employs the following characteristic configuration.

【0009】(1)第1装置及び第2装置間でデジタル
データを送受信するために前記第1及び第2装置間に信
号処理装置が接続されたデジタル伝送装置において、前
記信号処理装置には1対のインタフェース部が冗長接続
され、現用及び予備用として選択使用されるデジタル伝
送装置。
(1) In a digital transmission device in which a signal processing device is connected between the first and second devices for transmitting and receiving digital data between the first device and the second device, the signal processing device includes A digital transmission device in which a pair of interface units is redundantly connected and is selectively used as a working or protection device.

【0010】(2)前記信号処理装置には1対のクロッ
ク受信部及びクロック分配部が冗長接続されている
(1)のデジタル伝送装置。
(2) The digital transmission device according to (1), wherein a pair of a clock receiving unit and a clock distribution unit are redundantly connected to the signal processing device.

【0011】(3)前記冗長接続部には個別のオンボー
ド電源を有する(1)又は(2)のデジタル伝送装置。
(3) The digital transmission device according to (1) or (2), wherein the redundant connection section has a separate on-board power supply.

【0012】(4)供給電源から電力が供給されるオン
ボード電源からの電源を受け、2つのクロック入力のう
ち一方を選択する2対1セレクタを備え、現用/予備制
御信号により、現用系か予備系かを認識し、現用系の場
合には正常に動作させ、予備系であれば、供給電源33
を停止させる、オンボード電源34の出力電源を停止さ
せる、または、クロック入力を停止させる機能を待機状
態とする(1)のデジタル伝送装置。
(4) A two-to-one selector is provided for receiving power from an on-board power supply to which power is supplied from a power supply and selecting one of two clock inputs. It recognizes whether it is a standby system and operates normally in the case of the active system.
The digital transmission device according to (1), in which the function of stopping the output power of the on-board power supply 34 or stopping the clock input is set to a standby state.

【0013】[0013]

【発明の実施の形態】以下、本発明のデジタル伝送装置
の好適実施形態を添付図、特に図1及び図2を参照して
説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the digital transmission apparatus according to the present invention will be described below with reference to the accompanying drawings, in particular, FIGS.

【0014】図1は、本発明のデジタル伝送装置の好適
実施形態の構成ブロック図である。信号処理部29に
は、主信号0系(例えば現用)インタフェース部25,
27と主信号1系(例えば予備)インタフェース部2
6,28が冗長構成で接続されている。また、信号処理
部29にはクロック0系及びクロック1系のクロック受
信部21,22及びクロック分配部23,24が冗長構
成されている。これら、インタフェース部25〜28、
クロック受信部21,22及びクロック分配部23,2
4への切り替え制御信号31を発生する切り替え制御部
32を有する。また、上述した全ての素子に動作電力を
供給する電源供給回路PSを有する。切り替え制御部3
2には、各部からの警報30が入力される。
FIG. 1 is a block diagram showing a configuration of a preferred embodiment of a digital transmission apparatus according to the present invention. The signal processing unit 29 includes a main signal 0 system (for example, working) interface unit 25,
27 and main signal 1 system (for example, spare) interface unit 2
6, 28 are connected in a redundant configuration. In the signal processing unit 29, clock receiving units 21 and 22 and clock distribution units 23 and 24 of the clock 0 system and the clock 1 system are redundantly configured. These interface units 25 to 28,
Clock receivers 21 and 22 and clock distributors 23 and 2
4 has a switching control unit 32 for generating a switching control signal 31. In addition, a power supply circuit PS for supplying operating power to all the above-described elements is provided. Switching control unit 3
2, an alarm 30 from each unit is input.

【0015】このように、故障が生じ易いインタフェー
ス部25〜28とクロック部21〜24を冗長構成と
し、他の部分は単一構成とすることにより、比較的簡単
な構成でしかも安価且つ低消費電力のデジタル伝送装置
が実現できる。
As described above, since the interface units 25 to 28 and the clock units 21 to 24, which are likely to cause a failure, have a redundant configuration, and the other units have a single configuration, the configuration is relatively simple and the cost and power consumption are low. A digital power transmission device can be realized.

【0016】図2は、図1の冗長構成において消費電力
を低減するのに好適な構成を示す構成ブロック図であ
る。供給電源33から電力が供給されるオンボード電源
(例えば、スイッチングレギュレータ)34、その出力
電源を受け、クロック入力35,36を選択する2対1
セレクタ39及び入力信号37と出力信号38を入出力
する回路42とを備える。この装置は、現用/予備制御
信号40と試験信号41を受け、警報信号43を発生す
る。
FIG. 2 is a configuration block diagram showing a configuration suitable for reducing power consumption in the redundant configuration of FIG. An on-board power supply (for example, a switching regulator) 34 to which power is supplied from a power supply 33, and a two-to-one receiving the output power and selecting clock inputs 35 and 36
The circuit includes a selector 39 and a circuit 42 that inputs and outputs the input signal 37 and the output signal 38. The device receives a working / standby control signal 40 and a test signal 41 and generates an alarm signal 43.

【0017】図2の装置にあっては、現用/予備制御信
号40により、現用系か予備系かを認識させる。現用系
の場合には正常に動作させる。予備系であれば、次の3
通りのいずれかでその機能を待機状態とする。 供給電源33を停止させる。 オンボード電源34の出力電源を停止させる。 クロック入力35,36を停止させる。 これら3通りの方法はからの順序で消費電力の低減
効果は下がることとなる。
In the apparatus shown in FIG. 2, the active / standby control signal 40 is used to identify whether the system is active or standby. In the case of the active system, it operates normally. If it is a standby system,
The function is put on standby in any of the streets. The power supply 33 is stopped. The output power of the on-board power supply 34 is stopped. The clock inputs 35 and 36 are stopped. In these three methods, the power consumption reduction effect decreases in the order from the beginning.

【0018】以上、本発明のデジタル伝送装置の好適実
施形態を詳述したが、本発明の要旨を逸脱することなく
種々の変形変更が可能である。
Although the preferred embodiment of the digital transmission apparatus of the present invention has been described in detail, various modifications and changes can be made without departing from the gist of the present invention.

【0019】[0019]

【発明の効果】以上説明したように、本発明のデジタル
伝送装置によれば、インタフェース部とクロック部とを
冗長構成としているので、装置構成構成を簡単且つ安価
にすると共に低消費電力で安定したデジタル伝送装置が
得られるという実用上の効果を有する。
As described above, according to the digital transmission apparatus of the present invention, since the interface section and the clock section have a redundant configuration, the configuration of the apparatus is simple and inexpensive, and it is stable with low power consumption. This has a practical effect that a digital transmission device can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明によるデジタル伝送装置の好適実施形態
の一例を示す構成ブロック図である。
FIG. 1 is a configuration block diagram illustrating an example of a preferred embodiment of a digital transmission device according to the present invention.

【図2】本発明の実施形態における低消費電力化を図る
デジタル伝送装置のブロック図である。
FIG. 2 is a block diagram of a digital transmission device for reducing power consumption according to an embodiment of the present invention.

【図3】冗長構成のデジタル伝送装置のブロック図であ
る。
FIG. 3 is a block diagram of a digital transmission device having a redundant configuration.

【符号の説明】[Explanation of symbols]

17 第1装置 20 第2装置 29 信号処理部 25〜28 インタフェース部 21,22 クロック受信部 23,24 クロック分配部 34 オンボード電源 32 切り替え制御部 17 First device 20 Second device 29 Signal processing unit 25-28 Interface unit 21, 22 Clock receiving unit 23, 24 Clock distribution unit 34 On-board power supply 32 Switching control unit

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】第1装置及び第2装置間でデジタルデータ
を送受信するために前記第1及び第2装置間に信号処理
装置が接続されたデジタル伝送装置において、 前記信号処理装置には1対のインタフェース部が冗長接
続され、現用及び予備用として選択使用されることを特
徴とするデジタル伝送装置。
1. A digital transmission device in which a signal processing device is connected between said first and second devices for transmitting and receiving digital data between a first device and a second device, wherein said signal processing device has one pair. The digital transmission device is characterized in that the interface unit is redundantly connected and is selectively used as an active or a standby.
【請求項2】前記信号処理装置には1対のクロック受信
部及びクロック分配部が冗長接続されている請求項1に
記載のデジタル伝送装置。
2. The digital transmission device according to claim 1, wherein a pair of a clock receiving unit and a clock distribution unit are redundantly connected to the signal processing device.
【請求項3】前記冗長接続部には個別のオンボード電源
を有する請求項1又は2に記載のデジタル伝送装置。
3. The digital transmission device according to claim 1, wherein the redundant connection unit has a separate on-board power supply.
【請求項4】供給電源から電力が供給されるオンボード
電源からの電源を受け、2つのクロック入力のうち一方
を選択する2対1セレクタを備え、現用/予備制御信号
により、現用系か予備系かを認識し、現用系の場合には
正常に動作させ、予備系であれば、供給電源33を停止
させる、オンボード電源34の出力電源を停止させる、
または、クロック入力を停止させる機能を待機状態とす
る請求項1に記載のデジタル伝送装置。
4. A two-to-one selector for receiving power from an on-board power supply to which power is supplied from a power supply and selecting one of two clock inputs, and using a current / standby control signal to determine whether a current system or a standby system is used. It recognizes whether it is a system, operates normally in the case of the active system, stops the power supply 33 in the case of the standby system, stops the output power of the on-board power supply 34,
2. The digital transmission device according to claim 1, wherein a function of stopping clock input is set to a standby state.
JP10094043A 1998-03-23 1998-03-23 Digital transmitter Pending JPH11275063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10094043A JPH11275063A (en) 1998-03-23 1998-03-23 Digital transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10094043A JPH11275063A (en) 1998-03-23 1998-03-23 Digital transmitter

Publications (1)

Publication Number Publication Date
JPH11275063A true JPH11275063A (en) 1999-10-08

Family

ID=14099550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10094043A Pending JPH11275063A (en) 1998-03-23 1998-03-23 Digital transmitter

Country Status (1)

Country Link
JP (1) JPH11275063A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6629776B2 (en) * 2000-12-12 2003-10-07 Mini-Mitter Company, Inc. Digital sensor for miniature medical thermometer, and body temperature monitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6629776B2 (en) * 2000-12-12 2003-10-07 Mini-Mitter Company, Inc. Digital sensor for miniature medical thermometer, and body temperature monitor

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