JPH11274459A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce white scratches, fixed pattern noise and random noise, by reducing a leak current generated on a substrate interface. SOLUTION: A solid-state image pick up device is provided with a photoelectric conversion part 20 formed on a semiconductor substrate, an amplifying transistor 2-1-1 modulated by signal charges accumulated by photoelectric conversion of the photoelectric conversion part 20, and read transistors (21, 22) which read a signal current from the amplifying transistor 2-1-1 from the photoelectric conversion part 20. The difference between the gate voltage of the read transistor and the reverse potential of the semiconductor substrate, namely, read potential Φ, is reduced, by setting the threshold value of the read transistor at a high value, within a range wherein reading of the signal charge from the photoelectric converting part 20 can be performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a solid-state imaging device.

[0002]

2. Description of the Related Art For example, each pixel in a MOS solid-state imaging device is modulated by a photoelectric conversion unit formed on a semiconductor substrate and performing photoelectric conversion, and a signal charge accumulated by photoelectric conversion by the photoelectric conversion unit. The amplifier includes an amplifying transistor, a read transistor for reading a signal current from the amplifying transistor, a selection transistor for selecting a line to be read, and a reset transistor for resetting signal charges accumulated by photoelectric conversion.

FIG. 4A is a simplified cross-sectional view of a conventional photoelectric conversion unit and a readout transistor.
(B) is a potential diagram at the time of operation of the read transistor.

In FIG. 4A, reference numeral 30 denotes a photoelectric conversion layer,
31 is a read gate, and 32 is a signal read drain. The signal converted from light into electrons in the photoelectric conversion layer 30 and stored is transferred to the signal read drain 32 by applying a signal read voltage (eg, 3.3 V) to the read gate 31 and turning on the read gate 31. Is done.

[0005]

However, in the above-mentioned conventional MOS type solid-state imaging device, much damage is applied to the semiconductor substrate interface during the semiconductor manufacturing process. Other than that, a leak current may occur. Since the leak current depends on the read gate voltage and differs for each pixel, there has been a problem that image unevenness such as image defect and fixed pattern noise occurs.

The solid-state imaging device of the present invention has been made in view of such a problem, and an object thereof is to reduce a leak current generated at a substrate interface by reducing a read gate voltage. Another object of the present invention is to provide a solid-state imaging device capable of reducing white scratches, fixed pattern noise, and random noise.

[0007]

According to a first aspect of the present invention, there is provided a solid-state imaging device comprising: a photoelectric conversion unit formed on a semiconductor substrate; An amplification transistor that is modulated by the read signal charge, and a reading transistor that reads a signal current from the amplification transistor from the photoelectric conversion unit, and sets a threshold value of the reading transistor to read the signal charge from the photoelectric conversion unit. By setting as high as possible, the difference between the gate voltage of the read transistor and the inversion potential of the semiconductor substrate is reduced.

Further, a solid-state imaging device according to a second aspect of the present invention
A photoelectric conversion unit formed on a semiconductor substrate, an amplification transistor that is modulated by signal charges accumulated by photoelectric conversion by the photoelectric conversion unit, and a reading transistor that reads a signal current from the amplification transistor from the photoelectric conversion unit. And by setting the gate voltage of the read transistor low within a range in which signal charges can be read from the photoelectric conversion unit, the difference between the gate voltage of the read transistor and the inversion potential of the semiconductor substrate is reduced. .

Further, a solid-state imaging device according to a third aspect of the present invention comprises:
In the solid-state imaging device according to a second aspect, a gate voltage of the read transistor is reduced only when a signal charge is read from the photoelectric conversion unit.

Further, a solid-state imaging device according to a fourth aspect of the present invention is
The solid-state imaging device according to the second or third aspect of the present invention further includes a power supply for driving the solid-state imaging device, and a bleeder circuit is provided between the power supply and a gate of the readout transistor.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an outline of an embodiment of the present invention will be described. Various methods have been conventionally proposed for reducing the leakage current, which is the current generated at the substrate interface. In the present embodiment, attention has been paid to reducing the gate voltage applied to the substrate during reading. That is, the difference between the gate voltage of the readout transistor and the inversion potential of the substrate is made as small as possible within a range in which signal charges can be read from the photoelectric conversion layer, while the single power supply used in the MOS solid-state imaging device is employed as it is. To do it. This allows
Leakage current, which is a current generated at the substrate interface, is reduced, and white flaws, fixed pattern noise, and random noise can be reduced.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows an amplification type MOS to which the present invention is applied.
FIG. 2 is an example of a circuit diagram of a solid-state imaging device called a sensor.
The solid-state imaging device includes photodiodes 1-1-1 and 1-1-1.
-1-2, to 1-3-3) and photodiode 1-
Amplifying transistors 2-1-1, 2-1-2,..., Which read signals from 1-1, 1-1-2,.
-3-3 and vertical selection transistors 3-1-1, 3-1-2,..., 3-3-3 for selecting a line from which a signal is read out
And 3 × 3 unit cells including reset transistors 4-1-1, 4-1-2,..., 4-3-3 for resetting signal charges are two-dimensionally arranged. Actually, more unit cells are arranged. The horizontal address lines 6-1, 6-2 and 6-3 wired in the horizontal direction from the vertical shift register 5 are connected to the vertical selection transistors 3-1.
-1, 3-1-2,..., 3-3-3, determine the line from which a signal is read out.

The reset lines 7-1, 7-2, 7-3
Are reset transistors 4-1-1, 4-1-2,.
It is connected to the gate of 4-3-3. The sources of the amplifying transistors 2-1-1, 2-1-2,..., 2-3-3 are connected to the vertical signal lines 8-1, 8-2, 8-3. Transistors 9-1, 9-2, 9-
3 are provided. The load transistor 9-1 at the other end,
The sources of 9-2 and 9-3 are connected to the horizontal signal line 11,
The gate is connected to the horizontal shift register 10 via a horizontal selection transistor (not shown).

FIG. 2A is a simplified cross-sectional view of a photoelectric conversion unit and a read transistor for describing a first embodiment of the present invention, and FIG. 2B is a potential diagram of the read transistor during operation. FIG. Here, FIG.
An example of one cell will be described.

In the cross-sectional view of FIG.
A photoelectric conversion layer corresponding to the photodiode 1-1-1 of
21 is a read gate, and 22 is a signal read drain. This drain 22 is connected to the amplification transistor 2 described above.
-1-1 gate and reset transistor 4-1
1 source.

In the first embodiment of the present invention, as shown in FIG. 2B, the threshold value of the read transistor at which the gate voltage becomes H level is higher than the conventional threshold value shown in FIG. 4B. With this arrangement, the difference between the gate voltage of the read transistor and the inversion potential of the semiconductor substrate is reduced, that is, the read potential Φ is made smaller (eg, smaller than the conventional read potential Φ shown in FIG. Φ =
2.5V). However, the threshold value of the read transistor needs to be lower than the potential level of the photoelectric conversion layer 20 when the read gate potential is at the H level so that the signal charges of the photoelectric conversion layer 20 can be read. In addition, the maximum signal amount of the read signal needs to satisfy device characteristics.

In this manner, it is possible to lower the substantial voltage applied to the substrate interface, to reduce the current generated at the substrate interface, and to reduce the associated white flaws, fixed pattern noise and random noise. Can be.

Here, as a method of increasing the threshold value of the read transistor, a case where the transistor is an N-MOS and an impurity diffusion layer of, for example, boron is formed for threshold control before forming the read gate of the read transistor. Can increase the threshold by increasing the amount of impurities. When an impurity diffusion layer of, for example, phosphorus or arsenic is formed for threshold control, a desired threshold can be obtained by reducing the amount of the impurity. By using such a process method, the threshold value can be increased without further adding a circuit.

FIG. 3A is a simplified cross-sectional view of a photoelectric conversion unit and a read transistor for describing a second embodiment of the present invention, and FIG. 3B is a diagram showing the potential of the read transistor during operation. FIG. The feature of the second embodiment is that the signal read potential Φ is reduced (for example, Φ =) by effectively lowering the read gate voltage of the read transistor (moving the H level upward).
2.5V) to obtain the same effect as the first embodiment. However, the threshold value of the read transistor needs to be lower than the potential level of the photoelectric conversion layer 20 when the read gate potential is at the H level so that the signal charges of the photoelectric conversion layer 20 can be read. Further, it is the same as in the first embodiment that the maximum signal amount of the read signal needs to satisfy the device characteristics.

Here, in order to lower the read gate voltage, a resistor such as a bleeder circuit may be inserted between the power supply and the read gate. In this case, the power supply pulse is turned ON only at the time of reading, so that the accumulated signal charges are reduced only when the gate voltage of the reading transistor is read.

As described above, the read gate voltage is reduced only at the time of reading, and the read gate voltage is made equal to the power supply voltage at the time of reset or charge injection / discharge. Thereby, the potential of the storage node (drain) can be set high at the time of reset, and the problem that a signal remains in the photoelectric conversion layer 30 at the time of signal discharge is eliminated, and unevenness in darkness and white flaws generated at the time of reading is reduced. be able to.

[0022]

According to the present invention, since the read gate voltage is made substantially small, the leakage current generated at the substrate interface is reduced, and white flaws, fixed pattern noise and random noise are reduced. it can.

[Brief description of the drawings]

FIG. 1 is an example of a circuit diagram of a solid-state imaging device called an amplification type MOS sensor to which the present invention is applied.

FIG. 2A is a simplified cross-sectional view of a photoelectric conversion unit and a read transistor for describing a first embodiment of the present invention, and FIG. 2B is a potential diagram during operation of the read transistor; .

FIG. 3A is a simplified cross-sectional view of a photoelectric conversion unit and a read transistor for describing a second embodiment of the present invention, and FIG. 3B is a potential diagram during operation of the read transistor; .

FIG. 4A is a simplified cross-sectional view of a conventional photoelectric conversion unit and a readout transistor, and FIG. 4B is a potential diagram during operation of the readout transistor.

[Explanation of symbols]

1-1-1, 1-1-2, 1-3-3 ... photodiode 2-1-1, 2-1-2, 2-3-3 ... amplifying transistor 3-1-1, 3-1 2, 3-3-3: vertical selection transistor; 4-1-1, 4-1-2, 4-3-3: reset transistor, 5: vertical shift register, 6-1, 6-2, 6-3 ... horizontal address lines, 7-1, 7-2, 7-3 ... reset lines, 8-1, 8-2, 8-3 ... vertical signal lines, 9-1, 9-2, 9-3 ... load transistors Reference numeral 11: horizontal signal line; 10, horizontal shift register; 20, 30, photoelectric conversion layer; 21, 31, read gate; 22, 32, signal read drain.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tetsuya Yamaguchi 1st Toshiba R & D Center, Komukai-ku, Kawasaki-shi, Kanagawa Prefecture (72) Inventor Hiroshi Yamashita Hiroshi Yamashita Toshiba Komukai-shi, Kawasaki-shi, Kanagawa No. 1 Town Co., Ltd.Toshiba R & D Center (72) Inventor Akira Makabe No. 1 Komukai Toshiba Town, Koyuki-ku, Kawasaki City, Kanagawa Prefecture Co., Ltd.Toshiba Tamagawa Factory (72) Inventor Eiko Nomachi Kawasaki City, Kanagawa Prefecture No. 1, Komukai Toshiba-cho, Sachi-ku Co., Ltd. Inside the Toshiba Tamagawa Plant (72) Inventor Mikiko Hori No. 1, Komukai Toshiba-cho, Kochi-ku, Kawasaki, Kanagawa Pref. 1, Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi Toshiba R & D Center

Claims (4)

[Claims] 1. A photoelectric conversion unit formed on a semiconductor substrate, an amplification transistor modulated by signal charges accumulated by photoelectric conversion by the photoelectric conversion unit, and a signal current from the amplification transistor from the photoelectric conversion unit. A read transistor for reading the read signal, by setting a threshold value of the read transistor as high as possible in a range in which signal charges can be read from the photoelectric conversion unit, so that a gate voltage of the read transistor and an inversion potential of the semiconductor substrate. A solid-state imaging device characterized in that the difference between the two is reduced. 2. A photoelectric conversion unit formed on a semiconductor substrate, an amplification transistor modulated by signal charges accumulated by photoelectric conversion by the photoelectric conversion unit, and a signal current from the amplification transistor from the photoelectric conversion unit. A read transistor for reading the data, and setting the gate voltage of the read transistor as low as possible in a range in which the signal charges can be read from the photoelectric conversion unit, thereby inverting the gate voltage of the read transistor and the inversion of the semiconductor substrate. A solid-state imaging device having a reduced potential difference. 3. The solid-state imaging device according to claim 2, wherein a gate voltage of the read transistor is reduced only when a signal charge is read from the photoelectric conversion unit. 4. The solid-state imaging device according to claim 3, further comprising a power supply for driving the solid-state imaging device, and a bleeder circuit provided between the power supply and a gate of the readout transistor. Imaging device.