JPH1126508A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of reducing the production cost and having a high operation reliability. SOLUTION: An interposer 1 is provided, which has a semiconductor chip mounted portion 2a located on the rear surface of an insulating body 2, a plurality of bumps 3a formed in the vicinities, and a conductor circuit pattern 3b accompanied with the bumps. Then a semiconductor chip 6 is fixed to a semiconductor chip mounting portion 2a of the interposer 1, and an electrode 6a of the semiconductor chip 6 is connected to the conductor circuit pattern 3b with a thin metal wire 8 and covered with a sealing resin 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a semiconductor chip mounting interposer.

[0002]

2. Description of the Related Art The structure of a conventional QFP type semiconductor device will be described with reference to FIG. QF shown in FIG.
The P-type semiconductor device 30 is the most general semiconductor device. More specifically, as shown in FIG. 2B, the semiconductor chip 6 is bonded on the die pad 23 forming a part of the lead frame by the die bonding material 7. The electrode pads (not shown) on the semiconductor chip 6 and the inner leads 24 which also form part of the lead frame are connected by bonding wires 8 made of gold or the like. Then, the whole of them is transfer-molded with the sealing resin 25, and outer leads 26 for input and output are provided around the sealing resin 25.

Further, a BGA type semiconductor device is shown in FIG.
This will be described with reference to FIG. This type of semiconductor device 40
It has recently been proposed as a structure for relaxing the pitch of package external terminals in response to an increase in the number of input / output terminals of the semiconductor chip 6. Specifically, a resin circuit board 27 is used in which conductive circuit patterns (not shown) are formed on both front and back surfaces and are electrically connected to each other by through holes. That is, as shown in FIG. 3B, the semiconductor chip 6 is bonded to a predetermined position of the resin substrate 27 by the die bonding material 7, and the electrode pads on the semiconductor chip 6 and the conductive circuit patterns on the resin substrate 27 (not shown). ) Are connected by a bonding wire 8 made of gold or the like. The semiconductor chip 6, the bonding wires 8, and the conductor circuit pattern are transfer-molded with a sealing resin 25, and solder balls 28 are provided on the back surface of the resin substrate 27 as input / output external terminals. These external terminals 2
8 shows a resin substrate 27 as shown in the back view of FIG.
Since they are arranged in a two-dimensional array on the surface, the terminal pitch can be made wider than that of a semiconductor device such as a QFP arranged around.

Next, the structure and manufacturing method of a conventional semiconductor device using a film carrier will be described with reference to FIGS. 15 and 16, taking a BGA type as an example. As shown in FIGS. 15A and 15B, a method for manufacturing a film carrier in one element unit is as follows: a conductive circuit pattern is formed by etching a conductor 3 of a two-layer base material composed of an insulator 2 and a conductor 3; 3b is formed. Then, as shown in FIG. 15C, the portion of the insulator 2 corresponding to the external electrode is also removed by etching to form the external electrode portion 2b, and thereafter, as shown in FIG. As described above, the insulating film 29 is applied to the portion of the conductor circuit pattern 3b where the semiconductor chip is mounted. Through these steps, a desired film carrier (interposer for mounting a semiconductor chip) 50 is obtained.
Further, in the method of manufacturing a semiconductor device using the film carrier 50, as shown in FIG. 16A, the semiconductor chip 6 is bonded on the insulating film 29 of the film carrier 50 by the die bonding material 7, and As shown in (b), the electrode pads 6a of the semiconductor chip 6 and the bonding portions on the conductive circuit patterns 3b are connected by a bonding wire 8 such as gold on a heated heat column. After a while
As shown in FIG. 16 (c), it is mounted on a mold, and molten resin 25 is injected from the gate of the mold, and the semiconductor chip 6, the bonding wires 8, and the conductive circuit pattern 3b are formed. Seal the bond.
Then, as shown in FIG. 16 (d), a plurality of solder ball electrodes 31 are formed on the external electrode portion 2b on the back surface of the film carrier 50, mounted on a dedicated outer shape cutting die, and placed at a predetermined position. The semiconductor device 60 is completed by cutting the film.

[0005]

However, the above-mentioned conventional semiconductor device has the following problems. In the semiconductor device 30 of the QFP type shown in FIG. 13, the number of the outer leads 26 around the semiconductor device 30 increases as the number of input / output terminals increases, so that the size of the semiconductor device 30 increases, Since the area increases and the wiring length also increases, there is a problem that electrical characteristics are deteriorated. Further, in the BGA type semiconductor device 40 shown in FIG. 14, since it is necessary to establish an electrical connection between the front and back surfaces of the resin substrate 27, fine through holes are formed.
There is a problem in that a process such as plating is involved therein, and in addition to technical difficulties, the cost of an interposer for mounting a semiconductor chip and the cost of a package are increased. In the case where the solder ball 28 is used as an external electrode in the BGA type semiconductor device 40, since the solder is a relatively soft metal, the solder ball 28 is deformed by the socket in the final measurement step or burn-in step. There is also a problem that soldering is easily caused when mounted on a circuit board. Further, when a type having the solder ball 28 as an external electrode is mounted on a circuit board and then put into a thermal cycle test, the interface between the solder and the interposer for mounting the semiconductor chip or the inside of the solder is generated relatively quickly or in a short cycle. There is also a problem that cracks occur and cause poor contact.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide a semiconductor device and a semiconductor chip mounting interposer which can reduce the manufacturing cost and have high operation reliability. I have.

[0007]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a semiconductor chip mounting method comprising a sheet-like or tape-like insulator and a conductor provided on the back surface of the insulator. In a semiconductor device having an interposer, a semiconductor chip mounting portion for mounting a semiconductor chip is provided on a back surface of an insulator of the interposer for mounting a semiconductor chip, and a plurality of external terminals formed by etching a conductor are provided. A conductor circuit pattern attached to the external terminal of the raised floor is provided around the semiconductor chip mounting portion, the semiconductor chip is fixed to the semiconductor chip mounting portion of the semiconductor chip mounting interposer, and the electrode pads of the semiconductor chip and The configuration is such that the conductor circuit pattern is connected with a thin metal wire and the semiconductor chip is sealed with a resin. With this configuration, the semiconductor chip mounting interposer can be obtained by processing only one side, and thus the process is simplified. Further, since the external terminals are formed of a conductor integrated with the conductor circuit pattern, the resistance to temperature changes due to cold is enhanced.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention. The semiconductor device 10 is a BGA type device, in which a semiconductor chip 6 is mounted on the back surface of a semiconductor chip mounting interposer 1 (hereinafter simply referred to as “interposer 1”), and the semiconductor chip 6 is sealed. It has a structure covered with a sealing resin 9. Specifically, Interposer 1
Is a plurality of protrusions 3a (hereinafter, referred to as "bumps 3a") provided around a rectangular insulator 2 and a semiconductor chip mounting portion 2a of the insulator 2 and plated with Ni / Au or the like. Is provided. The bump 3a is a conductor,
A conductive circuit pattern 3b is provided inside the base. The semiconductor chip 6 is bonded to the semiconductor chip mounting portion 2a of the insulator 2 via a die bonding material 7, and the electrode pad 6a is connected to the conductive circuit pattern 3b via a gold wire 8 which is a thin metal wire. Have been.

Next, a method of manufacturing the semiconductor device 10 having the above configuration will be described. 2 is a manufacturing process diagram of the interposer 1, FIG. 3 is a rear view thereof, and FIG. 4 is a manufacturing process diagram of the semiconductor device. First, Interposer 1
To manufacture. That is, as shown in FIGS. 2A and 2B, a plurality of bumps 3a serving as external terminals are formed by half-etching on a conductor 3 portion of a two-layer base material composed of an insulator 2 and a conductor 3. . Then, as shown in FIG. 2C, the conductor circuit pattern 3b attached to the bump 3a and the semiconductor chip mounting portion 2 for mounting the semiconductor chip are also formed on the portion thinned by half etching.
a is formed. Thereafter, as shown in FIG.
The plating 4 such as Ni / Au is applied to the bumps 3a and the conductive circuit patterns 3b. Thus, a desired interposer 1 as shown in FIG. 3 is obtained. The interposer 1 shown in the figure is an interposer for one element, and has 40 external terminals (bumps) 3a arranged in a line. Reference numeral 35 indicates an area where a semiconductor chip can be mounted.

[0010] Then, the semiconductor chip 6 is mounted on the interposer 1 manufactured as described above to manufacture the semiconductor device 10. That is, as shown in FIG. 4A, the semiconductor chip 6 is bonded to the semiconductor chip mounting portion 2a of the interposer 1 by the die bonding material 7, and then, as shown in FIG.
As shown in (1), the electrode pads 6a of the semiconductor chip 6 and the bonding portions on the conductive circuit patterns 3b are connected by gold wires 8 on a heated heat column. Next, as shown in FIG. 4C, the liquid sealing resin 9 is dropped and cured to seal the bonding portions on the semiconductor chip 6, the wire 8, and the conductor circuit pattern 3b. 4 (d)
As shown in (1), the final shape of the semiconductor device 10 is obtained by cutting the outer shape of the insulator 2 using a cutting die or the like.

(Second Embodiment) FIG. 5 is a sectional view showing a semiconductor device according to a second embodiment of the present invention. The semiconductor device 12 of this embodiment is also a BGA type device, but differs from the first embodiment in that the interposer 11 has a heat radiation function. That is, in the interposer 11, a conductor 31 which is a metal plate on which plating 4 is applied is provided on the surface of the insulator 2, and a hole 2c for mounting a semiconductor chip is formed in a portion of the insulator 2 where the semiconductor chip 6 is mounted. Has been established. The conductor 31 exposed in the hole 2c
The semiconductor chip 6 is provided with the die bonding material 7 on the conductor surface 31c.
And the semiconductor chip 6, the gold wire 8, and the conductive circuit pattern 3b are covered with the sealing resin 9, thereby forming the semiconductor device 12. Other configurations are the same as those of the semiconductor device 10 according to the first embodiment, and thus description thereof is omitted.

Next, a method of manufacturing the semiconductor device 12 having the above configuration will be described. FIG. 6 is a manufacturing process diagram of the interposer 11, and FIG. 7 is a manufacturing process diagram of the semiconductor device 12. First, as shown in FIGS. 6A and 6B,
A plurality of bumps 3a are formed on the conductor 3 by half-etching on a three-layer substrate composed of the conductor 31, the conductor 3, and the insulator 2 sandwiched between these two layers. Then, as shown in FIG. 6C, the conductor circuit pattern 3b and the semiconductor chip mounting portion 2a are also formed by etching on the thinned portion of the conductor 3. Thereafter, as shown in FIG. 6D, the portion of the insulator corresponding to the semiconductor chip mounting portion 2a is removed to form the hole 2 so that the conductor surface 31c is exposed.
Form c. Finally, as shown in FIG. 6E, the desired interposer 11 is obtained by plating the bumps 3a and the plate-shaped conductors 31 with Ni / Au or the like.

Then, the semiconductor chip 6 is mounted on the interposer 11 manufactured as described above to manufacture the semiconductor device 12. That is, as shown in FIG. 7A, the hole 2 for mounting the semiconductor chip of the
c, the semiconductor chip 6 is bonded to the conductive surface 31c left in the form of a plate with a die bonding material 7, and the electrode pads 6a of the semiconductor chip 6 and the bonding portions on the conductive circuit patterns 3b are heated. Is connected with the gold wire 8 on the heat column. Next, FIG.
As shown in (2), the liquid sealing resin 9 is dropped and cured to seal the bond portions on the semiconductor chip 6, the gold wire 8, and the conductive circuit pattern 3b. Finally, as shown in FIG. 7C, the conductor 31 is cut by a cutting die or the like.
By cutting the outer shape of the insulator 2 and the
2 to obtain the final form.

In the semiconductor device 12 of this embodiment, since the semiconductor chip 6 is directly fixed on the heat radiating plate by regarding the plate-shaped conductor 31 as a heat radiating plate, the semiconductor device 12 has excellent heat radiating characteristics. Become. In order to further improve the heat dissipation, as shown in FIG. 8, the heat dissipation fins 20 and the like are placed on the conductor 31 serving as the heat dissipation plate by the die bonding material 7.
It can be achieved by attaching by means such as.

Third Embodiment FIG. 9 is a plan view showing a main part of a semiconductor device according to a third embodiment of the present invention. As shown in FIG. 9, an interposer 13 of a semiconductor device according to this embodiment has substantially the same configuration as the interposers 1 and 11 of the first and second embodiments.
The difference is that the external terminals (bumps) 3a are arranged in two rows. Incidentally, in FIG.
Is an area where a semiconductor chip can be mounted. With such a configuration, the interposer 13 having the external terminals 3a arranged in two rows as shown in FIG. 9 can be obtained in a process similar to the process of manufacturing the interposer 1 and the like.
The semiconductor device using the interposer 13 is assembled through the same steps as those of the first and second embodiments, whereby the external terminals 3a arranged in two rows are formed.
Semiconductor device having the following.

The semiconductor device obtained in this embodiment is:
Since the external terminals 3a are arranged in two rows, the size of the semiconductor chip 6 that can be mounted is more restricted than in the single-row type, but the number of terminals in the outer peripheral row is reduced. The area can be reduced. here,
Comparing the plan views of the interposer shown in FIGS. 3 and 9, these figures show the case where external terminals 3 a having the same number of terminals and the same terminal pitch (terminal spacing) are arranged in one and two rows. In the interposer 9, the size of the semiconductor chip that can be mounted is smaller than that of FIG. 3 due to the arrangement of the terminals in two rows, but the outer size of the semiconductor device 13 is smaller.

(Fourth Embodiment) FIG. 10 is a sectional view showing a semiconductor device according to a fourth embodiment of the present invention.
Although the semiconductor device 15 of this embodiment is also a BGA type device, the semiconductor chip 6 is mounted on the surface side of the insulator 2, the gold wire 8 is passed through the conduction hole 2 d of the insulator 2, and the semiconductor chip 6 and the conductor circuit are connected. It differs from the first to third embodiments in that the pattern 3b is electrically connected. Specifically, in the interposer 14, the bump 3a and the conductor circuit pattern 3b are formed on the back surface of the insulator 2,
Plating 4 is applied to the surface of bump 3a, and insulating film 21 is attached to the surface of conductive circuit pattern 3b. The semiconductor chip 6 is adhered to the surface of the insulator 2, and a through hole 2 d is formed in the insulator 2.
The plating 4 applied to the conductor circuit pattern 3b in the conduction hole 2d and the electrode pad 6a of the semiconductor chip 6 are connected by a gold wire 8.

Next, a method of manufacturing the semiconductor device 15 having the above configuration will be described. FIG. 11 shows the interposer 14
FIG. 12 is a manufacturing process diagram of the semiconductor device 15. First, as shown in FIGS. 11A to 11C, a conductor 3 of a two-layer base made of an insulator 2 and a conductor 3 is used.
A plurality of bumps 3a are formed on the portion by half etching, and a conductive circuit pattern 3b is also formed on the thinned portion by etching. Then, as shown in FIG. 11D, the conductor circuit pattern 3b is protected and insulated by the insulating film 21 or the like. Finally, as shown in FIG. 11E, a semiconductor chip mounting portion 2e and a conduction hole 2d formed by removing a peripheral portion of the semiconductor chip mounting portion 2e are provided on the surface of the insulator 2. A part of the conductor circuit pattern 3b is exposed in the conduction hole 2d.
Then, the bump 3a and the exposed conductive circuit pattern 3b
By applying plating 4 such as Ni / Au to the portions, a desired interposer 14 is obtained.

Then, the semiconductor chip 6 is mounted on the surface of the interposer 14 manufactured as described above, and the semiconductor device 15 is manufactured. That is, first, as shown in FIG. 12A, the semiconductor chip 6 was bonded to the semiconductor chip mounting portion 2e of the interposer 14 by the die bonding material 7, and the electrode chip 6a of the semiconductor chip 6 was partially exposed. The conductive circuit pattern 3b is connected to the conductive circuit pattern 3b with the gold wire 8 on the heated heat column using the conduction hole 2d. Next, as shown in FIG. 12 (b), the semiconductor chip 6, the gold wire 8, and the conductive circuit pattern 3b are mounted on the mold and the molten mold resin 22 is injected from the gate of the mold. Seal the upper bond. Then, as shown in FIG. 12C, the final form of the semiconductor device 15 is obtained by cutting the outer shape of the insulator 2 using a cutting die or the like.

In this embodiment, instead of the sealing by dropping the liquid resin 9 shown in FIGS. 4 and 7, the sealing by the molding resin 22 (transfer molding) using a molding die is used as follows. For such reasons.
When the sealing is performed by dropping the liquid resin 9, the sealing shape is determined by the clay and the surface tension of the liquid resin 9. In addition, the surface always becomes a certain curved surface at the time of formation. On the other hand, when a semiconductor device is mounted on a circuit board, the top surface of the semiconductor device is generally held by vacuum suction and mounted on the circuit board, so that the top surface of the semiconductor device is a constant horizontal surface. Otherwise, vacuum suction cannot be performed. Therefore, as in this embodiment, in a semiconductor device 15 of which the upper surface needs to be sealed, a fixed horizontal surface is formed by the mold resin 22 using a mold.

The present invention is not limited to the above embodiment, and various modifications and changes can be made within the scope of the present invention. In each of the above embodiments, the BGA
Although the semiconductor device has been described as an example, the present invention is not limited to this. For example, a semiconductor device having an external terminal (external electrode) formed within the size of a mold resin even if it is an LGA type or PGA type semiconductor device. If so, any of them can be applied.

[0022]

As described above in detail, according to the semiconductor device of the present invention, a conductor circuit pattern and external terminals are formed on one surface of an insulator of an interposer by etching, and a semiconductor chip is provided at a predetermined position of the insulator. The semiconductor chip was fixed to the interposer where the mounting part was formed, and the electrode pads on this semiconductor chip and the conductive circuit pattern were electrically connected by thin metal wires. As a result, there is no need to form a through-hole for establishing conduction between both surfaces or to perform a step such as plating on the through-hole. Further, since the external terminals are formed on the interposer, a step of mounting solder balls or the like is not required. Further, if the resin sealing is performed with a liquid resin, the process can be simplified, for example, a transfer mold is not required. From this point, by using the semiconductor device of the present invention, an excellent effect that the manufacturing cost can be reduced can be obtained. Furthermore, the processing technique used in the present invention can be performed by general etching or plating, and the process of assembling a semiconductor device is not different from the process of assembling a general conventional resin-encapsulated semiconductor device. Infrastructure can be used, and as a result, manufacturing equipment costs can be reduced. In addition, since the external terminals are formed of a rigid metal body integrated with the conductor circuit pattern, the difference between the thermal expansion and contraction between the substrate and the semiconductor device when mounted on a circuit board and subjected to a thermal cycle test. The external terminals themselves are not destroyed even if the stress due to the above occurs in the external terminals. That is, the resistance to the temperature environment is enhanced. Also, conventional BGA type semiconductor devices are:
Since the external terminals are arranged in a two-dimensional array on the lower surface of the semiconductor device, the soldering inspection after mounting on the circuit board is impossible visually, and it is necessary to use an X-ray inspection or the like. In the semiconductor device of the present invention, by arranging the external terminals in a row on the outer peripheral portion of the semiconductor device, it is possible to easily visually inspect the soldering failure after mounting on the circuit board. Further, by arranging the external terminals of the interposer in two rows, the size of the semiconductor chip that can be mounted is reduced, but the external size of the semiconductor device can be smaller than before, and the device can be made more compact. it can.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of a semiconductor chip mounting interposer applied to the semiconductor device of FIG. 1;

FIG. 3 is a rear view of the interposer for mounting a semiconductor chip of FIG. 1;

FIG. 4 is a manufacturing process diagram of the semiconductor device of FIG. 1;

FIG. 5 is a sectional view showing a semiconductor device according to a second embodiment of the present invention.

6 is a manufacturing process diagram of a semiconductor chip mounting interposer applied to the semiconductor device of FIG. 5;

FIG. 7 is a manufacturing process diagram of the semiconductor device of FIG. 5;

FIG. 8 is a cross-sectional view showing a state in which a radiation fin is attached to the semiconductor device of FIG. 5;

FIG. 9 is a back view showing a main part of a semiconductor device according to a third embodiment of the present invention.

FIG. 10 is a sectional view showing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 11 is a manufacturing process diagram of a semiconductor chip mounting interposer applied to the semiconductor device of FIG. 10;

FIG. 12 is a manufacturing process diagram of the semiconductor device of FIG. 10;

13A and 13B are a rear view and a cross-sectional view showing a conventional QFP type semiconductor device.

14A and 14B are a back view and a cross-sectional view showing a conventional BGA type semiconductor device.

FIG. 15 is a manufacturing process diagram of a semiconductor chip mounting interposer applied to the semiconductor device of FIG. 14;

16 is a view showing the manufacturing process of the semiconductor device of FIG. 14;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Interposer for mounting a semiconductor chip, 2 ... Insulator, 2a, 2e ... Semiconductor chip mounting portion, 2c ... Hole for mounting a semiconductor chip, 2d ... Conducting hole, 3, 31 ... Conductor, 3a ... Convex portion (bump) ), 3b: conductor circuit pattern, 6: semiconductor chip, 6a: electrode pad, 8
... Fine metal wires.

[Procedure amendment]

[Submission date] October 13, 1997

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction contents]

[0005]

However, the above-mentioned conventional semiconductor device has the following problems. In the semiconductor device 30 of the QFP type shown in FIG. 13, the number of the outer leads 26 around the semiconductor device 30 increases as the number of input / output terminals increases, so that the size of the semiconductor device 30 increases, Since the area increases and the wiring length also increases, there is a problem that electrical characteristics are deteriorated. Further, in the BGA type semiconductor device 40 shown in FIG. 14, since it is necessary to establish an electrical connection between the front and back surfaces of the resin substrate 27, fine through holes are formed.
There is a problem in that a process such as plating is involved therein, and in addition to technical difficulties, the cost of an interposer for mounting a semiconductor chip and the cost of a package are increased. In the case where the solder ball 28 is used as an external electrode in the BGA type semiconductor device 40, since the solder is a relatively soft metal, the solder ball 28 is deformed by the socket in the final measurement step or burn-in step. There is also a problem that soldering is easily caused when mounted on a circuit board. Furthermore, when a type having the solder ball 28 as an external electrode is mounted on a circuit board and then subjected to a thermal cycle test, the interface between the solder and the semiconductor chip mounting interposer or the inside of the solder is relatively quickly or in a short cycle. There is also a problem that cracks occur and connection failure occurs.

[Procedure amendment 2]

[Document name to be amended] Drawing

[Correction target item name] Figure 3

[Correction method] Change

[Correction contents]

FIG. 3

[Procedure amendment 3]

[Document name to be amended] Drawing

[Correction target item name] Fig. 9

[Correction method] Change

[Correction contents]

FIG. 9

Claims (3)

[Claims] A sheet- or tape-shaped insulator;
And a semiconductor chip mounting interposer having a conductor provided on the back surface of the insulator, wherein the semiconductor chip mounting portion for mounting the semiconductor chip is insulated from the semiconductor chip mounting interposer. A plurality of protrusions as external terminals formed by etching the conductor and a conductor circuit pattern associated with the external terminals are provided around the semiconductor chip mounting portion, and the semiconductor chip is provided on the back surface of the body. The semiconductor chip mounting interposer is fixed to a semiconductor chip mounting portion, and the electrode pads of the semiconductor chip and the conductor circuit patterns are connected by thin metal wires, and the semiconductor chip is resin-sealed. Semiconductor device. 2. The semiconductor device according to claim 1, wherein a metal plate is fixed to a surface of the insulator of the interposer for mounting a semiconductor chip, and the metal plate is attached to a portion of the insulator corresponding to the semiconductor chip mounting portion. A hole for mounting a semiconductor chip is provided so that a part of the metal plate is exposed. The semiconductor chip is fixed in the hole for mounting the semiconductor chip, and an electrode pad of the semiconductor chip and the conductive circuit pattern are metallized. A semiconductor device, wherein the semiconductor chip is connected with a thin wire and the semiconductor chip is sealed with a resin. 3. The semiconductor device according to claim 1, wherein said semiconductor chip mounting portion is provided on a surface of said insulator, and is provided around said semiconductor chip mounting portion and communicates with a part of said conductive circuit pattern. A hole is formed, the semiconductor chip is fixed to the semiconductor chip mounting portion, and an electrode pad of the semiconductor chip and the conductive circuit pattern are connected by a thin metal wire passing through the conductive hole. A semiconductor device, which is sealed.