JPH11261594A - Packet preferential reception processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To immediately execute a processing without waiting for the processing at the time of receiving a preferential packet by transmitting the interruption signal of a level corresponding to priority added in packet data to MPU. SOLUTION: A packet transmission part 1-2 transmits a packet written by MPUI-1 to a transmission line 1-3 in accordance with a written order. In a reception side, a packet reception part 1-8 is provided with buffers 1-4 to 1-6 which sequentially take in the packets from the transmission line 1-3. The respective buffers take in the packets and hold a content until a reception processing completes. An interruption request device 1-7 discriminates priority written in the packet and transmits an interruption signal corresponding to priority to MPU1-11 when the packets of the respective buffers 1-4 to 1-6 are taken in. MPU 1-11 executes an interruption processing by the interruption level of the interruption signal received from the interruption request device 1-7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a packet priority reception processing method, and more particularly to a packet priority reception processing method using an MPU interrupt.

[0002]

2. Description of the Related Art ATM (Asynchronous Transfer Mode) using AAL-5 (ATM adaptation layer level 5)
As a priority control method for packet data communication of an interface, for example, Japanese Patent Application Laid-Open No. 9-23244 discloses a method of transmitting a non-priority packet on the transmission side for the purpose of efficiently transmitting a priority packet without increasing the processor load. If there is a transmission request of a priority packet during the transmission, the transmitted data of the non-priority packet is divided into the first half packet a, and the untransmitted data is divided into the second half packet b, and a code indicating the division is attached, and the transmission of the first packet a is performed. After the completion, the priority packet is transmitted, and then the second half packet b is transmitted. The receiving side monitors the code, suspends the reception completion processing even if the first half packet a is received, and processes the next received priority packet. After that, when the latter half packet b is received, the first half packet a and the latter half packet b are processed as a combined packet. Accordingly, the method to perform the priority processing of the priority packet is proposed.

[0003]

However, the above-mentioned conventional method has the following problems.

[0004] The first problem is that while a single packet is being received on the receiving side, even if there is a packet to be processed with priority, it is necessary to wait until the processing of the receiving packet is completed. It must be.

[0005] The reason is that in data reception, it is impossible to interrupt the reception processing.

A second problem is that when a specific packet is preferentially communicated, the transmitting side and the receiving side must
In each case, a process of dividing and recombining a non-priority packet is required, which makes the process complicated and slow.

The reason is that packet reception processing is performed in the order of arrival of packets, and priority packets need to be transmitted at least as soon as possible at the time of transmission, and when a priority packet transmission request occurs during non-priority packet transmission, This is because the non-priority packet is divided into the first half packet and the second half packet.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made in view of the above problems, and has as its object to provide a packet priority reception processing method capable of performing processing immediately without waiting for processing when receiving a priority packet. Is to provide.

Another object of the present invention is to provide a packet priority reception processing method which simplifies and speeds up reception processing of priority packets.

It is still another object of the present invention to provide a packet priority control method which simplifies and speeds up transmission and reception of priority packets.

[0011]

The packet priority reception processing method of the present invention that achieves the above object has the following features. (1) Priority reception processing of a packet is performed by recognizing a priority added to received packet data and transmitting an interrupt signal of a level corresponding to the priority to an MPU that processes the received packet data. Do. (2) Even when the MPU is receiving one packet data, if the MPU receives a packet having a higher priority than the interrupt level currently being processed due to the level of the interrupt signal to the MPU, The processing is switched to the reception processing of the packet with the higher priority. (3) The transmission side adds priority information to the packet.

[0012]

Embodiments of the present invention will be described below. In the packet priority control system of the present invention, in a preferred embodiment, the receiving side receives packet data and holds the buffer until the reception processing is completed (1-4, 1-5, 1-6 in FIG. 1). ), And an interrupt request device (1-7 in FIG. 1) for recognizing the priority information of the packet added to the packet and transmitting an interrupt signal to the MPU. 1-8) and an MPU (1-11 in FIG. 1) for executing an interrupt process according to the interrupt signal level (1-9 and 1-10 in FIG. 1) from the interrupt request device.

Further, the packet priority control system of the present invention
In the preferred embodiment, the transmitting side sends an MPU (1--1 in FIG. 1) for writing priority information to a packet to be transmitted.
1), and a packet transmission unit (1--3 in FIG. 1) for transmitting packet data to the transmission path (1-3 in FIG. 1) in the written order.
2).

In the embodiment of the present invention, when a packet having priority information added on the transmitting side is received, the interrupt request device on the receiving side sends an interrupt signal of a level corresponding to the priority to the MPU. To send to. If the interrupt signal is a higher-level interrupt signal than the packet currently being received, the MPU process shifts to the process of receiving the high-priority packet that caused the interrupt. The processing returns to the reception processing of the packet whose processing has been interrupted. Thus, even when one packet is being received, the receiving process can be performed immediately upon receiving the priority packet.

Further, according to the embodiment of the present invention, the packet can be processed preferentially by adding a high priority on the transmitting side to achieve the purpose.
Transmission processing and reception processing can be simplified and speeded up.

[0016]

Next, in order to describe the above-mentioned embodiment of the present invention in more detail, an embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 1, as a transmitting side, an MPU
(Microprocessor unit) 1-1 writes a packet to which priority is added to packet transmitting section 1-2.

The packet transmitting section 1-2 transmits the packets written by the MPU 1-1 to the transmission path 1-3 in the order of writing.

As a receiving side, the packet transmitting section 1-8 includes:
Buffer 1 for sequentially taking packets from transmission path 1-3
-4, 1-5, and 1-6, and each buffer retains the contents after receiving the packet until the reception processing is completed.

When a packet is taken into each of the buffers 1-4 to 1-6, the interrupt request device 1-7 determines a priority written in the packet, and determines an interrupt signal according to the priority. Is transmitted to the MPU 1-11.

In the present embodiment, there are two interrupt signals to the MPU 1-11 corresponding to the priority order. Among them, the interrupt signal 1-9 is a signal corresponding to the priority order 1, the interrupt level 1 and the interrupt signal 10 Is a signal corresponding to the priority 2 and has an interrupt level of 2.

The MPU 1-11 performs an interrupt process according to the interrupt level of the interrupt signal received from the interrupt request device 1-7. That is, when the level of the interrupt signal from the interrupt request device 1-7 is higher than the interrupt processing currently being performed,
Execute the interrupt processing corresponding to it.

Next, the operation of the receiving process according to the present embodiment will be described with reference to FIG.

The MPU 1-1 on the transmitting side performs communication by writing "1" in the packet as the priority of the normally transmitted non-priority packet and sending it to the packet transmitting unit 1-2.

When transmitting a priority packet, the priority is set to "2" and the packet is written in the packet, and the same processing is performed.

The higher the numerical value of the priority, the higher the priority of the packet processing at the time of reception. In this example, the priority 1 is assigned to the packet data 1 and the priority 1 is assigned to the packet data 2 as an example.
Is written in the packet data 3 and the priority 2 is written to the packet data 3 and sent to the packet transmitting unit 1-2 in order.

The packet transmitting section 1-2 performs transmission on the transmission path 1-3 in the order of packets transmitted from the MPU 1-1, and transmits the transmission path 1-3 in the order of packet data 1, packet data 2, and packet data 3. Send to

The receiving side fetches packets from the transmission path 1-3, and stores the packet data 1 in the buffer 1-4, the packet data 2 in the buffer 1-5, and the packet data 3 in the buffer 1-6, respectively.

The interrupt request device 1-7 determines the priority written in the packet at the time when the packet is fetched into the buffer, and outputs an interrupt signal according to the priority to the M.
Transmit to PU11.

The priority 1 is recognized from the packet data 1 captured in the buffer 1-4, and the interrupt signal 1-9 of the level 1 is similarly transmitted from the packet data 2 captured in the buffer 1-5. 1 is transmitted, and a level 1 interrupt signal 1-9 is transmitted to the MPU 1-11. The priority 2 is recognized from the packet data 3 taken into the buffer 1-6, and the level 2 interrupt signal 1-
10 is transmitted to the MPU 1-11.

The MPU 1-11 performs an interrupt process according to an interrupt signal received from the interrupt request device,
The level 1 interrupt signal 1-9 performs level 1 interrupt processing, and the level 2 interrupt signal 1-10 performs level 2 interrupt processing. Also, if interrupt processing is currently being performed and an interrupt processing of a higher level occurs, the processing is performed first, then the processing returns to the original processing, and the level of the interrupt currently being processed is determined. When the same or lower level interrupt processing occurs, the generated processing is suspended.

Next, referring to FIG. 2, in the present embodiment,
The flow of processing of the MPU 1-11 that has received an interrupt signal from the interrupt request device 1-7 will be described.

When a packet is taken into each of the buffers 1-4 to 1-6, the interrupt request device 1-7 sends an interrupt signal corresponding to the priority written in the packet to the MPU 1-11. Send.

In this case, when the packet data 1 is first taken into the buffer 1-4, the priority 1 in the packet data 1 is recognized, and the level 1 interrupt signal 1 is sent to the MPU 1-11.
Send -9. In the MPU receiving the interrupt signal 1-9, the packet data 1 captured in the buffer 1-4 is output.
Starts the receiving process.

Thereafter, when the packet data 2 is taken into the buffer 1-5, the priority 1 in the packet data 2 is similarly recognized, and a level 1 interrupt signal is transmitted to the MPU 1-11. However, in this case, since the reception processing of the packet data 1 is being performed by the interrupt of the same level first, the interrupt is suspended.

Next, when the packet data 3 is fetched into the buffer 1-6, the interrupt request device 1-7 recognizes the priority order 2 therein, and sends the level 2 interrupt signal 1-10 to the MPU 1-11. Send.

MPU 1 receiving interrupt signal 1-10
11 immediately performs the reception processing of the packet data 3 captured in the buffer 1-6 as the level 2 interrupt processing, reports the completion of the reception processing to the upper program, and ends the level 2 interrupt processing. . As a result, the processing can be performed immediately after the priority packet is taken into the buffer.

When the level 2 interrupt processing ends, MP
The process of U1-11 returns to the original packet data 1 receiving process, and when the receiving process is completed, the fact is reported to the upper program.

Subsequently, reception processing of the packet data 2 fetched into the buffer 1-5 is performed, and when the reception processing is completed, a report is made to the host program.

[0040]

As described above, according to the present invention, the following effects can be obtained.

A first effect of the present invention is that even if one packet is being received, it is possible to perform reception processing of a packet to be processed with priority.

The reason is that when the receiving side receives a packet,
The interrupt request device transmits an interrupt signal according to the priority added in the packet to the MPU,
This is because the received packet is processed according to the level of the interrupt signal.

A second effect of the present invention is that reception processing of packet communication including priority packets can be simplified and speeded up.

The reason is that, in the present invention, since the receiving process of the priority packet is performed by interruption of the MPU,
This is because priority packet reception processing can be realized without having a special processing function.

A third effect of the present invention is that transmission processing of packet communication including priority packets can be simplified and speeded up.

The reason for this is that, in the present invention, it is only necessary to add a high priority to a packet to be processed with priority and to receive a priority packet without having a special processing function. This is because the processing can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating a flow of an MPU process according to an embodiment of the present invention.

[Explanation of symbols]

 1-1 MPU 1-2 on the transmitting side 1-2 Packet transmitting section 1-3 Transmission path 1-4, 1-5, 1-6 Packet receiving buffer 1-7 Interrupt request device 1-8 Packet receiving section 1-9 Level 1 interrupt signal 1-10 Level 2 interrupt signal 1-11 MPU on the receiving side

Claims (5)

[Claims] 1. A method for recognizing a priority added to received packet data and transmitting an interrupt signal of a level corresponding to the priority to an MPU that processes the received packet data, so that the priority of the packet is reduced. A packet priority reception processing method, which performs a reception process. 2. Even when the MPU is receiving one packet data, it receives a packet having a higher priority than the interrupt level currently being processed by the MPU due to the level of an interrupt signal to the MPU. 2. The packet priority reception processing method according to claim 1, wherein the MPU switches to reception processing of the packet with the higher priority. 3. The packet priority reception processing method according to claim 1, wherein priority information is added to the packet on a transmission side. 4. A transmitting apparatus comprising: a processor for writing priority information in a packet to be transmitted; and a packet transmitting means for transmitting packet data to a transmission path in the order written by the processor. Storage means for receiving packet data from the transmission path and holding it until reception processing is completed; and recognizing priority information of a packet added to the packet data stored in the storage means, and Interrupt request means for transmitting an interrupt signal of a corresponding level; and a processor for executing interrupt processing according to the level of the interrupt signal from the interrupt request means, wherein the receiving processor is processing received packet data. However, when a high-priority packet is received, the processor on the receiving side requests the interrupt request. Sent from the means, it receives an interrupt high interruption signal-level than the level of the currently processed, switching the process to the reception processing of higher the priority packets, the packet priority control method, characterized in that. 5. When the level of the interrupt signal transmitted from the interrupt request means is equal to or lower than the level of the interrupt currently being processed by the processor on the receiving side, the level of the interrupt signal transmitted is determined. 5. The packet priority control method according to claim 4, wherein the processing of the corresponding received packet data is suspended.