JPH11261059A - Manufacture of polymetal gate electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a fine polymetal gate electrode to be very accurately formed, while keeping it free from metal contamination. SOLUTION: An antireflection film 6 is formed on a laminated film composed of a W film 5, a TiN film 4, and a polysilicon film 3 laminated in this sequence from above, an SiN film 7 is laminated thereon, a resist film 8 is applied onto the SiN film 7 and patterned for a gate electrode wiring, and a pattern is transferred by dry etching. The resist film 8 is removed, a cleaning operation is carried out, then an oxide film or a nitride film is formed to cover a metal exposed part, the oxide or nitride film is anisotropically etched, and the polysilicon film 3 is processed by etching for the formation of a polymetal gate electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a polymetal gate electrode in the manufacture of a high-speed MOS transistor, and more particularly to a method for forming a fine and highly accurate polymetal gate electrode without contamination.

[0002]

2. Description of the Related Art In the manufacture of high-speed operation MOS transistors, in order to further increase the speed, miniaturization is performed while increasing the accuracy of gate dimensions, and the resistance of the gate material is reduced.
The transition from polysilicon gates to polymetal gates to reduce resistance has led to new problems.

The first problem is the problem of contamination due to the application of a metal layer. In the conventional method, the metal of the metal layer is re-adhered to the substrate during polysilicon etching. Since it is on the gate film, hydrofluoric acid cleaning or the like having a cleaning ability cannot be performed, and the gate is contaminated with metal, and the reliability and characteristics of the transistor are not sufficient.

[0004] The second problem is a problem of high precision machining. Lithography on a highly reflective substrate has problems such as halation due to a step in the reflective substrate, a change in the thickness of the transparent substrate due to the step in the substrate, a standing wave caused by a change in the thickness of the resist, and multiple interference. Due to this problem, the resist dimensions vary greatly, making it impossible to perform fine processing with high accuracy.

Therefore, these problems are reduced by using an antireflection film. An example of the anti-reflection film is SiN
O and the like. An anti-reflection film such as SiNO is formed on a metal such as W or Al so that the reflected light at the resist / anti-reflection film interface and the reflection light from the anti-reflection film / substrate interface have opposite phases to each other. The reflected light is reduced by controlling the thickness of the anti-reflection film.

However, in the film structure in the processing of the polymetal gate, the Si formed on the high-reflection W with the thickness variation
Since the patterning on N is performed, a method of simply forming an anti-reflection film on SiN cannot maintain a sufficient margin against a variation in the thickness of SiN. A conventional example of a polymetal gate is disclosed in JP-A-61-152076.

[0007]

Although the adoption of a polymetal gate can reduce the resistance, the fineness and high precision cannot be achieved unless the antireflection technique is properly performed. Further, if there is metal contamination, it is not a practical method for manufacturing a gate electrode.

An object of the present invention is to provide a method for manufacturing a polymetal gate electrode having high dimensional accuracy and free from metal contamination.

[0009]

A step of forming an antireflection film from above on a laminated film of W / TiN / polysilicon; a step of forming SiN on the antireflection film;
a step of applying a resist on the iN and patterning the resist for the gate electrode wiring, SiN, an antireflection film, W,
Transferring to TiN by dry etching, removing the resist, washing with a mixed solution of hydrofluoric acid and nitric acid, forming an oxide film or a nitride film to coat a metal exposed portion, and removing the oxide film or the nitride film. The above object can be achieved by forming a polymetal gate electrode by sequentially performing a process of removing an oxide film or a nitride film on a polysilicon surface by anisotropic etching and a process of etching polysilicon.

An anti-reflection film is formed on the SiN / W interface in order to effectively obtain an anti-reflection effect against a variation in the thickness of SiN. Since the antireflection film has SiN _{x Oy} as a main component and the extinction coefficient k is determined by the composition ratio of Si, a sufficient antireflection effect can be obtained. This makes it possible to obtain a fine pattern with high accuracy.

Although the antireflection film remains on the substrate,
By using SiN _x O _y having a high N composition ratio, a mixed solution of hydrofluoric acid (1) / nitric acid (400) (weight ratio) can be used.
Since it has sufficient resistance, etching from the side can be suppressed. The metal film is covered with an oxide film or a nitride film before the gate oxide film is exposed, and the deposit containing metal generated by etching is washed before the gate oxide film is exposed. Therefore, there is no risk of metal contamination.

[0012]

(Embodiment 1) Hereinafter, an embodiment of the present invention will be described with reference to FIGS. In the figure,
1 is a Si substrate, 2 is a SiO ₂ film, 3 is a polysilicon film, 4
Is a TiN film, 5 is a W film, 6 is a SiN _x O _y antireflection film,
7, 9 are SiN or LPCVD-HTO films, and 8 is a resist film.

When a polymetal gate electrode is formed as shown in FIG. 1 (a), a reflection is made on the W film 5 in order to effectively obtain an anti-reflection effect against a variation in the thickness of the SiN or LPCVD-HTO film 7. The prevention film 6 was formed. S on antireflection film
iN or LPCVD-HTO7 was deposited, and a resist was applied thereon. After patterning the resist 8, the Si
Transfer was sequentially performed on the N or LPCVD-HTO 7, the antireflection film 6, the W film 5, and the TiN film 4 by dry etching (FIG. 1B). The resist 8 was easily removed by the asher.

In this state, since the metal on the polysilicon 3 is contaminated by dry etching, the polysilicon 3 is slightly wet-etched to remove the metal contamination (FIG. 1C). At this time, hydrofluoric acid (1) / nitric acid (40
0) (weight ratio).

By using SiN _0.49 O _0.81 as the anti-reflection film, the amount of side etching of the anti-reflection film could be sufficiently suppressed. It is preferable to use SiN _0.78 O _0.55 having a sufficiently large composition ratio of N as the antireflection film because the amount of side etching of the antireflection film is reduced.

This cleaning sufficiently removes metal contamination,
Then, a few nm thick LPCVD-HTO or Si
N9 was formed (FIG. 1 (d)), and anisotropic etching was performed to coat the exposed metal portion (FIG. 1 (e)). Subsequently, the polysilicon film 3 was processed (FIG. 1F).

In the conventional method in which the polysilicon is etched all at once, since the gate oxide film is exposed, it is not possible to remove etching deposits containing metal by cleaning with hydrofluoric acid or the like which has a high cleaning effect, and the transistor characteristics deteriorate. However, the polymetal gate electrode manufactured as in the above example had low resistance and high dimensional accuracy. In addition, the transistor was highly reliable without metal contamination.

Embodiment 2 Next, as a second embodiment, a semiconductor memory device was manufactured by using the method for manufacturing a polymetal gate electrode of the present invention. FIG. 2 is a cross-sectional view showing main steps of manufacturing the device. Here, only typical manufacturing steps have been described, but other than this, a normal element manufacturing step was used. Further, the present invention can be applied even if the order of each step is changed. The present invention was applied to most of the steps of manufacturing the word lines 73 in the element manufacturing steps.

As shown in FIG. 2A, a P-type Si semiconductor 71 is used as a substrate, and an element isolation region 72 is formed on the surface thereof by using a known element isolation technique. Next, word lines 73 (a) to (e) having the structure described in the first embodiment are formed, and furthermore, for example, 150 nm SiO ₂ is formed by using a chemical vapor deposition method.
Is formed and processed anisotropically to form SiO side spacers 74 on the side walls of the word lines. Next, n
A diffusion layer 75 is formed. Next, as shown in FIG.
Through a normal process, a data line 76 made of polycrystalline Si or high-melting-point metal silicide, or a laminated film thereof is used.
To form

Next, as shown in FIG. 2C, a storage electrode 78 made of polycrystalline Si is formed through a normal process. Thereafter, Ta ₂ O ₅ , Si ₃ N ₄ , SiO ₂ , a ferroelectric substance, or a composite film thereof is applied to form a capacitor insulating film 79. Polycrystalline Si, refractory metal,
A plate electrode 80 is formed by depositing a high-resistance metal silicide or a low-resistance conductor such as Al or Cu.

Next, as shown in FIG. 2D, a wiring 81 is formed through a normal process. Next, a memory element was manufactured through a normal wiring layer forming step and a passivation step.

Next, a pattern formed by using the method for manufacturing a polymetal gate electrode of the present invention will be described. FIG. 3 shows a pattern arrangement of a memory portion of a typical pattern constituting a manufactured memory element.

FIG. 3A shows an example of the pattern of the first element thus manufactured. 82 is a word line, 83 is a data line, 84
Is an active region, 85 is a storage electrode, and 86 is a pattern of an electrode extraction hole. The present invention was used in the step of forming the word line 82.

FIG. 3 (b) shows an example of the pattern of the second element manufactured. 87 is a word line, 88 is a data line, 89 is an active area, 90 is a storage electrode, and 91 is a pattern of an electrode extraction hole. Also in this example, the present invention was used in the process of manufacturing the word line 87.

The characteristics of the device manufactured by using the present invention were better than those of the device manufactured by using the conventional method. Specifically, since the variation in word line width is small, the data reading speed is high and the characteristics are stable. In addition, since the metal contamination can be prevented, the yield of obtaining good devices can be improved.

In this embodiment, the memory LSI is shown. However, the operation speed can be stabilized and improved even in the gate of the logic LSI, and the yield of non-defective products can be improved. The biggest reason is the improvement of gate size controllability.

[0027]

According to the present invention, a fine polymetal gate electrode can be manufactured with high precision without metal contamination. As a result, a highly reliable transistor which operates at high speed can be obtained.

[Brief description of the drawings]

FIG. 1 is a process chart showing a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a method for manufacturing a semiconductor device of the present invention.

FIG. 3 is a plan view of main patterns constituting the semiconductor device of the present invention.

[Explanation of symbols]

1 ... Si substrate, 2 ... SiO _2, 3 ... polysilicon, 4 ...
TiN, 5 ... W, 6 ... SiN _{x Oy} (anti-reflection film), 7 ...
SiN or LPCVD-HTO, 8 resist, 9 ...
LPCVD-HTO or SiN, 72: element isolation region, 73 (ae), 82, 87: word line, 76, 8
3,88 ... data lines, 78, 85, 90 ... storage electrodes, 8
0: Plate electrode.

Claims (2)

[Claims] A step of forming an anti-reflection film on a laminated film of W / TiN / polysilicon from above, a step of forming SiN on the anti-reflection film, applying a resist on the SiN, and forming a gate. A step of performing resist patterning for electrode wiring, a step of transferring the SiN, antireflection film, W, and TiN layers by dry etching, a step of removing the resist, and a step of washing with a mixed solution of hydrofluoric acid and nitric acid, A step of forming a film to cover an exposed metal portion, a step of anisotropically etching the oxide film or the nitride film to remove an oxide film or a nitride film on the polysilicon surface, and a step of performing a polysilicon etching process. A method for manufacturing a polymetal gate electrode, comprising: 2. The antireflection film according to claim 1, wherein the antireflection film is SiN _x O _y.
A method for manufacturing a polymetal gate, which is a film.