JPH11251400A - Semiconductor manufacture device, transportation method for semiconductor wafer using the same and manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the heat interference of semiconductor wafers between upper/lower transportation arms, by providing heat shielding means between the first transportation arm and the second transportation arm among a plurality of transportation arms. SOLUTION: A wafer transportation arm 10 is constituted of a base 10a, the arms 10b1 and 10b2 of two stages, and a heat shielding body 10c. The heat shielding body 10c is installed on the base 10a in a state where heat shielding boards 10c1 and 10c2 are inserted between the arms 10b1 and 10b2. The heat shielding boards 10c1 and 10c2 have functions for preventing the mutual heat influence of semiconductor wafers 11 installed on the upper/lower arms 10b1 and 10b2. Since the two heat shielding boards 10c1 and 10c2 are provided, a heat shielding operation and a heat discharge operation can be improved. The number of the heat shielding boards 10c1 and 10c2 is not limited to two but it can be increased.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor manufacturing apparatus,
The present invention relates to a semiconductor wafer transfer method and a semiconductor integrated circuit device manufacturing technique using the same, and more particularly to a technique effective when applied to a semiconductor wafer transfer technique.

[0002]

2. Description of the Related Art The transfer means studied by the present inventor is, for example, a transfer means for transferring a semiconductor wafer to each processing chamber in a photolithography process. From the viewpoint of enabling throughput of a wafer and improving the throughput, a transfer arm holding a semiconductor wafer is stacked in multiple stages in the height direction.

Further, a method studied by the present inventor for a method of transferring a semiconductor wafer using the above-described transfer means is as follows, for example.

[0004] First, the first semiconductor wafer that has been subjected to the cleaning and drying processing is held by the first transfer arm of the above-mentioned transfer means, and then transferred to the cooling processing chamber. Subsequently, the second semiconductor wafer, which has been subjected to the cleaning / drying processing and has already been subjected to the cooling processing in the cooling processing chamber, is held by the second transfer arm of the above-described transfer means, and then, instead of the first transfer arm, The first semiconductor wafer after the cleaning / drying process is accommodated in the cooling processing chamber.

Then, the second semiconductor wafer after the cooling process is transported to a resist coating chamber, a resist film is coated on a main surface of the second semiconductor wafer, and the second semiconductor wafer is transported by transport means. It is transported to an exposure processing chamber and subjected to exposure processing. Subsequently, the second semiconductor wafer after the exposure processing is transferred to the bake processing chamber by the transfer means, and the baked second semiconductor wafer is transferred to the first semiconductor wafer of the transfer means.
And then transported to the cooling chamber.

After that, the third semiconductor wafer which has been subjected to the baking processing and has already been subjected to the cooling processing in the cooling processing chamber is held by the second transfer arm of the transfer means, and then the bake on the first transfer arm is performed instead. The processed second semiconductor wafer is accommodated in a cooling processing chamber. Thereafter, the third semiconductor wafer after the cooling process is transported to the developing chamber by the transport unit and subjected to the developing process, thereby forming a resist pattern on the main surface of the semiconductor wafer.

The automatic transfer system for semiconductor wafers is described in, for example, Industrial Research Institute, Ltd., November 1994.
"Electronic Materials November Issue Separate Volume Super LSI Manufacturing / Testing Equipment Guide Book" published on March 25, P141 to P145, discloses an automatic semiconductor wafer transfer technology in a semiconductor manufacturing plant.

[0008]

However, the present inventor has found that there are the following problems in the above-described semiconductor wafer transfer technology.

That is, when the semiconductor wafer after the cooling process is received by the second transfer arm and the semiconductor wafer after the heat treatment is loaded into the cooling processing chamber by the first transfer arm instead, the semiconductor wafer after the cooling process is transferred to the second transfer arm. , And is affected by heat from the heat-treated semiconductor wafer held by the upper or lower first transfer arm.

Therefore, in the above-described example, the resist film to be applied or the resist film to be applied is applied when the resist film is applied on the main surface of the semiconductor wafer after the cooling process and when the developing process is applied after the cooling process. As the precision of the thickness of the resist pattern deteriorates and the thickness fluctuates for each semiconductor wafer, the dimensional accuracy of the transferred resist pattern deteriorates, and the resist pattern dimension fluctuates for each semiconductor wafer. A problem arises that is impossible.

In particular, in recent years, the application of chemically amplified resists has been expanded with the shortening of the wavelength of exposure light. However, in the case of chemically amplified resists, the above-mentioned problems become more remarkable. It is important to stabilize the temperature in the process and improve the pattern reproducibility.

An object of the present invention is to provide a technique capable of preventing thermal interference between semiconductor wafers between upper and lower transfer arms.

Another object of the present invention is to provide a technique capable of improving the accuracy of the thickness of a resist film applied on a semiconductor wafer.

Another object of the present invention is to provide a technique capable of improving the stability of the thickness of a resist film applied on a semiconductor wafer.

Another object of the present invention is to provide a technique capable of improving pattern transfer accuracy in a photolithography process.

Another object of the present invention is to provide a technique capable of improving the reproducibility of a pattern in a photolithography process.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0018]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

The semiconductor manufacturing apparatus according to the present invention includes a plurality of processing chambers and a transfer means for transferring a semiconductor wafer to each processing chamber, wherein the transfer means has a structure in which two or more transfer arms are stacked in multiple stages. A manufacturing apparatus, wherein a heat shielding means is interposed between a first transfer arm and a second transfer arm of the two or more transfer arms.

Further, the semiconductor manufacturing apparatus of the present invention comprises a plurality of processing chambers and a transfer means for transferring a semiconductor wafer to each processing chamber, wherein the transfer means has a structure in which two or more transfer arms are stacked in multiple stages. A semiconductor manufacturing apparatus having a semiconductor device, wherein heat shield means capable of cooling is interposed between a first transfer arm and a second transfer arm of the two or more transfer arms.

Further, in the semiconductor manufacturing apparatus according to the present invention, the heat shielding means has a temperature control function.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. (Note that components having the same functions in all drawings for describing the embodiments are denoted by the same reference numerals.) , And the repeated explanation is omitted).

(Embodiment 1) FIG. 1 is an explanatory view of a semiconductor manufacturing apparatus according to an embodiment of the present invention, FIG. 2 is an explanatory view of a conveying means in the semiconductor manufacturing apparatus of FIG. 1, and FIG. 4 to 11 are explanatory diagrams for explaining the transport operation of the transport unit in FIG. 2, and FIGS. 12 to 17 are semiconductor diagrams in FIG. FIG. 14 is a cross-sectional view of a principal part in a manufacturing process of the semiconductor integrated circuit device using the manufacturing apparatus.

In the first embodiment, a case where the technical idea of the present invention is applied to, for example, a semiconductor manufacturing apparatus used in a photolithography process will be described.

FIG. 1 shows the overall configuration of the semiconductor manufacturing apparatus according to the first embodiment. The semiconductor manufacturing apparatus 1 has a resist coating / developing processing section 1A, an exposure processing section 1B, a peripheral exposure processing section 1C, and a wafer transfer section 1D.

The resist application / development processing section 1A includes loaders 2a and 2b, unloaders 3a and 3b, resist application processing sections 4a and 4b, resist development processing sections 5a and 5b, hydrophobic / dry processing section 6, cooling processing section 7a and 7b and heat treatment sections 8a to 8g are provided.

The resist coating units 4a and 4b have, as a resist coating mechanism, a mechanism for spin-coating, for example, a photoresist film (including a chemically amplified resist film) on the main surface of the semiconductor wafer. Also, the cooling processing units 7a, 7
b has, as a cooling mechanism, for example, a cooling plate for cooling a semiconductor wafer. Further, the heat treatment units 8a to 8g have, for example, a hot plate for heating a semiconductor wafer as a heating mechanism.

Further, among the processing sections of the resist coating / developing processing section 1A, the hydrophobic / drying processing section 6, the cooling processing section 7
In a and 7b and the heat treatment sections 8a to 8g, the arrangement configuration of the treatment sections is a two-tiered structure. That is, the hydrophobic / drying processing section 6 is disposed above the cooling processing section 7a, the heat processing sections 8b, 8d, 8f are disposed above the heat processing sections 8a, 8c, 8e, respectively, and the heat processing section is disposed above the cooling processing section 7b. The part 8g is arranged.

The exposure processing section 1B is a processing section for performing exposure processing on a semiconductor wafer having a main surface coated with a photoresist film and transferring a predetermined pattern to the photoresist film. The peripheral exposure processing section 1C is a processing section for performing exposure processing on the outer periphery of a semiconductor wafer having a main surface coated with a photoresist film.

The wafer transfer section 1D has a wafer transfer path 9 and a wafer transfer arm (transfer means) 10. The wafer transfer path 9 forms a transfer path for transferring the semiconductor wafer 11 to each processing chamber, and extends to the center of the semiconductor manufacturing apparatus 1 so as to face the wafer loading / unloading port of each processing chamber. It is arranged in.

The wafer transfer arm 10 is a mechanism for holding the semiconductor wafer 11 and carrying it into and out of each processing chamber and out of the processing chamber. , A function to move up and down in a direction perpendicular to the road surface of the wafer transfer path 9, and a function to move horizontally along the wafer transfer path 9.

Next, the structure of the wafer transfer arm 10 will be described with reference to FIG. The wafer transfer arm 10 includes the base 1
0a, the two-stage arms 10b1 and 10b2, and the heat shield 1
0c.

The arms 10b1 and 10b2 are made of, for example, a stainless steel surface coated with aluminum or the like, and each of them is separately installed so as to be horizontally movable in the horizontal direction in FIG. The constituent materials and coating materials of the arms 10b1 and 10b2 are not limited to those described above, and can be variously changed.

The portion of the arms 10b1 and 10b2 on which the semiconductor wafer 11 is mounted is
1 is formed by a frame extending along the outer periphery of
Protrusions that support the semiconductor wafer 11 by point contact are provided at regular intervals at predetermined locations on the main surface.

The heat shield 10c has a heat shield plate 10c1,
10c2 is installed on the base 10a in a state interposed between the arms 10b1 and 10b2. This heat shield plate 10
c1 and 10c2 have a function of preventing thermal influence between the semiconductor wafers 11 placed on the upper and lower arms 10b1 and 10b2.

By using two heat shield plates 10c1 and 10c2, it is possible to improve the heat shield effect and the heat radiation effect. However, the heat shield plates 10c1, 10
The number of c2 sheets is not limited to two, but may be more.

Next, a specific manufacturing process using the semiconductor manufacturing apparatus 1 will be described with reference to FIGS.

First, after the semiconductor wafer 11 is washed, a hydrophobicity treatment and a drying treatment are performed in the hydrophobicity / drying treatment part 6 (steps 100 and 101). Hydrophobic treatment step 1
00 is a process for eliminating the peeling of the photoresist film. In addition, the drying process 101 is performed in the semiconductor wafer 11.
This is a processing step for removing excess moisture on the upper side and improving the adhesion between the semiconductor wafer 11 and the photoresist film. The temperature during the drying processing is, for example, 100 ° C. to 15 ° C.
It is about 0 ° C.

Subsequently, the semiconductor wafer 1 subjected to the drying process
The wafer 1 is transferred to the cooling processing section 7a by the wafer transfer arm 10 and is accommodated in the room for cooling (Step 102). Here, the temperature of the semiconductor wafer 11 heated by the drying process is returned to normal temperature.

Thereafter, the cooled semiconductor wafer 11 is taken out of the cooling section 7a by the wafer transfer arm 10, transferred to the resist coating sections 4a and 4b, and stored in the chamber. By coating a photoresist film (including an optical amplification type resist film) on the surface by a spin coating method or the like, a photoresist film having a required thickness is deposited on the main surface of the semiconductor wafer 11 (step 103). .

Next, the semiconductor wafer 11 coated with the photoresist film is taken out of the resist coating processing sections 4a and 4b by the wafer transfer arm 10, and is subjected to the heat treatment sections 8a to 8b.
After being transported to 8f and accommodated in the room, the semiconductor wafer 11 is subjected to a pre-bake process (step 104). Here, the photoresist film deposited on the main surface of the semiconductor wafer 11 is dried, and the adhesion between the photoresist film and the semiconductor wafer 11 is improved. The processing temperature is not particularly limited, but is, for example, about 90 ° C to 120 ° C.

Subsequently, the semiconductor wafer 11 after the pre-baking process is subjected to heat treatment sections 8a to 8a by the wafer transfer arm 10.
f, and is transported to the exposure processing section 1B and accommodated in the room, and then subjected to exposure processing (step 105). here,
A predetermined semiconductor integrated circuit pattern is transferred to a photoresist film deposited on the main surface of the semiconductor wafer 11 by exposure processing.

Thereafter, the semiconductor wafer 11 after the exposure processing is taken out of the exposure processing section 1B by the wafer transfer arm 10, transported to the heat treatment section 8g and accommodated in the room, and then subjected to the bake processing ( Step 1
06). The processing temperature is, for example, about 90 ° C to 140 ° C.

Next, the semiconductor wafer 11 after the baking process
Is taken out of the heat treatment unit 8g by the wafer transfer arm 10, transferred to the cooling processing unit 7b, and stored in the room.
A cooling process is performed on the semiconductor wafer 11 (step 1).
07). The processing temperature is, for example, about 15 ° C. to 25 ° C.

Subsequently, the semiconductor wafer 11 after the cooling processing is taken out of the cooling processing section 7b by the wafer transfer arm 10, transferred to the resist development processing sections 5a and 5b, and stored in the chamber. A development process is performed (Step 108). Thereby, the semiconductor wafer 11
A photoresist pattern is formed on the main surface of.

Thereafter, the semiconductor wafer 11 after the development processing is transferred by the wafer transfer arm 10 to the resist development processing section 5.
The semiconductor wafer 11 is taken out of the semiconductor wafers 11a and 5b, transported to the heat treatment units 8a to 8f and accommodated in the room, and then subjected to a bake treatment (step 109). Here, the photoresist film swollen by the developing treatment is cured to improve the chemical resistance. Thereby, the stability, adhesion and etching resistance of the pattern can be improved.

Thereafter, using the photoresist pattern formed on the main surface of the semiconductor wafer 11 as described above as a mask, for example, etching or ion implantation is performed.

Next, the wafer transfer operation of the wafer transfer arm according to the first embodiment will be described with reference to FIGS. 4 to 11 by taking the wafer transfer operation between the steps surrounded by the broken line in FIG. 3 as an example. Since the wafer transfer operation between steps 101 and 102 and the wafer transfer operation between steps 106 and 107 in FIG. 3 are the same, they will be described together here.

FIG. 4 shows the wafer transfer arm during the wafer transfer operation. 4 is a cooling processing unit 7a.
(7b), and the upper row shows the heat treatment sections 8a (8b to 8f). The semiconductor wafer 11a (11) is accommodated in the processing chamber of the cooling processing unit 7a, and the cooling processing has already been completed. Further, the semiconductor wafer 11b is accommodated in the processing chamber of the heat treatment section 8a, and the heat treatment has already been completed.

First, the upper arm 10b2 of the wafer transfer arm 10 is moved in the direction of the arrow (to the left in FIG. 4) and inserted into the processing chamber in the heat treatment section 8a, and as shown in FIG. Arm 1 with the semiconductor wafer 11a in the processing chamber
It is held at 0b2.

Subsequently, by moving the arm 10b2 in the direction of the arrow (rightward in FIG. 5) while holding the semiconductor wafer 11a, the semiconductor wafer 11a after the heat treatment is moved out of the processing chamber as shown in FIG. Take out.

Then, the upper arm 10b2 of the wafer transfer arm 10 is left as it is, and the lower arm 10b1
Is moved in the direction of the arrow (to the left in FIG. 6) to
a into the processing chamber.

Subsequently, as shown in FIG.
After holding the semiconductor wafer 11b in the processing chamber a by the arm 10b1, the arm 10b1 is moved in the direction of the arrow (to the right in FIG. 7), as shown in FIG. Out of the processing chamber.

At this time, the semiconductor wafer 11a after the heat treatment and the semiconductor wafer 11b after the cooling treatment are held vertically by the respective arms 10b2 and 10b1. In the first embodiment, the arm 10b1 is used. , 10b
2, the heat shield plates 10c1 and 10c2 are interposed, so that it is possible to prevent the semiconductor wafer 11a after the heat treatment (upper stage) from affecting the semiconductor wafer 11b (the lower stage) after the cooling process. I have. That is, the semiconductor wafer 11b after the cooling process can always be kept constant while the wafer temperature is kept low by the cooling process.

Therefore, if this wafer transfer operation is an operation at the stage of shifting from the drying processing step 101 to the cooling processing step 102, the semiconductor wafer 11b after the cooling processing is thermally affected by the semiconductor wafer 11a after the drying processing. Can be prevented.

Therefore, the accuracy of the thickness of the photoresist film applied on the main surface of the semiconductor wafer 11b can be improved, and the thickness of the photoresist film can be kept constant. .

If this wafer transfer operation is an operation at the stage of shifting from the baking processing step 106 to the cooling processing step 107, the semiconductor wafer 11 after the cooling processing is performed.
b can be prevented from being affected by heat from the semiconductor wafer 11a after the baking process.

Therefore, the sensitivity of the photoresist film applied on the main surface of the semiconductor wafer 11b can be stabilized, and the thickness of the photoresist film can be kept constant.

Therefore, in any case, the dimensional accuracy of the photoresist pattern transferred to the photoresist film can be improved, and the dimensions of the photoresist pattern can be kept constant. Transfer of a simple pattern becomes possible.

Thereafter, as shown in FIG. 9, the wafer transfer arm 10 itself is moved downward in FIG. 9, and then, as shown in FIG. 10, the upper arm 10b2 holds the semiconductor wafer 11a after the heat treatment. 9 moves to the left.

Thereafter, as shown in FIG. 11, the semiconductor wafer 11a is placed in the processing chamber of the cooling processing section 8a, and then the upper arm 10b2 is pulled out of the processing chamber. Thus, a series of wafer transfer operations is completed.

Next, a method of manufacturing the semiconductor integrated circuit device according to the first embodiment will be described by using, for example, a twin-well CMOS.
A case where the present invention is applied to a (Complimentary MOS) forming step will be described with reference to FIGS.

FIG. 12 is a sectional view of a main part of a semiconductor substrate 11s constituting the semiconductor wafer 11 during the manufacturing process. The semiconductor substrate 11s is made of, for example, an n ⁻ -type Si single crystal, and, for example, an n-well 12n and a p-type
A well 12p is formed. In n-well 11n,
For example, n-type impurity phosphorus or As is introduced.
Further, for example, p-type impurity boron is introduced into the p-well 11p.

Subsequently, as shown in FIG. 13, a field insulating film 13 made of, for example, a silicon oxide film is formed on the main surface of the semiconductor substrate 11s by LOCOS (Local Oxidation).
After formation by a method of siliconization (Si), a gate insulating film 14i made of, for example, a silicon oxide film is formed in a device formation region surrounded by the field insulating film 13 by a thermal oxidation method or the like.

Thereafter, a gate forming film made of, for example, low-resistance polysilicon is deposited on the semiconductor substrate 11s by a CVD method or the like, and the film is patterned by the above-described photolithography technique and ordinary etching technique. An electrode 14g is formed.

Next, for example, an n-type impurity such as phosphorus or As is introduced into the n-channel type MOS • FET formation region by ion implantation or the like. At this time, the gate electrode 14g
N-type impurity in a semiconductor substrate 1 in a self-aligned manner
1s.

Subsequently, for example, boron as a p-type impurity is introduced into the p-channel type MOS / FET formation region by an ion implantation method or the like. At this time, a p-type impurity is introduced into the semiconductor substrate 11s in a self-aligned manner using the gate electrode 14g as a mask.

Thereafter, a heat treatment is performed on the semiconductor substrate 11s to form an n-type semiconductor region 14nd constituting the source region and the drain region of the n-channel type MOS-FET, and to form a p-channel type MOS.
P that constitutes the source and drain regions of the FET
A semiconductor region 14pd of a shape is formed.

Next, as shown in FIG. 14, after an interlayer insulating film 15a made of, for example, a silicon oxide film is deposited on the semiconductor substrate 11s by the CVD method or the like, a polysilicon film is deposited on the upper surface thereof by the CVD method or the like. .

Subsequently, after the polysilicon film is patterned by the photolithography technique and the ordinary etching technique, an impurity is introduced into a predetermined region of the patterned polysilicon film, thereby forming a wiring 16L made of the polysilicon film. And a resistor 16R.

After that, as shown in FIG. 15, an interlayer insulating film 15b made of, for example, a silicon oxide film is deposited on the semiconductor substrate 11s by the SOG (Spin On Glass) method or the like, and the semiconductor region is formed on the interlayer insulating film 15b. 14pd, 1
A connection hole 17a where the 4nd and a part of the wiring 16L are exposed is formed by the photolithography technique and the ordinary etching technique.

Next, after a metal film made of, for example, tungsten is deposited on the semiconductor substrate 11s by a sputtering method or the like, the metal film is removed by chemical polishing etching until the metal film other than the connection holes is removed. Perform planarization etching. Thereby, as shown in FIG. 16, the metal film 18a is buried in the connection hole 17a.

Subsequently, as shown in FIG.
Alternatively, after depositing a metal film made of an Al alloy or the like by a sputtering method or the like, the first film 19L is formed by patterning the metal film by the photolithography technique and the ordinary etching technique. Thereafter, the semiconductor integrated circuit device is manufactured through a normal wiring forming step and a surface protection film forming step.

According to the first embodiment, the following effects can be obtained.

(1) Arm 10b of Wafer Transfer Arm 10
By interposing the heat shield plates 10c1 and 10c2 between the semiconductor wafers 11a and 10b2, it is possible to prevent the semiconductor wafer 11a after the heat treatment from having a thermal influence on the semiconductor wafer 11b after the cooling process.

(2) According to the above (1), if the wafer transfer operation is an operation at the stage of shifting from the drying process 101 to the cooling process 102, the semiconductor wafer 11b after the cooling process is replaced with the semiconductor wafer after the drying process. 11a can be prevented from being affected by heat.

(3) According to the above (2), the semiconductor wafer 11b
The temperature of the semiconductor wafer 1
It is possible to improve the accuracy of the thickness of the photoresist film applied on the main surface of 1b.

(4) According to the above (2), the semiconductor wafer 11b
It is possible to always keep the thickness of the photoresist film applied on the main surface of the substrate constant.

(5) According to the above (1), if the wafer transfer operation is an operation at the stage of shifting from the baking processing step 106 to the cooling processing step 107, the semiconductor wafer 11b after the cooling processing is replaced with the semiconductor wafer after the baking processing. 11a can be prevented from being affected by heat.

(6) According to the above (5), the semiconductor wafer 11b
The temperature of the semiconductor wafer 1
It becomes possible to stabilize the sensitivity of the photoresist film already applied on the main surface of 1b.

(7) According to the above (5), the semiconductor wafer 11b
It is possible to always keep the sensitivity of the photoresist film already applied on the main surface of the substrate constant. That is, it is possible to improve the stability of the pattern transfer in the photolithography process in the manufacturing process of the semiconductor integrated circuit device.

(8) According to (3) and (4) or (6) and (7), the dimensional accuracy of the photoresist pattern transferred to the photoresist film can be improved. Therefore, the reliability of the semiconductor integrated circuit device can be improved.

(9) According to the above (3) and (4) or the above (6) and (7), the dimension of the photoresist pattern transferred to the photoresist film can always be kept constant. For this reason, the reproducibility of the manufacture of the semiconductor integrated circuit device can be improved.

(Embodiment 2) FIG. 18 is an explanatory view of a wafer transfer arm in a semiconductor manufacturing apparatus according to another embodiment of the present invention.

As shown in FIG. 18, the second embodiment has a structure in which a cooling medium can flow inside the heat shield 10c. Thereby, the heat shield 10
c can be cooled.

The inside of the heat shield 10c, in particular, the arm 10b
A flow chamber 10c3 through which a cooling medium can flow is provided at a location located between 1, 10b2. The cooling medium flows into the flow chamber 10c3 through the flow pipe 10c4, and flows through the flow chamber 10c through another flow pipe 10c5.
The cooling medium is circulated to the outside of c3, thereby circulating the cooling medium.

As the cooling medium, for example, cooling pure water is used. However, the present invention is not limited to this, and various changes can be made. For example, liquid nitrogen or the like may be used. Further, a cooling gas may be used.

Also in the second embodiment, since the heat shield 10c has a heat shielding function between the semiconductor wafers 11 on the arms 10b1 and 10b2, the effect obtained in the first embodiment is obtained. The same effect as described above can be obtained.

In the second embodiment, the heat shield 10c also has a function of cooling the semiconductor wafer 11. Therefore, since the semiconductor wafer 11 after the heat treatment can be cooled at the time of transportation, the wafer temperature of the upper and lower semiconductor wafers 11 can be kept constant at a low temperature, and the cooling time of the semiconductor wafer 11 can be shortened. It becomes possible.

(Embodiment 3) FIG. 19 is an explanatory view of a semiconductor manufacturing apparatus and a fluid circulation mechanism according to another embodiment of the present invention.

First, the fluid circulation mechanism in the semiconductor manufacturing apparatus according to the third embodiment will be described with reference to FIG. The fluid circulation mechanism has a pump 19a, a heat exchanger 19b, a temperature controller 19c, flow pipes 10c4 and 10c5, and a tank 19d.

The pump 19a has a function of supplying pure water or the like to the flow chamber 10c3 of the heat shield 10c via the heat exchanger 10b and the flow pipe 10c4. It is mechanically connected to the heat exchanger 19b through 19e1.

The heat exchanger 10b has a function of setting the temperature of the pure water or the like sent from the pump 10a to a predetermined temperature.
0c3 is mechanically connected.

Temperature sensors 20a and 20b are provided in the middle of the flow pipe 10c4 and in the flow chamber 10c3 of the heat shield 10c, respectively. As a result, the temperature of the pure water flowing through the flow pipe 10c4 and the heat shield 10c
It is possible to detect the temperature of pure water in the circulation chamber 10c3. Although not particularly limited, the temperature sensors 20a and 20b are, for example, platinum temperature measuring resistors.

The temperature sensors 20a and 20b are electrically connected to the temperature controller 19c. The temperature controller 19c has a function of measuring the temperature of pure water flowing through the flow pipe 10c4 and the temperature of pure water in the flow chamber 10c3 of the heat shield 10c, and setting a predetermined temperature.

That is, the temperature controller 19c measures the pure water temperature based on the detection signals from the temperature sensors 20a and 20b, and compares the measured value with a set temperature value (required temperature value). The temperature command is transmitted to the heat exchanger 19b based on the result. In the heat exchanger 19b, the temperature of pure water is adjusted according to a temperature command from the temperature controller 19c.

Thus, the flow chamber 10 of the heat shield 10c is
The temperature in c3 can be set to a predetermined value. Thereby, the temperature of the semiconductor wafer 11 can be kept constant. Further, the temperature of the semiconductor wafer 11 can be appropriately lowered according to the heat treatment temperature of the semiconductor wafer 11.

The other flow pipe 10c5 is mechanically connected to the tank 19d. That is, the pure water circulated in the flow chamber 10c3 of the heat shield 10c flows into the tank 19d through the flow pipe 10c5 and is stored therein. The tank 19d is mechanically connected to the pump 19a through a flow pipe 19e2. That is, the pure water or the like stored in the tank 19d is sent to the tank 19a through the circulation pipe 19e2 and circulated.

As described above, in the third embodiment,
The following effects can be obtained in addition to the effects obtained in the first and second embodiments.

(1) Since the temperature in the circulation chamber 10c3 in the heat shield 10c can be controlled, the temperature of the heat shield 10c can be kept constant.

(2) According to the above (1), the temperature of the semiconductor wafer 11 can be kept constant.

(3) Since the temperature in the circulation chamber 10c3 in the heat shield 10c can be controlled, it is possible to keep the temperature of the heat shield 10c constant at a predetermined value. Become.

(4) According to the above (3), the temperature of the semiconductor wafer 11 can be set to a constant temperature value suitable for each process.

The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the gist of the invention. Needless to say,

For example, in the first to third embodiments,
The case where the wafer transfer arm has two stages has been described. However, the present invention is not limited to this, and various changes can be made, and three or more stages may be used. in this case,
What is necessary is just to install a heat shielding means between the arms holding the semiconductor wafers having a temperature difference. Therefore, the heat shielding means may be provided between the respective arms, or the heat shielding means may be provided only between predetermined arms of the wafer transfer arm.
In some cases, no heat shielding means is provided between other arms of the same wafer transfer arm.

In the first to third embodiments,
Although the case where the heat shielding means has a physical shape has been described, the invention is not limited to this. For example, a heat shielding means using a fluid such as an air curtain may be interposed between the arms. good. In this case, air may be flown between the arms for a time during which the semiconductor wafers are held on the upper and lower arms at the same time, thereby shielding heat conduction between the semiconductor wafers on the upper and lower arms. The temperature of the air may be normal or low.

In the second and third embodiments, the case where the heat shield is cooled by flowing the cooling medium inside the heat shield has been described. However, the present invention is not limited to this. The cooling means may be provided in contact with a part of the heat shield, and the heat shield plate of the heat shield may be cooled by heat conduction.

In the above description, the case where the invention made by the present inventor is mainly applied to the manufacturing technology of the semiconductor integrated circuit device, which is the field of application, has been described. However, the present invention is not limited to this. The present invention is applicable to a liquid crystal element forming technique, a magnetic disk head forming technique, and the like. INDUSTRIAL APPLICABILITY The present invention can be applied to a product manufacturing technique having a process of simultaneously holding substrates (for example, semiconductor wafers) having a temperature difference on at least a transfer unit (for example, a wafer transfer arm).

[0109]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, since the heat shielding means is interposed between the first transfer arm and the second transfer arm of the two or more transfer arms, the distance between the upper and lower transfer arms can be reduced. , It is possible to prevent thermal interference between semiconductor wafers.

(2) According to the present invention, a transferable heat shielding means is interposed between the first transfer arm and the second transfer arm of the two or more transfer arms, so that the transfer Thermal interference between the semiconductor wafers between the upper and lower arms can be prevented, and the semiconductor wafer can be kept constant at a low temperature.

(3) According to the present invention, the temperature controllable heat shielding means is interposed between the first transfer arm and the second transfer arm of the two or more transfer arms. Thermal interference between the semiconductor wafers between the upper and lower portions of the transfer arm can be prevented, and the temperature of the heat shielding means can be kept constant.

(4) According to the above (1), (2) or (3), the accuracy of the thickness of the photoresist film on the main surface of the semiconductor wafer can be improved.

(5) According to the above (4), the dimensional accuracy of the photoresist pattern transferred to the photoresist film can be improved. Therefore, the reliability of the semiconductor integrated circuit device can be improved.

(6) According to the above (1), (2) or (3), the thickness of the photoresist film on the main surface of the semiconductor wafer can be kept constant.

(7) According to the above (6), the dimension of the photoresist pattern transferred to the photoresist film can always be kept constant. For this reason, the reproducibility of the manufacture of the semiconductor integrated circuit device can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a semiconductor manufacturing apparatus according to an embodiment of the present invention.

FIG. 2 is an explanatory view of a transport unit in the semiconductor manufacturing apparatus of FIG.

FIG. 3 is a flowchart showing a manufacturing process of a semiconductor integrated circuit device using the semiconductor manufacturing device of FIG. 1;

FIG. 4 is an explanatory diagram for explaining a transport operation of a transport unit in FIG. 2;

FIG. 5 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 6 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 7 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 8 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 9 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 10 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

FIG. 11 is an explanatory diagram for explaining a transport operation of the transport unit of FIG. 2;

12 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

13 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

14 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

FIG. 15 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

16 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

17 is a fragmentary cross-sectional view of the semiconductor integrated circuit device during a manufacturing step using the semiconductor manufacturing apparatus of FIG. 1;

FIG. 18 is an explanatory diagram of a wafer transfer arm in a semiconductor manufacturing apparatus according to another embodiment of the present invention.

FIG. 19 is an explanatory diagram of a wafer transfer arm and a fluid circulation mechanism in a semiconductor manufacturing apparatus according to another embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor manufacturing apparatus 1A Resist coating / development processing part 1B Exposure processing part 1C Peripheral exposure processing part 1D Wafer transfer part 2a, 2b Loader 3a, 3b Unloader 4a, 4b Resist coating processing part 5a, 5b Resist development processing part 6 Hydrophobic Drying processing unit 7a, 7b Cooling processing unit 8a to 8g Heat treatment unit 9 Wafer transfer path 10 Wafer transfer arm (transfer means) 10a Base 10b1, 10b2 Arm 10c Heat shield 10c1, 10c2 Heat shield plate 10c3 Flow chamber 10c4, 10c5 Distribution Tube 11, 11a, 11b Semiconductor wafer 11s Semiconductor substrate 12n n well 12p p well 13 Field insulating film 14g Gate electrode 14i Gate insulating film 14pd Semiconductor region 14nd Semiconductor region 15a, 15b Interlayer insulating film 16L Wiring 16R Resistance 17a Metal film 18a 18L First layer wiring 19a Pump 19b Heat exchanger 19c Temperature controller 19d Tank

Claims (8)

[Claims] 1. A semiconductor manufacturing apparatus, comprising: a plurality of processing chambers; and transport means for transporting a semiconductor wafer to each processing chamber, wherein the transport means has a structure in which two or more transport arms are stacked in multiple stages. A semiconductor manufacturing apparatus, wherein a heat shielding means is interposed between a first transfer arm and a second transfer arm of the two or more transfer arms. 2. A semiconductor manufacturing apparatus comprising: a plurality of processing chambers; and transfer means for transferring a semiconductor wafer to each processing chamber, wherein the transfer means has a structure in which two or more transfer arms are stacked in multiple stages. A semiconductor manufacturing apparatus, wherein a coolable heat shielding means is interposed between a first transfer arm and a second transfer arm of the two or more transfer arms. 3. The semiconductor manufacturing apparatus according to claim 1, wherein said heat shielding means has a temperature control function. 4. A semiconductor wafer transfer method for transferring a semiconductor wafer to each of a plurality of processing chambers provided in a semiconductor manufacturing apparatus using transfer means having a structure in which two or more transfer arms are stacked in multiple stages. Placing a first semiconductor wafer on the first transfer arm with heat shielding means interposed between the first transfer arm and the second transfer arm of the two or more transfer arms; And placing the second semiconductor wafer on the second transfer arm. 5. The semiconductor wafer transfer method according to claim 4, wherein said first semiconductor wafer is a semiconductor wafer after a cooling process, and said second semiconductor wafer is a semiconductor wafer after a heat treatment. Semiconductor wafer transfer method. 6. A semiconductor integrated circuit device comprising a step of transferring a semiconductor wafer to each of a plurality of processing chambers provided in a semiconductor manufacturing apparatus using a transfer means having a structure in which two or more transfer arms are stacked in multiple stages. A manufacturing method, wherein a heat shield is interposed between a first transfer arm and a second transfer arm among the two or more transfer arms, and a first transfer arm is provided on the first transfer arm. Mounting a second semiconductor wafer on the second transfer arm, and mounting the second semiconductor wafer on the second transfer arm. 7. A semiconductor device comprising: a plurality of processing chambers for transferring a predetermined semiconductor integrated circuit pattern onto a semiconductor wafer; and transport means for appropriately transporting the semiconductor wafer to each of the plurality of processing chambers. A method for manufacturing a semiconductor integrated circuit device, comprising: transferring a predetermined semiconductor integrated circuit pattern onto the semiconductor wafer by using a semiconductor manufacturing device having a structure in which two or more transfer arms are stacked in multiple stages. Is the first of the two or more transfer arms.
(A) the first semiconductor wafer that has been subjected to the heat treatment in the heat treatment chamber of the plurality of treatment chambers is provided with a structure in which heat shielding means is interposed between the transfer arm and the second transfer arm. Placing on the first transfer arm of the transfer means, and (b) the second cooling process performed in the cooling process chamber.
Placing the semiconductor wafer on the second transfer arm of the transfer means, and instead loading the heat-treated first semiconductor wafer on the first transfer arm into the cooling processing chamber; (c) A) transporting the second semiconductor wafer after the cooling process to a resist coating processing chamber of the plurality of processing chambers by the transporting means, and applying a resist film on a main surface of the second semiconductor wafer; And (d) transferring a predetermined semiconductor integrated circuit pattern by exposing the second semiconductor wafer to which the resist film has been applied, thereby producing a semiconductor integrated circuit device. Method. 8. A semiconductor device comprising: a plurality of processing chambers for transferring a predetermined semiconductor integrated circuit pattern onto a semiconductor wafer; and transport means for appropriately transporting the semiconductor wafer to each of the plurality of processing chambers; A method for manufacturing a semiconductor integrated circuit device, comprising: transferring a predetermined semiconductor integrated circuit pattern onto the semiconductor wafer by using a semiconductor manufacturing device having a structure in which two or more transfer arms are stacked in multiple stages. Is the first of the two or more transfer arms.
(A) removing the first semiconductor wafer that has been subjected to the heat treatment in the heat treatment chamber of the plurality of treatment chambers, by interposing a heat shielding means between the transfer arm and the second transfer arm. (B) placing the second semiconductor wafer, which has been cooled in the first cooling chamber through the step (a), on the first transfer arm of the transfer means, (C) loading the heat-treated first semiconductor wafer on the first transfer arm into the cooling processing chamber, and (c) placing the second semiconductor wafer on the first transfer arm after the cooling processing. Transporting the semiconductor wafer to the resist coating processing chamber of the plurality of processing chambers by the transporting means, and applying a resist film on a main surface of the second semiconductor wafer; and (d) the resist film. Exposure processing on the second semiconductor wafer coated with Transferring a predetermined semiconductor integrated circuit pattern by performing the step (e), performing a bake process on the second semiconductor wafer after the exposure process, and (f) performing a second process after the bake process. Semiconductor wafer
Placing on a first transfer arm of the transfer means;
(G) placing the third semiconductor wafer, which has been subjected to the cooling processing in the second cooling processing chamber through the steps (a) to (f), on a second transfer arm of the transfer means; Alternatively, a step of loading the second semiconductor wafer after the baking process on the first transfer arm into the cooling processing chamber; and (h) transferring the third semiconductor wafer after the cooling process to the plurality of semiconductor wafers by the transfer means. Transferring to a development processing chamber among the processing chambers, performing a development process on the third semiconductor wafer, and transferring a pattern formed of a resist film onto a main surface of the third semiconductor wafer. A method for manufacturing a semiconductor integrated circuit device.