KR101071004B1 - Integrated thermal unit - Google Patents

Abstract

A baking station comprising a baking plate for holding and heating the substrate; A chill station comprising a chill plate for holding and cooling the substrate; And a substrate transfer shuttle for transferring the substrate from the baking plate to the cold plate along a linear path in the lateral direction in the thermal device, and for raising and lowering the substrate along a vertical path in the integrated thermal device. To provide.

Integrated thermal devices, substrates, photolithography, clusters, baking, cooling.

Description

Integrated Thermal Unit {INTEGRATED THERMAL UNIT}

The present invention generally relates to the field of substrate processing equipment. In particular, the present invention relates to a method and apparatus for temperature control of substrates such as semiconductor substrates used in the formation of integrated circuits.

Modern integrated circuits include millions of individual devices that are formed by patterning materials such as silicon, metal, and / or dielectric layers, which constitute an integrated circuit that is one-tenth of a micrometer. Photolithography is a technique used throughout the industry to form such patterns. A typical photolithography process generally involves depositing one or more uniform photoresist (resist) layers on the surface of a substrate, drying and curing the deposited layers, and exposing the photoresist layer. Patterning the substrate by exposure to electromagnetic radiation suitable for modifying the exposed layer and developing the patterned photoresist layer.

In the semiconductor industry, many of the steps associated with photolithography processing are multi-chamber processing systems (eg, cluster tool) with the ability to process semiconductor wafers sequentially in a controlled manner. Is usually performed in One example of a cluster tool used to deposit (ie, coat) and develop photoresist material is commonly referred to as a track lithography tool.

Track lithography tools typically include a main frame that houses multiple chambers (sometimes referred to herein as stations) dedicated to performing the various tasks involved before and after lithography processing. Typically in track lithography tools, there are both wet and dry processing chambers. The wet chamber includes a coating and / or developing bowl, and the dry chamber includes a thermal control device to accommodate baking and / or cold plates. Track lithography tools also often have one or more pods / cassettes, such as the industry standard front opening unified pod (FOUP), to receive the substrate from the clean room or return the substrate to the clean room. ) A mounting device, comprising a multi-substrate transfer robot for transferring substrates between the various chambers / stations of the track tool, transferring the substrates into an exposure tool and from the exposure tool after the substrate has been processed within the exposure tool. In order to receive the substrate, the tool includes an interface to connect with a lithography exposure tool.

In the semiconductor industry for many years, there has been a strong demand to reduce the size of semiconductor devices. The reduced shape size has led to a reduction in the tolerances of processing strain in the industry, which in turn has resulted in semiconductor manufacturing specifications having more stringent requirements in terms of processing uniformity and repeatability. An important factor in minimizing the deformation of the process during the track lithography process is to ensure that all substrates processed within the track lithography tool for the particular application have the same "wafer history". In general, the wafer history of the substrate is monitored and controlled by a processing engineer, thereby ensuring that all device fabrication process variables that can subsequently affect the performance of the device are controlled and thereby within the same group. All substrates are always processed in the same way.

To ensure that each substrate has the same "wafer history", each substrate must undergo the same repeatable substrate processing steps (e.g., consistent coating treatment, consistent hard baking treatment, consistent cold treatment, etc.) The timing between the various processing steps should be the same for each substrate. Lithography type device fabrication processes can be particularly sensitive to changes in process recipe variables and timing between recipe steps, which directly affect process variability and ultimately affect device performance.

In view of these requirements, the semiconductor industry continues to explore ways to improve uniformity in wafer history for track lithography and other types of cluster tools, and also develops tools and techniques for them.

According to the present invention, a method and apparatus for semiconductor manufacturing equipment are provided. In particular, embodiments of the present invention relate to methods and apparatus for heating and / or cooling a substrate in a highly controllable manner. Embodiments of the present invention are designed such that a plurality of substrates may be processed according to the same heating and cooling process in a highly controllable manner to ensure a consistent wafer history for each substrate. Certain embodiments of the present invention are particularly useful for heating and / or cooling a substrate in a chamber or station of a track lithography tool, while other embodiments of the invention are required to heat and cool a substrate in a highly controllable manner. It can be used in other applications.

Certain embodiments of the present invention relate to an integrated thermal device. According to one such embodiment, an integrated thermal apparatus includes a baking plate for heating a substrate supported on a surface; A cold plate for cooling the substrate supported on the surface; And a substrate transfer shuttle that includes a temperature controlled substrate holding surface capable of cooling the substrate heated by the baking plate, and transfers the substrate from the baking plate to the cold plate.

According to another embodiment of the present invention, an integrated heating device includes a baking station including a baking plate for holding and heating a substrate; A chill station comprising a chill plate for holding and cooling the substrate; And a substrate transfer shuttle for transferring the substrate from the baking plate to the cold plate along a linear path in the lateral direction in the thermal device, and raising and lowering the substrate along the vertical path in the integrated thermal device.

According to another embodiment of the present invention, an integrated thermal device comprises: a baking plate comprising a substrate holding surface for holding and heating a substrate in a baking position; A chill plate comprising a substrate holding surface for holding and cooling the substrate in a cooling position, wherein the substrate holding surface of the baking plate is located in a first substantially horizontal plane when the baking plate is in the baking position; The substrate holding surface of the chill plate is located in a substantially horizontal second plane below the first plane when the chill plate is in a cooling position.

According to another embodiment of the present invention, a baking station is provided. The baking station may include: a baking plate capable of heating a substrate supported on an upper surface thereof and moving in an up and down direction between an upper baking position and a lower cooling position; And a plurality of heat sinks operatively connected to a bottom surface of the baking plate when the baking plate is in the lower cooling position.

Certain other embodiments of the present invention relate to a track lithography tool, the track lithography tool comprising a plurality of pod assemblies and one within the track lithography tool that receive one or more cassettes of a wafer. Or one or more robots for transferring wafers from more of the pod assemblies to a processing module, wherein at least one of the processing modules includes an integrated thermal device according to one of the embodiments.

Still other embodiments of the present invention relate to a substrate processing method in an integrated thermal device. According to one embodiment, a method of treating a substrate in an integrated thermal apparatus comprising a baking plate and a cold plate comprises the steps of: transferring a substrate to which the liquid resist material is applied into the integrated thermal apparatus; Positioning the substrate on the baking plate; Heating the substrate with the baking plate; Transferring the substrate from the baking plate to the cold plate with a shuttle comprising a temperature control surface; Cooling the substrate with the cold plate; And transferring the substrate out of the integrated thermal device.

According to another embodiment, a method of processing a substrate in an integrated thermal apparatus comprising a baking plate and a chill plate, comprising: transferring a substrate to which the liquid resist material is applied into the integrated thermal apparatus; Positioning the substrate on the baking plate; Heating the substrate with the baking plate; Transferring the substrate from the baking plate to the cold plate, wherein the conveying comprises moving the substrate along a linear path in the lateral direction and along a vertical path in the integrated thermal device with a substrate transfer shuttle. step; Cooling the substrate with the cold plate; And transferring the substrate out of the integrated thermal device.

According to another embodiment, a method of processing a substrate in an integrated thermal apparatus comprising a baking plate and a chill plate, comprising: transferring a substrate to which the liquid resist material is applied into the integrated thermal apparatus; Positioning the substrate on the baking plate; Heating the substrate with the baking plate; Transferring the substrate from the baking plate to the cold plate with a shuttle comprising a temperature control surface; Cooling the substrate with the cold plate; And transferring the substrate out of the integrated thermal device.

According to yet another embodiment of the present invention, a method for rapidly reducing a set temperature of a baking plate is provided. The embodiment includes using the baking plate to heat a substrate disposed on an upper surface of the baking plate while the baking plate is in a baking position, and then lowering the baking plate to a lower position, the lower side In position, the bottom surface of the baking plate contacts a plurality of heat sinks that are releasably connected to the bottom surface of the baking plate.

The present invention achieves many advantages over existing technologies. For example, by including the baking and chill plates in one integrated heating device, the delays associated with transferring the baked wafers to the chill plates can be minimized. It is also possible to provide additional control over the thermal history of each wafer by including a shuttle to transfer wafers between baking and chill plates and including a temperature controlled substrate holding surface, This allows for a more uniform thermal history between multiple wafers. In addition, embodiments of the present invention increase the chamber throughput by reducing the load on the main, robotic robot (s) of the track lithography tool, and are safe for wafers after baking if the main central robot fails. Provide shelter. Other embodiments increase wafer throughput by reducing the amount of time it takes to change the set temperature of the baking plate from the first temperature to a second temperature lower than the first temperature. Depending on the embodiment, one or more of these advantages may be achieved along with other advantages. These and other advantages will be described in more detail below throughout the present specification and in particular with respect to the following figures.

The present invention generally provides a method and apparatus for heating and cooling a substrate in a highly controllable manner. Embodiments of the present invention are particularly useful for ensuring consistent wafer history for each substrate in a plurality of substrates that are heated and cooled according to a particular thermal recipe in a track lithography tool. While it should be appreciated, other embodiments of the present invention may be used in other applications that require heating and cooling the substrate in a highly controllable manner.

1 is a simplified conceptual diagram of one embodiment of an integrated thermal device 10 according to the present invention. The integrated thermal arrangement 10 comprises all of a baking station 12, a cold station 14, and a shuttle station 16 in an enclosed housing 40. Shuttle station 16 includes shuttle 18 for transferring the substrate as needed between the baking and chilling stations. Baking station 12 includes a baking plate 20, a receptacle 22 and a cold base 24. Baking plate 20 has a wafer loading position (shown in FIG. 1), a blocked heating position in which the baking plate comes in and is inserted into the clamshell receptacle 22 by a motor lift 28 and the baking The plate can move between cooling positions in contact with the cold base 24. The cold base 24 is connectably connectable with the baking plate, for example, to cool it so that it can quickly change the set temperature of the baking plate from a relatively high baking temperature to a low baking temperature when switching to a new heat recipe. .

The cold station 14 includes a cold plate 30 and a particle block 32, which block when the shuttle 18 passes over the cold station to transfer wafers to or from the baking station 12. The wafer placed at 30 is protected from possible dust contamination. The substrate can be conveyed into and out of the thermal device 10 through long openings that are connected with the shutters 34a and 34b, respectively.

As shown in FIG. 2A, which is a simplified perspective view of the integrated thermal device 10 shown in FIG. 1, the thermal device 10 includes an outer housing 40 made of aluminum or other suitable material. The housing 40 is long in length relative to the height, which allows the baking station 12, the cold station 14 and the shuttle station 16 to be adjacent to each other, and a plurality of integrated thermal devices are used for the track lithography tool as described below with respect to FIG. This is to be stacked in a line in. In one embodiment, the housing 40 is 20 cm in height.

The housing 40 includes a side portion 40a, a top 40b and a bottom 40c. The front side portion 40a includes two elongated openings 41a, 41b which allow the substrate to be transferred into and out of the thermal arrangement. The opening 41a is connected to be blocked and sealed by the shutter 34a (not shown), and the opening 41b is connected to be blocked and sealed by the shutter 34b (not shown). The top 40b of the housing 40 allows coolant fluid to circulate through the channel to control the temperature of the top 40b when a suitable plate (not shown) is attached to the top 40b by the screw holes 44. Coolant channel 42 to be provided. Similar coolant channels are formed at the bottom of the bottom 40c.

Also shown in FIG. 2A are various control circuit groups 46a-46d that control the precise baking operation of baking station 12 and the precise cooling operation of cold station 14, and as described in more detail below, shuttle 18 (shown in FIG. 2A). Tracks 48 and 49 are shown to allow movement within the thermal arrangement linearly and vertically along the length of the thermal arrangement. In one embodiment, control circuitry 46a-46b is located near stations 12 and 14 (e.g. within 3 feet) in order to allow the control of the temperature adjustment mechanism for each station to be more accurate and sensitive. Located.

FIG. 2B is a simplified perspective view of the integrated thermal arrangement 10, seen with the top 40b and the particle block 32 (shown in FIG. 1) removed. In FIG. 2B, shuttle 18, cold plate 30 and clamshell receiver 22 of baking station 12 are shown. Also shown is a space 47 between the rear support 90 and the bottom 40c of the housing 40. The space 47, also shown in FIG. 5, extends along a substantial amount of the length of the integrated thermal arrangement 10 to enable shuttle 18 to transfer wafers between stations 12, 14, and 16, as described in detail below.

In order to better recognize and understand the overall operation of the integrated thermal device 10, reference is now made to FIG. 3 in conjunction with FIGS. 1 and 2B. 3 is a simplified block diagram illustrating a series of events performed by thermal apparatus 10 for thermally handling a wafer in accordance with one embodiment of the method of the present invention. The wafer may be handled according to the process described in FIG. 3, for example, after the photoresist layer is deposited on the wafer in a suitable coating station of the track lithography tool. While the following focuses on the handling of a single wafer within device 10, one of ordinary skill in the art will recognize that thermal device 10 can often be used to process two wafers simultaneously. For example, while one wafer is being heated in baking plate 20, thermal device 10 may perform a process of cooling another wafer in cold plate 30 or transferring another wafer out of the thermal device when its heat treatment is complete. can do.

As shown in FIG. 3, the history of the wafer in the thermal device 10 transfers the wafer into the thermal device 10 through the wafer transfer slot 41b and on the stop lift pin 36 (FIG. 1) at the shuttle station 16. It begins by placing the wafer (FIG. 3, step 50). The wafer can be transferred, for example, by means of a central robot into the thermal apparatus 10, which can be transferred to wafer transfer slots 41a and 41b as well as one or more coating or developing stations (not shown) in the track lithography tool. Assist both. Since wafer transfer slot 41b is typically blocked by shutter 34b, step 50 further includes moving shutter 34b to open slot 41b. During step 50 the shuttle 18 is in the wafer receiving position at station 16 where the lift pins 36 extend through slots 19a and 19b of the shuttle 18. After the wafer is properly positioned on the lift pin 36, the robot arm retracts from the thermal device, and the cold shuttle 18 is raised to raise the wafer from the stop lift pin 36 (FIG. 3, step 51). It moves linearly along the length of the thermal device to transfer to baking station 12 (FIG. 3, step 52). Shuttle 18, in cold station 14, moves above the particle block 32 along the path to baking station 12.

In baking station 12, the wafer is placed on lift pin 38 and shuttle 18 processes another job or returns to the home position at shuttle station 16 (FIG. 3, step 53). While the shuttle returns to the home position, baking plate 20 is lifted by motorized lift 28 to lift the wafer from stationary lift pin 38 and take the wafer to the baking position in clamshell receiver 22 (FIG. 3, step) 54). Once inside the clamshell receptacle 22, the wafer is heated or baked according to the desired thermal recipe (FIG. 3, step 55).

After baking step 55 is completed, baking plate 20 is lowered to the wafer receiving position to lower the wafer on lift pin 38 (FIG. 3, step 56). Next, shuttle 18 returns to baking station 12, lifting the wafer from lift pin 38 (FIG. 3, step 57) and bringing the wafer to cold station 14 (FIG. 3, step 58). The shuttle moves from the particle block 32 to the shuttle station 16 along the path to the cold station 14, where the shuttle 18 is lowered and then moved to the cold station 14. Once in cold station 14, lift pin 37 is lifted by a pneumatic lift to lift the wafer from the shuttle (FIG. 3, step 59). The shuttle 18 then either processes another operation or returns to the home position at station 16 (FIG. 3, step 60) and the lift pin 37 is lowered to lower the wafer onto the cold plate 30 (FIG. 3, step 61). .

The wafer is then cooled in cold plate 30 according to a predetermined thermal recipe (FIG. 3, step 62). After the cooling process is complete, lift pin 37 is raised to lift the wafer from the cold plate (FIG. 3, step 63) and the wafer is at the same center as, for example, the wafer was transferred into the thermal device in step 50. By being lifted by the robot, it is transported out of the integrated thermal device through the long slot 41a (FIG. 3, step 64). Typically, long slot 41a is blocked by shutter 34a, so step 64 further includes opening shutter 34a to open slot 41a.

According to embodiments of the present invention, the processing as described above may be performed in a highly controllable and highly repeatable manner. Thus, according to one embodiment of the present invention, it is possible to ensure a very high degree of uniformity in the thermal treatment of each wafer processed in the integrated thermal apparatus 10 according to a specific thermal recipe. As described in more detail below, many specific aspects of the present invention can be used independently or in combination with one another to achieve such a repeatable and uniform wafer history.

According to one aspect, a baking plate (also called a hot plate) 20 is placed relative to the cold plate 30. In particular, in certain embodiments of the present invention, the baking plate 20 is located in the integrated thermal device 10, above the position of the cold plate 30. The heat generated from baking plate 20 generally rises to the top of the thermal device 10, thereby eliminating cross-talk between the baking station and the cold station, which can cause deviations in the thermal treatment of wafers over time. This can be minimized through such positioning.

This aspect of the invention is shown in FIG. 4, which is a simplified cross-sectional view of a portion of an integrated thermal arrangement 10 showing baking plate 20 and cold plate 30. As shown in FIG. 4, when the baking plate 20 is in the clamshell receptacle 22 at the baking position 71, the wafer support surface 70 is on a horizontal plane A above the horizontal plane C on which the wafer support surface 72 of the cold plate 30 lies. Is placed on. In certain embodiments, plane A is at least 4 cm above plane C, and in one particular embodiment, plane A is 6 cm above plane C. Furthermore, in certain embodiments of the present invention, even when the baking plate is engaged with the heat sink 140 while in the wafer receiving position (described below), the top surface 70 of the baking plate is the top surface 72 of the cold plate (plane C). It lies on the horizontal plane B above. In certain embodiments, plane B is at least 2 cm above plane C, and in one particular embodiment, plane B is 2.5 cm above plane C. Further, in certain embodiments, the top surface of the particle block 32 lies on plane B, or lies substantially in plane B.

By maintaining such height differences in the positions of baking plate 20 and cold plate 30, thermal crosstalk between the two stations can be minimized and a highly controlled, repeatable heat treatment between the plurality of wafers can be ensured.

According to another aspect of the invention, it is the design of shuttle 18 that ensures a very high degree of uniformity in the thermal treatment of each wafer. As shown in FIG. 5, which is a simplified perspective view of shuttle 18, the shuttle includes a wafer receiving area 74 where the wafer is placed while the shuttle transfers the semiconductor wafer from one station to another. In one embodiment, the shuttle 18 is made of aluminum, and the other portions of the wafer receiving area 74 and top 75 of the shuttle are coolant flowing through coolant passages (shown as passage 75 in FIG. 4) in the shuttle. It is actively cooled by (for example, deionized water).

The coolant is delivered to passage 75 by a tube connected to the inlet / outlet 76, the passageway manifold within a portion 79 of the shuttle (shown) that allows the fluid to be evenly distributed throughout the shuttle 18. Is not connected). When the shuttle 18 traverses the length of the integrated thermal arrangement, the fluid tube is at least partially supported by a finger 78 of the tube support mechanism 77. By actively cooling the wafer receiving surface 74, it is possible to maintain accurate thermal control of the wafer temperature while the wafer is in the thermal apparatus 10. In addition, by actively cooling Shuttle 18, the wafer cooling process begins faster than when such active cooling occurs only after the wafer has been transferred to a dedicated chill station, which reduces the overall heat consumption of the wafer.

5 also shows slots 19a, 19b, wafer pocket button 80, and small contact area proximity pins 82 and slots 19a, 19b. Slots 19a and 19b allow the shuttle to be positioned or moved under the wafer held by the lift pins. For example, in chill station 14, the wafer is held on a chill plate prior to and after chill step 63, on a set of three lift pins arranged in a triangular form (the lift pin extends through chill plate 30). See FIG. 7, which shows a hole 84 which can be made). Slot 19a is adjusted to allow shuttle 18 to slide past two of the three lift pins, and slot 19b is adjusted to allow the shuttle to slide past a third lift pin. In order to center the wafer within the wafer receiving area 74, pocket button 80 is screwed into the threaded hole in the top surface of shuttle 18 and extends over the top surface. Pocket button 80 may be made of a suitably soft material, such as a thermoplastic, that exhibits strong fatigue resistance and thermal stability. In one embodiment, button 80 is made of polyetheretherketone, also known as PEEK.

The proximity pin 82 is distributed all over the top 74 of the shuttle 18 and is made of a material with a low coefficient of friction, such as sapphire. Proximity pin 82 allows the wafer being transported by shuttle 18 to be very close to temperature control surface 74. The small space between the wafer and the temperature control surface 74 allows for uniform cooling over the entire surface area of the wafer, while minimizing contact between the bottom of the wafer and the shuttle to generate dust or contaminants from such contact. Reduce the chance of being Further, US Patent Application No. 11 / 111,155 entitled "Purged Vacuum Chuck with Proximity Pins," filed April 20, 2005, for details of proximity pin 82 (representative) Incident No .: A9871 / T60200, which is incorporated herein by reference for any purpose. In one particular embodiment, shuttle 18 includes four pocket buttons 80 and 17 proximity pins 82.

Shuttle 18 also includes an extended U-shaped support bracket that allows the shuttle to be mounted to support plate 88 shown in FIG. 6, wherein baking station 12 and cold station 14 are removed. Is a perspective view of a portion of the integrated thermal device 10 in a closed state. As shown in FIG. 6, the support plate 88 traverses through the slot 47 below and around the rear support 90 mounted in the lowermost plate 40c. Plate 88 (and shuttle 18) can move linearly along track 48 (left and right path X). Plate 88 also slides up and down along track 49 (up and down path Z) that allows shuttle 18 to move up and down to lift or lower the wafer at a particular station.

Next, referring to FIG. 7, which is a perspective view of a chill plate 30 according to an embodiment of the present invention, in the chill plate 30, a coolant such as neutral water may be used to cool the wafer supported on the wafer support surface 72. Coolant inlet 95 and outlet 96, which allows for circulation along the (not shown). The cold plate 30 further includes a number of wafer pocket buttons 85 and small contact area proximity pins 83, similar to the buttons 80 and proximity pins 82 described above with respect to FIG. 5. In one particular embodiment, the cold plate 30 includes eight pocket buttons 85 and seventeen proximity pins 83. In addition, although not shown in FIG. 7, the chill plate 30 may include a plurality of vacuum ports and may be coupled with a vacuum chuck to secure the wafer to the chill plate during the cooling process.

In addition, although not shown in FIG. 7, to protect the chill plate and the wafer located on the chill plate from dust contamination that may occur when shuttle 18 traverses between baking station 12 and shuttle station 16 on chill plate 30. A block 32 (shown in FIG. 1) is located above the cold plate 30. The particle block 32 is the lowermost housing part 40c between the baking station 12 and the cold station 14 in a manner that allows the shuttle 18 to pass under the particle block and enter the cold plate 30 as needed (see FIG. 4). And a front side portion 40a of the housing 40. In one particular embodiment, the particle end 32 is made of stainless steel.

Next, reference is made to FIGS. 8, 9, and 10. 8 is a perspective view of the baking station 12 shown in FIG. 2B according to an embodiment of the present invention, FIG. 9 is a perspective view of a cross section of the baking station 12 shown in FIG. 8, and FIG. 10 is a cross-sectional view of the baking station. As shown in FIGS. 8 to 10, baking station 12 includes three separate isothermal heating elements, baking plate 20, top hotplate 110 and side hotplate 112, each of which is for example aluminum or other suitable. It is made of materials that exhibit high thermal conductivity, such as only materials. Each plate 20, 110, 112 includes a heating element, for example a resistive heating element, encased in said plate. Baking station 12 further includes a bottommost cup 119, as well as side top and bottom heat shields 116 and 118, which surround baking plate 20 and lid 120 (shown in FIG. 10 only). do. Each heat shield 116, 118, cup 119 and cover 120 are made of aluminum. The cover 120 is attached to the uppermost heat plate 110 by eight screws which are screwed through the threaded holes 115.

Baking plate 20 may be connected to a motorized lift 26 such that the baking plate may be raised into the clamshell receiver 22 and lowered to the wafer receiving position. Typically, the wafer is heated in baking plate 20 when raised to the baking position shown in FIG. When in the baking position, the cup 119 surrounds the bottom of the side hot plate 112 while forming a clam shell arrangement, so that the heat generated by the baking plate 20 may be transferred to the interior of the interior formed by the baking plate and the receiving portion 22. It is to be kept in a cavity. In one embodiment, the top surface of baking plate 20 includes eight wafer pocket buttons and seventeen proximity pins, similar to those described in connection with shuttle 18 and cold plate 30. In addition, in one embodiment, the baking plate 20 includes a plurality of vacuum ports and may be connected with a vacuum chuck to secure the wafer to the baking plate during the baking process.

During the baking process, the face plate 122 is positioned directly above the wafer support surface 70 of the baking plate 20. The faceplate 122 may be made of aluminum as well as other suitable materials, and the radial gases and contaminants that have been baked from the surface of the wafer being baked in the baking plate 20 are produced between the faceplate 122 and the uppermost hotplate 110 through the faceplate 122. A plurality of holes or channels 122a, which allow for push into the internal gas flow 124 of the chamber.

Gas from the radial internal air stream 124 is first introduced into the baking station 12 by a gas inlet line 127 in an annular gas manifold 126 surrounding the outside of the uppermost hot plate 110. The gas manifold 126 is a plurality of small gas inlets 130 (in one embodiment inlet 128) that allows gas to flow from the manifold 126 into the cavity 132 between the bottom surface of the topmost heat plate 110 and the top surface of the face plate 122. ). The gas flows radially inwardly towards the center of the station through a diffusion plate 134 comprising a plurality of gas outlet holes 136. After flowing through the diverging plate 134, the gas exits baking station 12 via gas outlet line 128.

One aspect of the present invention that minimizes the delay associated with changing a thermal recipe to another thermal recipe, thereby ensuring high wafer throughput through the integrated thermal device 10, is described below with respect to FIGS. FIG. 11 is a bottom perspective view of the baking station 12 shown in FIGS. 8 to 10. As shown in FIG. 11, in one embodiment of the present invention, baking station 12 includes a plurality of joinable heat sinks 140. Each joinable heat sink 140 is made of a suitable heat dissipating material such as aluminum, copper, stainless steel, or other metal.

As already mentioned, baking plate 20 heats the wafer according to a specific thermal recipe. One component of the thermal recipe is typically a set temperature at which the baking plate is set to heat the wafer. During the baking process, the temperature of the wafer is regularly measured and one or more zones of the baking plate can be adjusted to ensure uniform heating of the substrate. Typically, the baking plate is heated to the required set temperature while a significant amount of wafers are processed according to the same thermal recipe. Thus, for example, if a particular thermal recipe specifies a set temperature of 175 ° C. and the recipe is applied on 100 consecutive wafers, the baking plate 20 will be 175 ° C. for the length of time it takes to process 100 consecutive wafers. Will be heated. However, if the next group of 200 wafers were to be processed according to different thermal recipes, for example recipes requiring a set temperature of 130 ° C., then the set temperature of baking plate 20 processed the 100th and 101st wafers. In the meantime, it should quickly change from 175 ° C to 130 ° C.

Embodiments of the present invention can quickly lower the set temperature of baking plate 20 by using motor 26 to lower the baking plate to the lower cooling position below the wafer receiving position. In the cooling position, the bottom surface 73 of the baking plate contacts the top surface 142 of each heat sink 140. The contact between the heat sink and the baking plate is such that the lowermost cup 119 has a plurality of holes 138 corresponding to the plurality of heat sinks 140-the plurality of holes have a lowermost cup 119 for the heat sink to contact the baking plate 20. This is possible because it includes an extension through-.

12 is a simplified cross-sectional view of the joinable heat sink 140. As shown in FIG. 12, each joinable heat sink 140 includes a lower base portion 144 having a larger diameter than the body of the heat sink. The lower base 144 fits into a cavity 152 defined by the lowermost base plate 40c and the aluminum plate 150. The base 144 of the heat sink engages the edge 154 of the lowermost base plate and is pressed against the edge by a spring 145 located between the aluminum plate 150 and the base 144.

When the baking plate 20 is lowered to the cooling position, the spring 145 causes the heat sink 140 to press on the lower surface 73 of the baking plate. With the combined thermal mass of all of the heat sinks 140, the baking plate 20 is rapidly cooled from a predetermined set temperature, for example to a lower set temperature which may be required when transitioning to a new heat recipe. Can be.

Although the heat sink 140 shown in FIGS. 11 and 12 is shown cylindrical in its form, many other shapes and sizes may be used. Further, in some embodiments, each heat sink 140 may be actively cooled by forming one or more coolant channels in the body of the heat sink. Further, in certain embodiments, the heat sink 140 includes a heat pad on its top surface 142 that allows for smooth contact between the heat sink and the baking plate during the bonding process.

13 is a conceptual diagram of another embodiment of an integrated thermal device 150 according to the present invention. One major difference between the embodiment of the invention shown in FIG. 13 and the embodiment shown in FIG. 1 is the arrangement of the baking station 12, the cold station 14 and the shuttle station 16. In Fig. 13, the shuttle (shuttle 152 for shuttle 18) was moved to the central position between the baking station and the cold station. Such an arrangement provides an advantage in further reducing thermal crosstalk between the baking and chilling stations, and furthermore, since the shuttle 18 does not have to pass over the chill plate to transfer the wafer to the baking plate 20, the particle block 32 Alleviates the need to be positioned above the cold plate 30. One advantage of the arrangement of FIG. 1 over FIG. 13 is that the shuttle can be separated from the baking plate 20 when the shuttle 18 is in a predetermined position to receive the wafers that have been turned into the integrated thermal apparatus.

Further, the shuttle 152 in FIG. 13 may move linearly along the length of the housing 40 along the X axis (left and right paths), but may not move up and down. Due to this difference, in order to properly exchange wafers between shuttle 152 and the station, lift pins are required that can be moved to each of the baking, chilling and shuttle stations.

14 is a top view of one embodiment of a track lithography tool 200 in which the above embodiments of the present invention may be used. As shown in FIG. 14, the track lithography 200 includes a front end module 210 (sometimes referred to as a factory interface), a central module 212 and a rear module 214 (sometimes referred to as a scanner interface). Shear module 210 generally includes one or more pod assemblies, namely FOUPS (eg, items 216A-D), shear robot 218, and shear treatment racks 220A, 220B. The one or more pod assemblies 216A through D generally receive one or more cassettes 230 capable of receiving one or more substrates "W" or wafers to be processed within the track lithography tool 200. do.

The central module 212 generally includes a first central processing rack 222A, a second central processing rack 222B, and a central robot 224. Rear module 214 generally includes first and second rear processing racks 226A, 226B and rear end robot 228. Shear robot 218 enters the processing modules in shearing racks 220A, 220B; The central robot 224 enters the processing modules in the shear processing racks 220A, 220B, the first central processing rack 222A, the second central processing rack 222B, and / or the rear processing racks 226A, 226B; The rear end robot 228 enters the processing module in the rear processing racks 226A, 226B and, in some cases, exchanges the stepper / scanner 5 and the substrate.

From Canon USA, Inc., San Jose, Calif., Nikon Precision Inc., Belmont, Calif. Or Tempe, Arizona. Stepper / scanner 5, available from ASML US, Inc., is, for example, a lithographic projection device for use in the manufacture of integrated circuits (ICs). The scanner / stepper tool 5 generates photoresist (resist) deposited on the substrate in a cluster tool to generate circuit patterns corresponding to individual layers of an integrated circuit (IC) device and to be formed on the substrate surface. Exposed to some form of electromagnetic radiation.

Each of the processing racks 220A and 220B, 222A and 222B and 226A and 226B includes multiple processing modules in a vertically stacked arrangement. That is, each of the processing racks may include multiple stacked integrated thermal devices 10, multiple stacked coater modules 232, multiple stacked coater / developer modules 234 including shared dispenses, or tracks. It may include other modules that perform the various processing steps required for the lithography tool. As an example, the coater module 232 can deposit a bottom antireflective coating (BARC), the coater / developer module 234 can be used to deposit and / or develop a photoresist layer, and the integrated thermal device 10 is Baking and chilling operations associated with curing the BARC and / or photoresist layer may be performed.

In one embodiment, system controller 240 is used to control all components and processing performed in cluster tool 200. The controller 240 generally communicates with the stepper / scanner 5, monitors and controls aspects of the processes performed in the cluster tool 200, and controls all aspects of the entire substrate processing process. In certain instances, the controller 240 operates in conjunction with other controllers, such as controllers 46A through 46D, which control the baking plate 20 and the cold plate 30 of the integrated thermal apparatus 10 to control certain aspects of the processing. . Typically, the controller 240, a microprocessor based controller, receives input from a user and / or various sensors in one of the processing chambers, and in accordance with the various inputs and software instructions held in the controller's memory. Properly control chamber components. The controller 240 generally includes a memory (not shown) and a CPU used by the controller to hold the various programs, process the programs, and execute the programs as needed. The memory (not shown) is coupled to the CPU and is local or, such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or other form of digital storage device. It may be remote, one or more easily available memories. Software instructions and data may be coded and stored in the memory for instructing the CPU. A support circuit (not shown) may also be connected to the CPU supporting the processor in a conventional manner. The support circuit may include those well known in the art such as a cache, a power supply, a clock circuit, an input / output circuit group, a subsystem, and the like. The program (or computer instructions) that can be read by the controller 240 determines which work should be performed in the processing room (s). Advantageously, the program is software that can be read by the controller 240 and includes instructions for monitoring and controlling processing based on defined rules and input data.

It should be understood that embodiments of the present invention are not limited to use with a track lithography tool as shown in FIG. 14. Instead, embodiments of the present invention are described in US patent application Ser. No. 11 / 112,281 filed on April 22, 2005, entitled Representative Event No. AMAT / 9540. It may be used for any track lithography tool, including many of the various tool configurations described in this specification, incorporated herein by reference for any purpose, and configurations not described in the 11,112,281 application.

FIG. 15 is a flowchart illustrating an example of a processing procedure for a semiconductor substrate processed in the track lithography tool 200. One of ordinary skill in the art will recognize that the various processing steps described below in connection with FIG. 15 provide a number of different opportunities for the methods of the present invention to be used. In addition, various embodiments of the methods of the present invention are not limited to the specific processing described in FIG. 15, and are highly advanced (and in certain complementary baking and chilling steps) for thermal treatment of a plurality of substrates in accordance with a specific processing recipe. One of ordinary skill in the art will recognize that the control may be used in any series of processing steps or applications where control is required.

FIG. 15 illustrates one embodiment of a series of method steps 300 that may be used to deposit, expose, and develop a layer of photoresist material formed on a substrate surface. The lithographic treatment generally comprises the following steps: substrate transfer to coating module step 310, bottom anti-reflective coating (BARC) coating step 312, BARC baking step 314, cold after BARC Step 316, photoresist coating step 318, post photoresist baking step 320, post photoresist cold step 322, optical edge bead removal (OEBR) step 324, exposure step 326, post exposure bake; PEB) step 328, post-exposure bake cold step 330, develop step 332, substrate clean step 334, post develop cold step 336 and transfer substrate to pod 338. In other embodiments, the series of method steps 300 is rearranged, altered, one or more steps removed, additional steps added, or both unchanged from the basic scope of the invention. May further step may be combined into a single step.

In step 310, the semiconductor substrate is transferred to a coating module. Referring to FIG. 14, substrate transfer step 310 to the coating module is generally defined as a process that causes the shear robot 218 to remove the substrate from the cassette 230 in one of the pod assemblies 216. A cassette 230 containing one or more substrates "W" is placed in the pod assembly 216 by a user or some external device (not shown) so that the substrate is controlled by software held in the system controller 240. User-defined substrate processing allows processing in the cluster tool 200.

BARC coating step 310 is a step used to deposit an organic material on the surface of the substrate. The BARC layer is typically an organic coating applied to the substrate prior to the photoresist layer, which layer, if not passed through this step, back into the resist from the surface of the substrate during the exposure step 326 performed in stepper / scanner 5 It is applied to absorb the light that can be reflected. If this reflection is not prevented, standing waves will settle in the resist layer, causing the shape size to vary with the local thickness of the resist layer. The BARC layer can also be used to flatten (ie, planarize) the topography of the substrate surface, which generally appears after completing the steps of manufacturing multiple electronic devices. The BARC material fills around and over the shapes to form a flatter surface for photoresist application and reduces local variations in resist thickness.

BARC coating step 310 is typically performed using a conventional spin-on resist dispense process in which a significant amount of BARC material is deposited on the surface of the substrate while the substrate is rotating, which is a BARC material. The solvent in it is allowed to evaporate, thereby changing the material properties of the deposited BARC material. In order to control the solvent evaporation process and the properties of the layer formed on the substrate surface, air flow rate and exhaust flow rate are often controlled in the BARC treatment chamber.

Post-BARC baking step 314 is used in BARC coating step 312 to ensure that all solvents are removed from the deposited BARC layer, and in some cases to promote adhesion of the BARC layer to the surface of the substrate. It is a step. The temperature of the post-BARC baking step 314 depends on the type of BARC material deposited on the surface of the substrate, but will generally be lower than about 250 ° C. The time required to complete the post-BARC bake step 314 will depend on the temperature of the substrate during the post-BARC bake step, but will generally be shorter than about 60 seconds.

The cold step 316 after BARC is a step used to control and ensure that the time the substrate is above ambient temperature is constant so that all substrates exhibit the same time-temperature profile, thereby minimizing process deformability. Deformation in the BARC processing time-temperature profile, which is one component of the wafer history of the substrates, can affect the properties of the deposited film layer and is therefore often controlled to minimize processing deformation. The cold step 316 after BARC is typically used to cool the substrate after the BARC post bake step 314 to or near ambient temperature. The time required to complete the post-BARC chill step 316 will depend on the temperature of the substrate in the post-BARC bake step, but will generally be shorter than about 30 seconds.

Photoresist coating step 318 is a step used to deposit a photoresist layer on the surface of the substrate. The photoresist layer deposited during photoresist coating step 318 is typically a light sensitive organic coating applied onto the substrate, and then stepper to form a patterned feature on the surface of the substrate. / Is exposed in scanner 5. Photoresist coating step 318 is typically performed using a conventional spin-on resist dispensing process in which a substantial amount of photoresist material is deposited on the surface of the substrate while the substrate is rotating, which is characterized by the solvent in the photoresist material. Evaporation, thereby causing the material properties of the deposited photoresist layer to be altered. The air flow rate and the exhaust flow rate in the photoresist processing chamber are controlled to control the solvent evaporation process and the properties of the layer formed on the substrate surface. In some cases, in order to control the evaporation of the solvent from the resist during the photoresist coating step, it is necessary to control the partial pressure of the solvent on the substrate surface by controlling the exhaust flow rate and / or by injecting the solvent near the substrate surface. There may be a need. Referring to FIG. 14, in one example of a photoresist coating process, the substrate is first placed on a wafer chuck in the coater / developer module 234. The motor rotates the wafer chuck and the substrate while the photoresist is dispensed at the center of the substrate. The rotation imparts angular torque to the photoresist, which pushes the photoresist in the radial direction, ultimately covering the substrate.

Photoresist baking step 320, in photoresist coating step 318, to ensure that all solvents are removed from the deposited photoresist layer, and in some cases to promote adhesion of the photoresist layer to the BARC layer. This is the step used. The temperature of the post-resist post-baking step 320 depends on the type of photoresist material deposited on the surface of the substrate, but will generally be lower than about 350 ° C. The time required to complete the post-resist bake step 320 will depend on the temperature of the substrate during the post-resist bake step, but will generally be shorter than about 60 seconds.

The chill step 322 after the photoresist is a step used to control the time at which the temperature of the substrate is above ambient temperature so that all substrates exhibit the same time-temperature profile, thereby minimizing processing strain. Deformation in the time-temperature profile can affect the properties of the deposited film layer, and is therefore often controlled to minimize process deformation. Therefore, the temperature of the post-resist chill step 322 is used to cool the substrate after the post-resist bake step 320 to an ambient temperature or close to it. The time required to complete the post photoresist chill step 322 will depend on the temperature of the substrate in the post photoresist bake step, but will generally be shorter than about 30 seconds.

Optical edge bead removal (OEBR) step 324 radiates the deposited photo-sensitive photoresist layer (s), such as the layer formed during photoresist coating step 318 and the BARC layer formed during BARC coating step 312. A process used to expose to a source (not shown) so that either or both layers are removed from the edge of the substrate and the edge exclusion of the deposited layer can be more uniformly controlled. to be. The wavelength and intensity of the radiation used to expose the surface of the substrate will depend on the type of BARC and photoresist layer deposited on the surface of the substrate. The OEBR tool can be purchased from, for example, USHIO AMERICA, Inc. of Cypress, California.

The exposure step 326 is a lithographic projection step applied by a lithographic projection apparatus (eg, stepper scanner 5) to form a pattern used for manufacturing the integrated circuit (IC). Exposure step 326 is performed by exposing photosensitive materials, such as the photoresist layer formed during photoresist coating step 318 and the BARC layer formed during BARC coating step 312, to some form of electromagnetic radiation, thereby providing individual layers of an integrated circuit (IC) device. The circuit pattern corresponding to the above is formed on the surface of the substrate.

Post exposure bake (PEB) step 328 heats the substrate immediately after exposure step 326 to stimulate diffusion of photoactive compound (s) and reduce the effects of standing waves in the resist layer. Are the steps used. For chemically amplified resists, the PEB step also causes a catalytic chemical reaction that changes the solubility of the resist. The control of temperature during PEB is typically critical for critical dimension (CD) control. The temperature of PEB step 328 will depend on the type of photoresist material deposited on the surface of the substrate, but will be lower than about 250 ° C. The time required to complete the PEB stage 328 will depend on the temperature of the substrate during the PEB stage, but will generally be shorter than about 60 seconds.

Post-exposure baking (PEB) cold step 330 is a step used to control that the time at which the temperature of the substrate becomes above ambient temperature is controlled to ensure that all the substrates exhibit the same time-temperature profile, thereby minimizing processing strain. Deformation in the PEB treatment time-temperature profile can affect the properties of the deposited film layer and is therefore often controlled to minimize treatment deformability. Therefore, the temperature of PEB chill step 330 is used to cool the substrate after PEB step 328 to ambient temperature or close to it. The time required to complete the PEB chill step 330 will depend on the temperature of the substrate in the PEB step, but will generally be shorter than about 30 seconds.

Developing step 332 is a process that uses a solvent to cause chemical or physical changes in the exposed or unexposed photoresist and BARC layers to expose the pattern formed during exposure processing step 326. The development treatment may be a spray or immersion or puddle type treatment used to dispense developer solvent. In certain development processes, the substrate is coated with a fluid layer, typically neutral water, prior to application of the developer solution and rotated during the development process. Thereafter, the developer is uniformly coated on the surface of the substrate by applying a developer solution. In step 334, a cleaning solution is supplied to the surface of the substrate to terminate the developing process. By way of example only, the cleaning solution may be neutral water. In other embodiments, a cleaning solution of neutral water combined with a surfactant is provided. Those skilled in the art will recognize various modifications, changes and alternatives.

In step 336, the substrate is cooled after the developing step 332 and the cleaning step 334. In step 338, the substrate is transferred to a pod to complete the processing. Transferring the substrate to the pod in step 338 generally involves processing the shear robot 218 to return the substrate to the cassette 230 in either of the pod assemblies 216.

Based on the description of the invention herein, one of ordinary skill in the art will appreciate that embodiments of the invention may, after other baking steps 314 and BARC, after BARC, among other steps not shown in FIG. 15. During the cold step 316, during the post-PR baking step 320 and the post-PR cold step 322, during the post-exposure bake step 328 and the post-exposure cold step 330, and during the post-development cold step 336, it is useful to heat and / or cool the substrate. It will be appreciated that it can be used. Those skilled in the art will also recognize that certain of the various baking and chilling processes described above have different baking and / or chilling requirements. Thus, one of ordinary skill in the art would appreciate that the functional specifications of the particular baking plate 20 and / or cold plate 30 incorporated into the integrated heating apparatus allow the baking and / or cold plate to be heated and cooled respectively. It will be appreciated that it will depend on the material being made. For example, BARC materials may be sufficiently heated with low temperature, low precision baking plates (eg, up to 250 ° C., single zone heaters), while photoresist materials may be high temperature, medium precision Baking plates (eg, up to 350 ° C., three zone heaters) may be required, and post-exposure baking treatments may be performed at low temperature, high precision baking plates (eg, up to 250 ° C., five zones). Heaters). Accordingly, embodiments of the present invention are not limited to any particular type or configuration of baking plate 20 or chill plate 30. Instead, each baking plate 20 and cold plate 30 is generally as required by the application in which the baking plate and cold plate will be used, as may be determined by one of ordinary skill in the art. It can be designed to specific performance criteria.

While the invention has been described in connection with specific embodiments and specific embodiments thereof, it should be understood that other embodiments may be within the spirit and scope of the invention. Accordingly, the scope of the invention should be determined with reference to the appended claims, along with the full scope of equivalents thereof.

1 is a conceptual diagram of one embodiment of an integrated thermal device according to the present invention.

FIG. 2A is a simplified perspective view of the integrated thermal device shown in FIG. 1.

FIG. 2B is a perspective view of the integrated thermal device shown in FIG. 2A with the top of the device removed. FIG.

3 is a block diagram illustrating a series of events performed in accordance with one embodiment of the method of the present invention.

4 is a cross-sectional view of the baking station 12 and the cold station 14 shown in FIG. 2B.

5 is a perspective view of the cold shuttle 18 shown in FIG. 2B, in accordance with an embodiment of the present invention.

FIG. 6 is a perspective view of a state in which baking station 12 and cold station 14 are removed of a portion of the integrated thermal arrangement shown in FIG. 2B.

FIG. 7 is a perspective view of the cold plate 30 shown in FIG. 2B, in accordance with one embodiment of the present invention. FIG.

8 is a perspective view of the baking plate 20 shown in FIG. 2B, in accordance with an embodiment of the present invention.

9 is a perspective view of a cross section of the baking plate 20 shown in FIG. 8.

10 is a cross-sectional view of the baking plate 20 shown in FIGS. 8 and 9.

FIG. 11 is a bottom perspective view of the baking station 12 shown in FIG. 8.

12 is a simplified cross-sectional view of the joinable heat sink 140 shown in FIG.

13 is a conceptual diagram of another embodiment of an integrated thermal device according to the present invention.

14 is a top view of one embodiment of a track lithography tool in accordance with one embodiment of the present invention.

FIG. 15 is a flowchart illustrating an example of a processing procedure for a semiconductor substrate processed by the track lithography tool shown in FIG. 14.

Claims (25)

In an integrated thermal device for processing a substrate, A baking station comprising a baking plate for holding and heating the substrate; A chill station comprising a chill plate for holding and cooling the substrate; And A substrate transfer shuttle for transferring a substrate from the baking plate to the cold plate along a linear path in left and right directions in the thermal device, and raising and lowering the substrate along a vertical path in the integrated thermal device; The substrate transfer shuttle includes a temperature control surface capable of cooling the substrate, a plurality of coolant channels that enable active temperature control of the temperature control surface, and a plurality of arranged around the substrate receiving area portion of the temperature control surface. Button, The plurality of buttons secure a substrate within the substrate receiving area of the temperature control surface. The method of claim 1, Further comprising a shuttle station, wherein at the shuttle station a substrate is transferred into the thermal apparatus and can be lifted by the substrate transfer shuttle. The method of claim 2, And a housing for receiving the baking plate, cold plate and shuttle station. The method of claim 3, The baking plate, cold plate and shuttle station are arranged linearly along the length of the housing. 5. The method of claim 4, The shuttle station is located between the baking plate and the cold plate. 5. The method of claim 4, The cold plate is located between the baking plate and the shuttle station. The method of claim 6, And further comprising a particle block located above the cold plate, wherein the substrate transfer shuttle moves along the left and right linear paths above the particle block between the shuttle station, the cold plate and the baking plate in the housing. Thermal device. 5. The method of claim 4, And the substrate transfer shuttle moves from one end of the length of the housing to the other end along a linear path in the horizontal direction. delete delete delete A substrate processing method in an integrated thermal apparatus comprising a baking plate and a cold plate, Transferring the substrate to which the liquid resist material has been applied into the integrated thermal device; Positioning the substrate on the baking plate; Heating the substrate with the baking plate; Transferring the substrate from the baking plate to the cold plate, wherein the transfer moves the substrate along a linear path in left and right directions and along a path in a vertical direction with a substrate transfer shuttle in the integrated thermal device. Comprising; Cooling the substrate with the cold plate; And Transferring the substrate out of the integrated thermal device, Transferring the substrate into the integrated thermal device includes: (i) placing the substrate on a plurality of lift pins located in a shuttle station extending through the substrate receiving surface of the shuttle; and (ii) placing the substrate. Moving the shuttle in a vertical direction to lift it from the lift pins; Positioning the substrate in the baking plate includes transferring the substrate to the baking station by the shuttle by moving the shuttle from the shuttle station to the baking station along a linear path in a horizontal direction. Treatment method. A substrate processing method in an integrated thermal apparatus comprising a baking plate and a cold plate, Transferring the substrate to which the liquid resist material has been applied into the integrated thermal device; Positioning the substrate on the baking plate; Heating the substrate with the baking plate; Transferring the substrate from the baking plate to the cold plate, wherein the transfer moves the substrate along a linear path in left and right directions and along a path in a vertical direction with a substrate transfer shuttle in the integrated thermal device. Comprising; Cooling the substrate with the cold plate; And Transferring the substrate out of the integrated thermal device, Transferring the substrate into the integrated thermal device includes: (i) placing the substrate on a plurality of lift pins located in a shuttle station extending through the substrate receiving surface of the shuttle; and (ii) placing the substrate. Moving the shuttle in a vertical direction to lift it from the lift pins; The transferring of the substrate from the baking plate to the cold plate may include: placing the substrate on a plurality of lift pins extending through the baking plate, lifting the substrate by the shuttle, and an upper surface of the cold plate. Disposing the substrate on a plurality of lift pins extending through and lowering the lift pins into the cold plate to lower the substrate onto the cold plate. The method of claim 13, Positioning the substrate in the baking plate includes transferring the substrate to the baking station by the shuttle by moving the shuttle along a linear path from side to side in the baking station from the shuttle station to the baking station. Treatment method. The method of claim 12, The transferring of the substrate from the baking plate to the cold plate may include: placing the substrate on a plurality of lift pins extending through the baking plate, lifting the substrate by the shuttle, and an upper surface of the cold plate. Placing the substrate in a plurality of lift pins extending through the substrate; and lowering the lift pin into the cold plate to lower the substrate onto the cold plate. The method according to claim 13 or 15, The transferring of the substrate from the baking plate to the cold plate may include moving the shuttle along a linear path in a horizontal direction on a particle blocking portion located on the cold plate, and lowering the shuttle along a vertical path. And moving the shuttle along a linear path in a left and right direction under the particle blocking unit. The method according to claim 12 or 13, The shuttle may be located at a shuttle station, the baking plate is located at a baking station, the cold plate is located at a cold station, and the integrated thermal device includes a housing that houses the baking station, cold station and shuttle station. Substrate processing method. The method of claim 17, And the baking station, cold station and shuttle station are arranged linearly along the length of the housing. The method of claim 18, And the shuttle station is located between the baking plate and the cold plate. The method of claim 18, And the cold plate is positioned between the baking plate and the shuttle station. In an integrated thermal device for processing a substrate, A housing comprising a first entry slot and a second entry slot, each of the first and second entry slots being sized to allow a semiconductor substrate to be transferred into or out of the housing; A first entry shutter moveable between an open position that allows the substrate to be transported through the first entry slot and a blocking position that prevents the substrate from being transported through the first entry slot; A second entry shutter moveable between an open position that allows the substrate to be transported through the second entry slot and a blocking position that prevents the substrate from being transported through the second entry slot; A baking station located in the housing and including a baking plate for heating a substrate supported on a surface of a hot spot; A cooling station located in the housing and including a chill plate for cooling the substrate supported on the surface; A shuttle station located within the housing and allowing a substrate transfer shuttle to lift a substrate transferred into the thermal device through the first entry slot, wherein the substrate transfer shuttle follows a linear path in a lateral direction within the housing. Transferring the substrate from the baking plate to the cold plate, and raising and lowering the substrate along an up and down path in the housing. The method of claim 21, Said housing forming a rectangular shaped receptacle, said baking station, cold station and shuttle station arranged linearly along the length of said receptacle. The method of claim 22, The shuttle station is located between the baking station and the cold station. The method of claim 22, The cold station is located between the baking station and the shuttle station. In the track lithography tool, A plurality of pod assemblies receiving one or more cassettes of a wafer; And One or more robots for transferring a wafer from one or more of the pod assemblies to a processing module in the track lithography tool, wherein at least one of the processing modules includes an integrated thermal device The integrated thermal device, A baking station comprising a baking plate for holding and heating the substrate; A chill station comprising a chill plate for holding and cooling the substrate; A substrate transfer shuttle for transporting the substrate from the baking plate to the cold plate along a linear path in the lateral direction in the thermal device, and raising and lowering the substrate along a path in the vertical direction in the integrated thermal device; The substrate transfer shuttle includes a temperature control surface capable of cooling the substrate, a plurality of coolant channels that enable active temperature control of the temperature control surface, and a plurality of arranged around the substrate receiving area portion of the temperature control surface. Button, And the plurality of buttons secure a substrate in the substrate receiving region of the temperature control surface.

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