JPH11251363A - Flip-chip mounting method and structure thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable connection of a wiring board without the provision of soft material for lands of the board at mounting a flip chip and moreover with a fine pitch. SOLUTION: A semiconductor chip 1 having bumps 3 formed on pads 2 of the chip is mounted facedown on a wiring board 5 having lands 4. The lands 4 have a sectional shape which tapere toward its top side and are made of a material that is harder than the material of the bumps 3. When the tops of the lands 4 are embedded into the bumps 3 to electrically connect the lands 4 and bumps 3, the need for providing a soft material for the lands 4 can be eliminated, and connecting with fine pitches becomes possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip-chip mounting method for mounting a semiconductor chip on a wiring board by face-down and a mounting structure thereof.

[0002]

2. Description of the Related Art FIG. 13 shows a conventional structure disclosed in Japanese Patent Application Laid-Open No. 6-333982 for mounting a flip chip on a wiring board. In this structure, the wiring substrate 25 and the semiconductor chip 21 are electrically connected to each other by thermocompression bonding of the Au lands 27 and the Au balls 24.
Therefore, two layers of Au lands 27 are formed on the electrode pads 26 of the wiring board 25, while two layers of Au balls 24 are formed on the electrode pads 22 of the semiconductor chip 21. The Au ball 24 has a sharp anchor 2
3 is provided, and the anchor portion 23 is bonded to the Au land 27 by thermocompression bonding.
Are embedded in the Au lands 27 for electrical connection.

In such a flip-chip mounting structure, when the Au balls 24 on the semiconductor chip 21 side and the Au lands 27 on the wiring board 25 are superimposed, the center positions of the Au balls 24 are slightly shifted, Even if the direction of the load applied to the back surface of the semiconductor chip 21 slightly deviates from the direction perpendicular to the main surface of the wiring board 25, the Au balls 24 on the semiconductor chip 21 side are unlikely to slide in the lateral direction, so that the connection failure is caused. Can be prevented.

[0004]

However, in the above-mentioned conventional flip-chip mounting structure, the semiconductor chip 2
In order to embed the anchor portion 23 of the Au ball 24 provided on one side, a soft material such as a soft Au land 27 or conductive rubber must be provided on the electrode land 26 of the wiring board 25. For this reason, there is an increase in manufacturing costs due to an increase in the number of processes and material costs.

In order to secure mounting accuracy, the land width of the electrode land 26 or the Au land 27 of the wiring board 25 must be larger than the pad width of the electrode pad 22 of the semiconductor chip 21. Wiring board 25
It is determined by the land pitch of the electrode lands 26 on the side. Therefore, it is necessary to secure a wide land width on the wiring board 25 side, so that it is difficult to use the wiring board 25 having a small pitch and it is difficult to connect at a fine pitch.

The present invention has been made in consideration of such conventional problems, and allows a semiconductor chip to be mounted without providing a flexible material on a wiring board, and furthermore, to connect at a fine pitch. It is an object of the present invention to provide a flip-chip mounting method and a mounting structure capable of easily performing the flip-chip mounting.

[0007]

According to a first aspect of the present invention, there is provided a flip chip mounting method for mounting a semiconductor chip having bumps formed on pads on a wiring board having lands by face-down. In the flip-chip mounting method, a land having a tapered cross-sectional shape on the top side is formed on the wiring board, and a bump whose material is softer than the material of the land is formed on the pad, and the top of the land is bumped. The land and the bump are electrically connected by being buried in the substrate.

According to the present invention, the land having a cross-sectional shape whose tapered top is tapered is electrically connected to the land by embedding the land in a bump softer than the land. Therefore, it is not necessary to provide a soft material on the land. Flip chip mounting can be performed at a fine pitch equivalent to the pitch.

According to a second aspect of the present invention, in the first aspect, the land has a trapezoidal or triangular cross-sectional shape.

According to the present invention, since the land has a trapezoidal or triangular cross-sectional shape, it can be embedded in the bump with a small pressing force. For this reason, the occurrence of chip crack defects in the semiconductor chip is small, and the flip chip can be mounted at a fine pitch equivalent to the pitch of the bumps.

According to a third aspect of the present invention, in the first aspect, the land has a trapezoidal cross-sectional shape, and a planar shape of a top portion embedded in the bump is substantially circular or T-shaped. And

According to this invention, since the planar shape of the top of the land embedded in the bump is substantially circular or T-shaped,
Even if a force parallel to the wiring direction is applied, a displacement between the bump and the land is less likely to occur, and a displacement error can be prevented.

According to a fourth aspect of the present invention, there is provided a flip chip mounting structure for mounting a semiconductor chip having bumps formed on pads face-down on a wiring board having lands, wherein the bumps are formed on the lands. It is a material softer than the material, the cross-sectional shape of the land is tapered on the top side, and the top is set smaller than the width of the tip of the bump, and the top of the land is embedded in the tip of the bump. It is characterized by being.

According to the present invention, since the land and the bump are connected only by embedding the top of the tapered land in the tip of the bump made of a material softer than the land, the electrical connection area between the land and the bump is increased. And cost can be reduced.

According to a fifth aspect of the present invention, in the fourth aspect, the width of the cross section of the land on the bottom side is set to a size not exceeding the width of the base end of the bump. It is characterized by the following.

According to the present invention, in addition to the function of claim 4,
Since the width of the bottom of the land does not exceed the width of the base end of the bump, it is not necessary to secure a large width of the land, and the pitch of the land can be reduced, and it is equal to the pitch of the bump. be able to.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below. In each of the embodiments, the same elements are denoted by the same reference numerals and correspond to each other.

(Embodiment 1) FIG. 1 is a sectional view of a flip-chip mounting structure according to Embodiment 1 of the present invention, and FIG.
2 is an enlarged cross-sectional view of the flip chip bonding portion, and FIG. 3 is a plan view of the flip chip bonding portion of FIG. 4 and 5 show a process of mounting a semiconductor chip.

This mounting structure, as shown in FIG. 1, includes a semiconductor chip 1 and a wiring board 5, and the semiconductor chip 1 and the wiring board 5 are electrically connected by bumps 3 and lands 4. The semiconductor chip 1 is mounted.

The semiconductor chip 1 uses a compound semiconductor such as GaAs or another semiconductor. The bumps 3 are formed on the pads 2 on the circuit surface of the semiconductor chip 1 by plating or wire bonding. The material of the bump 3 is a soft material such as Au or solder, and a material softer than the material of the land 4 is used.

In the illustrated embodiment, the planar shape of the bump 3 is a circle, an ellipse, or a square as shown in FIG. When the plane is circular, the thickness is 20 to 50 μm, and the minimum width of the tip, that is, the diameter of the circle inscribed in the tip is 50 μm.
It is about.

The wiring board 5 has an insulating substrate 10 such as polyimide or glass epoxy, and a conductor such as Cu embedded in the insulating substrate 10. The lands 4 are connected to the conductors in the wiring board 5 and are exposed from the surface of the wiring board 5 by etching the surface of the wiring board 5.

The material of the land 4 is a conductor such as Cu.
The thickness is set to 12 μm or less. In this embodiment, the land 4 has an isosceles trapezoidal cross section in which a lower bottom 4a as a bottom and an upper bottom 4b as a top are connected by a hypotenuse 4c inclined at the same angle. More specifically, the land 4 is formed in a tapered trapezoidal cross section in which the upper bottom 4b as the top is shorter than the lower bottom 4a as the bottom. The width of the bottom 4a is equal to the width of the bump 3, whereas the width of the top 4b is 10 μm larger than the width of the tip of the bump 3.
The size is smaller than 15 μm or less, and can be embedded in the bump 3 at the time of mounting. An electrical connection state is maintained by the anchor effect by this embedding. In the present embodiment, the width of the bottom 4a is made equal to the width of the bump 3 so that the width of the bottom 4a does not exceed the width of the base end of the bump.

The top 4b of the land 4 is subjected to a surface treatment by rust-preventive treatment of the Cu base or Ni plating on the Cu base, followed by Au plating or solder plating on the Cu base. The lands 4 are formed corresponding to the pads of the semiconductor chip 1 as shown in FIG.

The surroundings of the bumps 3 and the lands 4 connecting the semiconductor chip 1 and the wiring board 5 are sealed with a sealing material 6. The sealing material 6 is made of a mixture of a thermosetting insulating organic resin and a filler or an insulating organic resin alone, and is mounted in a paste or film form. As shown in FIG. 1, the sealing material 6 adheres and seals between the circuit surface and the side surface of the semiconductor chip 1 and the land 4 on the wiring board 5.

Next, a flip chip mounting method according to this embodiment will be described. On the pad 2 of the semiconductor chip 1,
The bump 3 is formed with the above-described structure. The land 4 of the wiring board 5 has an etch factor of 1.5 and a land thickness of 12 μm.
When the land width is set to 50 μm, the width of the land top is 36 μm.

Then, as shown in FIG.
Is supplied so as not to cover each land 4 on the wiring board 5 on which the is mounted. Next, as shown in FIG. 4, the position of the semiconductor chip 1 is adjusted so that the corresponding bumps 3 and lands 4 coincide with the bump formation surface facing down.

After this adjustment, as shown by arrow E in FIG.
The semiconductor chip 1 is moved closer to the wiring board 5. Then, as shown by an arrow F, the lands 4 are buried in the bumps 3 until the state shown in FIG. 2 by applying a pressure to each bump 3 from the back surface of the semiconductor chip 1 to 25 to 100 g / bump. For example, when the tip of the bump 3 is buried to a depth of 10 μm that does not make contact with the substrate 5, the bump 3 can be buried at a pressure of about 70 g / bump because the bump 3 is a soft material. In addition, at the time of embedding, if the load is 200 g / bump or less, almost no deformation occurs in the vertical direction, and there is almost no swelling. At the same time, the sealing material 6 protrudes outside the semiconductor chip 1 and covers the entire above-described portion.

Next, from the back of the semiconductor chip 1,
The sealing material 6 is cured by applying heat of 250 ° C. for 5 to 30 seconds. By this curing, the sealing material 6 adheres the circuit surface and the side surface of the semiconductor chip 1 to the wiring substrate 5. In addition, the sealing improves the adhesive strength between the semiconductor chip 1 and the wiring board 5 and the moisture resistance of the semiconductor chip 1.

According to such an embodiment, the land 4 whose material is softer than the corresponding land 4 on the wiring board 5 and whose top 4b has a narrow width is provided at the tip of the bump 3 having a large area at the tip. Is embedded by pressurization to make it electrically conductive, so that it is not necessary to provide a soft material on the lands 4 of the wiring board 5, and it is possible to perform flip-chip mounting at a fine pitch equivalent to the pitch of the bumps.

(Embodiment 2) In this embodiment, the lands 4 having a trapezoidal cross section are used as in Embodiment 1, but the trapezoids have different dimensions. That is, the land 4 of this embodiment has a thickness larger than that of the land of the first embodiment, is 37.5 μm or less, and the width of the top 4 b is smaller than the diameter of the bump 3 by 15 μm or more. The width of the bottom 4 a is also smaller than the diameter of the bump 3. Therefore, the width dimension on the bottom side is set to a size not exceeding the width dimension of the base end portion of the bump. Specifically, the etch factor is 1.5 and the thickness of the land 4 is 22.
By setting the width of the bottom 4a of the land 4 to 5 μm and the width of the top 4b of the land 4 to 20 μm. Therefore, the width of the top 4b of the land 4 of the second embodiment is smaller than that of the land 4 of the first embodiment.

FIG. 6 is a graph showing the relationship between the pressure (load) when the land 4 is embedded in the bump 3 and the amount of embedded bump when the width of the top 4b of the land 4 is changed. G is a land with a top 4b having a width of 20 μm, and a characteristic curve H is a land with a top 4b having a width of 40 μm. When the embedding amount is 10 μm, the pressing force of 58 g / bump, which is 17 g / bump smaller than that of the land having the top portion 4 b of 40 μm, is sufficient for the land having the top portion 4 b of 20 μm width.
The desired embedding amount can be reached with a small pressure.

As described above, by reducing the width of the land top, the land 4 can be embedded in the bump 3 with a small pressure. For this reason, the semiconductor chip 1 that is vulnerable to pressure
Chip crack failure can be prevented, and a flip chip with a fine pitch can be mounted.

Further, the width of the land bottom is the same as that of the first embodiment, and by reducing the width of the land top,
The land thickness can be made larger than in the first embodiment. As a result, the distance between the semiconductor chip 1 and the wiring board 5 increases, so that the circuit forming surface of the semiconductor chip 1 is less likely to be damaged.

(Embodiment 3) FIGS. 7 and 8 show Embodiment 3, FIG. 7 is an enlarged cross-sectional view of a flip chip bonding portion, and FIG. 8 is a plan view of the flip chip bonding portion of FIG. .

In this embodiment, the land 7 has three sides 7
It has a triangular cross section composed of a, 7b, and 7c. In the case where the cross-sectional structure is made triangular as described above, it is possible to set the thickness to 37.5 μm or to set the width of the bottom 7 c to 30 μm in the first embodiment. In the land 7 having the triangular cross section, when the thickness is 12 μm, which is the same thickness as that of the first embodiment, the width of the bottom 7c is
Smaller than.

The land 7 having such a tapered triangular cross section is used.
In this case, the target embedding amount can be reached even if the pressure applied to the bump 3 is smaller than that of the land having the trapezoidal cross section. In addition, the width of the bottom of the land 7 can be reduced, so that the occurrence of chip crack failure of the semiconductor chip 1 that is vulnerable to pressure can be more reliably prevented, and flip-chip mounting with a finer pitch is possible. Become.

(Embodiment 4) FIGS. 9 to 12 show Embodiment 4 of the present invention. Land 8 in FIGS. 9 and 10
Has a circular shape in plan view at the connection portion 8e with the bump 3, and has a square shape at the wiring portion 8d other than the connection portion with the bump.
The entire land 8 has a trapezoidal cross section in which the top 8b and the bottom 8a are connected by a hypotenuse 8c. The top 8b of the connecting portion 8e of the land 8 is
, And the bottom 8a is substantially equal to the diameter of the bump 3. Further, the top portion 8b of the connection portion 8e is
d is formed to be larger than the width of the top 8b.

The land 9 in FIGS. 11 and 12 is T-shaped when viewed from the top, and the T-shaped head is
The connection part 9e and the leg part are the wiring part 9d. In addition, the entire land 9 is cross-sectionally formed at the top 9b and the bottom 9b.
a is a trapezoid connected by the hypotenuse 9c. Further, the width of the top portion 9b in the connection portion 9e is smaller than the diameter of the bump 3, and the bottom portion 9a is substantially equal to the diameter of the bump 3. The width of the top 9b of the connection portion 9e is larger than the width of the top 9b of the wiring portion 9d.

In such an embodiment, FIG. 9 and FIG.
As shown in FIG. 1, when a force is applied to the semiconductor chip 1 mounted on the wiring board 5 from the outer peripheral side surface of the semiconductor chip 1, that is, a force parallel to the directions of the wiring portions 8d and 9d is applied. When added to the connection portions 8e, 9e between the lands 8, 9 and the bump 3, the width of the top portions 8b, 9b of the connection portions 8e, 9e is larger than the width of the top portions 8b, 9b of the wiring portions 8d, 9d,
Since the connection portions 8e and 9e are buried in the bump 3, the connection portions 8e and 9e have a large resistance to a parallel force. Therefore, the bump 3 and the lands 8, 9 do not come off.

According to such an embodiment, since the connecting portions 8e and 9e of the lands 8 and 9 are buried in the bumps 3, they do not shift even if a force parallel to the wiring direction is applied. For this reason, when the semiconductor chip 1 of the type in which the bumps 3 are juxtaposed only on two opposite sides on the back surface is mounted, it is possible to prevent a misalignment defect between the wiring board 5 and the semiconductor chip 1.

[0042]

As described above, according to the first aspect of the present invention, the land having the cross-sectional shape tapering off at the top is electrically connected to the land by embedding the land in a bump softer than the land. There is no need to provide a soft material on the top, and the mounting can be performed at a fine pitch equivalent to the pitch of the bumps.

According to the second aspect of the present invention, since the land has a trapezoidal or triangular cross-sectional shape, it can be embedded in the bump with a small pressing force. It can be mounted at a fine pitch equivalent to.

According to the third aspect of the present invention, since the planar shape of the top of the land embedded in the bump is substantially circular or T-shaped, the displacement between the bump and the land occurs even when a force parallel to the wiring direction is applied. This makes it difficult to prevent misalignment.

According to the fourth aspect of the invention, the land and the bump are connected only by embedding the top of the tapered land in the tip of the bump made of a material softer than the land.
The electrical connection area between the land and the bump is increased, and the cost can be reduced.

According to the fifth aspect of the present invention, since the width of the land on the bottom side does not exceed the width of the base end of the bump, it is not necessary to secure a large width of the land, and the land pitch can be reduced. Therefore, the land can be made equal to the pitch of the bumps.

[Brief description of the drawings]

FIG. 1 is a sectional view of a mounted state according to a first embodiment of the present invention.

FIG. 2 is an enlarged cross-sectional view taken along line AA in FIG. 3 of a mounting part of the first embodiment;

FIG. 3 is a plan view of a mounting part according to the first embodiment;

FIG. 4 is a cross-sectional view illustrating mounting of the first embodiment.

FIG. 5 is a plan view showing a state in which the sealant of the first embodiment is supplied to the wiring substrate.

FIG. 6 is a characteristic diagram illustrating a relationship between a land embedding amount and a pressing load when a width of a land top is changed.

FIG. 7B is an enlarged view of a mounting part of the third embodiment;
It is a B sectional view.

FIG. 8 is a plan view of a mounting part according to the third embodiment.

FIG. 9 is a plan view of a mounting part according to the third embodiment.

FIG. 10 is a sectional view taken along line CC of FIG. 9;

FIG. 11 is a plan view of another mounting portion of the third embodiment.

FIG. 12 is a sectional view taken along line DD of FIG. 11;

FIG. 13 is a sectional view of a conventional flip chip mounting structure.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Pad 3 Bump 4 Land 5 Wiring board 6 Sealing material

Claims (5)

[Claims] 1. A flip-chip mounting method for mounting a semiconductor chip having a bump formed on a pad on a wiring board having a land by face-down, wherein a land having a tapered cross-sectional shape at the top is formed on the wiring board. On the other hand, a flip chip mounting method characterized in that a bump softer than the material of the land is formed on the pad, and the land and the bump are electrically connected by embedding the top of the land in the bump. . 2. The method according to claim 1, wherein the land has a trapezoidal or triangular cross-sectional shape. 3. The flip-chip mounting method according to claim 1, wherein the land has a trapezoidal cross-sectional shape, and a planar shape of a top portion embedded in the bump is substantially circular or T-shaped. 4. A flip-chip mounting structure for mounting a semiconductor chip having bumps formed on pads face down on a wiring board having lands, wherein the bumps are softer than the lands.
A flip chip, wherein the cross-sectional shape of the land is tapered on the top side, the top is set to be smaller than the width of the tip of the bump, and the top of the land is embedded in the tip of the bump. Mounting structure. 5. The flip-chip mounting structure according to claim 4, wherein the width of the cross section of the land on the bottom side is set to a size not exceeding the width of the base end of the bump.