JPH1124962A - Microcomputer device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ensure easy resetting, when a program runs away, of a microcomputer device which does not have a software reset function. SOLUTION: Runaway detection processing of a microcomputer device is executed (a10) as a part of a main routine processing (a1). When the runaway of the microcomputer device is detected (a11), a PUSH instruction being an instruction for changing the value of a stack pointer in one direction is repetitively executed in stack pointer operation instructions. When the value of the stack pointer becomes abnormal, CPU is reset and the runaway state of the program is dissolved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer widely used for various controls and the like, and more particularly to a microcomputer having a function of detecting a runaway during execution of a program and resetting the program.

[0002]

2. Description of the Related Art Conventionally, various controls and the like have been automatically performed based on a program operation using a microcomputer device (hereinafter sometimes abbreviated as "microcomputer"). For example, an automobile is equipped with various control microcomputer devices called “ECUs”.
A microcomputer that performs a program operation may cause “runaway” which is not an operation during normal program execution due to an error in the program itself or an external noise.

If the microcomputer device goes out of control from the normal program operation, the operation of the microcomputer device for control or the like becomes unpredictable. Even if the runaway is partial, the reliability of the control is reduced. If the microcomputer device has a reset instruction in the instruction set of the CPU, the microcomputer executes the reset instruction when runaway is detected, and restarts the execution of the program from the reset state. When the operation of the CPU starts from the reset state, various data and the like are initialized, and a certain environment is prepared to execute the program.

When the CPU goes out of control, the values of various data and the like prepared in the reset state may become abnormal. Therefore, it is effective to perform a reset when detecting a runaway. When the operator notices a runaway, he operates a reset switch or the like to perform a reset.

[0005] A method of detecting runaway of a microcomputer device by software is generally well known. If it is detected that “runaway” has actually occurred, if the reset instruction is included in the instruction set provided in the CPU of the microcomputer device, the instruction corresponding to the reset instruction is executed in the runaway countermeasure program. What should I do?

Japanese Patent Application Laid-Open No. 62-52647 discloses a prior art about a runaway monitoring system of a microprocessor having a watchdog timer and resetting the CPU when a watchdog pulse is not periodically derived from the CPU. I have. In this prior art, the CPU periodically and repeatedly executes a main routine including a plurality of subroutines. The number of times the subroutine is passed is counted by a counter. If the count value is abnormal at the end of the main routine, the output of the watchdog pulse is stopped. Since the output of the watchdog pulse stops even when the program runs out of control completely,
The watchdog timer operates for both complete runaway and partial runaway of the program, and measures such as resetting the CPU are taken to prevent runaway. JP-A-6-20
In 2909, a runaway processing instruction is arranged at the end of a free memory area of a program memory in which a program of a microcomputer device is stored, and a no-processing instruction is arranged in another free memory area. A prior art has been disclosed in which a runaway processing instruction is executed to stop a runaway even if a program execution address is moved to a free memory area that should not be accessed originally. The runaway processing instruction is an instruction corresponding to a reset instruction, for example, 0 which is an initial value of a program counter.
An instruction to jump to an address or the like is used.

[0007]

As described above, if the CPU is reset while the program is running away,
The runaway condition is expected to be lifted. However, a CPU that does not have a reset command cannot easily reset by software. CPU
The instruction reset has a limitation in the type of code and the number of instructions that can be included. Therefore, CPU
Does not always include a reset instruction.

As a countermeasure against program runaway in a microcomputer having a CPU having no reset instruction, a watchdog timer function is often used as in the prior art of Japanese Patent Application Laid-Open No. 62-52647. However, even with the watchdog timer function, it is not always possible to completely reset at the time of program runaway. For example, if the program execution address temporarily moves to an unused part of the program memory due to a partial program runaway, the program returns to the original program area and a watchdog pulse is generated. , The reset using the watchdog timer function cannot be performed. Although reset cannot be performed, it is not clear how to return to the program area, and a malfunction occurs.

An object of the present invention is to provide a microcomputer device which can easily and surely reset a CPU having no reset instruction.

[0010]

SUMMARY OF THE INVENTION The present invention provides a CPU having a function of shifting to a reset state when an abnormality of a stack pointer is detected, and a runaway detection for detecting whether or not a runaway occurs during a program execution operation of the CPU. Means for preventing runaway by resetting the CPU by causing a stack pointer to become an abnormal value by executing a stack pointer operation instruction when runaway is determined by the runaway detection means. Is a microcomputer device.

According to the present invention, during the program execution operation of the CPU, when the runaway detecting means detects that a runaway has occurred, the runaway countermeasure means executes a stack pointer operation instruction to make the stack pointer abnormal. You. Since the CPU has a function of shifting to a reset state when an abnormality of the stack pointer is detected, the CPU can shift to the reset state when the stack pointer becomes abnormal.

Further, the present invention provides a CPU having a function of shifting to a reset state when an abnormality of a stack pointer is detected.
And a program memory in which an operation program of the CPU is stored and a stack pointer operation instruction for making the stack pointer abnormal is stored in an unused portion.

According to the present invention, the program memory storing the operation program of the CPU stores a stack pointer operation instruction for making the stack pointer abnormal in an unused portion. When the program shifts to an unused portion of the program memory as a result of the program runaway, the CPU reads and executes a stack pointer operation instruction that makes the stack pointer abnormal. If the value of the stack pointer becomes abnormal,
Since the state shifts to the reset state, the runaway state can be eliminated.

Further, according to the present invention, a CPU having a reset input terminal, a runaway detecting means for detecting whether or not runaway has occurred during a program execution operation of the CPU, and a runaway detecting means for determining that runaway has occurred. When done, CP
And a reset output means for outputting a signal for resetting the CPU to a reset input terminal of U.

According to the present invention, the runaway detecting means
If it is determined that a runaway has occurred during the execution operation of the CPU, a signal for resetting the CPU is applied to the reset input terminal of the CPU from the reset output means to the reset input terminal. , The runaway state can be canceled.

The present invention further provides a CPU having a reset input terminal and a signal for resetting the CPU to the reset input terminal when a predetermined output is derived in response to an output from a predetermined output terminal of the CPU. A microcomputer device comprising: a reset output unit; and a program memory in which an operation program of the CPU is stored, and an unused portion stores an instruction for deriving a predetermined output to the reset output unit.

According to the present invention, when the CPU runs away during the execution of the program and shifts to an unused portion of the program memory, the CPU outputs a predetermined output to the reset output means,
A signal for resetting is output to the input terminal of U. If the program execution address shifts to an unused portion due to a runaway, the reset state can be reliably transferred.

Further, according to the present invention, there is provided a CPU which starts a program execution operation from a specific start address after reset.
And a runaway detecting means for detecting whether runaway has occurred during the program execution operation of the CPU, and when the runaway detecting means determines that runaway has occurred, the execution of the program is shifted to the start address. And a runaway countermeasure means.

According to the present invention, the runaway detecting means
When it is determined that a runaway has occurred during the execution of the program, the execution of the program shifts to a specific start address where the execution of the program is started after the reset, so that the runaway state can be eliminated.

[0020]

FIG. 1 shows a schematic system configuration of a microcomputer device 1 according to a first embodiment of the present invention. The CPU 2 is connected via a system bus 4 to a program memory 3 including a ROM for storing its operation program and a RAM used as a work area. The CPU 2 includes a program counter (hereinafter abbreviated as “PC”) 5, a stack pointer (hereinafter abbreviated as “SP”) 6, and the like. P
C5 is used to refer to an address of a memory area where a program to be executed by the CPU 2 is stored in the program memory 3, and when a code of a normal program is read, an automatic address is designated so as to designate the next address. Is changed to In SP6, an address value is set so as to access a stack area set in the RAM in the program memory 3. When the jump to the subroutine is performed, the return address is stored in the address of the program memory 3 indicated by SP6, and the value of SP6 is changed, for example, to increase. When a return instruction or the like for returning from the subroutine is executed, the value of SP6 is changed so as to decrease, for example, the return address is read from the address designated by SP6 to PC5, and the program returns to the original program. A push (PUSH) instruction, a pop (POP) instruction, and the like are generally provided to save values of various registers and the like in the CPU 2 in the stack area and to read the values from the stack area. These instructions increase or decrease the value of SP6 relative to the current value.
Some microcomputers have an instruction to directly change the value of SP6.

It is assumed that the CPU 2 has a function of shifting to a reset operation when the value of SP6 deviates from a previously permitted value. If the value of SP6 becomes abnormal and goes out of the address area of the RAM, for example, a normal stack operation cannot be performed. Therefore, in order to avoid such a situation, a function of monitoring the value of SP6 may be provided. is there. In some microcomputers, a stack area is not provided in an external memory, and
It may be provided in an internal register or memory of the PU. In a CPU having such an architecture, the stack area is severely restricted, and protection when an SP value becomes abnormal is further improved.
Required.

FIG. 2 shows processing for monitoring runaway of a program using the CPU 2 shown in FIG. 1 and performing a reset operation when runaway is detected. The processing of the main routine is performed from step a1. At the end of the main routine, microcomputer runaway detection processing is performed in step a10. The microcomputer runaway detection process can be performed by a subroutine counting operation, for example, as shown in the prior art of Japanese Patent Application Laid-Open No. 62-52647. If it is determined in step a11 that the microcomputer has not run away, the program proceeds to the program operation of the next module in step a12, and further returns to the main routine processing in step a1. If runaway of the microcomputer is detected in step a11, a stack pointer operation instruction is executed in step a13. This stack pointer operation instruction is, for example, P
An infinite loop that repeats either the USH or POP instruction. When the PUSH instruction is repeatedly executed, the value of SP6 is sequentially changed. When the value exceeds the limit range, the CPU 2 is reset.

FIG. 3 shows the operation of the second embodiment of the present invention. This embodiment is performed with a system configuration as shown in FIG. 1, and a program memory 3 stores a main routine processing program as shown in FIG. That is, the main routine is repeatedly executed from step ba1 to step bam. Program memory 3
The unused portion 3x stores a stack pointer operation instruction as shown in FIG. 3B. That is, step b
b1, step bb2, step bb3,... step b
In bn, for example, a PUSH instruction is stored. The same applies to another stack pointer operation instruction, for example, a POP instruction. When the program runs away from the main routine shown in FIG. 3A and shifts to the unused portion 3x shown in FIG. 3B, the value of SP6 changes in either direction of increasing or decreasing. CPU beyond limit
2 is reset.

FIG. 4 shows a schematic electrical configuration of a third embodiment of the present invention. In the microcomputer device 11 of the present embodiment, the output from the output port 14 is connected to the reset input terminal 13 of the CPU 12. The reset input terminal 13 can reset the CPU 12 by a low level input, for example. Normally, the reset input terminal 13 is pulled up by the resistor 15 to the DC positive voltage Vcc. The CPU 12 is connected to the program memory 3 via the system bush, and executes an instruction according to the address value of the PC 5.

FIG. 5 shows an operation program according to this embodiment. Steps c1 to c12 are the same operations as steps a1 to a12 in FIG. At Step c11, the microcomputer 1
Step c13 which is the operation when the runaway of No. 1 is detected
Then, an instruction to output a low level to the output port 14 is executed. Since an instruction to execute a low-level output to the output port 14 is repeated in an infinite loop, a low-level input signal is continuously supplied to the reset terminal 13 from the output port 14, and the CPU 12 is reset.

FIG. 6 shows the operation of the fourth embodiment of the present invention. This embodiment also assumes that a microcomputer device 11 as shown in FIG. 4 is used. FIG.
As shown in FIG. 3A, steps da1 to dam, which are main routine processes, are performed in the main routine process of FIG. 3A, that is, steps ba1 to ba.
It is equivalent to m. The program memory 3 shown in FIG.
The instruction of the unused portion 3x is an instruction for giving a low-level output to the output port 14 in all of the steps db1, db2, db3,..., Step dbn.
Thus, when the program runs away and accesses the unused portion 3x, a low level is output to the output port 14, the CPU 12 is reset from the reset input terminal 13, and the runaway state can be eliminated.

FIG. 7 shows the operation of the fifth embodiment of the present invention. In the present embodiment, it is basically feasible regardless of the hardware configuration of the microcomputer device. Step e1 to step e1
Up to 2, the same operations as those in steps a1 to a12 in FIG. 2 are performed. If it is determined in step e11 that the microcomputer device is out of control, step e11 is executed.
At 13, a jump AAA instruction is executed. Where AAA
Is an address to be executed after the CPU is reset. The CPU is generally automatically reset by hardware when the power is turned on, and starts executing the program from a specific address, for example, address 0 or the last address. In this embodiment, when a runaway of the program is detected, the program execution is restarted from the head address.

[0028]

As described above, according to the present invention, when a runaway is detected during the execution of a program, a program for making the value of the stack pointer abnormal is executed, and the value of the stack pointer becomes abnormal and the CPU becomes abnormal. Performs a reset operation, so that runaway can be detected and reset can be easily and reliably performed even if the reset instruction is not included in the instruction set of the CPU.

Further, according to the present invention, if a runaway occurs during execution of a program by the CPU and the execution address shifts to an unused portion of the program memory, a stack pointer operation instruction for making the value of the stack pointer abnormal is executed. Since the value of the stack pointer becomes abnormal and the CPU shifts to the reset state, the runaway state can be easily and reliably eliminated.

Further, according to the present invention, if the CPU has a reset input terminal, the runaway detecting means can control the CPU.
When it is determined that a runaway has occurred during the program operation, the reset output means can output a signal for resetting the CPU to the reset input terminal, so that the runaway state can be easily and reliably eliminated.

Further, according to the present invention, even if the CPU runs away during the program operation and reads an instruction in an unused portion of the program memory, it is possible to reset the reset input terminal via the reset output means. Runaway can be easily and reliably eliminated.

Further, according to the present invention, when the runaway detection means determines that a runaway has occurred during the execution of the program, the CPU shifts to a specific start address where the CPU starts the program execution after reset. Runaway of the program can be eliminated similarly to the reset.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic electrical configuration of first and second embodiments of the present invention.

FIG. 2 is a flowchart showing the operation of the first embodiment of the present invention.

FIG. 3 is a flowchart showing the operation of the second embodiment of the present invention.

FIG. 4 is a block diagram showing a schematic electrical configuration of third and fourth embodiments of the present invention.

FIG. 5 is a flowchart showing the operation of the third embodiment of the present invention.

FIG. 6 is a flowchart showing the operation of the fourth embodiment of the present invention.

FIG. 7 is a flowchart showing the operation of the fifth embodiment of the present invention.

[Explanation of symbols]

 1,11 microcomputer device 2,12 CPU 3 program memory 3x unused part 4 system bus 5 PC 6 SP 13 reset input terminal 14 output port

Claims (5)

[Claims] 1. A CPU having a function of shifting to a reset state when an abnormality of a stack pointer is detected, a runaway detecting means for detecting whether runaway has occurred during a program execution operation of the CPU, and a runaway detection means A microcomputer device comprising: a runaway countermeasure for resetting the CPU by causing a stack pointer to become an abnormal value by executing a stack pointer operation instruction when it is determined that the error occurs. 2. A CPU having a function of shifting to a reset state when an abnormality of a stack pointer is detected, and an operation program of the CPU is stored in an unused portion.
And a program memory for storing a stack pointer operation instruction for causing a stack pointer to become abnormal. 3. A CPU having a reset input terminal; a runaway detecting means for detecting whether runaway has occurred during a program execution operation of the CPU; and a runaway detecting means determining that runaway has occurred. And a reset output means for outputting a signal for resetting the CPU to a reset input terminal of the CPU. 4. A CPU having a reset input terminal, and reset output means for responding to an output from a predetermined output terminal of the CPU and outputting a signal for resetting the CPU to the reset input terminal when a predetermined output is derived. And an operation program of the CPU are stored, and in an unused portion,
And a program memory in which an instruction for deriving a predetermined output is stored in the reset output means. 5. A CPU which starts a program execution operation from a specific start address after reset, a runaway detection means for detecting whether or not a runaway occurs during a program execution operation of the CPU, and a runaway detection means. And a runaway countermeasure for shifting the execution of the program to the start address when it is determined that the program has occurred.