JPH1124622A - Image display device and driving method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a malfunction of a vertical driver by thinning out and condensedly drawing picture signals on a central image-display part, and by selecting simultaneously two lines of display lines on a specific-color drawing part of the upper part of an image plane and a specific-color drawing part of the lower part of the image plane. SOLUTION: STV generator circuit 15 generates shift data STV which becomes almost one horizontal scanning period H level of one horizontal synchronizing signal at the starting of drawing of one frame. CPV generator circuit 16 generates successive two pulses every time the horizontal synchronizing signal is added in the upper and lower fields A and C, on which a specific picture of each line is displayed, and also generates a shift clock CPV synchronized with the horizontal synchronized signal after thinning out specific lines corresponding to the number of display lines on the fields A and C, in case of generating images of the central field B. OEV generator circuit 17 generates line-enable signals OEV to drive two lines successively on the fields A and C, and also generates a signal by which the line-enable signals OEV1 to OEV3 are changed to 'active' sequentially at the scanning of the field B.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display apparatus for displaying a specific image such as black on a matrix image display apparatus at a high speed and a high speed, and a driving method thereof.

[0002]

2. Description of the Related Art Conventionally, in a matrix type image display device such as a liquid crystal display, it is necessary to display a specific image such as black in a certain range above and below a screen and display a vertically compressed image in a central portion of the screen. There is. In order to display such images in an inexpensive manner without using expensive elements such as memories,
An arbitrary line selection line is intermittently selected at the same time from a plurality of continuous line selection lines, a specific image such as black is drawn at a higher speed than normal display, and this operation is repeated while switching the selection of the line selection line. Thus, there has been an attempt to display a single-color specific image on all of a plurality of continuous line selection lines.

FIG. 7 is a block diagram showing the overall configuration of a conventional image display device. In the figure, a vertical driver 2 is connected to a liquid crystal display panel 1 via a row selection line corresponding to the number of horizontal lines, and a horizontal driver 3 is connected via a column selection line. In the liquid crystal display panel 1, a number of pixels are formed between the electrodes at the intersections of the row selection lines driven by the vertical driver 2 and the column selection lines driven by the horizontal driver 3. The timing signal generation circuit 4 supplies a timing signal to the vertical driver 2 and the horizontal driver 3.

In a conventional liquid crystal display panel 1, as shown in FIG. 2, a specific image such as black is displayed in a predetermined number of lines A and C in the upper and lower parts of the panel, and a central region B is displayed.
There is a case where an image compressed vertically is displayed only on the. The operation of displaying an image in this manner will be described. 8 and 9 show shift data S input to the vertical driver 2.
A TV, a shift clock CPV, and row enable signals OEV1 to OEV3 for selecting a row selection line in units of three rows;
6 is a time chart showing signals of row selection lines G1, G2,. Row enable signal OEV is active at L level. First, as shown in FIG. 8, a shift clock CPV is generated at a constant period following the shift data STV of the vertical line, and the shift data is distributed to predetermined lines in the area A of the shift register in the vertical driver 2. In this state, OEV1, OEV2 and OEV3 are all at H level,
That is, it is in an inactive state, and is in a state in which drawing is not performed on all lines. Next, as shown in FIG. 9, the row enable signals OEV1 to OEV3 are changed on a plurality of lines in the area A by the dispersed shift data to display a predetermined image such as black. Next, in the area B, the image signal is displayed only in the central portion in the normal drawing period. A display equivalent to that of the area A is displayed in the area C. As described above, the shift data is set in a large number of lines in the upper and lower areas A and C, and OEV1 to OEV3 are set.
To select a large number of lines at the same time.

[0005]

In such a conventional high-speed drawing method, shift data and a shift clock are transmitted to a vertical driver, a plurality of row selection lines are selected, and pixels are accumulated over a plurality of display lines. There is a need. At this time, since the load on the power supply line of the vertical driver increases, there is a problem that unless the impedance of the wiring of the power supply line is sufficiently reduced, a malfunction of the vertical driver may occur. In particular, when the vertical driver is a COG (chip-on-glass) mounted on a liquid crystal display panel and the wiring of the power supply line in the liquid crystal module is formed by aluminum evaporation or the like, the size of the liquid crystal display panel is reduced. A sufficient wiring area could not be obtained, and the conventional driving method could not sufficiently lower the impedance.

The present invention has been made in view of such a conventional problem, and two specific display lines are selected at the same time in a specific color drawing section at the top of the screen and a specific color drawing section at the bottom of the screen. It is an object of the present invention to prevent a vertical driver from malfunctioning by thinning out an image signal on a video display unit and performing compression drawing.

[0007]

According to a first aspect of the present invention, a vertical driver selects a horizontal row selection line of a matrix type image display panel, and a horizontal driver selects a vertical line selection line of the matrix type image display panel. A column selection line is selected, a single color is displayed in first and third regions formed by a predetermined number of upper and lower horizontal scanning lines of the matrix type image display panel, and a compressed image is displayed in a second region therebetween. A method for driving an image display apparatus for displaying, wherein shift data is sent to the vertical driver, and two lines are selected by a double speed shift clock of a horizontal synchronizing signal to shift by a line of a first area. Then, a single-color specific image signal is transmitted from the horizontal driver to perform a monochrome display in the first area, and to horizontally scan in a second area following the first area. A video signal in which lines are thinned out is displayed, and after the second image display, two lines are selected in a third area by a double-speed shift clock and shifted by an amount corresponding to the lines in the third area, It is characterized in that a single color specific image is transmitted from the horizontal driver to display a single color in the third area.

According to a second aspect of the present invention, there is provided a matrix type image display panel, a vertical driver for selecting a horizontal row selection line of the image display panel, and a vertical column selection line of the image display panel. An image display device comprising: a horizontal driver to be selected; and a timing output generation circuit that generates and outputs a timing signal to the vertical driver and the horizontal driver. And a shift clock generation circuit that generates a double-speed shift clock of a horizontal synchronizing signal in the first and third monochrome display areas formed by a predetermined number of upper and lower horizontal scanning lines of the display device. , Two lines are simultaneously selected when displaying the first and third areas, and only one line is selected when displaying the image in the second area. It is characterized in that it comprises a OEV generating circuit, the.

According to a third aspect of the present invention, in the image display device of the second aspect, there is provided a line number changing means for changing the number of lines in the second display area.

According to a fourth aspect of the present invention, in the image display device of the second aspect, standard signal determining means for determining whether the number of lines of the horizontal synchronization signal in one vertical period is a standard number of lines, and And a line number changing means for reducing the number of the second display lines when the judgment means judges that the signal is not a standard signal.

[0011]

Next, a liquid crystal display according to an embodiment of the present invention will be described. FIG. 1 is a block diagram showing the entire configuration of the liquid crystal display device. The same parts as those in the above-described conventional example are denoted by the same reference numerals, and detailed description is omitted. The vertical driver 2 includes a shift register 11 of bits equal to the number of lines of the liquid crystal display panel 1 and gate circuits 12-1 to 12-n to which outputs of respective bits are input, and gate circuits 12-1 and 12-4. ... and 12-2, 12-5 ...
, And 12-3, 12-6,..., And the inverters 13-1, 13- that activate the outputs of the respective gates by row enable signals OEV1 to OEV3.
2, 13-3. The shift register 11 sequentially shifts the row selection signal by the shift clock (CPV) using the shift data (STV) as a trigger. The gate circuit 12 has voltages VGON and VGOF that can sufficiently turn on the transistors provided in each pixel in the selected row.
F is input, and one of them is output to the liquid crystal display panel 1 as an output. The timing signal generation circuit 14 includes an STV generation circuit 15, a CPV generation circuit 16, and an OE in addition to the above-described timing signal for the horizontal driver 3.
It has a V generation circuit 17. The STV generation circuit 15
At the start of drawing a frame, shift data STV which is substantially at H level for one horizontal scanning period of one horizontal synchronization signal is generated. The CPV generating circuit 16 generates two consecutive pulses each time a horizontal synchronizing signal is applied in a region where a fixed image of each line is displayed, and generates the number of display lines in the regions A and C when generating the image of the region B. The shift clock CPV synchronized with the horizontal synchronizing signal is generated by thinning out a specific line according to. The OEV generation circuit 17 generates a row enable signal OEV for continuously driving two lines in the areas A and C, and generates a signal for sequentially activating the row enable signals OEV1 to OEV3 when scanning the area B. is there.

In order to set a certain line to the selected state, the shift data STV is shifted by the shift clock CPV, and the shift data exists on the line. Activating the row enable signal OEV. It is necessary to satisfy the following two conditions. In other words, even if the shift data exists on a certain line, the line can be set to the non-selected state by inactivating the row enable signal OEV. When a certain line is selected and a voltage corresponding to the brightness of the video signal is applied to the column electrode from the column selection line in synchronization with it, the transistor provided in the pixel in the selected row is turned on and supplied to the column electrode The signal voltage is written to the display pixel through the selected transistor. Then shift clock CPV
When the row becomes a non-selection line, the transistor is turned off. Therefore, the signal voltage written over one horizontal display line is applied to the liquid crystal constituting the pixel until it is selected by this row selection line in the next field. Held in capacity.

FIG. 2 shows areas A, B, and C on the screen. Upper and lower areas A, C are areas for simultaneously selecting two lines of a line selection line and writing a specific color such as black. B
Is an area for drawing an image by compressing in the vertical direction by thinning out horizontal scanning lines of the image signal at a fixed rate. The row selection lines G1 to Gf are defined as an area A, Gf + 1 to Gg as an area B, and Gg + 1 to Gh as an area C.

Next, the operation when a specific color is displayed in areas A and C and a compressed image is displayed in area B as shown in FIG. 2 will be described. FIG. 3A shows a horizontal synchronization signal. When such an image is displayed, the timing signal generation circuit 1
Numeral 4 supplies the shift data STV shown in FIG. 3B to the vertical driver 2 from the timing signal generation circuit 14 when the drawing of the area A is started. FIG. 3C shows the shift clock C
Shows PV. As shown in this figure, CPV is generated continuously for two lines in synchronization with the horizontal synchronizing signal. Then, the row enable signal OEV is changed so that two lines can be selected simultaneously. In this way, as shown in FIG. 3E, the shift is performed twice in the 1H period, and the row selection lines G1 to Gf are shifted.
Become active two lines at a time as if they were hatched in synchronization with the shift clock CPV. At this time, a voltage corresponding to a specific color such as black is applied to the column electrodes. In this way, a specific color can be drawn in the area A every two lines. The same applies to the display of the area C.

FIG. 4 shows a horizontal synchronizing signal in the area B and STV,
It is a figure which shows CPV and a row selection line. In this embodiment, the CPV is generated in synchronization with the horizontal synchronizing signal, and the video signal is shifted so as to be thinned out at a rate of, for example, one every 4H, according to the image to be displayed. That is, 1 in 4H
Since the line selection is not shifted by pausing the CPV at the time, the image can be displayed in a compressed state in the vertical direction.
Here, in area A, two lines were selected at the same time.
The shift data exists on two adjacent lines. Therefore, by using the row enable signals OEV1 to OEV3, one unnecessary line among the two lines is deselected and only the other one line is selected. The time when the cross hatching was selected,
The hatching that rises to the right indicates a time zone in which the shift clock CPV exists but is not selected by the row enable signal.

In the area C, as in FIG. 3, two shift clocks CPV are generated every 1H, and two lines are simultaneously selected as shown in FIG. 3 (e). However, it is not necessary to supply new shift data STV in the area C.

In the driving method according to the present invention, when two screens having an aspect ratio of 4: 3 are displayed side by side on a wide screen as shown in FIG. 2, a mask screen of black or the like is required at the top and bottom of the screen. Therefore, it is effective for such uses.

Next, a second embodiment of the present invention will be described with reference to FIG. In this embodiment, a line number changing means 21 for changing the number of lines in the display area B is provided. Since the CPV and OEV signals change due to the change in the number of lines by the number-of-lines changing means 21, their outputs are output to the CPV generation circuit 16A and the OEV generation circuit 17A to change the above-mentioned line boundaries Gf and Gg. ing.

Next, a third embodiment of the present invention will be described with reference to FIG. When the NTSC signal is displayed in the area B, if the horizontal display lines allocated to the area B are 168 lines as shown in an embodiment to be described later, the 1V 262.
Of the 5H, 257H will be used. But V
For non-standard signals such as sync signals in TR special playback,
The number of horizontal synchronization lines in the 1V period is smaller than that of the standard NTSC signal, and the time required for drawing (horizontal synchronization conversion) for the 1V period may be longer. , The vertical drawing period starts, and the lower display of the screen cannot be performed normally, which may cause a failure of the image display device.

In the third embodiment, in order to eliminate such a malfunction, a standard / non-standard signal is determined, and when a non-standard signal is determined, the number of horizontal display lines allocated to the area B is reduced. In the third embodiment, as shown in FIG. 6, a standard signal determining means 22 for determining whether the number of horizontal synchronization lines in one vertical period in a video signal is standard is provided. If it is determined by the standard signal determination means 22 that the signal is a standard signal, the second area B is set to a prescribed number of lines. The number of horizontal display lines assigned to C is increased. In the area A and the area C, a plurality of lines are drawn during 1H, so that drawing can be performed in a shorter time than a normal drawing time.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Here, an active matrix type liquid crystal display device having 234 horizontal display lines is used to display an image intended by the present invention using an NTSC video signal (1 V = 262.5H). An example will be described.

As areas A, B, and C, 33, 168, and 33 display lines are allocated, respectively. In the areas A and C, a signal for a black screen mask is displayed. In the area B, the video signal is thinned out at a rate of one per 4H. In this case, the vertical video display rate is NTSC
The effective video signal in the 1V period of the
Assuming 2.5 lines, (168 × 4/3) /242.5=92.4 (%) Also, the time required to display this screen is (33/2) + (168 × 4/3) + (33/2) = 2
57 (H), and the area A and the area C within the 1 V period (262.5 H).
Can display a black mask signal, and the area B can display an image at a vertical image display rate equivalent to that of a general consumer television set.

In the above description, the video signal to be displayed is N
The active matrix type liquid crystal display device having 234 horizontal display lines was used as a matrix type image display device, and 33 lines, 168 lines, and 33 lines of display lines were allocated as regions A, B, and C, respectively. However, the signal system to be displayed is not limited to the NTSC system, but may be another signal system such as the PAL system. Even if the number of horizontal display lines is any other number, the number of lines is appropriately allocated to the areas A, B, and C, and the rate of thinning out the video signal is appropriately set to the area B. It is equally feasible.

[0024]

As described in detail above, according to the first to fourth aspects of the present invention, it is possible to display a monochromatic image in the first and third regions above and below the screen at low cost without using a memory element or the like. To display the compressed vertical image in the second area of the screen. Further, in the present invention, since two row selection lines are driven at the same time, it is possible to obtain an effect that malfunction does not occur without reducing the impedance of the wiring so much. According to the fourth aspect of the present invention, in addition to the above effects, similar drawing can be performed even when a non-standard video signal is input, and the drawing device can be protected from failure. Is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an image display device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a display example of the image display device according to the present embodiment.

FIG. 3 is a time chart showing waveforms of respective units when displaying a first area according to the embodiment.

FIG. 4 is a time chart showing waveforms of respective units when displaying a second area according to the present embodiment.

FIG. 5 is a block diagram showing a configuration of a second embodiment.

FIG. 6 is a block diagram showing a configuration of a third embodiment.

FIG. 7 is a block diagram illustrating a configuration of a conventional image display device.

FIG. 8 is a time chart showing an operation of dispersing shift pulses in a conventional image display device.

FIG. 9 is a time chart showing an operation when displaying areas A and C of the conventional image display device.

[Explanation of symbols]

 Reference Signs List 1 liquid crystal display panel 2 vertical driver 3 horizontal driver 4 timing signal generating circuit 11 shift register 12 gate circuit 13 inverter 14 timing signal generating circuit 15 STV generating circuit 16, 16A CPV generating circuit 17, 17A OEV generating circuit 21 line number changing means 22 Standard signal judgment means

Claims (4)

[Claims] 1. A vertical driver selects a horizontal row selection line of a matrix type image display panel, and a horizontal driver selects a vertical column selection line of the matrix type image display panel. A method for driving an image display device that displays a single color in first and third regions formed by a predetermined number of horizontal scanning lines above and below the first and third regions, and displays a compressed image in a second region therebetween. The shift data is transmitted to the vertical driver, the two lines are selected by the double shift clock of the horizontal synchronizing signal, and the line is shifted by the amount of the first area, and the specific image signal of a single color is transmitted from the horizontal driver. Thereby, a monochrome display is performed in the first area, and a video signal in which horizontal scanning lines are thinned out is displayed in a second area following the first area. In the state where two lines are selected by the double speed shift clock in the third area following the image display of the second area, the image is shifted by the amount of the third area, and a specific image of a single color is transmitted from the horizontal driver. A method for driving an image display device, wherein a monochrome display is performed in a third area. 2. A matrix type image display panel, a vertical driver for selecting a horizontal row selection line of the image display panel, a horizontal driver for selecting a vertical column selection line of the image display panel, An image display apparatus comprising: a vertical driver and a timing output generation circuit that generates and outputs a timing signal to the horizontal driver. The vertical driver generates a shift data at the start of one-screen image display.
A shift clock generating circuit for generating a double-speed shift clock of a horizontal synchronizing signal in the first and third monochrome display areas each including a predetermined number of upper and lower horizontal scanning lines of the display device; , Select two lines at the same time when displaying the third area,
OE for selecting only one line when displaying an image in the second area
And a V generation circuit. 3. The image display device according to claim 2, further comprising a line number changing means for changing the number of lines in the second display area. 4. A standard signal judging means for judging whether the number of lines of the horizontal synchronizing signal in one vertical period is a standard number of lines, and said second signal when the standard signal judging means judges that the signal is not a standard signal. 3. The image display device according to claim 2, further comprising a line number changing unit that reduces the number of display lines.