JPH06337657A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To reduce the frequency of charging and discharging for liquid crystal pixels and to suppress useless power consumption by making an output potential of a video signal line and a potential of a common electrode of a liquid crystal pixel the same potential, in a vertical blanking period. CONSTITUTION:When a scanning signal Y1 of a first line from a scanning signal line driving circuit 4 is outputted to a scanning signal line 8, the prescribed voltage is applied to an arbitrary liquid crystal pixel 11 of the first line by making a thin film transistor 10 of the first line a ON state or a OFF state in accordance with video signals X1-Xn, and picture of the first line is displayed. After that, pictures by the (n)th line are displayed in the same way. And a switching circuit 7 is switched by a leading edge of a clock pulse CK from a control circuit 2 in a vertical blanking period (non-scanning period), a potential of a common electrode from a common electrode driving circuit 6 is guided to a video signal line 9. At this time, a potential of the video signal line 9 and a potential of a common electrode of the liquid crystal pixel 11 are made the same potential and a potential difference is made zero.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device used for televisions and displays.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display device having an active matrix type liquid crystal panel using thin film transistors has been developed for the purpose of realizing a high-definition and high-performance liquid crystal display device.

This liquid crystal display device uses a scanning signal line drive circuit for outputting a drive signal of a scanning signal line to a liquid crystal panel and a video signal line drive circuit for outputting a drive signal of a video signal line.

In such a liquid crystal display device, when there is no signal on the video signal line during the vertical blanking period, a potential difference is generated between the video signal line and the common electrode of each liquid crystal pixel, and the liquid crystal pixel is charged and discharged. Was made and wasted power.

[0005]

As described above, in the liquid crystal display device, when there is no signal on the video signal line during the vertical blanking period, there is a potential difference between the video signal line and the common electrode of each liquid crystal pixel. As a result, liquid crystal pixels are charged and discharged, resulting in wasted power consumption.

Therefore, according to the present invention, the potential difference between the video signal line and the common electrode of each liquid crystal pixel is eliminated during the vertical blanking period, charge / discharge of the liquid crystal pixel can be reduced, and wasteful power consumption can be suppressed. An object of the present invention is to provide a liquid crystal display device that can be used.

[0007]

A liquid crystal display device of the present invention is arranged at a plurality of video signal lines and scanning signal lines arranged in a matrix and at respective intersections of these video signal lines and scanning signal lines. A liquid crystal panel including liquid crystal pixels installed via switching elements, a signal line drive circuit for sequentially transferring a video signal to the video signal line, and a scanning signal line drive circuit for sequentially transferring a scanning signal to the scanning signal line. In the vertical blanking period, the output potential of the video signal line and the common electrode of the liquid crystal pixel have the same potential.

[0008]

According to the present invention, the output potential of the video signal line and the potential of the common electrode of the liquid crystal pixel are set to the same potential during the vertical blanking period.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit configuration diagram of a liquid crystal display device of the present invention. That is, the control circuit 2 is connected to the liquid crystal display device 1. As shown in (a) to (g) of FIG. 2, the control circuit 2 causes the liquid crystal display device 1 to receive a clock pulse CK1 corresponding to a video signal line 8, ... And a scanning signal line 7 ,. , CK2, a shift pulse ST as a start pulse, and a video signal DS
And a clock pulse C corresponding to the vertical blanking period
It outputs K. The clock pulse CK1 and the video signal DS from the control circuit 2 are supplied to the video signal line drive circuit 5, and the clock pulse CK2 and the shift pulse ST as a start pulse from the control circuit 2 are supplied to the scanning signal line drive circuit 4. The clock pulse CK from the control circuit 2 is supplied to the switching circuit 7.

The liquid crystal display device 1 comprises an active matrix type liquid crystal panel 3, a scanning signal line driving circuit 4, a video signal line driving circuit 5, a common electrode driving circuit 6 and a switching circuit 7.

The liquid crystal panel 3 is formed so that the scanning signal lines 8, ... And the video signal lines 9, ... Cross each other, and a thin film transistor (switching element) 10 made of polycrystalline silicon is provided at each crossing portion. Liquid crystal pixels 11 are provided.

That is, one ends (common electrodes) of the liquid crystal pixels 11, ... Are commonly connected to the common electrode drive circuit 6, and the other ends (pixel electrodes) of the liquid crystal pixels 11 ,. The video signal lines 9 are connected via the sources. The gates of the thin film transistors 10, ... Are connected to the scanning signal lines 8 ,.

A predetermined number of the liquid crystal pixels 11 are arranged side by side to form a two-dimensional display screen. In each of the liquid crystal pixels 11 in the vertical direction, 1 of the video signal lines 9 ,.
.. are shared, and one of the scanning signal lines 8, ... Is shared by each of the liquid crystal pixels 11 ,. As a result, the video signal lines 9, ... Are arranged in the same number as the number of pixels in the horizontal direction, and the scanning signal lines 8, ... Are arranged in the same number as the number of pixels in the vertical direction. A predetermined voltage is applied to the video signal lines 9 by the video signal line drive circuit 5, and the scanning signal lines 8 are driven by the scanning signal line drive circuit 4.

The scanning signal line drive circuit 4 supplies the shift pulse ST supplied from the control circuit 2 shown in FIG.
The scanning signals Y1 to Yn shown in (f) of FIG. 2 sequentially shifted by the clock pulse CK2 shown in (d) of FIG. 2 are output, and the scanning signals Y1 to Yn are different scanning signal lines. , ... are output. The scanning signal line drive circuit 4 has a shift pulse ST and a clock pulse CK2.
The logical product output of and is output to the common electrode drive circuit 6 as a line (frame) switching signal.

The video signal line drive circuit 5 shows the video signal DS supplied from the control circuit 2 shown in FIG. 2 (b) for each line in response to the clock pulse CK1 shown in FIG. 2 (a). The stored video signals X1 to Xn for one line are sequentially output, and the video signals X1 to Xn are output from different video signal lines 9 ... .

The common electrode drive circuit 6 outputs the common electrode potential Vc shown in FIG.
The polarity is inverted every frame. The polarity of the common electrode drive circuit 6 is inverted according to the frame switching signal from the scanning signal line drive circuit 4.

The switching circuit 7 switches in accordance with the clock pulse CK supplied from the control circuit 2 shown in FIG. 2 (e), and switches each video signal X1 to Xn of the video signal line drive circuit 5 to the video signal line. , Or the potential of the common electrode from the common electrode drive circuit 6 is led to the video signal lines 9 ,.

For example, while the scanning signals Y1 to Yn are being output (scanning period), the respective video signals X1 to Xn of the video signal line driving circuit 5 are guided to the video signal lines 9, ... And the scanning signals Y1 to Yn. During the vertical blanking period (non-scanning period) after the output of is finished, the potential of the common electrode from the common electrode drive circuit 6 is guided to the video signal lines 9 ,.

Next, the operation in such a configuration will be described. For example, now, the video signal DS and the clock pulse CK1 from the control circuit 2 are supplied to the video signal line driving circuit 5, the video signal DS for each line is sequentially stored in the video signal line driving circuit 5, and the video signal line driving is performed. The video signals X1 to Xn for each line are sequentially output from the circuit 5. First, the video signal DS of the first line is the video signal line drive circuit 5
The video signal line drive circuit 5 outputs the video signals X1 to Xn of the first line.

Further, the clock pulse C from the control circuit 2
The switching circuit 7 is switched by the fall of K, and the video signals X1 to Xn from the video signal line driving circuit 5 are guided to different video signal lines 9 ,.

Further, the shift pulse ST from the control circuit 2
And a clock pulse CK2 are supplied to the scanning signal line driving circuit 4, and the shift pulse ST is supplied from the scanning signal line driving circuit 4.
Are sequentially shifted by the clock pulse CK2 to output scanning signals Y1 to Yn from different scanning signal lines 8 ,.

As a result, when the scanning signal Y1 of the first line from the scanning signal line driving circuit 4 is output to the scanning signal line 8, the thin film transistors 10, ... Of the first line are turned on according to the video signals X1 to Xn. Or by turning off
A predetermined voltage is applied to the arbitrary liquid crystal pixels 11, ... Of the first line to display the image of the first line.

Next, the video signal DS of the second line is stored in the video signal line drive circuit 5, and the video signal line drive circuit 5 outputs the video signals X1 to Xn of the second line. Then, when the scanning signal Y2 of the second line from the scanning signal line driving circuit 4 is output to the scanning signal line 8, the video signals X1 to X
.. are turned on or off in accordance with n, a predetermined voltage is applied to arbitrary liquid crystal pixels 11, .. on the second line, and an image on the second line is displayed.

Thereafter, similarly to the above, the images of the 3rd to nth lines are displayed in the same manner as above. Thereafter, during the vertical blanking period (non-scanning period), the switching circuit 7 is switched by the rise of the clock pulse CK from the control circuit 2, and the potential of the common electrode from the common electrode drive circuit 6 is applied to the video signal lines 9 ,. Be guided. At this time, the potentials of the video signal lines 9, ... And the potentials of the common electrodes of the liquid crystal pixels 11, ... Have a conductive potential, the potential difference disappears, and power is not consumed.

As described above, the vertical blanking period,
The output potential of the video signal line and the potential of the common electrode of the liquid crystal pixel are set to the same potential. This eliminates the potential difference between the video signal line and the common electrode of each liquid crystal pixel during the vertical blanking period, so that the charge and discharge of the liquid crystal pixel can be reduced and the wasteful power consumption can be suppressed.

[0026]

As described in detail above, according to the present invention, the potential difference between the video signal line and the common electrode of each liquid crystal pixel can be eliminated during the vertical blanking period, and the charge / discharge of the liquid crystal pixel can be reduced. A liquid crystal display device that can suppress wasteful power consumption can be provided.

[Brief description of drawings]

FIG. 1 is a schematic circuit diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the liquid crystal display device of FIG.

[Explanation of symbols]

1 ... Liquid crystal display device, 2 ... Control circuit, 3 ... Liquid crystal panel, 4
... scanning signal line drive circuit, 5 ... video signal line drive circuit, 6 ...
Common electrode drive circuit, 7 ... Switching circuit, 8, ..., Scan signal line, 9, ..., Video signal line, 10, ..., Thin film transistor (switching element), 11 ,.

Claims (1)

[Claims] 1. A plurality of video signal lines and scanning signal lines arranged in a matrix, and liquid crystal pixels installed via switching elements arranged at respective intersections of these video signal lines and scanning signal lines. A liquid crystal display device comprising: a liquid crystal panel consisting of: a signal line drive circuit for sequentially transferring a video signal to the video signal line; and a scanning signal line drive circuit for sequentially transferring a scanning signal to the scanning signal line. A liquid crystal display device, wherein the output potential of the video signal line and the potential of the common electrode of the liquid crystal pixel are set to the same potential for a period.