JPH11242203A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPH11242203A
JPH11242203A JP4541798A JP4541798A JPH11242203A JP H11242203 A JPH11242203 A JP H11242203A JP 4541798 A JP4541798 A JP 4541798A JP 4541798 A JP4541798 A JP 4541798A JP H11242203 A JPH11242203 A JP H11242203A
Authority
JP
Japan
Prior art keywords
circuit
liquid crystal
signal
screen
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4541798A
Other languages
Japanese (ja)
Other versions
JP3253584B2 (en
Inventor
Toshihiko Tanaka
俊彦 田中
Norimitsu Kobayashi
則光 小林
Seiji Yamane
誠司 山根
Koji Maeda
耕志 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP04541798A priority Critical patent/JP3253584B2/en
Publication of JPH11242203A publication Critical patent/JPH11242203A/en
Application granted granted Critical
Publication of JP3253584B2 publication Critical patent/JP3253584B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an efficient and miniaturizable liquid crystal display device having high display quality. SOLUTION: A liquid crystal cell 1 is a screen-divided simple matrix and a scanning circuit 2 and a signal circuit 3 are used for each divided screen. For a correction circuit 6 for generating display improvement data corresponding to image signals, one each of an integrated circuit element is allocated to each divided screen and the integrated circuit element is integrally provided with a screen processing part 61 (crosstalk correction signal generation circuit) for generating the display improvement data corresponding to the image signals and a cell processing part 62 for monitoring the voltage/clock or the like of the entire liquid crystal cell and generating required signals. The cell processing part 62 is constituted of a boundary screen processing circuit, a voltage abnormality detection circuit, a clock abnormality detection circuit, a waveform rounding correction circuit and AC signal generation circuit.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、いわゆる画面分割
された液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called divided screen liquid crystal display device.

【0002】[0002]

【従来の技術】従来より直交した電極群を有し、画素交
点にトランジスタの様なアクティブ素子を持たない、い
わゆる単純マトリクス型の液晶表示装置においては、特
開平6−274132号公報などに示されるように、単
純マトリクス駆動の特有の問題点である淡い陰の様な不
所望の表示(クロストーク)を消すために波形の変化の
たびに演算により補正電圧を重畳印加するような工夫も
成されてきた。また画面が大きく、表示容量が多くなっ
てくると、走査時間を一定量確保して表示品位を高める
ために、画面を分割して表示を行う。
2. Description of the Related Art A so-called simple matrix type liquid crystal display device having a conventional orthogonal electrode group and no active element such as a transistor at a pixel intersection is disclosed in JP-A-6-274132. As described above, in order to eliminate undesirable display (crosstalk) such as faint shadow, which is a specific problem of the simple matrix driving, a method of superimposing and applying a correction voltage by a calculation every time a waveform is changed has been made. Have been. When the screen is large and the display capacity increases, the screen is divided and displayed in order to secure a certain amount of scanning time and improve the display quality.

【0003】これを図2を例にして説明すると、液晶セ
ル1の直交する電極を画面中央で分割し、各々の分割し
た領域に走査回路2と信号回路3を準備する。そしてワ
ープロとかパソコンなどの機器から信号を受けた受信回
路4は、直接利用できる信号は走査回路2や信号回路3
に送るが、画信号に応じて表示改善データを生成する補
正回路16に、また液晶セル全体に対するセル処理回路
17にそれぞれ信号を配分して、バイアス回路5を介し
て各々の分割した領域の走査回路2や信号回路3に供給
される。
Referring to FIG. 2 as an example, orthogonal electrodes of the liquid crystal cell 1 are divided at the center of the screen, and a scanning circuit 2 and a signal circuit 3 are prepared in each divided area. The receiving circuit 4 which has received a signal from a device such as a word processor or a personal computer transmits the directly usable signal to the scanning circuit 2 or the signal circuit 3.
The signals are respectively distributed to the correction circuit 16 for generating display improvement data according to the image signal and to the cell processing circuit 17 for the entire liquid crystal cell, and the scanning of each divided area is performed via the bias circuit 5. The signal is supplied to the circuit 2 and the signal circuit 3.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、補正回
路やセル処理回路は同一の信号を利用する場合が多く、
配線の引き回しによってノイズが影響することもあり、
また個々の回路を基板上に配置していたのでは、基板も
大きくなり液晶表示面の周辺や背面に大きな部品配置容
積が必要になって小型化薄型化の障害になる。また補正
回路は比較的大きな回路となる上、機器と液晶セルとの
相性によって処理を調整しなければならないこともある
ので、液晶表示装置1個に対して全ての機能を盛り込ん
だ集積回路素子1個とすることには無駄が多い。
However, the correction circuit and the cell processing circuit often use the same signal,
Noise may be affected by the wiring layout,
In addition, if individual circuits are arranged on a substrate, the substrate becomes large, and a large component arrangement volume is required around and behind the liquid crystal display surface, which hinders miniaturization and thinning. In addition, the correction circuit is a relatively large circuit, and the processing must be adjusted depending on the compatibility between the device and the liquid crystal cell. Therefore, the integrated circuit device 1 having all functions incorporated in one liquid crystal display device is provided. There are many wastes in making individual pieces.

【0005】[0005]

【課題を解決するための手段】本発明は上述の点を考慮
してなされたもので、まず走査電極群と信号電極群との
組み合わせを複数有することにより画面が複数に分割さ
れた液晶セルと、その走査電極群に接続された走査回路
と、画信号に応じて画素データを前記信号電極群に与え
る信号回路と、画信号に応じて表示改善データを生成す
る補正回路とを具備した液晶表示装置において、前記補
正回路は、分割された各々の画面に対する画面処理部と
液晶セル全体に対する信号処理をするセル処理部を一体
に有する集積回路素子を具備したもので、より好ましく
は集積回路素子を分割された画面毎に用いるものであ
る。
SUMMARY OF THE INVENTION The present invention has been made in consideration of the above points, and firstly, a liquid crystal cell having a screen divided into a plurality of parts by having a plurality of combinations of scanning electrode groups and signal electrode groups. A liquid crystal display comprising: a scanning circuit connected to the scanning electrode group; a signal circuit for providing pixel data to the signal electrode group according to an image signal; and a correction circuit for generating display improvement data according to the image signal. In the apparatus, the correction circuit includes an integrated circuit element integrally having a screen processing unit for each divided screen and a cell processing unit for performing signal processing on the entire liquid crystal cell, and more preferably an integrated circuit element. This is used for each divided screen.

【0006】また本発明は、直交する電極群を複数組有
する液晶セルと、各組において直交する電極群の一方に
接続され所定の電極に走査電圧を出力する走査回路と、
画信号に応じて画素データを他方の電極群に与える信号
回路と、各組において画信号に応じて表示改善データを
生成する画面処理部と液晶セル全体の電圧・クロックな
どを監視して必要な信号を生成するセル処理部を一体に
有する集積回路素子を設けたものである。
The present invention also provides a liquid crystal cell having a plurality of orthogonal electrode groups, a scanning circuit connected to one of the orthogonal electrode groups in each group and outputting a scanning voltage to a predetermined electrode,
A signal circuit that supplies pixel data to the other electrode group according to the image signal, a screen processing unit that generates display improvement data according to the image signal in each group, and a voltage / clock of the entire liquid crystal cell are monitored and necessary. An integrated circuit element having an integrated cell processing unit for generating a signal is provided.

【0007】更に好ましくは、画面処理部はクロストー
ク補正信号発生回路からなり、セル処理部は境界画面処
理回路、電圧異常検出回路、クロック異常検出回路、波
形なまり補正回路、交流化信号発生回路の1つまたはそ
れ以上を含む回路で構成されるものである。
More preferably, the screen processing section comprises a crosstalk correction signal generation circuit, and the cell processing section includes a boundary screen processing circuit, a voltage abnormality detection circuit, a clock abnormality detection circuit, a waveform rounding correction circuit, and an AC signal generation circuit. It is configured by a circuit including one or more.

【0008】[0008]

【発明の実施の形態】図1は本発明実施例の液晶表示装
置のブロック図で、大表示容量の液晶セルを駆動するた
めに好適なように、走査信号を大きい正負の電圧とし、
信号電圧を正の選択電圧と負の選択電圧の中間値近傍の
電圧とすることにより、走査側は大きな電圧を用いる代
わりに低速で、信号側は小さい電圧を用いて高速駆動が
できるようにした液晶表示装置を例にとって説明する。
FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention. In order to drive a liquid crystal cell having a large display capacity, a scanning signal is set to a large positive / negative voltage.
By setting the signal voltage to a voltage near the intermediate value between the positive selection voltage and the negative selection voltage, the scanning side can be driven at a low speed instead of using a large voltage, and the signal side can be driven at a high speed using a small voltage. A description will be given taking a liquid crystal display device as an example.

【0009】1は、互いに直交する電極群を有する液晶
セルで、それらの電極の交点に画素を形成する液晶セル
で、例えばスーパーツイストネマティック液晶表示器な
どの電界効果型液晶が利用できる。これらの液晶セル1
の電極は、いわゆる単純マトリクスを構成し、画素交点
に能動素子を持たないものである。この液晶セル1は複
数の画面(領域)に分割され、分割された画面(領域)
毎に互いに直交する電極群を有する。具体的には、例え
ば1024RGB×768画素(カラーXGA)の表示
面であれば、3072(信号側)×384(走査側)の
上下2画面構成の画素をもっており、中央で分離された
上下各々3072本の信号電極と、それらと交わる76
8本の走査電極を有する。
Reference numeral 1 denotes a liquid crystal cell having electrode groups orthogonal to each other. The liquid crystal cell forms a pixel at the intersection of these electrodes. For example, a field effect liquid crystal such as a super twisted nematic liquid crystal display can be used. These liquid crystal cells 1
These electrodes form a so-called simple matrix and have no active elements at pixel intersections. The liquid crystal cell 1 is divided into a plurality of screens (areas), and the divided screens (areas)
Each has a group of electrodes orthogonal to each other. Specifically, for example, a display surface of 1024 RGB × 768 pixels (color XGA) has 3072 (signal side) × 384 (scanning side) pixels of a two-screen configuration, and each of the upper and lower pixels separated by a center is 3072 pixels. Book signal electrodes and their intersection 76
It has eight scanning electrodes.

【0010】2は、その液晶セル1の画面(領域)毎
に、一方の電極群に走査電圧を与える走査回路で、上述
の画面の例で説明すると、384本の出力を持つ2組の
回路からなる。但し、2組というのはあくまで走査回路
としての組み数であって、集積回路素子が2つという意
味ではない。例えば出力156本の集積回路を5つ使う
ことによって構成され、この場合、上下各々2個と、上
画面の312〜384本目と下画面の1〜72本をカバ
ーして走査する1つの集積回路素子で構成することがで
きる。この走査回路2は、正負の電圧−VL、+VHと
中間電圧Vmのいずれかを選択して所定の電極に供給す
るものであり、このうち−VL、+VHは選択電圧で、
上下に画面分割してある場合には各々の画面(領域)で
同じ順位の走査線を例えば上から順に1本ずつ走査すれ
ばよい。ここでは線順次駆動を例にとっているが、複数
の電極を同時に走査する場合でも本発明は適用でき、こ
の場合、例えば直交関数に応じて印加電圧が選択される
ので、電圧の絶対値と、同時に選択電圧を与える電極の
本数が異なるだけである。
Reference numeral 2 denotes a scanning circuit for applying a scanning voltage to one electrode group for each screen (region) of the liquid crystal cell 1. In the above-described screen example, two sets of circuits having 384 outputs are provided. Consists of However, two sets is merely the number of sets as a scanning circuit, and does not mean that there are two integrated circuit elements. For example, it is constituted by using five integrated circuits of 156 outputs, and in this case, one integrated circuit which scans by covering two upper and lower parts, and the upper screen 312 to 384th and the lower screen 1 to 72 lines. It can be composed of elements. The scanning circuit 2 selects one of the positive and negative voltages -VL, + VH and the intermediate voltage Vm and supplies it to a predetermined electrode. Among them, -VL and + VH are selection voltages,
If the screen is divided vertically, scanning lines of the same order may be scanned one by one in order from the top in each screen (area). Here, line-sequential driving is taken as an example, but the present invention can be applied to a case where a plurality of electrodes are simultaneously scanned. In this case, for example, an applied voltage is selected according to an orthogonal function, The only difference is the number of electrodes for applying the selection voltage.

【0011】3は、液晶セル1の他方の電極群に画信号
に応じた電圧を与える信号回路で、特には走査回路2の
正の選択電圧+VHと負の選択電圧−VLの中間値近傍
の2種類の信号電圧−Vb、+Vbを画信号に応じて選
択的に電極に供給するものである。これら選択電圧+V
H、−VLや信号電圧±Vbの大きさは、電圧平均化法
に準じて求められるもので、例えばXGA画面2分割の
とき走査線数は384本であり、1/384デューティ
の駆動の場合最適バイアス値に応じて選択電圧±30ボ
ルト、信号電圧±Vbは略±1.5ボルトである。尚こ
の場合、走査電圧は一定の周期で正負いずれかの選択電
圧が選択されるもので、いずれが選択されるかは交流化
信号Mに従って選択され、信号回路3から出力される信
号電圧は画信号と極性反転に伴って2つの値のうちどち
らを選択されるのか変化する。また、複数行を同時に走
査する場合は電圧値が直交関数によって演算されるだけ
で、電圧平均化法の適用に変わりはない。
Reference numeral 3 denotes a signal circuit for applying a voltage corresponding to an image signal to the other electrode group of the liquid crystal cell 1, and particularly a signal circuit near an intermediate value between the positive selection voltage + VH and the negative selection voltage -VL of the scanning circuit 2. Two kinds of signal voltages -Vb and + Vb are selectively supplied to the electrodes according to the image signal. These selection voltages + V
The magnitudes of H, -VL and the signal voltage ± Vb are obtained according to the voltage averaging method. For example, when the XGA screen is divided into two, the number of scanning lines is 384, and when driving at 1/384 duty, The selection voltage ± 30 volts and the signal voltage ± Vb are approximately ± 1.5 volts depending on the optimum bias value. In this case, as the scanning voltage, one of the positive and negative selection voltages is selected at a constant cycle, which is selected according to the AC signal M, and the signal voltage output from the signal circuit 3 is the image voltage. Which of the two values is selected changes with the signal and the polarity inversion. When a plurality of rows are simultaneously scanned, only the voltage value is calculated by the orthogonal function, and there is no change in the application of the voltage averaging method.

【0012】4は受信回路で、パソコンやワープロなど
の機器から制御信号や画信号を受け取るもので、端子だ
けであったり、単なるバッファ回路でもよいが、最近は
低電圧差信号でこれらのデータを受けることが多く、変
換回路や波形回復回路などで構成することも多い。ま
た、パーソナルコンピュータ等の機器から送られてくる
信号を受け取り、走査回路2、信号回路3などに表示用
の信号とタイミング信号を含む制御用の信号を与えるゲ
ートアレイなどで構成してもよい。
Reference numeral 4 denotes a receiving circuit which receives a control signal or an image signal from a device such as a personal computer or a word processor, and may be a terminal or a simple buffer circuit. In many cases, it is often constituted by a conversion circuit, a waveform recovery circuit, or the like. Further, it may be constituted by a gate array or the like which receives a signal sent from a device such as a personal computer and supplies a control signal including a display signal and a timing signal to the scanning circuit 2 and the signal circuit 3.

【0013】5は、走査回路2と信号回路3に所定の値
の電圧を供給するバイアス回路で、少なくとも正負の選
択電圧−VL、+VHと信号電圧−Vb、+Vbと中間
電圧Vmといったバイアス電圧を出力し、補正回路に応
じた補正電圧も出力する。バイアス回路5は必要に応じ
て例えばこの表示装置が組み込まれるパーソナルコンピ
ュータから供給される電圧VEE−VDDを、電圧発生
回路(DC/DCコンバータ)に入力し、正負の電圧−
VL、+VHを生成させる。ここに正負というのは、何
かの絶対電位、たとえばこの表示装置が組み込まれるパ
ーソナルコンピュータの電源に対して規定された電位の
ことではなく、非走査時の走査電圧(中間電圧)Vmに
対する電位で表現している。選択電圧に基づいてこれを
抵抗分割回路で所定のバイアス値の電圧を得、これをバ
ッファ回路を介することによって信号電圧+Vb、−V
bと中間電圧Vmを得る。走査回路2の駆動電圧や信号
回路3の駆動電圧は、この表示装置が組み込まれるパー
ソナルコンピュータから供給される電圧VEE−VDD
を直接用いてもよいし、電圧発生回路で改めて生成して
もよい。
A bias circuit 5 supplies a voltage of a predetermined value to the scanning circuit 2 and the signal circuit 3. The bias circuit 5 supplies at least a bias voltage such as a positive / negative selection voltage -VL, + VH, a signal voltage -Vb, + Vb, and an intermediate voltage Vm. And outputs a correction voltage corresponding to the correction circuit. The bias circuit 5 inputs a voltage VEE-VDD supplied from, for example, a personal computer in which the display device is incorporated as necessary to a voltage generation circuit (DC / DC converter), and outputs a positive / negative voltage −
VL and + VH are generated. The term "positive / negative" herein means not an absolute potential, for example, a potential specified for a power supply of a personal computer in which this display device is incorporated, but a potential with respect to a scanning voltage (intermediate voltage) Vm during non-scanning. expressing. Based on the selected voltage, a voltage having a predetermined bias value is obtained by a resistance dividing circuit, and the voltage is applied to a signal voltage + Vb, -V through a buffer circuit.
b and the intermediate voltage Vm are obtained. The driving voltage of the scanning circuit 2 and the driving voltage of the signal circuit 3 are the voltages VEE-VDD supplied from the personal computer in which the display device is incorporated.
May be used directly or may be newly generated by a voltage generation circuit.

【0014】6は、パーソナルコンピュータ等の機器か
ら送られてくる画信号に応じて表示改善データを生成す
る補正回路である。単純マトリクス型の液晶表示装置の
場合よく知られているように、枠やバーを表示させると
その延長に陰ができる。これをしばしばクロストークと
呼ぶ。クロストークは様々な原因が考えられ、対策は画
信号を行ごとに比較して変化率を見たり、あるいは全体
の白、黒レベルの割合を比較するなどおこなうので、比
較判定のためには演算器やレジスターを用いることが多
い。この補正回路6の主体はこのようなクロストーク補
正信号発生回路からなる画面処理部61である。
A correction circuit 6 generates display improvement data according to an image signal sent from a device such as a personal computer. As is well known in the case of a simple matrix type liquid crystal display device, when a frame or bar is displayed, the extension of the frame or bar is shaded. This is often called crosstalk. There are various causes of crosstalk, and countermeasures include comparing the image signal for each line to see the rate of change, or comparing the overall white and black level ratios. They often use containers and registers. The main component of the correction circuit 6 is a screen processing unit 61 including such a crosstalk correction signal generation circuit.

【0015】然し乍らここで特長的なことは、この画面
処理部61は液晶セル1全体に対して働くのではなく分
割された画面に対して働くものであり、このため上下二
分割画面に対しては2つの集積回路素子からなる。これ
は分割した画面ごとに異なる画信号を取り扱うので、こ
れを一つのパッケージに収める必要はなく、むしろ1つ
のパッケージに収めると集積回路素子のロジック数が大
きくなって不都合なこと、分割された画面ごとにクロス
トーク補正信号を発生させるほうが効率がよいことによ
る。
However, what is characteristic here is that the screen processing section 61 operates not on the entire liquid crystal cell 1 but on a divided screen, and therefore, does not operate on the upper and lower divided screens. Consists of two integrated circuit elements. Since different image signals are handled for each divided screen, it is not necessary to store them in one package. Rather, storing them in one package increases the number of logics of integrated circuit elements, which is inconvenient. This is because it is more efficient to generate the crosstalk correction signal every time.

【0016】またもう一つの特長は同じ集積回路素子の
中に液晶セル全体に対する信号処理をするセル処理部6
2を有していることである。セル処理部62は境界画面
処理回路、電圧異常検出回路、クロック異常検出回路、
波形なまり補正回路、交流化信号発生回路、中央走査回
路素子の上画面下画面駆動切替回路など液晶セル全体の
電圧・クロックなどを監視して必要な信号を生成するも
ので、これらは液晶表示装置1個に付き1つあればよ
い。これを各々の補正回路6に組込むのは、クロストー
ク補正信号発生回路は画信号を各種クロックを受けなが
ら処理するのに対して、セル処理部62ではその画信号
やクロックの状態を検出して液晶セル全体に係わる信号
を生成するので、近接して配置したほうが処理しやすい
こと、およびこれらの回路は比較的小さいロジック数な
ので、画面処理部61の隅に配置して2個目以降では使
わなくとも影響がないことなどによる。
Another feature is that the cell processing unit 6 performs signal processing on the entire liquid crystal cell in the same integrated circuit element.
2. The cell processing unit 62 includes a boundary screen processing circuit, a voltage abnormality detection circuit, a clock abnormality detection circuit,
It monitors the voltage and clock of the entire liquid crystal cell, such as a waveform rounding correction circuit, an alternating signal generation circuit, and an upper screen lower screen drive switching circuit of the central scanning circuit element, and generates necessary signals. Only one is required. The reason why this is incorporated in each correction circuit 6 is that the crosstalk correction signal generation circuit processes the image signal while receiving various clocks, while the cell processing unit 62 detects the state of the image signal and the clock to detect the state of the image signal. Since a signal relating to the entire liquid crystal cell is generated, it is easier to process when arranged close to each other, and since these circuits have a relatively small number of logics, they are arranged at the corners of the screen processing unit 61 and used for the second and subsequent circuits. If there is no effect at all.

【0017】なお、セル処理部6の各回路は、上下別々
に走査されることから、分割された画面(領域)での表
示の隣接走査線が受ける影響と、上下の画面(領域)の
境界の走査線を走査するときの隣接走査線が受ける影響
が異なり表示品位が一定しないので、上画面の最も下の
走査線による走査時に信号側データを帰線期間に及んで
まで出力するなどの対策をする境界画面処理回路、電圧
変動による画質不安定を検出する電圧異常検出回路、各
種クロックの欠落による画像の歪みを検出するクロック
異常検出回路、液晶セルが容量性負荷であることから印
加電圧が急峻性を失うことがあるのでそれを検出し失っ
た電圧印加の実効値を補正する波形なまり補正回路、液
晶セル印加電圧の印加極性を所定の条件で反転させる交
流化信号発生回路、走査回路を前述のように5つの集積
回路で構成した場合、中央の集積回路を上画面駆動とす
るか下画面駆動とするか切り替える中央走査回路素子の
上画面下画面駆動切替回路などが組み込み可能であり、
少なくとも1回路以上組み込むのがよい。
Since each circuit of the cell processing section 6 is separately scanned in the upper and lower directions, the influence of adjacent scanning lines on the display in the divided screen (area) and the boundary between the upper and lower screens (area) are different. The effect of adjacent scanning lines when scanning one scanning line is different and the display quality is not constant, so measures such as outputting the signal side data to the retrace period when scanning with the lowest scanning line on the upper screen Boundary screen processing circuit, voltage abnormality detection circuit that detects image quality instability due to voltage fluctuations, clock abnormality detection circuit that detects image distortion due to lack of various clocks, and applied voltage because the liquid crystal cell is a capacitive load A waveform rounding correction circuit that detects steepness and corrects the lost effective value of the applied voltage, and an AC signal generation circuit that inverts the applied polarity of the liquid crystal cell applied voltage under predetermined conditions When the scanning circuit is composed of five integrated circuits as described above, it is possible to incorporate an upper screen lower screen drive switching circuit that switches the central integrated circuit between upper screen driving and lower screen driving, etc. And
At least one circuit is preferably incorporated.

【0018】[0018]

【発明の効果】本発明は上述のように、画面ごとの補正
回路を設け、その補正回路を組み込む集積回路素子にセ
ル処理部も組み込んだので、配線の引き回しによってノ
イズの影響を受けることもノイズを放出することも少な
く、集積回路素子によって基板が徒に大きくなり液晶表
示面の周辺や背面に大きな部品配置容積を必要とするこ
ともなく、場所を取って調整の困難となるような処理の
調整・変更や使わない機能が大きい、高価な集積回路素
子を使う無駄もなく、表示品位を高く維持することがで
きた。
As described above, according to the present invention, the correction circuit for each screen is provided, and the cell processing section is also incorporated in the integrated circuit element in which the correction circuit is incorporated. Process that makes it difficult to adjust by taking up space without requiring a large component arrangement volume around or on the back of the liquid crystal display surface. High display quality could be maintained without waste of expensive integrated circuit elements having large adjustment / change and unused functions.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明実施例の液晶表示装置のブロック図であ
る。
FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

【図2】従来の液晶表示装置のブロック図である。FIG. 2 is a block diagram of a conventional liquid crystal display device.

【符号の説明】[Explanation of symbols]

1 液晶セル 2 走査回路 3 信号回路 4 受信回路 5 バイアス回路 6 補正回路 61 画面処理部 62 セル処理部 DESCRIPTION OF SYMBOLS 1 Liquid crystal cell 2 Scanning circuit 3 Signal circuit 4 Receiving circuit 5 Bias circuit 6 Correction circuit 61 Screen processing part 62 Cell processing part

フロントページの続き (72)発明者 山根 誠司 鳥取県鳥取市南吉方3丁目201番地 鳥取 三洋電機株式会社内 (72)発明者 前田 耕志 鳥取県鳥取市南吉方3丁目201番地 鳥取 三洋電機株式会社内Continuation of the front page (72) Inventor Seiji Yamane 3-201 Minamiyoshikata, Tottori-shi, Tottori Sanyo Electric Co., Ltd. (72) Inventor Koji Maeda 3-201 Minamiyoshikata, Tottori-shi, Tottori Sanyo Electric Tottori

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 走査電極群と信号電極群との組み合わせ
を複数有することにより画面が複数に分割された液晶セ
ルと、その走査電極群に接続された走査回路と、画信号
に応じて画素データを前記信号電極群に与える信号回路
と、画信号に応じて表示改善データを生成する補正回路
とを具備した液晶表示装置において、前記補正回路は、
分割された各々の画面に対する画面処理部と液晶セル全
体に対する信号処理をするセル処理部を一体に有する集
積回路素子を具備したことを特徴とする液晶表示装置。
A liquid crystal cell having a plurality of screens divided by a plurality of combinations of a scanning electrode group and a signal electrode group, a scanning circuit connected to the scanning electrode group, and pixel data according to an image signal. And a correction circuit for generating display improvement data according to an image signal, the correction circuit,
A liquid crystal display device comprising: an integrated circuit element integrally including a screen processing unit for each divided screen and a cell processing unit for performing signal processing on the entire liquid crystal cell.
【請求項2】 前記集積回路素子は分割された画面毎に
用いられることを特徴とする前記請求項1記載の液晶表
示装置。
2. The liquid crystal display device according to claim 1, wherein the integrated circuit element is used for each divided screen.
【請求項3】 直交する電極群を複数組有する液晶セル
と、各組において直交する電極群の一方に接続され所定
の電極に走査電圧を出力する走査回路と、画信号に応じ
て画素データを他方の電極群に与える信号回路と、各組
において画信号に応じて表示改善データを生成する画面
処理部と液晶セル全体の電圧・クロックなどを監視して
必要な信号を生成するセル処理部を一体に有する集積回
路素子を具備したことを特徴とする液晶表示装置。
3. A liquid crystal cell having a plurality of groups of orthogonal electrodes, a scanning circuit connected to one of the groups of orthogonal electrodes in each group and outputting a scanning voltage to a predetermined electrode, and pixel data according to an image signal. A signal circuit to be applied to the other electrode group, a screen processing unit for generating display improvement data according to an image signal in each group, and a cell processing unit for monitoring a voltage / clock of the entire liquid crystal cell and generating a necessary signal. A liquid crystal display device comprising an integrated circuit element provided integrally.
JP04541798A 1998-02-26 1998-02-26 Liquid crystal display Expired - Fee Related JP3253584B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04541798A JP3253584B2 (en) 1998-02-26 1998-02-26 Liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04541798A JP3253584B2 (en) 1998-02-26 1998-02-26 Liquid crystal display

Publications (2)

Publication Number Publication Date
JPH11242203A true JPH11242203A (en) 1999-09-07
JP3253584B2 JP3253584B2 (en) 2002-02-04

Family

ID=12718698

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04541798A Expired - Fee Related JP3253584B2 (en) 1998-02-26 1998-02-26 Liquid crystal display

Country Status (1)

Country Link
JP (1) JP3253584B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6290315B1 (en) * 1998-08-12 2001-09-18 Seiko Epson Corporation Method of driving an ink jet recording head

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6290315B1 (en) * 1998-08-12 2001-09-18 Seiko Epson Corporation Method of driving an ink jet recording head

Also Published As

Publication number Publication date
JP3253584B2 (en) 2002-02-04

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