JPH0744138A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide the liquid crystal display device of simple constitution which makes a display of high quality and is reduced in thickness and weight. CONSTITUTION:A display screen is constituted by combining plural simple matrix system liquid crystal display panels LCDs having pixels constituted at the intersections of scanning line electrodes and signal line electrodes, and the polarity switching timing of a driving signal for AC driving is shifted, panel by panel. The polarity of the driving signal is switched, panel by panel, while dispersed with time, so a rush current can also be dispersed and reduced correspondingly, so the display of high quality is made and the thickness and weight are reducible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal driving method, and more particularly to a technique effective for use in a liquid crystal display panel of a simple matrix type which is driven by a voltage averaging method.

[0002]

2. Description of the Related Art When a simple matrix type liquid crystal display panel is driven by a line-sequential type and a voltage averaging method, a selection / non-selection voltage applied to a scanning line electrode and a signal line electrode is
For example, it is a constant voltage as determined by the voltage averaging method as described in JP-A-54-2096.

[0003]

A simple matrix type liquid crystal display panel has a capacitance at the intersection of a scanning line (common) electrode and a signal line (segment) electrode. Therefore, when the polarity of the drive signal is inverted by the AC signal for AC drive, an inrush current of about 1 A is generated in the capacitive load. As shown in FIG. 5, large noise is generated in the liquid crystal drive voltage, the power supply voltage of the logic circuit, and the ground voltage of the circuit according to the inrush current. In particular, the liquid crystal drive circuit is required to have a low voltage such as 3 V and a high speed, and accordingly, the rush voltage as described above tends to be more than double that of the conventional one. Therefore, in the liquid crystal display device, in order to compensate for malfunctions and deterioration of display quality due to noise during AC driving,
It is indispensable to strengthen the power supply line by multilayering the printed circuit board and to strengthen the power supply circuit by adding a noise filter or a capacitor, which is becoming a major factor that hinders cost increase, thinning and weight reduction. .

An object of the present invention is to provide a liquid crystal display device which realizes a high quality display and a reduction in thickness and weight with a simple structure. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0005]

The outline of a typical one of the inventions disclosed in the present application will be briefly described as follows. That is, one display screen is configured by combining a plurality of simple matrix type liquid crystal display panels in which pixels are formed at the intersections of the scanning line electrodes and the signal line electrodes, and a driving signal for AC driving is provided for each panel. Shift the polarity switching timing.

[0006]

According to the above-mentioned means, since the polarity of the drive signal is switched for each panel by being dispersed in time, the inrush current can also be dispersed and reduced accordingly, so that high quality display and thinning can be achieved. Weight reduction can be realized.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a schematic block diagram of an embodiment of a liquid crystal drive device according to the present invention. In the liquid crystal display device shown in the figure, the display screen is composed of two vertically stacked liquid crystal panels. Corresponding to these two liquid crystal panels, the upper liquid crystal panel LCD is provided with signal line drive circuits DV11 to DV1n and scanning line drive circuits GV1 and GV2. The liquid crystal panel LCD on the lower side is also provided with the signal line driving circuits DV21 to DV2n and the scanning line driving circuits GV3 and GV4 as described above. Each of these drive circuits is composed of one semiconductor integrated circuit device.

Although not particularly limited, the above-mentioned vertically stacked products 2
Each of the two liquid crystal panels LCD has a structure of 640 × 200 dots. That is, there are 640 signal lines extending in the vertical direction and 2 scanning lines extending in the horizontal direction.
The number of pixels is 00 and a total of 640 × 200 dots of pixels are formed. A display screen of 640 × 400 dots is formed by vertically stacking two liquid crystal display panels as described above.

In this embodiment, by the alternating signal M,
A large number of drive circuits DV11 to DV2n as described above.
In order to prevent a large inrush current from being generated in the power supply circuit supplying the operating voltage to the output signals of GV1 to GV4 all at once, the following is performed.

Although not particularly limited, the alternating signal M is a drive circuit DV11 to DV1 for the liquid crystal panel LCD for the upper screen.
n and GV1 and GV2. The drive circuit DV
11 to DV1n are for serially capturing display signals, and are connected in series. Therefore, by supplying the AC signal M of the leading drive circuit DV11, the AC signal M is also supplied to the other drive circuits DV12 to DV1n. The same applies to the drive circuits GV1 and GV2 that sequentially shift the selection signal by the shift register to form the scanning line selection signal.

As shown in FIG. 2, the delay circuit DL receives the AC conversion signal M and generates an AC conversion signal M ′ whose timing is delayed. The alternating signal M ′ is supplied to the drive circuits DV21 to DV2n and GV3 and GV4 for the liquid crystal panel LCD for the lower screen. The drive circuit DV21
DV2n capture serially display signals, and are connected in series. Therefore, in the same manner as above, by supplying the alternating signal M'of the leading drive circuit DV21, the above alternating signal M'is also supplied to the other drive circuits DV22 to DV2n. The same applies to the drive circuits GV3 and GV4 that sequentially shift the selection signal by the shift register to form the scanning line selection signal. Therefore, between the scanning line drive circuits GV2 and GV3, the AC signal terminals are not connected as in the conventional case but are separated here.

The delay circuit is composed of a D-type flip-flop circuit, a clock pulse CL1 for data latch is used as a clock input, and the alternating signal M and the delay signal M'are set by a time constant of a resistor and a capacitor. The delay time, that is, the phase difference Td between the two alternating signals M and M ′ in FIG. 2 is determined.

The alternating signals M and M'having the above-described phase difference generate noises as shown in FIG. 5 which are dispersed in time. In other words, since the number of drive circuits that invert the polarity of the drive signal can be reduced to half, the inrush current can be reduced to half and noise can be reduced. As a result, it is possible to achieve high-speed and low-voltage operation of the circuit without significantly lowering the impedance of the power supply line or providing a filter or a capacitor in the power supply circuit.

FIG. 3 is a schematic overall block diagram of an embodiment of a liquid crystal display device to which the present invention is applied.
In the figure, one data driver and one scanning driver are shown arranged on the upper side and the left side of the liquid crystal panel LCD, but in reality, the display panel LCD has a vertically stacked configuration, and Accordingly, a drive circuit is provided as shown in FIG.

The liquid crystal display panel control device receives display data from the microprocessor CPU or the like and forms clock pulses CL1 and CL2, display data Din, and a frame signal FLM necessary for the operation of the display panel. In this embodiment, when the polarity for alternating current is switched for each frame (display period of one screen), polarity inversion is performed at a relatively low frequency, and the screen flickering due to alternating current becomes a problem. Therefore, the polarity is switched for each of a plurality of scanning lines in one frame, and the AC conversion frequency is increased to several hundreds Hz to prevent flickering caused by the AC conversion.

For this reason, in this embodiment, an AC signal generating circuit is provided, the clock pulse CL1 corresponding to the scanning line selection timing is counted, and the polarity of the AC signal M is changed every plural scanning lines. The alternating signal M is supplied to the data driver and the scan driver corresponding to the upper panel LCD divided into two as described above. And
The alternating signal delayed by the delay circuit provided inside is supplied to the data driver and the scan driver corresponding to the lower panel LCD. Instead of the delay circuit, two kinds of alternating signals may be generated in the alternating signal generating circuit.

The series resistor and the operational amplifier are voltage generating circuits, which form drive voltages V1 to V6 and supply them to the scan driver and the data driver. The liquid crystal display panel includes m scanning lines of X1 to Xm and n scanning lines of Y1 to Yn. As a result, the liquid crystal display panel LCD has m × n (400 × 6 in the above embodiment).
40).

FIG. 4 shows an equivalent circuit of the liquid crystal display panel and a block diagram of a main part of an embodiment of a drive circuit thereof. In the liquid crystal display panel, pixels indicated by capacitors are formed at intersections of scanning lines extending in the horizontal direction and signal lines extending in the vertical direction. The driving voltages V1 to V6 formed by the voltage generating circuit are output via the output impedance of the power supply circuit and the wiring resistance. These voltages are transmitted to the scan lines and signal lines via the scan driver and data driver shown in the form of switches.

The shift register SR has a frame signal FL.
The selection signal initially set by M is a clock pulse CL
By sequentially shifting in synchronism with 1, the selection signals for the scans X1 to Xm are formed. This selection signal causes the scan driver 4
Two of the switches are selected, a selection / non-selection voltage is selected, and one of them is output via a switch controlled by the alternating signal M.

When the serial / parallel conversion circuit SPC serially receives the display data Din for one line in synchronization with the clock pulse CL2, the serial / parallel conversion circuit SPC transfers the display data Din in parallel to the data latch FF, and displays the fetched data. While receiving the display data, the display data corresponding to the next scan line is received. The display data fetched in the data latch FF selects two of four switches of the data driver to select a selection / non-selection voltage, and one of them is switched through a switch controlled by the alternating signal M. It is to output.

The effects obtained from the above embodiment are as follows. That is, (1) one display screen is configured by combining a plurality of simple matrix type liquid crystal display panels in which pixels are formed at the intersections of the scanning line electrodes and the signal line electrodes, and each panel is for AC driving. With a simple structure in which the polarity switching timing of the drive signal is shifted, the inrush current can also be dispersed and reduced, so that high-quality display and reduction in thickness and weight can be achieved.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention of the present application is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say. For example, the liquid crystal panel may be divided into two left and right parts. Alternatively, it may be divided into four parts, that is, upper, lower, left and right. Inrush current can be dispersed and reduced according to the division of the screen. The delay time of the two alternating signals M and M ′ is, for example, 50 ns so that inrush currents do not compete with each other.
To 1/2 cycle of the AC signal can be selected. INDUSTRIAL APPLICABILITY The present invention can be widely used for a liquid crystal display device of a line-sequential system and a voltage averaging method in which one screen is constructed by using a plurality of simple matrix system liquid crystal display panels.

[0023]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. That is, one display screen is configured by combining a plurality of simple matrix type liquid crystal display panels in which pixels are formed at the intersections of the scanning line electrodes and the signal line electrodes, and a driving signal for AC driving is provided for each panel. With a simple configuration in which the polarity switching timing is shifted, the inrush current can also be dispersed and reduced, so that high-quality display and thinning and weight reduction can be realized.

[Brief description of drawings]

FIG. 1 is a schematic principal block diagram showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a waveform diagram for explaining a part of the operation.

FIG. 3 is a schematic overall block diagram showing an embodiment of a liquid crystal display device to which the present invention is applied.

4 is a block diagram of an essential part showing an example of an equivalent circuit of the liquid crystal display panel of FIG. 3 and a drive circuit thereof.

FIG. 5 is a waveform diagram for explaining a conventional driving method.

[Explanation of symbols]

LCD ... Liquid crystal display panel, DV11 to DV2n ... Signal line drive circuit (data driver), GV1 to GV4 ... Scan line drive circuit (scan driver), DL ... Delay circuit, SR ... Shift register, SPC ... Serial / parallel conversion circuit,
FF ... Data latch, X1 to Xm ... Scan line electrode, Y1
Yn ... Signal line electrodes, V1 to V6 ... Driving voltage, CPU ... Microprocessor.

Claims (2)

[Claims] 1. A single display screen is constructed by combining a plurality of simple matrix type liquid crystal display panels each having a pixel at an intersection of a scanning line electrode and a signal line electrode, and the plurality of liquid crystal display panels are provided. A liquid crystal display device characterized in that the timings of switching the polarities of drive signals for AC drive are shifted from each other. 2. The switching timing of the polarity of the drive signal is an alternating signal formed by counting clock pulses for scanning line driving, and a delay time is set by the clock pulse for the alternating signal. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is controlled by an alternating signal delayed by a delay circuit.