JPH11233550A - Wire bonding method - Google Patents

Wire bonding method

Info

Publication number
JPH11233550A
JPH11233550A JP10041278A JP4127898A JPH11233550A JP H11233550 A JPH11233550 A JP H11233550A JP 10041278 A JP10041278 A JP 10041278A JP 4127898 A JP4127898 A JP 4127898A JP H11233550 A JPH11233550 A JP H11233550A
Authority
JP
Japan
Prior art keywords
lead
detected
leads
wire bonding
image processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10041278A
Other languages
Japanese (ja)
Other versions
JP3813345B2 (en
Inventor
Kouji Nishimaki
公路 西巻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kaijo Corp
Original Assignee
Kaijo Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kaijo Corp filed Critical Kaijo Corp
Priority to JP04127898A priority Critical patent/JP3813345B2/en
Publication of JPH11233550A publication Critical patent/JPH11233550A/en
Application granted granted Critical
Publication of JP3813345B2 publication Critical patent/JP3813345B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/1016Shape being a cuboid
    • H01L2924/10161Shape being a cuboid with a rectangular active surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent erroneous bonding by generating a detecting area from an image inputted into an image processing operation circuit, storing a predetermined identifiable position other than a lead within the detecting area as a reference position, and detecting a first lead position using the reference position as a reference. SOLUTION: A first reference point 15px, which is stored in an image processing operation circuit in advance by photographing a fishing pin 15p serving as a first reference, is detected. With the point 15px as a starting point, the adjacent leads 15px to 15xe are sequentially detected to thereby generate a detecting area. Then, a camera is moved to the next detecting point by driving an XY table, thereby setting the leads 15xe to 15xi as the next detecting area. Other leads are similarly detected sequentially and, using the last detected lead as a new reference point, the leads are detected to thereby detect the positions of all the leads. Therefore, the pin 15p and any position other than that of a lead can be used as a reference as long as they can be discriminated from the adjacent leads on the image, and thus erroneous detections can be prevented.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ワイヤボンディン
グ方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wire bonding method.

【0002】[0002]

【従来の技術】半導体集積回路(IC)や、大規模集積
回路(LSI)を製造する場合には図4に示すように、
半導体部品としての半導体ペレットSを取り付けたリー
ドフレームLFをボンディングステージ(ステージとも
呼ぶ)としてのテーブルT上に位置決めした後、ワイヤ
Wを保持するボンディング工具(図示せず)をフレーム
としてのリードフレームLF及び半導体ペレットSに対
して相対的に変位させることにより、ワイヤWをリード
フレームLFに設けたリードポスト(以下、リードとも
いう)LPと半導体ペレットSのパッド(電極)SPに
それぞれ導いてボンディングを行う。このテーブルT上
に位置決めしたリードフレームLF及び半導体ペレット
Sの実際のボンディング点は、一般にあらかじめXYテ
ーブル(図示せず)上の座標として定められた正規のボ
ンディング点よりずれている。
2. Description of the Related Art When a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI) is manufactured, as shown in FIG.
After positioning a lead frame LF on which a semiconductor pellet S as a semiconductor component is mounted on a table T as a bonding stage (also referred to as a stage), a bonding tool (not shown) holding a wire W is connected to a lead frame LF as a frame. By relatively displacing the semiconductor pellet S with respect to the semiconductor pellet S, the wire W is guided to a lead post (hereinafter, also referred to as a lead) LP provided on the lead frame LF and a pad (electrode) SP of the semiconductor pellet S to perform bonding. Do. The actual bonding points of the lead frame LF and the semiconductor pellet S positioned on the table T are generally shifted from the normal bonding points previously determined as coordinates on an XY table (not shown).

【0003】このボンディング点の位置のずれ量を検出
して補正する方法として、リードポストLPの2定点を
あらかじめ定めておき、この2定点の実際の位置を検出
してあらかじめ定めた2定点とのずれ量を検出すること
によりリードポストLP上の実際のボンディング位置を
算出する。
As a method of detecting and correcting the amount of displacement of the bonding point, two fixed points of the lead post LP are determined in advance, and the actual position of the two fixed points is detected and compared with the predetermined two fixed points. The actual bonding position on the lead post LP is calculated by detecting the shift amount.

【0004】前記リードポストLPの2定点のずれ量を
検出して補正する場合には、各リードポストLPの相対
的な位置のばらつきは考慮せず、あらかじめ定めた位置
に前記2定点により求めたずれ量を加算して各リードポ
ストLPの位置を検出している。
In the case of detecting and correcting the amount of deviation between the two fixed points of the lead post LP, variations in the relative positions of the respective lead posts LP are not taken into account, but are determined at predetermined positions using the two fixed points. The position of each lead post LP is detected by adding the shift amount.

【0005】[0005]

【発明が解決しようとする課題】従来のワイヤボンディ
ング方法では、前記撮像手段があらかじめ定めたリード
ポストLPの位置に移動して検出しようとする場合、検
出しようとするリードポストLPと隣のリードポストL
Pとが相対的にずれているような場合であっても検出位
置がリードポストLPの幅内であれば任意の位置を基準
位置として設定する。そして、基準位置におけるリード
ポストLPと隣接するリードポストとの相対的位置関係
をあらかじめ記憶しておくことにより基準位置における
リードポストLPから連続的に隣り合うリードポストL
Pの位置を検出する。
In the conventional wire bonding method, when the image pickup means moves to a predetermined position of the lead post LP and tries to detect it, the lead post LP to be detected and the adjacent lead post are used. L
Even when P is relatively shifted, an arbitrary position is set as the reference position if the detection position is within the width of the lead post LP. Then, by storing in advance the relative positional relationship between the lead post LP at the reference position and the adjacent lead post, the lead post L continuously adjacent to the lead post LP at the reference position is stored.
The position of P is detected.

【0006】しかして、近年、半導体の小型化、高集積
化に伴いリードポストLPの本数が増加し、各リードポ
ストLPの間隔が狭くなるとともに各リードポストLP
の幅も小さくなる傾向にある。このようなリードポスト
LPの位置の検出は、カメラ等の撮像手段から得られた
画像をデジタル化して画像処理により行う。この画像処
理による検出はリードポストLPの幅が大きいときは検
出しやすいが各リードポストLPの幅が細くなると、前
記撮像手段により得られる各リードポストLPの画像の
検出エリアも小さくなるため各リードポストLPの位置
を検出しにくくなるおそれがある。
However, in recent years, the number of lead posts LP has increased with the miniaturization and high integration of semiconductors, the intervals between the lead posts LP have become narrower, and
Tend to be smaller. Such detection of the position of the lead post LP is performed by digitizing an image obtained from an imaging unit such as a camera and performing image processing. The detection by this image processing is easy to detect when the width of the lead post LP is large, but when the width of each lead post LP becomes narrow, the detection area of the image of each lead post LP obtained by the imaging means becomes small. It may be difficult to detect the position of the post LP.

【0007】その結果、前記撮像手段が検出しようとす
るリードポストLPと隣のリードポストLPとの間、す
なわちリードポストLP間を検出したような場合、撮像
手段から得られた画像の画像処理により基準となるリー
ドポストLPの基準位置を正確に求めることができない
おそれがある。すなわち、最初の基準となるリードポス
トLPの基準位置を隣接するリードポストLP上の位置
が正規の位置であるものと誤検出する可能性がある。
As a result, when the image pickup means detects between the lead post LP to be detected and an adjacent lead post LP, that is, between the read posts LP, the image processing of the image obtained from the image pickup means is performed. There is a possibility that the reference position of the reference lead post LP cannot be accurately obtained. That is, the reference position of the lead post LP serving as the first reference may be erroneously detected as a position on the adjacent lead post LP being a normal position.

【0008】従って、この隣接するリードポストLPを
基準位置として設定すると、このリードポストLPと隣
り合うリードポスト、更にこのリードポストLPと隣り
合うリードポストLP....というように順次1つ前
の位置情報から次々にリードポストLPの位置を求めて
いくため、最初のリードポストLPの位置を誤って検出
してしまうと誤った位置情報のもとにボンディング接続
を行うことになりボンディング不良となる。
Accordingly, when the adjacent lead post LP is set as a reference position, the lead post adjacent to the lead post LP, and the lead post LP adjacent to the lead post LP are further set. . . . As described above, since the positions of the lead posts LP are sequentially obtained from the immediately preceding position information, if the position of the first lead post LP is erroneously detected, the bonding connection is performed based on the erroneous position information. This results in bonding failure.

【0009】本発明の目的は、前記従来技術の欠点に鑑
みてなされたものであって、多ピン化された幅の狭いリ
ードを有するフレームの各リードの位置を確実に検出す
ることが可能なワイヤボンディング方法を提供すること
である。
An object of the present invention has been made in view of the above-mentioned drawbacks of the prior art, and it is possible to reliably detect the position of each lead of a frame having a narrow lead having multiple pins. It is to provide a wire bonding method.

【0010】[0010]

【課題を解決するための手段】本発明は、半導体部品を
載置したフレームをステージ上に配置し、ワイヤを保持
する工具を前記フレーム及び半導体部品に対して相対的
に変位させることにより前記ワイヤを前記フレームに設
けたリードと前記半導体部品上の電極にそれぞれ導いて
ボンディングするワイヤボンディング方法において、撮
像手段により撮像した画像をデジタル化して画像処理演
算回路に入力し、前記画像処理演算回路内に入力された
画像から検出エリアを生成し、この検出エリア内で前記
リード以外の判別可能な特定の部位を基準位置として記
憶し、この基準位置を基に最初のリードの位置を検出し
てなるものである。
According to the present invention, a frame on which a semiconductor component is mounted is placed on a stage, and a tool for holding the wire is displaced relative to the frame and the semiconductor component. In the wire bonding method of bonding the leads provided on the frame and the electrodes on the semiconductor component, respectively, the image captured by the image capturing means is digitized and input to an image processing circuit, and A detection area is generated from an input image, and a specific part other than the lead in the detection area is stored as a reference position, and a first lead position is detected based on the reference position. It is.

【0011】また、本発明は、前記最初のリード位置を
基に順次隣接するリード位置を検出するものである。
Further, the present invention is to detect adjacent lead positions sequentially based on the first lead position.

【0012】また、本発明の前記最初の基準位置は、釣
りピン(タイバー)である。
The first reference position of the present invention is a fishing pin (tie bar).

【0013】また、本発明の前記最初のリードは、前記
釣りピン(タイバー)に隣接するリードである。
Further, the first lead of the present invention is a lead adjacent to the fishing pin (tie bar).

【0014】[0014]

【発明の実施の形態】以下図面を参照して、本発明によ
るワイヤボンディング方法について説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a wire bonding method according to the present invention will be described with reference to the drawings.

【0015】図1は、本発明によるワイヤボンディング
方法を用いたワイヤボンディング装置の回路構成を示す
図、図2及び図3は、本発明によるワイヤボンディング
方法の検出方法を説明する説明図である。
FIG. 1 is a diagram showing a circuit configuration of a wire bonding apparatus using the wire bonding method according to the present invention, and FIGS. 2 and 3 are explanatory diagrams for explaining a detection method of the wire bonding method according to the present invention.

【0016】図1に示すように、ワイヤボンディング装
置は、タイミング回路1と、撮像手段としてのカメラ2
と、増幅器3と、A/D変換回路4と、表示手段として
のモニタ5と、画像処理演算回路6と、XYテーブル駆
動回路7とからなっている。
As shown in FIG. 1, a wire bonding apparatus includes a timing circuit 1 and a camera 2 as an image pickup means.
, An amplifier 3, an A / D conversion circuit 4, a monitor 5 as display means, an image processing operation circuit 6, and an XY table drive circuit 7.

【0017】タイミング回路1は、所定の基準信号を発
生する発振回路1aと水平及び垂直同期信号を発生する
同期信号発生回路1bとで構成され、同期信号発生回路
1bは前記発振回路1aの基準信号と同期した同期信号
を撮像手段としてのカメラ2に入力する。カメラ2は2
次元方向に移動可能な図示せぬXYテーブルに搭載され
てボンディングステージ(ステージとも呼ぶ)9上のフ
レームとしてのリードフレーム15及び/又は半導体部
品としての半導体ペレット16を撮像する。
The timing circuit 1 is composed of an oscillation circuit 1a for generating a predetermined reference signal and a synchronization signal generation circuit 1b for generating horizontal and vertical synchronization signals. The synchronization signal generation circuit 1b is a reference signal for the oscillation circuit 1a. Is input to the camera 2 as an imaging means. Camera 2 is 2
A lead frame 15 as a frame on a bonding stage (also called a stage) 9 and / or a semiconductor pellet 16 as a semiconductor component is mounted on an XY table (not shown) movable in the dimension direction.

【0018】前記カメラ2で撮像した画像情報は、増幅
器3により増幅されA/D変換回路4によりアナログ信
号からデジタル信号に変換する。このA/D変換回路4
は、例えば図4に示すように、リードポストLPの部分
を明色化してデジタル値としては高いレベルの値又は二
値化処理時は「1」として読みとり、それ以外の部分は
暗色化してデジタル値としては低いレベルの値又は二値
化処理時は「0」として処理する構成となっている。
Image information picked up by the camera 2 is amplified by an amplifier 3 and converted from an analog signal to a digital signal by an A / D conversion circuit 4. This A / D conversion circuit 4
As shown in FIG. 4, for example, as shown in FIG. 4, the portion of the lead post LP is lightened and read as a high level value as a digital value or "1" at the time of binarization processing, and the other portions are darkened and digitalized. The value is set to a low level value or “0” during the binarization process.

【0019】前記A/D変換回路4は、デジタル化した
画像情報を直接表示手段としてのモニタ5に入力すると
共に画像処理演算回路6にも入力する。画像処理演算回
路6は、記憶手段としてのメモリや中央演算処理装置と
してのCPUなどを内蔵しており、カメラ2が撮像して
新たに得られた画像情報とあらかじめ設定した画像情報
とをパターンマッチングなどの手段による比較判定処理
や、カメラ1の制御をタイミング回路1からの同期信号
に同期させた制御等を行う。
The A / D conversion circuit 4 inputs the digitized image information directly to the monitor 5 as display means and also to the image processing operation circuit 6. The image processing operation circuit 6 has a built-in memory as a storage means, a CPU as a central processing unit, and the like, and performs pattern matching between image information newly obtained by imaging by the camera 2 and previously set image information. And the like, and control for synchronizing the control of the camera 1 with the synchronization signal from the timing circuit 1 and the like.

【0020】次に、本発明によるワイヤボンディング方
法について以下に説明する。
Next, the wire bonding method according to the present invention will be described below.

【0021】図1に示すように、半導体部品としての半
導体ペレット16を載置したフレームとしてのリードフ
レーム15がワイヤボンディングを行うボンディングス
テージ9上に図示せぬ搬送手段により自動的に搬送され
て位置決めされると、XYテーブル駆動回路7は、2次
元方向に移動可能なXYテーブル(図示せず)を駆動し
てカメラ2を条件設定等を行うセルフティーチ時等に画
像処理演算回路6内のメモリにあらかじめ定めた正規の
位置に移動する。
As shown in FIG. 1, a lead frame 15 as a frame on which a semiconductor pellet 16 as a semiconductor component is mounted is automatically transferred by a transfer means (not shown) onto a bonding stage 9 for performing wire bonding and positioned. Then, the XY table driving circuit 7 drives a XY table (not shown) movable in a two-dimensional direction to drive the camera 2 in a memory in the image processing operation circuit 6 at the time of self-teaching to set conditions and the like. Move to a predetermined regular position.

【0022】そして、リードフレーム15上のあらかじ
め定めた2定点の位置を検出する。このあらかじめ定め
た2定点、すなわち正規の位置と新たにカメラ2により
得られた位置とを比較して正規の位置とのずれ量を画像
処理演算回路6により検出してリードフレーム15の相
対的な位置補正を行う。この2定点による補正は、リー
ドフレーム15の相対的なずれ量を検出して全体の位置
補正は行う。しかし、この2定点による補正では、各リ
ード毎のボンディング点のずれ量の補正は行われない。
Then, the positions of two predetermined fixed points on the lead frame 15 are detected. The predetermined two fixed points, that is, the normal position and the position newly obtained by the camera 2 are compared with each other, the amount of deviation from the normal position is detected by the image processing operation circuit 6, and the relative position of the lead frame 15 is determined. Perform position correction. In the correction using the two fixed points, the relative position of the lead frame 15 is detected and the entire position is corrected. However, in the correction using the two fixed points, the shift amount of the bonding point for each lead is not corrected.

【0023】次に、撮像手段としてのカメラ2等を用い
てリードフレーム15の各リード毎の補正を行う。この
補正をリードロケートによる補正と呼ぶ。
Next, correction for each lead of the lead frame 15 is performed using the camera 2 or the like as an image pickup means. This correction is referred to as correction by read locating.

【0024】図2に示すように、このリードロケート
は、リード15xa乃至15xe,15ya乃至15yeの各リ
ード毎の幅はデジタル処理されて画像情報として得られ
ているので、通常各リードの中点を検出するようになっ
ている。従って、図2に示すように、リードロケートは
例えば、Oxa,Oxb(Oya,Oyb)の位置を検出する。
As shown in FIG. 2, the width of each of the leads 15xa to 15xe and 15ya to 15ye is digitally processed and obtained as image information. It is designed to detect. Therefore, as shown in FIG. 2, the relocate detects, for example, the position of Oxa, Oxb (Oya, Oyb).

【0025】しかして、このリードロケートによる検
出、すなわちボンディング点の位置検出は、最初の基準
となるあらかじめ定めた正規のリードの位置がリード1
5xa(若しくはリード15ya)であるとすると、カメラ
2が移動して検出した実際の位置が例えば、Oxa1(若
しくはOya1)であるとすると、画像処理演算回路6は
第2のリードである15xb(若しくは15yb)を最初の
基準となるあらかじめ定めた正規のリード15xa(若し
くは15ya)であるものと判断するおそれがある。
In the detection by the lead locate, that is, the position detection of the bonding point, the position of the predetermined regular lead, which is the first reference, is the lead 1.
Assuming that the actual position detected by moving the camera 2 is, for example, Oxa1 (or Oya1), the image processing operation circuit 6 determines that the actual position is the second lead 15xb (or lead 15ya). 15yb) may be determined to be a predetermined regular lead 15xa (or 15ya) serving as an initial reference.

【0026】しかして、15xbが最初の基準点であるも
のと誤検出すると、リードロケートは次のリード15x
c,15xd,15xeを順次1つずつずれて検出してしま
う。また、15ybを最初の基準点であるものと誤検出し
た場合も同様である。
If the 15xb is erroneously detected as being the first reference point, the read locate is performed for the next lead 15xb.
c, 15xd, and 15xe are sequentially shifted one by one and detected. The same applies when 15yb is erroneously detected as the first reference point.

【0027】このようなリードロケートによる検出にお
いて、誤った位置を正規のボンディング点であるものと
判定した場合には、そのままボンディングするとボンデ
ィング不良となってしまう。
In such detection by read locating, if it is determined that an erroneous position is a regular bonding point, bonding will result in a bonding failure if bonding is performed as it is.

【0028】そこで、本発明によるワイヤボンディング
方法においては、リードの幅及びリード間の幅が狭く画
像としても取り込みにくい場合であっても最初の基準点
となるボンディング位置を確実に取り込みかつ検出する
ことができるものである。
Therefore, in the wire bonding method according to the present invention, even if the width of the leads and the width between the leads are too small to capture even an image, the bonding position serving as the first reference point is reliably captured and detected. Can be done.

【0029】すなわち、リードフレーム15は、図2に
示すように、半導体ペレット16が載置されるアイラン
ド15L上に載置されており、このアイランド15Lは支
持部としての釣りピン(タイバー)15pに支持されて
いる。この釣りピン15pと各リード15xa乃至15x
e,15ya乃至15yeとの間は開口部18が形成されて
いる。従って、通常この釣りピン15pは各角部4カ所
に形成されている。この釣りピン15pは、各リード1
5xa乃至15xe,15ya乃至15yeと比較しても変形し
にくく、太さや長さも各リードとは異なるため容易に識
別することができる。しかも、カメラ2の倍率を上げて
検出エリアが狭くなった場合でも確実にリード15xa乃
至15xe,15ya乃至15yeと区別して判別することが
できる。
That is, as shown in FIG. 2, the lead frame 15 is mounted on an island 15L on which the semiconductor pellet 16 is mounted, and the island 15L is connected to a fishing pin (tie bar) 15p as a support. Supported. This fishing pin 15p and each lead 15xa to 15x
An opening 18 is formed between e and 15ya to 15ye. Therefore, the fishing pins 15p are usually formed at four corners. This fishing pin 15p
Compared to 5xa to 15xe and 15ya to 15ye, they are not easily deformed, and can be easily identified because they are different in thickness and length from each lead. In addition, even when the detection area is narrowed by increasing the magnification of the camera 2, it is possible to reliably distinguish and distinguish the leads 15xa to 15xe and 15ya to 15ye.

【0030】そこで、このワイヤボンディング方法で
は、釣りピン15pの任意の位置を最初の基準点として
セルフティーチ時等に設定して画像処理演算回路6内の
メモリに記憶させておく。そして、リードロケートの検
出時に、カメラ2はまず最初にこの釣りピン15pのあ
らかじめ定めた正規の位置15pxを検出する。
Therefore, in this wire bonding method, an arbitrary position of the fishing pin 15p is set as a first reference point at the time of self-teaching or the like and is stored in the memory in the image processing operation circuit 6. Then, when detecting the lead locate, the camera 2 first detects a predetermined regular position 15px of the fishing pin 15p.

【0031】この最初の基準点となる釣りピン15pxと
隣接するリードポスト15xa若しくは15yaとの対応、
すなわち、隣接するリードポスト15xa若しくは15ya
が前記釣りピン15pxから何ワイヤー目にあたるかとい
う情報をあらかじめマイクロコンピュータ等からなる画
像処理演算回路6内のメモリに設定し記憶する。
Correspondence between the fishing pin 15px serving as the first reference point and the adjacent lead post 15xa or 15ya,
That is, the adjacent lead post 15xa or 15ya
Is set in advance and stored in a memory in the image processing operation circuit 6 composed of a microcomputer or the like from the fishing pin 15px.

【0032】そして、最初の基準点となる15pxからリ
ード15xa乃至15xe(若しくは15ya乃至15ye)の
位置を検出する方法を図3を参照して説明する。
A method of detecting the positions of the leads 15xa to 15xe (or 15ya to 15ye) from the first reference point 15px will be described with reference to FIG.

【0033】図3(a)に示すように、まず最初の基準
となる釣りピン15pをカメラ2により撮像してあらか
じめ画像処理演算回路6内に記憶した最初の基準点15
pxを検出する。この釣りピン15pは、長さや太さがリ
ード15xa乃至15xe(若しくは15ya乃至15ye)と
は異なっており、画像処理により容易に判別することが
できる。しかも、この釣りピン15pは比較的丈夫で変
形しにくいため誤検出されにくく、リード15xa乃至1
5xe(若しくは15ya乃至15ye)を検出するのに好適
である。
As shown in FIG. 3A, first, a fishing pin 15p serving as a first reference is imaged by the camera 2 and the first reference point 15p stored in the image processing operation circuit 6 in advance.
Detects px. The fishing pin 15p is different in length and thickness from the leads 15xa to 15xe (or 15ya to 15ye), and can be easily identified by image processing. In addition, since the fishing pin 15p is relatively strong and hardly deformed, it is hard to be erroneously detected, and the leads 15xa to 1x
It is suitable for detecting 5xe (or 15ya to 15ye).

【0034】画像処理演算回路6は、最初の基準点であ
る15pxが検出されると画像処理により基準点である1
5pxを起点として隣接するリード15xa乃至15xe(若
しくは15ya乃至15ye)を順次検出していくが、図3
(b)に示すように、釣りピン15px並びにリード15
xa乃至15xdまでが同一画面上で一括処理可能な範囲と
判断してリード15xa乃至15xdの検出を行う。この図
3(b)に示す範囲を検出エリアと呼ぶ。この検出エリ
アは、カメラ2から画像処理演算回路6内に入力された
画像から画像処理演算回路6内で生成する。
When the first reference point 15px is detected, the image processing operation circuit 6 performs the image processing on the first reference point 15px.
The adjacent leads 15xa to 15xe (or 15ya to 15ye) are sequentially detected starting from 5px.
(B) As shown in FIG.
It is determined that the ranges xa to 15xd are ranges that can be collectively processed on the same screen, and the leads 15xa to 15xd are detected. The range shown in FIG. 3B is called a detection area. This detection area is generated in the image processing circuit 6 from the image input from the camera 2 to the image processing circuit 6.

【0035】前記検出エリアで検出したリード15xa乃
至15xdの各位置は、画像処理演算回路6内に記憶す
る。そして、リード15xa乃至15xdまでの検出が終了
すると、画像処理演算回路6はXYテーブル駆動回路7
に指令を出して図示せぬXYテーブルを駆動してカメラ
2を次の検出点に移動させる。
The positions of the leads 15xa to 15xd detected in the detection area are stored in the image processing operation circuit 6. When the detection of the leads 15xa to 15xd is completed, the image processing operation circuit 6 switches to the XY table driving circuit 7
To drive the XY table (not shown) to move the camera 2 to the next detection point.

【0036】図3(c)に示すように、リード15xdに
続くリード15xeを検出してリード15xe乃至15xiを
次の検出画面、すなわち次の検出エリアとして設定す
る。次の検出エリア内のリード15xe乃至15xiもリー
ド15xa乃至15xdと同様に順次検出を行う。
As shown in FIG. 3C, the lead 15xe following the lead 15xd is detected, and the leads 15xe to 15xi are set as the next detection screen, that is, the next detection area. The leads 15xe to 15xi in the next detection area are sequentially detected similarly to the leads 15xa to 15xd.

【0037】以降同様にして、常に前段階の検出エリア
で検出された最後のリードを含む範囲で一括処理可能な
範囲が設定され、この前段階の検出エリアで最後に検出
されたリードを新たな基準点として各リードの検出を行
い全てのリードの位置を検出する。
In the same manner, a range that can be collectively processed is set in a range including the last read always detected in the previous detection area, and a read last detected in the previous detection area is replaced with a new one. Each lead is detected as a reference point, and the positions of all leads are detected.

【0038】なお、本実施例ではリードを検出するため
の最初の基準点として釣りピン(タイバー)を用いた
が、画像上隣接するリードと判別可能であれば前記釣り
ピン及びリード以外の任意の位置を基準とすることも可
能である。
In this embodiment, a fishing pin (tie bar) is used as an initial reference point for detecting a lead. However, if it is possible to distinguish an adjacent lead on an image, any fishing rod other than the fishing pin and the lead may be used. It is also possible to use the position as a reference.

【0039】また、本実施例で最初の基準点として用い
た釣りピン(タイバー)のような画像上隣接するリード
と判別可能な基準点を複数設ければ、検出をより確実に
することができる。
Further, if a plurality of reference points such as a fishing pin (tie bar) used as the first reference point in the present embodiment and which can be distinguished from adjacent leads on the image are provided, the detection can be made more reliable. .

【0040】また、本実施例によるリードロケートの検
出は、顕微鏡等を用いて手動により行う場合や、カメラ
などの撮像手段を用いて自動的に検出する場合も含まれ
る。
The detection of the read location according to the present embodiment includes a case where the detection is performed manually using a microscope or the like, and a case where the detection is automatically performed using imaging means such as a camera.

【0041】[0041]

【発明の効果】以上説明したように、本発明によれば、
他と容易に判別可能な特定の位置情報と隣接するリード
との対応関係によって誤検出することなく確実にリード
の位置を連続的に検出することが可能である。従って、
誤ってボンディングすることがなくなり歩留まりを向上
させることが可能である。
As described above, according to the present invention,
It is possible to reliably and continuously detect the position of a lead without erroneous detection based on the correspondence between specific position information that can be easily distinguished from others and an adjacent lead. Therefore,
Erroneous bonding can be prevented, and the yield can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明によるワイヤボンディング方法を用いた
ワイヤボンディング装置の回路構成を示す図である。
FIG. 1 is a diagram showing a circuit configuration of a wire bonding apparatus using a wire bonding method according to the present invention.

【図2】本発明によるワイヤボンディング方法の検出方
法を説明する説明図である。
FIG. 2 is an explanatory diagram illustrating a detection method of a wire bonding method according to the present invention.

【図3】本発明によるワイヤボンディング方法の検出方
法を説明する説明図である。
FIG. 3 is an explanatory diagram illustrating a detection method of a wire bonding method according to the present invention.

【図4】従来のワイヤボンディング方法を説明する図で
ある。
FIG. 4 is a diagram illustrating a conventional wire bonding method.

【符号の説明】[Explanation of symbols]

1 タイミング回路 1a 発振回路 1b 同期信号発生回路 2 カメラ 3 増幅器 4 A/D変換回路 5 モニタ 6 画像処理演算回路 7 XYテーブル駆動回路 Reference Signs List 1 timing circuit 1a oscillation circuit 1b synchronization signal generation circuit 2 camera 3 amplifier 4 A / D conversion circuit 5 monitor 6 image processing operation circuit 7 XY table drive circuit

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 半導体部品を載置したフレームをステー
ジ上に配置し、ワイヤを保持する工具を前記フレーム及
び半導体部品に対して相対的に変位させることにより前
記ワイヤを前記フレームに設けたリードと前記半導体部
品上の電極にそれぞれ導いてボンディングするワイヤボ
ンディング方法において、 撮像手段により撮像した画像をデジタル化して画像処理
演算回路に入力し、 前記画像処理演算回路内に入力された画像から検出エリ
アを生成し、この検出エリア内で前記リード以外の判別
可能な特定の部位を基準位置として記憶し、この基準位
置を基に最初のリードの位置を検出してなることを特徴
とするワイヤボンディング方法。
1. A frame on which a semiconductor component is mounted is arranged on a stage, and a tool for holding the wire is displaced relative to the frame and the semiconductor component so that the wire is provided on the frame. In the wire bonding method of guiding and bonding to electrodes on the semiconductor component, an image captured by an imaging unit is digitized and input to an image processing circuit, and a detection area is determined from the image input into the image processing circuit. A wire bonding method comprising: generating and storing a specific part other than the lead in the detection area as a reference position; and detecting a position of a first lead based on the reference position.
【請求項2】 前記最初のリード位置を基に順次隣接す
るリード位置を検出することを特徴とする請求項1に記
載のワイヤボンディング方法。
2. The wire bonding method according to claim 1, wherein adjacent lead positions are sequentially detected based on the first lead position.
【請求項3】 前記最初の基準位置は、釣りピン(タイ
バー)であることを特徴とする請求項1に記載のワイヤ
ボンディング方法。
3. The wire bonding method according to claim 1, wherein the first reference position is a fishing pin (tie bar).
【請求項4】 前記最初のリードは、前記釣りピン(タ
イバー)に隣接するリードであることを特徴とする請求
項1乃至請求項3のうちいずれか1に記載のワイヤボン
ディング方法。
4. The wire bonding method according to claim 1, wherein the first lead is a lead adjacent to the fishing pin (tie bar).
JP04127898A 1998-02-06 1998-02-06 Wire bonding method Expired - Lifetime JP3813345B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP04127898A JP3813345B2 (en) 1998-02-06 1998-02-06 Wire bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04127898A JP3813345B2 (en) 1998-02-06 1998-02-06 Wire bonding method

Publications (2)

Publication Number Publication Date
JPH11233550A true JPH11233550A (en) 1999-08-27
JP3813345B2 JP3813345B2 (en) 2006-08-23

Family

ID=12603992

Family Applications (1)

Application Number Title Priority Date Filing Date
JP04127898A Expired - Lifetime JP3813345B2 (en) 1998-02-06 1998-02-06 Wire bonding method

Country Status (1)

Country Link
JP (1) JP3813345B2 (en)

Also Published As

Publication number Publication date
JP3813345B2 (en) 2006-08-23

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