JPH11219981A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize low-cost and high reliability related to a semiconductor device with flip chip connection. SOLUTION: A chip mounting substrate 2 wherein a semiconductor chip 1 is supported by flip chip connection, a conductive member 4 which, being formed of solder paste of low melting-point solder, electrically connects a pad 1a of the semiconductor chip 1 to a land 2a of the chip mounting substrate 2, a sealing part wherein an exposed surface of the semiconductor chip 1 is covered with a sealing resin, and a solder ball which is an external terminal provided on the rear surface of the chip mounting substrate 2 are provided. The semiconductor chip 1 and the chip mounting substrate 2 are so allocated as to form a resin flow-in preventive gap part 7 which prevents flow of the sealing resin, while a gap part 8 of the same interval as the resin flow preventive gap part 7 is formed around the conductive member 4 between the chip and the substrate. further, a through hole penetrating from the gap part 8 to the outside is provided at the chip mounting substrate 2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing technique, and more particularly to a flip-chip connected semiconductor device realizing low cost and high reliability and a method of manufacturing the same.

[0002]

2. Description of the Related Art The technology described below studies the present invention,
Upon completion, they were examined by the inventor, and the outline is as follows.

In a semiconductor device having a semiconductor chip on which a semiconductor integrated circuit such as a memory is formed, a BGA (Ball Grid Array) is known as an example of a structure for miniaturizing the semiconductor device. Further, in the BGA, flip-chip connection is used as a technique for speeding up signal transmission.

In the flip chip connection, an active surface (main surface) of a semiconductor chip is opposed to a chip mounting surface of a chip mounting substrate, and the semiconductor chip is mounted on the chip mounting substrate in this state.

When a semiconductor chip is flip-chip connected, a surface electrode of the semiconductor chip is electrically connected to a substrate terminal of the chip mounting board mainly by using a conductive member such as a bump.

In this case, the connection portion of the bump is prevented from melting and expanding due to a reflow temperature when the BGA is mounted on a mounting board such as a printed wiring board, so that a package crack (a crack formed in a sealing portion) is not caused. In many cases, a bump formed of a high melting point solder is used.

Further, in order to improve the connection reliability of the bump, an aluminum pad (surface electrode) of a semiconductor chip is used.
In some cases, a large-sized gold bump is formed by plating.

Here, a BG connected by flip chip connection
About A, for example, JP-A-9-82756,
JP-A-9-92685, JP-A-6-326221
JP-A-7-111278 and JP-A-9-111278
-64231.

[0009]

However, when a high melting point solder is used as a bump in the flip-chip connection of the above-described technique, a high heat-resistant substrate must be used as a chip mounting substrate.

As a result, since the high melting point solder and the high heat resistant substrate are expensive, there is a problem that the cost of the BGA increases.

Furthermore, even when gold bumps are formed on the pads of a semiconductor chip by plating, a plating step is added to the semiconductor chip manufacturing process, so that it is necessary to introduce equipment for plating application. As described above, there is a problem that the cost is increased.

Further, B described in the above five publications
In the GA, in the structure, the sealing resin is embedded around the bump between the flip-chip connected semiconductor chip and the chip mounting substrate, so that the bump melts and expands (thermal expansion) when the BGA is mounted. May cause package cracking.

Thus, there is a problem that the reliability of the BGA is reduced.

An object of the present invention is to provide a flip-chip-connected semiconductor device realizing low cost and high reliability, and a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0016]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the semiconductor device of the present invention, a chip mounting substrate for supporting a semiconductor chip by flip-chip connection, a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate are electrically connected to each other, and A conductive member having a connection portion between the electrode and the substrate terminal formed of low-melting-point solder, a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin, and mounting the chip on the chip mounting substrate. A resin having a plurality of external terminals provided on a surface opposite to the surface and electrically connected to the substrate terminal, wherein the semiconductor chip and the chip mounting substrate block the inflow of the sealing resin; An inflow prevention gap is formed and arranged, and a gap is formed around the conductive member between the semiconductor chip and the chip mounting board. Than it is.

Thus, since the gap is formed around the conductive member, the degree of freedom of the conductive member can be increased, and as a result, the hindrance of the conductive member to thermal expansion can be reduced.

Therefore, when the conductive member attempts to thermally expand (melt / expand) when the semiconductor device is mounted on the mounting board, the conductive member can spread to the gap, and thereby the conductive member can be expanded. Stress generated by thermal expansion can be reduced.

As a result, it is possible to prevent the occurrence of a package crack at the time of mounting the semiconductor device, thereby improving the reliability of the semiconductor device.

Further, in the semiconductor device of the present invention, a chip mounting substrate for supporting a semiconductor chip by flip-chip connection, a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate are electrically connected and a low melting point is provided. A conductive member formed by solder, a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin, and a substrate provided on a surface of the chip mounting substrate opposite to the chip mounting surface and the substrate A plurality of external terminals electrically connected to a terminal, wherein the semiconductor chip and the chip mounting board are arranged so as to form a resin inflow prevention gap for preventing the inflow of the sealing resin; A gap is formed around the conductive member between the semiconductor chip and the chip mounting board.

Further, a method of manufacturing a semiconductor device according to the present invention
The main surface of the semiconductor chip and the chip mounting surface of the chip mounting substrate are opposed to each other, and the positions of the surface electrodes of the semiconductor chip and the corresponding substrate terminals of the chip mounting substrate are aligned. Disposing the semiconductor chip and the chip mounting substrate via a conductive member therebetween, and melting the conductive member to form a resin inflow prevention gap between the semiconductor chip and the chip mounting substrate. Electrically connecting the surface electrode and the substrate terminal with the conductive member in a state where the semiconductor chip is formed and flip-chip connecting the semiconductor chip to the chip mounting substrate; and The sealing resin is blocked by the sealing resin while forming a gap around the conductive member between the semiconductor chip and the chip mounting substrate by preventing the inflow of the stopping resin. Sealing the semiconductor chip by covering the exposed surface of the semiconductor chip; and providing a plurality of external terminals electrically connected to the substrate terminals on a surface of the chip mounting substrate opposite to the chip mounting surface. And

Further, in the method of manufacturing a semiconductor device according to the present invention, there is provided a step of preparing a chip mounting substrate provided with substrate terminals corresponding to surface electrodes of a semiconductor chip, and applying a solder paste made of low melting point solder to the chip mounting substrate. Applying on the substrate terminals of the semiconductor chip, a main surface of the semiconductor chip and a chip mounting surface of the chip mounting substrate are opposed to each other, and the positions of the surface electrodes and the corresponding substrate terminals are aligned. A step of disposing the semiconductor chip and the chip mounting substrate via the solder paste between an electrode and the substrate terminal, and melting the solder paste to provide a space between the semiconductor chip and the chip mounting substrate. With the resin inflow prevention gap formed, the surface electrode and the substrate terminal are electrically connected by a conductive member formed from the solder paste. Flip-chip connecting the semiconductor chip to the chip mounting substrate, and preventing the inflow of the sealing resin by the resin inflow-inhibiting gap so as to prevent the conductive between the semiconductor chip and the chip mounting substrate. Sealing the semiconductor chip by covering the exposed surface of the semiconductor chip with the sealing resin while forming a gap around the conductive member, and a surface opposite to the chip mounting surface of the chip mounting substrate. And providing a plurality of external terminals electrically connected to the substrate terminals.

[0024]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a partially cutaway perspective view showing an example of the structure of a semiconductor device (BGA) according to Embodiment 1 of the present invention, and FIG. 2 shows the structure of the BGA shown in FIG. FIGS. 3A and 3B show an example, wherein FIG. 3A is a plan view, FIG. 3B is a side view, FIG. 3C is a bottom view, and FIG.
4 is an enlarged partial sectional view showing a structure of a portion C in FIG. 3, FIG. 5 is a sectional view along a line BB in FIG. 2A, and FIG. 6 is an embodiment of the present invention. 1 is a manufacturing process diagram showing an example of a method for manufacturing a semiconductor device (BGA) in FIGS. 7A and 7B. FIGS. 7A and 7B are plan views showing examples of the state of a base substrate in each manufacturing process of the BGA shown in FIG. 8
(A), (b), and (c) are a plan view and a side view of a BGA showing an example of a state of a base substrate in each manufacturing process of the BGA shown in FIG. 1, and FIG. 1A is an enlarged partial cross-sectional view illustrating an example of a solder paste application state, in which FIG. 1A is before reflow, and FIG.
0 is an enlarged partial cross-sectional view showing an example of a molten state of the conductive member during BGA mounting reflow in the method of manufacturing the BGA shown in FIG. 1, and FIG. 11 is an example of physical properties of a sealing resin used for the BGA shown in FIG. FIG. 6 is a physical property data diagram showing

In the semiconductor device of the first embodiment shown in FIGS. 1 to 5, a memory (for example, an SSRAM (Sync
a semiconductor chip 1 on which a semiconductor integrated circuit such as a hronous static random access memory) is formed on a chip mounting board 2 by flip-chip connection.
BG provided with a plurality of solder balls 3 as external terminals
A9.

In the first embodiment, the BGA 9
As an example, BGA9 of 119 pins (7 × 17 pins)
The case will be described. However, the number of external terminals, that is, the number of solder balls 3 to be installed is not limited to 119, and the number may be less than 119 or may be 119 or more.

The BGA 9 described in the first embodiment
Then, as shown in FIGS. 2B and 2C, the solder balls 3 are provided on the opposite side of the chip mounting surface 2b where the lands 2a (see FIG. 4), which are the substrate terminals of the chip mounting substrate 2, are provided. Grid (7 × 17) on the surface (hereinafter referred to as substrate back surface 2c)
Are arranged.

Therefore, as shown in FIG. 3, a signal from the semiconductor chip 1 is transmitted to the solder ball 3 as an external terminal via the chip mounting board 2.

The structure of the BGA 9 will be described.
A chip mounting substrate 2 supporting the semiconductor chip 1 by flip-chip connection, a pad 1a (surface electrode) of the semiconductor chip 1 and a land 2a of the chip mounting substrate 2 electrically connected to each other, and a conductive material formed by low melting point solder. And a sealing portion 6 formed by covering the back surface 1 c (exposed surface) and side surface 1 d (exposed surface) of the semiconductor chip 1 with a sealing resin 5, and the substrate back surface 2 c of the chip mounting substrate 2. And a plurality (here,
119) of solder balls 3 as external terminals, and the semiconductor chip 1 and the chip mounting board 2 are arranged so as to form a resin inflow preventing gap 7 for preventing the inflow of the sealing resin 5; Semiconductor chip 1 and chip mounting board 2
(Hereinafter, abbreviated as “chip-substrate”), a gap 8 is formed around the conductive member 4 at the same interval as the resin inflow-inhibiting gap 7, and the gap 8 and the outside are formed on the chip mounting board 2. Is provided.

The through hole 2d is a vent hole for allowing gas generated in the gap 8 to escape to the outside during molding or reflow.

The semiconductor chip 1 is formed of, for example, silicon and mounted on the chip mounting surface 2b of the chip mounting substrate 2 by flip chip connection.

In the flip chip connection, as shown in FIG. 1, the size of the semiconductor chip 1 is relatively large with respect to the size of the outer shape of the BGA 9, which makes it difficult to apply the wire bonding technique. This is an effective connection technique when the connection distance between the chip and the substrate is shortened to increase the speed of signal transmission.

FIG. 4 is an enlarged view showing the structure of the flip chip connecting portion according to the first embodiment. In the flip-chip connection, the active surface (main surface 1b) of the semiconductor chip 1 is opposed to the chip mounting surface 2b of the chip mounting substrate 2, and the semiconductor chip 1 is mounted on the chip mounting substrate 2 in this state (face down). is there.

The pad 1a of the semiconductor chip 1 is made of, for example, aluminum.
5, a barrier metal layer 1e electrically connected to the connection portion 4a of the conductive member 4 and a protective film 1f for protecting the pad 1a are formed on the pad 1a. At this time, the barrier metal layer 1e is formed of, for example, a palladium-titanium alloy or a nickel-chromium alloy and is surrounded by a protective film 1f exposing its surface, while the protective film 1f is formed of, for example, a polyimide-based material. It is formed by an insulating film.

Further, the land 2a of the chip mounting substrate 2
Is formed of, for example, a gold-copper alloy.

Here, in the first embodiment, the pads 1a of the semiconductor chip 1 and the corresponding lands 2a of the chip mounting board 2 are directly electrically connected via the conductive member 4 made of low melting point solder. Have been. That is, flip-chip connection by eutectic solder connection using low melting point solder.

The low melting point solder is, for example, 25
It is a low-temperature solder that is melted by reflow at a temperature of 0 ° C. or less and can be soldered.

When performing the flip-chip connection, the solder paste 10 (see FIG. 9) applied to the land 2a of the chip mounting substrate 2 or the pad 1a of the semiconductor chip 1 by printing to a predetermined height is reflowed. As a result, the solder paste 10 is once melted and then cured to perform flip chip connection.

As a result, a resin inflow prevention gap 7 having a substantially uniform desired distance is formed over the entire outer periphery between the chip and the substrate.

The resin inflow blocking gap 7 is a gap formed so that the sealing resin 5 does not enter between the chip and the substrate during resin sealing. Is formed so as to be extremely narrow to the extent that it can be prevented.

The sealing portion 6 of the BGA 9 according to the first embodiment is formed by transfer molding using a sealing resin 5 in resin sealing.

Therefore, the set value of the distance of the resin inflow blocking gap 7 is determined by the physical properties of the sealing resin 5 used in the first embodiment shown in FIG. 11 and the molding conditions at the time of molding described later. In the case of the first embodiment, the distance of the resin inflow prevention gap 7 is, for example, about 20 mm.
μm.

However, the value of the distance of the resin inflow preventing gap 7 is limited to 20 μm as long as it can prevent the sealing resin 5 from flowing into the space between the chip and the substrate during resin sealing. Instead, it can be variously changed depending on the combination of the sealing resin 5 (for example, fluidity) to be used and the molding conditions at the time of molding and the type thereof.

In the BGA 9, when the semiconductor chip 1 is sealed with a resin by a molding method, as described above, the sealing resin 5 does not flow between the chip and the substrate. A gap 8 is formed around the conductive member 4, and the BG of the first embodiment is formed.
In A9, the resin inflow prevention gap 7 formed over the entire outer periphery between the chip and the substrate and the inner gap 8 between the chip and the substrate are formed at the same distance.

That is, the main surface 1b of the semiconductor chip 1 and the chip mounting surface 2b of the chip mounting substrate 2 are formed by mutually flat surfaces, so that the distance between the chip and the substrate is reduced from the outer peripheral portion 1g of the semiconductor chip 1. It is formed so as to be approximately 20 μm almost uniformly over the entire inner side.

Further, since the gaps 8 are formed around the respective conductive members 4 between the chip and the substrate, the semiconductor chip 1 is slightly moved in the direction in which its circuit forming surface (main surface 1b) is pulled. May be warped. At this time, the amount of warpage of the semiconductor chip 1 must be such that no crack is formed on the main surface 1b of the semiconductor chip 1.

Accordingly, in the gap 8 between the two conductive members 4 at which the pitch of the adjacent conductive members 4 among the plurality of conductive members 4 supporting the semiconductor chip 1 is maximized, the semiconductor chip 1 The main surface 1 when warped
The size of the gap 8 must be taken into consideration so that the warp can be kept to the extent that no crack is formed in b. The 20 μm gap 8 in the first embodiment satisfies this condition. Things.

The sealing portion 6 of the BGA 9 is formed by sealing the semiconductor chip 1 by transfer molding using a sealing resin 5, and is shown in FIGS.
As shown in (a), the vicinity of the periphery of the semiconductor chip 1 on the chip mounting board 2 and the sealing resin 5 are
And is joined along the entire circumference substantially along the four side surfaces 1d.

The sealing resin 5 is, for example, a thermosetting epoxy resin. As an example, the properties of the sealing resin 5 used in the first embodiment are shown in FIG.
It is shown in FIG.

The chip mounting substrate 2 is made of, for example, an epoxy resin containing glass or a bismaleimide triazine containing glass (BT resin containing glass), and is relatively inexpensive and has a suitable heat resistance (high heat resistance). For example, a plastic printed wiring board having heat resistance of, for example, about 300 ° C.).

Therefore, the BGA 9 according to the first embodiment
Is called P-BGA (plastic BGA).

As shown in FIG. 5, the surface of the chip mounting board 2 is coated with a solder resist 2e, and the surface wiring 2f and the internal wiring 2g are provided as shown in FIG. This is a substrate having a multilayer wiring structure. As shown in FIG. 3, the chip mounting board 2 of the first embodiment has four wiring layers including a front wiring 2f on the chip mounting surface 2b, a front wiring 2f on the back surface 2c of the substrate, and two internal wirings 2g. This is a substrate having a four-layer structure.

However, the chip mounting substrate 2 is not limited to a substrate having a four-layer structure.

Further, a through hole 2d having a vent hole function is provided at a location near the center of the chip mounting surface 2b, avoiding the land 2a.
Are formed. However, the number of through holes 2d is not limited, and a plurality of through holes 2d may be provided.

The solder balls 3 which are the external terminals of the BGA 9 are formed of low melting point solder similarly to the conductive member 4, and have a size of, for example, a diameter of 0.
It is about 75 mm.

Next, a method of manufacturing the semiconductor device (BGA) according to the first embodiment will be described.

The method for manufacturing the semiconductor device is described in FIG.
5A and 5B. In the first embodiment, a plurality of BGAs 9 shown in FIGS. 7 and 8 (here, an example of six BGAs will be described. A case in which a plurality of (six) BGAs 9 are manufactured from one base substrate 11 including the chip mounting substrate 2 will be described based on a manufacturing process shown in FIG.

First, in step S1 shown in FIG. 6, a plurality of semiconductor chips 1 on which a desired semiconductor integrated circuit is formed
Preparing a semiconductor wafer (not shown) comprising:
The semiconductor wafer is cut and separated into individual semiconductor chips 1 by performing dicing shown in step S2.

Thereafter, a semiconductor chip 1 determined to be non-defective by inspection or the like is prepared, and further, substrate terminals 2a corresponding to the pads 1a of the semiconductor chip 1 are provided.
A base substrate 11 having a plurality of chip mounting substrates 2 is prepared.

Here, as shown in FIG. 7A, the base substrate 11 is formed by integrally forming six chip mounting substrates 2 corresponding to one BGA region, Are arranged in a row in a continuous manner.

The base substrate 11 has positioning holes 11a and guide elongated holes 11b used for molding or cutting, etc. along the longitudinal direction of the base substrate 11 and on both sides thereof. 2 are provided in plurality.

That is, the base substrate 11 is a substrate having six chip mounting substrates 2.

Subsequently, while supplying the base substrate shown in step S3 and supplying the solder paste shown in step S4, the solder terminals shown in step S5 are supplied to the substrate terminals 2a of each chip mounting substrate 2 of the base substrate 11. Perform paste printing.

Here, when the solder paste printing is performed, in the first embodiment, the solder paste 10 made of the low melting point solder shown in FIG. 9A is used by using the mask member 12 (height control member). This is performed by printing and applying a predetermined height on the substrate terminals 2a of the chip mounting substrate 2.

The mask member 12 is a member for printing and applying the solder paste 10 on the substrate terminal 2a with high precision.

In the first embodiment, the resin inflow preventing gap 7 and the gap 8 are formed to be about 20 μm. As an example of a method for realizing this, when the solder paste 10 of the low melting point solder is formed on the substrate terminal 2 a by the mask member 12, the solder paste 10 is accurately formed into a column having a diameter of 40 μm and a height of 100 μm. I do.

That is, the diameter is 40 μm and the height is 100
An opening is formed in the mask member 12 so as to form a cylindrical solder paste 10 of μm.

When the solder paste 10 formed on the board terminal 2a with its height and size controlled with high precision is melted by reflow and then hardened, FIG.
As shown in (b), the resin inflow prevention gap 7 and the gap 8 can be formed to about 20 μm.

Printing (application) of the solder paste 10
By making the height as low as possible, the connection reliability between the chip and the substrate can be improved. However, the size and shape of the solder paste 10 to be printed on the substrate terminal 2a are determined by the distance between the resin inflow-inhibiting gap 7 and the gap 8, and the size and shape (in the present embodiment) In the first embodiment, a cylindrical shape having a diameter of 40 μm and a height of 100 μm) is not limited thereto.

After the solder paste 10 is printed at a predetermined height on a predetermined substrate terminal 2 a of the chip mounting substrate 2 by the printing method using the mask member 12, six semiconductor chips are formed on the base substrate 11. 1 and the chip mounting surface 2b of the corresponding chip mounting substrate 2 are opposed to each other, and the positions of the pads 1a of each semiconductor chip 1 and the corresponding substrate terminals 2a are aligned. The semiconductor chip 1 and the chip mounting board 2 are disposed between the semiconductor chip 1 and the board terminal 2a via the solder paste 10.

That is, the chip mount shown in step S6 is performed using an existing flip-chip connection chip mounter or the like.

FIG. 7B shows a state in which the base substrate 11 shown in FIG. 7B has six semiconductor chips 1 mounted on the respective BGA areas.

Thereafter, the chip-mounted base substrate 11 shown in FIG. 7B is passed through a reflow furnace (not shown) or the like, whereby the reflow shown in step S7 is performed.

That is, the solder paste 10 is melted by the reflow, thereby electrically connecting the chip and the substrate.

As a result, the pads 1a and the substrate terminals 2a were formed from the solder paste 10 in a state where the resin inflow-inhibiting gaps 7 were formed between the six semiconductor chips 1 and the corresponding chip mounting substrates 2. Electrical connection can be made by the conductive member 4, whereby each semiconductor chip 1 is flip-chip connected to each chip mounting board 2.

The reflow temperature at the time of reflow is, for example, 240 to 250 ° C.

Here, since the solder paste 10 is applied with its height and size (in this case, a column having a diameter of 40 μm and a height of 100 μm) controlled with high precision, the solder paste 10 is applied by the reflow. Once melted,
Thereafter, when cooled and cured to form the conductive member 4, as shown in FIGS. 4 and 9 (b), the distance between the semiconductor chip 1 and the chip mounting board 2, that is, the resin inflow preventing gap 7 and the gap 8 Becomes 20 μm.

After the reflow, the sealing resin 5 having the physical properties shown in FIG. 11 is used to supply the sealing resin (Step S8), and the semiconductor chip 1 is sealed with the resin (Step S9). ).

In the first embodiment, resin sealing is performed by transfer molding.

In the first embodiment, the molding conditions, the physical properties of the sealing resin 5, and the distance of the resin inflow-inhibiting gap 7 are set between the chip and the substrate during molding. This is an important factor for preventing the stopping resin 5 from entering.

Therefore, when the distance of the resin inflow prevention gap 7 is set to about 20 μm, the sealing resin 5 that cannot enter between the chip and the substrate is a resin having the physical properties shown in FIG. -Sealing resin 5 between substrates
The mold conditions for preventing the infiltration are as follows.

The molding conditions are as follows: a plunger pressure, which is a pressure at the time of extruding the sealing resin 5 in a mold (not shown), is 150 kg / cm ² , a clamping pressure (mold clamping pressure) of the mold is 50 tons, Mold temperature is 175
° C, the speed at which the sealing resin 5 flows is 1.62 mm / max.
sec, the molding time is 220 seconds.

Therefore, if the encapsulating resin 5 having the physical properties shown in FIG. 11 is used and transfer molding is performed under the above-described molding conditions, the resin inflow-inhibiting gap 7 of 20 μm is formed between the chip and the substrate Of the semiconductor chip 1 and the chip mounting board 2 because the sealing resin 5 does not enter between the chip and the board.
A gap 8 can be formed around the conductive member 4 between the conductive member 4 and the conductive member 4.

As a result, the conductive member 4 between the chip and the substrate
The semiconductor device 1 has a structure in which a gap 8 is formed around the periphery of the semiconductor chip 1. The sealing resin 5 covers the back surface 1c and the side surface 1d of each semiconductor chip 1 and seals the six semiconductor chips 1 respectively.
To form

In the resin sealing according to the first embodiment, the exposed surfaces of the semiconductor chip 1, ie, the back surface 1c and the side surface 1c, are exposed.
The sealing resin 5 is supplied to d, and the semiconductor chip 1 is completely covered with the sealing resin 5 on the chip mounting substrate 2 to form a sealing portion 6.

As a result, as shown in FIG.
A BGA main body 9a (semiconductor device main body) including six sealing portions 6 is formed on a single base substrate 11.

Thereafter, as shown in FIG. 8B, the six BGA main bodies 9a are cut from the base substrate 11 (step S10) and separated.

As a cutting method at that time, a router (drill) may be used, or cutting may be performed by die cutting or the like.

Subsequently, a plurality of BGA main bodies 9a electrically connected to the substrate terminals 2a on the surface of the chip mounting substrate 2 opposite to the chip mounting surface 2b, that is, the back surface 2c of the substrate (in the first embodiment, (119) external terminals and a solder ball 3 made of low melting point solder.

Here, first, solder ball supply (step S11) is performed, and further, solder ball transfer shown in step S12 is performed, and the respective BGA main bodies 9a
119 solder balls 3 are temporarily fixed to the chip mounting substrate 2.

Thereafter, the base substrate 11 in which the solder balls 3 are temporarily fixed to the individual chip mounting substrates 2 is passed through a not-shown reflow furnace or the like, whereby the reflow shown in step S13 is performed.

That is, the solder balls 3 are mounted on the chip mounting board 2 by reflow shown in step S13.

The reflow temperature during reflow is, for example, 240 to 250 ° C.

Here, since the conductive member 4 is formed from the solder paste 10 of the low melting point solder,
At the time of reflow at 40 to 250 ° C., as shown in FIG. 10, each conductive member 4 melts, thermally expands, and expands in the lateral direction.

At this time, in the BGA 9 of the first embodiment,
Since the gaps 8 are formed around each of the conductive members 4, the degree of freedom of the conductive members 4 increases, and as a result, the conductive members 4 can expand and contract in the gaps 8.

Thus, the solder balls 3 as external terminals made of low melting point solder are attached.

As a result, a BGA 9 as shown in FIG. 1 or FIG. 8 (c) can be manufactured.
A can be completed (step S14).

According to the semiconductor device (BGA) of Embodiment 1 and the method of manufacturing the same, the following operation and effect can be obtained.

That is, since the semiconductor chip 1 and the chip mounting board 2 are arranged so as to form the resin inflow preventing gap 7, the sealing resin between the chip and the board at the time of molding (at the time of resin sealing) is formed. 5 can be prevented.

Therefore, a gap 8 can be formed around the conductive member 4 between the chip and the substrate.

As a result, since the gap 8 is formed around the conductive member 4, the degree of freedom of the conductive member 4 can be increased.
The hindrance to cooling can be reduced.

Therefore, when the solder ball 3 (external terminal) is attached by reflow or when the BGA 9 is mounted on a mounting board such as a printed board, the conductive member 4 is subjected to thermal expansion (melting / expansion). The member 4 can spread into the gap 8 and can also shrink when cooled and hardened.

As a result, the stress generated by the thermal expansion (cooling) of the conductive member 4 can be reduced.

As a result, it is possible to prevent the occurrence of package cracks when the BGA 9 is mounted.
The reliability of A9 can be improved.

Further, it is possible to prevent the connectivity between the chip and the substrate from deteriorating.

Further, since the conductive member 4 can thermally expand and expand into the gap 8 when the BGA 9 is mounted, melting of the conductive member 4 can be permitted. As a result, the conductive member 4 has a low melting point. It becomes possible to use solder.

Accordingly, it is possible to use a printed wiring board which is relatively inexpensive and has high heat resistance, which is not high heat resistance, with respect to the chip mounting board 2, and in addition to using a low melting point solder for the conductive member 4. The cost of the BGA 9 can be reduced.

Further, a gap 8 having the same interval as the resin inflow-inhibiting gap 7 is provided around the conductive member 4 between the chip and the substrate.
Is formed, the gap 8 is approximately 20 μm.
Since it is about m, even when a large load is applied to the semiconductor chip 1 at the time of molding, it is possible to prevent occurrence of warpage such as forming a crack in the main surface 1b of the semiconductor chip 1.

Thus, the reliability of the BGA 9 can be improved.

Further, since the through holes 2d penetrating the gap portion 8 and the outside are provided in the chip mounting substrate 2, gas generated in the gap portion 8 at the time of applying a high temperature such as at the time of molding or mounting the BGA 9 can be penetrated. It can escape to the outside through the hole 2d.

Thus, the occurrence of package cracks in the BGA 9 can be further reduced.

The back surface 1c and the side surface 1d which are exposed surfaces of the semiconductor chip 1 are covered with a sealing resin
Is formed, the main surface 1b and the back surface 1c of the semiconductor chip 1 are not exposed, so that the back surface 1c of the semiconductor chip 1 is not directly touched when the BGA 9 is evaluated or mounted.

As a result, the application of external force to the semiconductor chip 1 can be reduced, so that the occurrence of chip cracks and connection failure between the chip and the substrate can be prevented.

As a result, the reliability of the BGA 9 can be improved.

Further, by sealing the semiconductor chip 1 with resin, the handling of the BGA 9 is facilitated, so that its manufacturability can be improved.

Also, the solder paste 10 of the low melting point solder is used.
Is applied onto the substrate terminals 2a of the chip mounting substrate 2 so that in the previous process (the manufacturing process of the semiconductor chip 1),
The step of forming solder bumps on the pads 1a of the semiconductor chip 1 can be omitted, thereby making it possible to perform the same pre-process as the semiconductor chip 1 that does not perform flip chip connection.

Therefore, equipment dedicated to bump formation for performing flip-chip connection of the BGA 9 according to the first embodiment is not required, and as a result, the cost of the BGA 9 can be reduced.

Further, by manufacturing the BGA 9 using the base substrate 11 having the six chip mounting substrates 2,
Six BGAs 9 can be manufactured at the same time from one base substrate 11, whereby the BGAs 9 can be manufactured efficiently. That is, the throughput in the manufacturing process of the BGA 9 can be improved.

As a result, the manufacturability of BGA 9 can be improved.

(Embodiment 2) FIG. 12 is a sectional view showing an example of the structure of a semiconductor device (BGA) according to Embodiment 2 of the present invention, and FIG. 13 is an enlarged partial sectional view showing the structure of a D portion in FIG. FIG. 14 is a bottom view showing an example of the arrangement of conductive members provided on the BGA semiconductor chip shown in FIG.

BG shown in FIG. 12 in the second embodiment
A20 (semiconductor device) is the BG described in Embodiment 1.
The semiconductor chip 1 is mounted on the chip mounting board 2 by flip-chip connection in the same manner as A9.
It has almost the same structure as that of the first embodiment.
As shown in FIG. 13, the modified portions of the BGA 9 correspond to the use of small solder balls made of low melting point solder for the conductive member 4 and the outer peripheral portion 1 g of the semiconductor chip 1 of the chip mounting board 2. That is, a resin inflow-inhibiting gap 7 for preventing the inflow of the sealing resin 5 is formed only in the location.

Accordingly, the BGA 20 flip-chip-connects the semiconductor chip 1 to the chip mounting board 2 via the small solder ball conductive member 4.

Here, the size of the small solder ball used as the conductive member 4 in the second embodiment is, for example,
The diameter is about 0.2 mm.

Thus, when the semiconductor chip 1 is flip-chip connected to the chip mounting substrate 2 by reflow or the like, the distance of the gap 8 between the chip and the substrate is 0.2 mm.
The distance is slightly shorter.

Therefore, a resin inflow-inhibiting gap 7 of 20 μm is formed only at a position corresponding to the outer peripheral portion 1g of the semiconductor chip 1 of the chip mounting substrate 2 when the semiconductor chip 1 is mounted on the chip mounting substrate 2.

That is, as shown in FIG. 13, a projecting dam portion 2h made of a solder resist 2e is provided at a position corresponding to the entire outer peripheral portion 1g of the semiconductor chip 1 of the chip mounting substrate 2, whereby a 20 μm The formation of the resin inflow prevention gap 7 is realized.

Here, the conductive member 4 of the small solder ball according to the second embodiment is used for flip chip connection.
Previously mounted on the pad 1a side of the semiconductor chip 1,
The semiconductor chip 1 on which the small solder balls are mounted is flip-chip mounted (chip mounted) on a chip mounting substrate 2 by face-down.

The distance of the gap 8 in the BGA 20 of the second embodiment is slightly shorter than 0.2 mm, which is much longer than that of the BGA 9 of the first embodiment.

Therefore, when performing resin molding by transfer molding, there is a concern that the semiconductor chip 1 may be warped and cracked by a molding load.

However, in the BGA 20 according to the second embodiment, in order to reduce the warpage of the semiconductor chip 1 during molding, as shown in FIG. 14, the conduction of a plurality of (here, about 140) small solder balls is performed. The conductive members 4 are attached to the semiconductor chip 1 in a grid-like arrangement.

When the number of the small solder balls is not sufficient when the lattice arrangement is performed, dummy lattices that are not electrically connected between the chip and the substrate are attached to arrange the lattice arrangement. .

Here, the other structure of the BGA 20 according to the second embodiment is the same as that of the BGA 9 described in the first embodiment, and a duplicate description thereof will be omitted.

The method of manufacturing the BGA 20 according to the second embodiment is almost the same as the method of manufacturing the BGA 9 according to the first embodiment. The difference from the first embodiment is that the BGA 9 according to the first embodiment is different from the first embodiment. , Solder paste 10 on chip mounting substrate 2
On the other side and flip-chip connected,
In the BGA 20 of the second embodiment, a small solder ball of the conductive member 4 made of a low melting point solder is formed on the pad 1a side of the semiconductor chip 1 by using a stud bump technology (bump bonding technology using ball bonding). After that, flip-chip connection is performed.

The other manufacturing method in the method of manufacturing the BGA 20 according to the second embodiment is the same as that of the BGA 9 described in the first embodiment, and a duplicate description thereof will be omitted.

Further, regarding the operation and effect obtained by the BGA 20 of the second embodiment and the method of manufacturing the same,
Since this is the same as under the BGA 9 described in the first embodiment, the description thereof will not be repeated.

The invention made by the inventor has been specifically described based on the embodiments of the present invention. However, the present invention is not limited to the embodiments of the invention, and does not depart from the gist of the invention. It is needless to say that various changes can be made.

For example, in the first embodiment, when performing the flip chip connection, the chip mounting substrate 2 provided with the substrate terminals 2a corresponding to the pads 1a of the semiconductor chip 1 is prepared, and furthermore, the low melting point solder is used. A case has been described in which a solder paste 10 is printed and applied to a predetermined height on a substrate terminal 2a of a chip mounting substrate 2 using a mask member 12 and then flip-chip connected.
A chip mounting substrate 2 may be prepared in which a solder paste 10 made of low-melting-point solder is applied to a predetermined height in advance on a substrate terminal 2a corresponding to the pad 1a of FIG.

This eliminates the step of printing and applying the solder paste 10 made of low-melting point solder on the board terminals 2a of the chip mounting board 2 at a predetermined height, thereby simplifying the manufacturing process of the semiconductor device. Can be.

In the first and second embodiments, the case where the conductive member 4 is formed from the solder paste 10 of low melting point solder or small solder balls has been described. It is not necessary that the entirety be formed of a low melting point solder, and at least a connection portion 4 of the conductive member 4 with the pad 1a side of the semiconductor chip 1 is provided.
connection portion 4 between a and the substrate terminal 2a side of the chip mounting substrate 2
It is only necessary that a is formed of a low melting point solder.

Further, in the first embodiment, the case where the solder paste 10 made of the low melting point solder is applied to the substrate terminal 2a side of the chip mounting substrate 2 has been described, but the solder paste 10 is applied to the pad 1a of the semiconductor chip 1 It may be applied to the side and flip-chip connected.

In the second embodiment, the case where the arrangement of the small solder balls as the conductive members 4 to be attached to the semiconductor chip 1 is a lattice arrangement has been described.
The arrangement of the solder paste 10 in the semiconductor chip 1 of the first embodiment may be a lattice arrangement,
An arrangement other than the lattice arrangement may be used.

However, in consideration of the molding load applied to the semiconductor chip 1 at the time of molding, the arrangement of the solder pastes 10 in the first embodiment is also preferably a lattice arrangement.

In the first and second embodiments, the case where a plurality of (six) semiconductor devices (BGA) are manufactured from one base substrate 11 has been described. Also in the second embodiment, the chip mounting substrate 2 previously cut and separated into one BGA is prepared, and the BGA 9 is cut using the chip mounting substrate 2.
Alternatively, the BGA 20 may be manufactured.

Further, in the first and second embodiments, the case where the resin sealing is performed by the transfer molding method when performing the resin sealing is described. However, the resin sealing is performed by the potting method or the like. You may.

Further, in the first and second embodiments, the case where a printed wiring board having relatively low heat resistance is used as the chip mounting board 2 has been described. A ceramic substrate or the like may be used.

That is, the semiconductor device according to the first embodiment and the second embodiment uses P (plastic).
However, the semiconductor device may be a C (ceramic) -BGA.

Further, in the semiconductor device, the P-PGA using pin members instead of the solder balls 3 for the external terminals is used.
(Pin Grid Array) or C-PGA.

Further, the semiconductor device is not limited to the one in which the semiconductor chip 1 of the memory is sealed with resin, but may be the one in which the semiconductor chip 1 with a microcomputer or logic function is sealed with resin.

[0150]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). By arranging the semiconductor chip and the chip mounting board so as to form the resin inflow prevention gap, a gap can be formed around the conductive member between the chip and the board. This allows the conductive member to spread to the gap when the conductive member attempts to thermally expand when the external terminal is attached by reflow or when the semiconductor device is mounted on the mounting board. Therefore, the stress generated by the thermal expansion of the conductive member can be reduced, and as a result, the occurrence of a package crack at the time of mounting the semiconductor device can be prevented. Thereby, the reliability of the semiconductor device can be improved.

(2). Since generation of a package crack of the semiconductor device can be prevented, deterioration of the connectivity between the chip and the substrate can also be prevented.

(3). When the semiconductor device is mounted, the conductive member can thermally expand and spread to the gap, so that the melting of the conductive member can be permitted, and as a result, a low melting point solder can be used for the conductive member. . Therefore, it is possible to use a relatively inexpensive printed wiring board for the chip mounting board, and it is possible to reduce the cost of the semiconductor device in addition to using a low melting point solder for the conductive member.

(4). Since a narrow gap is formed around the conductive member between the chip and the substrate around the conductive member, even when a large load is applied to the semiconductor chip at the time of molding, the main surface of the semiconductor chip can be formed. This can prevent the occurrence of a warp such as forming a crack in the substrate. Thereby, the reliability of the semiconductor device can be improved.

(5). Since the chip mounting substrate is provided with a through-hole penetrating the gap and the outside, gas generated in the gap when a high temperature is applied, such as during molding or mounting of a semiconductor device, can escape to the outside through the through-hole. it can. Thereby, the occurrence of package cracks in the semiconductor device can be further reduced.

(6). Since the back surface of the semiconductor chip is not exposed by forming the sealing portion by covering the exposed surface of the semiconductor chip with the sealing resin, the back surface of the semiconductor chip should be directly touched when evaluating the characteristics of the semiconductor device or mounting. Disappears. As a result, the application of external force to the semiconductor chip can be reduced, so that chip cracks and chip-
The occurrence of connection failure between the substrates can be prevented. As a result, the reliability of the semiconductor device can be improved.

(7). By sealing the semiconductor chip with resin, the handling of the semiconductor device is facilitated, so that the manufacturability can be improved.

(8). By applying the solder paste of the low melting point solder on the board terminals of the chip mounting board, the step of forming solder bumps on the surface electrodes of the semiconductor chip in the previous step (semiconductor chip manufacturing step) can be eliminated. This eliminates the need for equipment dedicated to bump formation for flip-chip connection of the semiconductor device of the present invention,
As a result, the cost of the semiconductor device can be reduced.

(9). By manufacturing a semiconductor device using a base substrate having a plurality of chip mounting substrates,
A large number of semiconductor devices can be manufactured from a single base substrate, whereby a semiconductor device can be efficiently manufactured. As a result, manufacturability of the semiconductor device can be improved.

[Brief description of the drawings]

FIG. 1 shows a semiconductor device (B) according to a first embodiment of the present invention.
FIG. 2 is a perspective view showing an example of the structure of (GA), partially broken away.

FIGS. 2A, 2B and 2C are diagrams showing an example of the structure of the BGA shown in FIG. 1, wherein FIG. 2A is a plan view, FIG. 2B is a side view, and FIG. FIG.

FIG. 3 is a sectional view taken along the line AA in FIG.

FIG. 4 is an enlarged partial sectional view showing a structure of a portion C in FIG. 3;

FIG. 5 is a sectional view taken along the line BB in FIG.

FIG. 6 shows a semiconductor device (B) according to the first embodiment of the present invention.
It is a manufacturing process figure showing an example of the manufacturing method of GA).

FIGS. 7A and 7B are plan views showing an example of a state of a base substrate in each manufacturing process of the BGA shown in FIG. 1;

FIGS. 8A, 8B, and 8C are a plan view and a side view of the BGA showing an example of a state of a base substrate in each manufacturing process of the BGA shown in FIG.

9 (a) and 9 (b) are enlarged partial cross-sectional views showing an example of a solder paste applied state in the method of manufacturing the BGA shown in FIG. 1, wherein (a) is before reflow and (b) is after reflow; It is.

10 is an enlarged partial cross-sectional view showing an example of a molten state of the conductive member during BGA mounting reflow in the BGA manufacturing method shown in FIG. 1;

FIG. 11 is a physical property data diagram showing an example of physical properties of a sealing resin used for the BGA shown in FIG.

FIG. 12 is a cross-sectional view illustrating an example of a structure of a semiconductor device (BGA) according to Embodiment 2 of the present invention.

FIG. 13 is an enlarged partial cross-sectional view showing a structure of a portion D in FIG.

14 is a bottom view showing an example of an arrangement of conductive members provided on the BGA semiconductor chip shown in FIG.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor chip 1a pad (surface electrode) 1b main surface 1c back surface (exposed surface) 1d side surface (exposed surface) 1e barrier metal layer 1f protective film 1g outer peripheral portion 2 chip mounting substrate 2a land (substrate terminal) 2b chip mounting surface 2c substrate rear surface 2d through-hole 2e solder resist 2f surface wiring 2g internal wiring 2h dam part 3 solder ball (external terminal) 4 conductive member 4a connection part 5 sealing resin 6 sealing part 7 resin inflow prevention gap part 8 gap part 9 BGA ( 9a BGA main body (semiconductor device main body) 10 solder paste 11 base substrate 11a positioning hole 11b guide long hole 12 mask member (height control member) 20 BGA (semiconductor device)

Continued on the front page (72) Inventor Takaki Saito 145 Nakajima, Nanae-cho, Kameda-gun, Hokkaido Hitachi North Sea Semiconductor Co., Ltd.

Claims (9)

[Claims] 1. A semiconductor device having flip-chip connection, comprising: a chip mounting substrate for supporting a semiconductor chip by flip-chip connection; and electrically connecting a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate. A conductive member formed by connecting and connecting the surface electrode and the substrate terminal with a low melting point solder; a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin; A plurality of external terminals provided on a surface of the chip mounting substrate opposite to the chip mounting surface and electrically connected to the substrate terminals, wherein the semiconductor chip and the chip mounting substrate are used for the sealing; A resin inflow prevention gap for preventing the inflow of resin is formed and arranged, and around the conductive member between the semiconductor chip and the chip mounting board. Wherein a the gap portion is formed. 2. A semiconductor device having flip-chip connection, comprising: a chip mounting substrate for supporting a semiconductor chip by flip-chip connection; and electrically connecting a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate. A conductive member that is connected and formed of low-melting-point solder, a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin, and a surface of the chip mounting substrate opposite to the chip mounting surface. And a plurality of external terminals electrically connected to the board terminal, wherein the semiconductor chip and the chip mounting board are provided with a resin inflow blocking gap for preventing the inflow of the sealing resin. A semiconductor device, wherein a gap is formed around the conductive member between the semiconductor chip and the chip mounting substrate. Apparatus. 3. A semiconductor device having a flip-chip connection, comprising: a chip mounting substrate for supporting a semiconductor chip by flip-chip connection; and electrically connecting a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate. A conductive member that is connected and formed of low-melting-point solder, a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin, and a surface of the chip mounting substrate opposite to the chip mounting surface. And a plurality of external terminals electrically connected to the board terminal, wherein the semiconductor chip and the chip mounting board are provided with a resin inflow blocking gap for preventing the inflow of the sealing resin. Formed and arranged, and a gap having the same interval as the resin inflow prevention gap is provided around the conductive member between the semiconductor chip and the chip mounting board. Wherein a being made. 4. A semiconductor device having a flip-chip connection, comprising: a chip mounting substrate that supports a semiconductor chip by flip-chip connection; and electrically connecting a surface electrode of the semiconductor chip and a substrate terminal of the chip mounting substrate. A conductive member that is connected and formed of low-melting-point solder, a sealing portion formed by covering an exposed surface of the semiconductor chip with a sealing resin, and a surface of the chip mounting substrate opposite to the chip mounting surface. And a plurality of external terminals electrically connected to the board terminal, wherein the semiconductor chip and the chip mounting board are provided with a resin inflow blocking gap for preventing the inflow of the sealing resin. Formed and arranged, and a gap having the same interval as the resin inflow prevention gap is provided around the conductive member between the semiconductor chip and the chip mounting board. Made is, and the semiconductor device, wherein a through hole passing through and outside the gap in the chip mounting board is provided. 5. The semiconductor device according to claim 5, wherein a main surface of the semiconductor chip and a chip mounting surface of the chip mounting substrate are opposed to each other, and a position of a surface electrode of the semiconductor chip and a corresponding substrate terminal of the chip mounting substrate are aligned. Arranging the semiconductor chip and the chip mounting substrate via a conductive member between an electrode and the substrate terminal; and melting the conductive member to form a gap between the semiconductor chip and the chip mounting substrate. Electrically connecting the surface electrode and the substrate terminal with the conductive member in a state in which a resin inflow prevention gap is formed in the resin inflow prevention gap portion, thereby flip-chip connecting the semiconductor chip to the chip mounting substrate; Forming a gap around the conductive member between the semiconductor chip and the chip mounting board by blocking the inflow of the sealing resin by the blocking gap; A step of covering the exposed surface of the semiconductor chip with a sealing resin to seal the semiconductor chip; and forming a plurality of external devices electrically connected to the substrate terminals on a surface of the chip mounting substrate opposite to the chip mounting surface. Providing a terminal. 6. A step of preparing a chip mounting substrate provided with substrate terminals corresponding to surface electrodes of a semiconductor chip, and a step of applying a solder paste made of a low melting point solder on the substrate terminals of the chip mounting substrate. A main surface of the semiconductor chip and a chip mounting surface of the chip mounting substrate are opposed to each other, and the positions of the surface electrodes and the corresponding substrate terminals are aligned, and between the surface electrodes and the substrate terminals. A step of disposing the semiconductor chip and the chip mounting board via the solder paste; and a state in which the solder paste is melted to form a resin inflow prevention gap between the semiconductor chip and the chip mounting board. And electrically connecting the surface electrode and the substrate terminal with a conductive member formed from the solder paste to connect the semiconductor chip to the chip. A step of flip-chip connecting to a mounting substrate, and preventing the inflow of the sealing resin by the resin inflow-inhibiting gap to form a gap around the conductive member between the semiconductor chip and the chip mounting substrate. A step of covering the exposed surface of the semiconductor chip with the sealing resin to seal the semiconductor chip while forming, and electrically connecting the substrate terminals to a surface of the chip mounting substrate opposite to the chip mounting surface. Providing a plurality of external terminals connected to the semiconductor device. 7. A step of preparing a chip mounting substrate provided with substrate terminals corresponding to surface electrodes of a semiconductor chip, and using a height control member to apply a solder paste made of low melting point solder to the substrate of the chip mounting substrate. Applying a predetermined height on the terminal, the main surface of the semiconductor chip and the chip mounting surface of the chip mounting substrate are opposed to each other, and the positions of the surface electrodes and the corresponding substrate terminals are aligned, Arranging the semiconductor chip and the chip mounting substrate via the solder paste between the surface electrode and the substrate terminal; and melting the solder paste to form the semiconductor chip and the chip mounting substrate. The surface electrode and the substrate terminal are electrically connected by a conductive member formed from the solder paste in a state where a resin inflow prevention gap is formed therebetween. Flip-chip connecting the semiconductor chip to the chip mounting board by using the resin inflow blocking gap to prevent the inflow of the sealing resin so that the conductive property is maintained between the semiconductor chip and the chip mounting board. A step of sealing the semiconductor chip by covering the exposed surface of the semiconductor chip with the sealing resin while forming a gap around the member; and forming a gap on the surface of the chip mounting substrate opposite to the chip mounting surface. Providing a plurality of external terminals electrically connected to the substrate terminals. 8. A step of preparing a chip mounting substrate in which a solder paste of a low melting point solder is applied to a predetermined height on a substrate terminal corresponding to a surface electrode of the semiconductor chip in advance, and a main surface of the semiconductor chip and the chip The chip mounting surface of the mounting substrate is opposed, and the positions of the surface electrodes and the corresponding substrate terminals are aligned, and the semiconductor chip is interposed between the surface electrodes and the substrate terminals via the solder paste. Disposing the chip mounting board, melting the solder paste, and forming the resin flow-inhibiting gap between the semiconductor chip and the chip mounting board to form the surface electrode and the substrate terminal. Flip-chip connecting the semiconductor chip to the chip mounting board by electrically connecting with a conductive member formed from the solder paste; The sealing resin prevents the inflow of the sealing resin and forms a gap around the conductive member between the semiconductor chip and the chip mounting board. Sealing the semiconductor chip by covering the exposed surface of the semiconductor chip; and providing a plurality of external terminals electrically connected to the substrate terminals on a surface of the chip mounting substrate opposite to the chip mounting surface. And a method for manufacturing a semiconductor device. 9. A step of preparing a base substrate having a plurality of chip mounting substrates provided with substrate terminals corresponding to surface electrodes of a semiconductor chip; and a step of preparing a main surface of each of the plurality of semiconductor chips and each of the base substrates. The chip mounting surface of the chip mounting substrate is opposed, and the positions of the surface electrode and the substrate terminal are aligned, and each of the semiconductor chips is interposed between the surface electrode and the substrate terminal via a conductive member. Disposing the chip mounting substrate; and melting the conductive member to form a resin inflow prevention gap between each of the semiconductor chips and the chip mounting substrate. A step of electrically connecting terminals with the conductive member to flip-chip connect each of the semiconductor chips to each of the chip mounting substrates; and While forming a gap around the conductive member between each of the semiconductor chips and the chip mounting substrate by preventing the inflow of the sealing resin,
A step of covering each exposed surface of each semiconductor chip with the sealing resin and sealing each semiconductor chip to form a plurality of semiconductor device body portions; and separating each of the semiconductor device body portions from the base substrate And providing a plurality of external terminals electrically connected to the substrate terminals on surfaces of the semiconductor device main body opposite to the chip mounting surface of the chip mounting substrate. Semiconductor device manufacturing method.