JPH11211788A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of extremely easily and accurately measuring an IDDQ current. SOLUTION: Based on a signal impressed to an IDDQ terminal 21, the IDDQ current is measured in the state of cutting a current flowing through a pull-up resistor 16 or pull-down resistor at the time of ordinary operation only under the conduction control of a transistor 25. That is when measuring the IDDQ current, the signal of '1' is impressed to the IDDQ terminal 21. Thus, the transistor 25 is turned off, the pull-up dressier 16 and an input terminal 5 are disconnected and even when an input pin 5 is short-circuited to the ground, current dues not flow to the pull-up resistor 16 so that the current of a disturbance noise can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device having a pull-up resistor or a pull-down resistor.
The present invention relates to a semiconductor device with improved simplification of a DQ current test.

[0002]

2. Description of the Related Art Semi-custom LS composed of CMOS
As an effective test method for I, there is a test method called IDDQ, which has recently attracted attention. However, in this IDDQ test, if the input pin has a pull-up resistor or the output pin or bidirectional I / O pin has a pull-up or pull-down resistor, the pull-up or pull-down resistor is used. Current flows as disturbance noise, and I
This hindered accurate measurement of DDQ current. The IDDQ test method and its problems will be described below with reference to a specific conventional example.

FIG. 7 shows the logic of a CMOS gate array, a standard cell, and an embedded array in which an input / output circuit is constituted by an input buffer without a pull-up resistor and an output buffer without a pull-up or pull-down resistor. FIG. 3 is a diagram illustrating a measurement state of an IDDQ current of an LSI. The input buffer is composed of the input protection resistor 8 and P
Channel MOS transistor 9 and N-channel M
It is composed of an OS transistor 10. Output buffer is P
It comprises a channel MOS transistor 11 and an N-channel MOS transistor 12.

[0004] FIG. 8 shows a CMOS gate array, a standard cell, and an input / output circuit composed of a normal input buffer without a pull-up resistor and a bidirectional input / output buffer without a pull-up or pull-down resistor. IDDQ of embedded LSI logic LSI
It is a figure showing the measuring state of current. The input buffer includes an input protection resistor 8, a P-channel MOS transistor 9, and an N-channel MOS transistor 10.
The bidirectional input / output buffer forms an output buffer section with a P-channel MOS transistor 11 and an N-channel MOS transistor 12, and has an input protection resistor 13, a P-channel MOS transistor 14, and an N-channel MOS transistor.
The input buffer section is constituted by the transistor 15 to constitute a bidirectional input / output buffer as a whole.

In the logic circuit portion of these LSIs shown in FIG. 7 or FIG. 8 constituted by CMOS, an arbitrary signal level ("0" or "1") is set to each input pin 5 of the circuit. When the movement of each signal is stopped, the logic LSI stops its movement and has a feature that almost no current consumption flows. However, if the internal circuit 7 has a defective portion such as a short circuit due to transistor destruction, a short circuit between wirings, a disconnection, etc., current consumption from the high power supply 1 to the ground via the high power supply pin 3, the internal circuit 7, and the low power supply pin 4. Flows over the standard value,
The consumed current is measured by the ammeter 2 as an IDDQ current, and although it is difficult to identify an abnormal part, it is possible to determine that the LSI is defective anyway. However,
It is not possible to check all the transistors that make up the logic LSI in a single measurement, and it is necessary to change the combination of signal levels at each input pin, change the timing of input signals, etc., and check the internal state of the logic LSI. And the number of transistors to be checked is increased by repeating the measurement many times. Estimation of how many transistors will be checked and determination of what combination of input signals is effective as a check can be done by simulating the combination of circuit design information and test signal information with a computer. it can.

However, if a pull-up resistor or a pull-down resistor is added to the input buffer or the bidirectional input / output buffer of these logic LSIs, they flow out of the logic LSI through those resistors or flow to their own output buffers. As a result, even if the circuit is stopped, a path for flowing the consumed current is created. Actually, logic LSI
Since the value of the IDDQ current changes depending on the circuit size of the above, it cannot be said unconditionally. However, even if the current flowing through the pull-up resistor or the pull-down resistor flows per buffer,
It is about 10 times larger than the IDDQ current. This current disturbs the measurement as a disturbance current in measuring the IDDQ current. Also,
For semi-custom LSIs, such as gate arrays, standard cells, and embedded arrays, for which customers create circuit design specifications, pull-up or pull-down resistors must be added according to the customer's specifications. There is no freedom.

In a product incorporated in a system having a circuit configuration for adding resistors, resistors are generally attached to a plurality of buffers of 10 pins or more. Therefore, a disturbance noise current often flows through a plurality of buffers of 10 pins or more, and the disturbance noise current is a current that is two orders of magnitude larger than the IDDQ current to be measured. For this reason, the current range at the time of measurement is increased by about two orders of magnitude, so that even if the measurement is performed using a measuring instrument having the same measurement accuracy, the measurement accuracy is reduced to 1/100.

At present, IDDQ current measurement of an LSI having these pull-up resistors or pull-down resistors includes:
The following two methods are performed.

1) Search for an input signal condition under which no disturbance noise current flows.

2) The consumption current including the disturbance noise current is measured, and then the disturbance noise current is individually measured and subtracted to obtain the value of the IDDQ current.

Here, the method 1) greatly reduces the environment for measuring the IDDQ, and the magnitude of the effect also depends on the circuit design technology included in the specification of the customer. This shows that although IDDQ testing can theoretically improve the reliability of the test and maintain the quality of the shipped product at a constant level, it will accept IDDQ testing within a range that can be easily performed using test methods. And
Since it is not a complete solution, the description is omitted below.

Next, in the above method 2), a countermeasure will be individually described for each case where a pull-up resistor or a pull-down resistor causes disturbance current.

FIG. 9 shows a pull-up resistor 16 connected to the input buffer.
It is a figure which shows the structure attached. In this case, the input voltage of "1" is applied to the input pin 5 (that is, the same voltage as the power supply voltage).
Is applied, but when an input of "0" (that is, 0 volt) is applied, a current flowing from the input protection resistor 8 and the input pin 5 to the ground via the pull-up resistor 16 causes a disturbance noise current Inoise. Occurs as

Therefore, as a measuring method, after measuring the current Ipd including the disturbance noise current (Inoise) as shown in FIG. 9, the current flows through the pull-up resistor 16 in the same state as shown in FIG. The current Inoise is measured, and this current difference (Ipd-Inoise) is obtained as an IDDQ current.

FIG. 11 shows a case in which a pull-up resistor 17 is added to the bidirectional input / output buffer. This bidirectional input / output buffer is in the input mode (that is, the transistors 11 and 12 are turned off. FIG. 4 is a diagram showing a case where an input of “0” is applied to the input / output pin 6. Also in this case, a current flowing from the bidirectional input / output pin 6 to the ground via the pull-up resistor 17 is generated as a disturbance noise current Inoise. For this reason, as a measurement method, as shown in FIG. 11, the current including the disturbance noise current Inoise is used.
After measuring Ipd, a current Inoise flowing through the pull-up resistor 17 shown in FIG. 12 is measured in the same state, and this current difference (Ipd-Inoise) is obtained as an IDDQ current.

FIG. 13 shows a case where a pull-up resistor 17 is added to the bidirectional input / output buffer. This bidirectional input / output buffer is in the output mode, and the output state is "0".
FIG. 11 is a diagram showing a case where the transistor 11 is off and the transistor 12 is on. Also in this case, a disturbance noise current Inoise flowing from the transistor 12 to the ground via the pull-up resistor 17 is generated. Therefore, as shown in FIG. 13, the current flowing through the pull-up resistor 17 is measured as shown in FIG. 12 after measuring the current Ipd including the disturbance noise current Inoise as shown in FIG.
Inoise is measured, and this current difference (Ipd-Inoise) is calculated by IDD
Obtained as Q current.

FIG. 14 shows a case in which a pull-down resistor 18 is attached to the bidirectional input / output buffer. The bidirectional input / output buffer is in the output mode, and the output state is "1".
FIG. 11 is a diagram showing a case where the transistor 11 is on and the transistor 12 is off. In this case, a disturbance noise current Inoise flowing from the pull-down resistor 18 to the ground via the transistor 11 is generated. Therefore, as a measuring method, as shown in FIG. 14, after measuring the current Ipd including the disturbance noise current Inoise, the current Inoise flowing through the pull-down resistor 18 is measured as shown in FIG. 15, and this current difference (Ipd -Inoise) as the IDDQ current. In FIG. 15, since the current flowing through the pull-down resistor 18 is externally measured, it is necessary to set the input conditions so that both the transistor 11 and the transistor 12 are turned off.

In any case, it is necessary to check the state of the input or the state of the output in advance, and to perform a measuring method according to the state. Also, on an actual circuit, the above circuits are combined to form a circuit, so the current flowing through the pull-up resistor or pull-down resistor attached to each input buffer or bidirectional input / output buffer is measured, It is necessary to calculate the IDDQ current by subtracting all disturbance noise currents.

In the measurement method, it is necessary to always pay attention to the state of each input buffer or bidirectional input / output buffer provided with a pull-up resistor or a pull-down resistor.

[0020]

As described above,
In the measurement of the IDDQ current in a conventional semiconductor device having a pull-up resistor or a pull-down resistor, the IDDQ current including a disturbance noise current flowing through the pull-up resistor or the pull-down resistor is measured, and then the pull-up resistor or the pull-down resistor is measured. Was measured, and the IDDQ current was obtained by subtracting the latter from the former. For this reason, much trouble and time are required, and it is difficult to measure the IDDQ current accurately.

Accordingly, the present invention has been made in view of the above, and an object of the present invention is to provide a semiconductor device capable of extremely easily and accurately measuring an IDDQ current.

[0022]

In order to achieve the above object, the present invention is directed to an input buffer having a pull-up resistor, a bidirectional input / output buffer having a pull-up resistor, or a pull-down buffer. In a semiconductor device having a bidirectional input / output buffer provided with a resistor, a current flowing through the pull-up resistor or the pull-down resistor is inserted into a path of a current flowing through the pull-up resistor or the pull-down resistor during normal operation, and a current flowing through the pull-up resistor or the pull-down resistor during IDDQ current measurement. A transistor that is turned off, and controls the transistor to be conductive without receiving a control signal during normal operation;
It has a control circuit for controlling the transistor to a non-conductive state based on a control signal at the time of current measurement, so that the IDDQ current can be measured very easily and accurately.

According to a second aspect of the present invention, there is provided a semiconductor device having an input buffer having a pull-up resistor, a bidirectional input / output buffer having a pull-up resistor, or a bidirectional input / output buffer having a pull-down resistor. At
The transistor functions as the pull-up resistor or the pull-down resistor by the ON resistance during normal operation, and is controlled to be non-conductive during IDDQ current measurement, and is controlled to be conductive without receiving a control signal during normal operation. And a control circuit for controlling the transistor to be in a non-conductive state based on a control signal at the time of measuring the IDDQ current. It is characterized by performing accurate measurement.

According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the control circuit is connected to a gate terminal of the transistor, and an IDDQ terminal to which a control signal for controlling conduction of the transistor is applied. And a pull-down resistor connected between the IDDQ terminal and the lower power supply.

The invention according to claim 4 is the invention according to claims 1 and 2.
Or the semiconductor device described in 3 is registered as a cell library of a gate array, a standard cell or an embedded array made of CMOS, and a circuit required by a customer is stored in a CA.
When designing a product at D, these IDDQ current test facilitation circuits are automatically incorporated into the product.

[0026]

Embodiments of the present invention will be described below with reference to the drawings.

According to the present invention, when the IDDQ current is measured, the above-described disturbance is applied by modifying the circuit design of a gate array, a standard cell, and an embedded array composed of CMOS, for which the effect of the IDDQ test is greatly expected. This prevents noise current from flowing. Hereinafter, each of the input buffer and the bidirectional input / output buffer to which the pull-up resistor or the pull-down resistor is attached will be described. 1 to 6, those having the same reference numerals as those shown in FIGS. 7 to 15 have the same functions, and a description thereof will be omitted.

FIG. 1 shows a pull-up resistor 16 connected to the input buffer.
It is a figure which shows the embodiment in the case where was attached. A terminal for controlling the on / off of the current of the pull-up resistor or the pull-down resistor (herein referred to as IDDQ terminal 21) is provided.
And is fixed to “0” by a pull-down resistor 23 connected to the IDDQ terminal 21 via the. After this signal passes through the input buffer, the pull-up resistor 1
P-channel MO provided between the input protection resistor 8 and the input protection resistor 8
Connected to the gate terminal of S transistor 25. The control circuit itself including the IDDQ terminal 21, the input buffer 24 provided with the pull-down resistor 23, and the inverter 27 described below, is capable of receiving any noise of “0” or “1” to the IDDQ terminal 21. No noise current is generated due to the input buffer 24 using the pull-down resistor 23, and the measurement of the IDDQ current is not adversely affected.

When this LSI is normally used, IDD
Since the Q terminal 21 is open and nothing is connected, the IDD
The Q terminal 21 becomes “0”, the transistor 25 is turned on, and the pull-up resistor 16 is connected to the input pin 5 via the input protection resistor 8.

When measuring the IDDQ current, the ID
A signal of “1” is applied to the DQ terminal 21. As a result, the transistor 25 is turned off, the pull-up resistor 16 is disconnected from the input terminal 5, and no current flows through the pull-up resistor 16 even if the input pin 5 is short-circuited to the ground. Thus, the current of the disturbance noise disappears and the circuit state becomes the same as that of FIG. 7, so that the IDDQ current can be easily measured.

FIG. 2 is a diagram showing an embodiment in which a pull-up resistor 17 is added to a bidirectional input / output buffer. The control circuit portion of the IDDQ terminal 21 is the same as in FIG. After this signal passes through the input buffer 24, the P-channel MO provided between the pull-up resistor 17 attached to the bidirectional input / output buffer and the bidirectional input / output pin 6
It is connected to the gate terminal of the S transistor 26.

When this LSI is normally used, IDD
Since the Q terminal 21 is open and nothing is connected, the IDD
The Q terminal 21 becomes "0", the transistor 26 is turned on, and the pull-up resistor 17 is connected to the bidirectional input / output pin 6.

When measuring the IDDQ current, the ID
A signal of “1” is applied to the DQ terminal 21. As a result, the transistor 26 is turned off, and the pull-up resistor 17 is turned off.
And the input / output terminal 6 is disconnected, so that no current flows through the pull-up resistor 17 even if the terminal 6 of the bidirectional input / output pin is short-circuited to the ground or the transistor 12 is turned on. Thus, the current of disturbance noise disappears,
Since the circuit state is the same as that of FIG. 8, only the IDDQ current can be easily measured.

FIG. 3 is a diagram showing a case where a pull-down resistor 18 is attached to a bidirectional input / output buffer. IDDQ
After passing through the input buffer 24 from the terminal 21, the inverted signal is passed through the inverter 27 to the N-channel provided between the pull-down resistor 18 attached to the bidirectional input / output buffer and the input / output pin 6. It is connected to the gate terminal of the MOS transistor 28. When this LSI is normally used, since the IDDQ terminal 21 is open and nothing is connected, the IDDQ terminal 21 becomes “0”, the transistor 28 is turned on, and the pull-down resistor 18 is connected to the bidirectional input / output pin 6. It will be in the connected state.

When measuring the IDDQ current, the ID
A signal of “1” is applied to the DQ terminal 21. As a result, the transistor 28 is turned off, and the pull-down resistor 18 is turned off.
And the bidirectional input / output terminal 6 is disconnected, so that no current flows through the pull-down resistor 18 even when the transistor 11 is turned on. Thus, the current of the disturbance noise disappears and the circuit state becomes the same as that of FIG. 8, so that only the IDDQ current can be easily measured.

In a logic LSI of a general CMOS gate array, standard cell, and embedded array, a pull-up resistor uses a P-channel MOS transistor, and a pull-down resistor uses an N-channel MOS transistor. A voltage that turns on each transistor is often applied to the gate terminal. An embodiment in which the present invention is applied to a gate array, a standard cell, and an embedded array composed of a CMOS having such a pull-up resistor or a pull-down resistor will be described below. Hereinafter, embodiments of an input buffer and a bidirectional input / output buffer to which a pull-up resistor and a pull-down resistor are attached will be described.

FIG. 4 is a diagram showing an embodiment in which a pull-up resistor is attached to the input buffer. An IDDQ terminal 21 for controlling on / off of a current of a pull-up resistor or a pull-down resistor is provided.
3 is fixed to “0”. This signal passes through the input buffer 24 and is then connected to the gate terminal of a P-channel MOS transistor 29 used as a pull-up resistor of the input buffer.

The control circuit itself consisting of the IDDQ terminal 21, the input buffer 24 provided with the pull-down resistor 23, and the inverter 27 described later is connected to the IDDQ terminal 2
No matter whether a signal of “0” or “1” is applied to 1, no noise current is generated due to the input buffer 24 using the pull-down resistor 23 as described above. This LSI
Is normally used, the IDDQ terminal 21 is opened and nothing is connected, so that the IDDQ terminal 21 becomes "0" and the transistor 29 is turned on to act as a pull-up resistor. It is in a state of being connected to the input pin 5 via the

When measuring the IDDQ current, the ID
A signal of "1" is applied to the DQ terminal 21. As a result, the transistor 29 is turned off and stops functioning as a pull-up resistor, so that the transistor 29 is in the same state as when no pull-up resistor is connected. Therefore, even if the terminal 5 of the input pin is short-circuited to the ground, the current of the disturbance noise disappears and the circuit state becomes the same as that of FIG. 7, and only the IDDQ current can be easily measured.

FIG. 5 is a diagram showing an embodiment in which a pull-up resistor is added to the bidirectional input / output buffer. I
The control circuit portion of the DDQ terminal 21 is the same as that of FIG. After passing through the input buffer 24, this signal is connected to the gate terminal of the P-channel MOS transistor 30 used as a pull-up resistor attached to the bidirectional input / output buffer.

When this LSI is normally used, IDDQ
Since terminal 21 is open and nothing is connected, IDDQ
When the terminal 21 becomes "0", the transistor 30 is turned on and functions as a pull-up resistor, and the pull-up resistor is connected to the bidirectional input / output pin 6.

When measuring the IDDQ current, the ID
A signal of “1” is applied to the DQ terminal 21. As a result, the transistor 30 is turned off, and the function as the pull-up resistor stops, so that the pull-up resistor is in the same state as not connected to the bidirectional input / output pin 6. Therefore, even if the terminal 6 of the bidirectional input / output pin is short-circuited to the ground or the transistor 12 is turned on, the current of disturbance noise disappears, and the circuit state becomes the same as that of FIG. 8, and only the IDDQ current is easily measured. Will be able to do it.

FIG. 6 is a diagram showing a case where a pull-down resistor is added to the bidirectional input / output buffer. After passing through the input buffer 24 from the IDDQ terminal 21, the inverter 2
The signal whose signal is inverted through 7 is connected to the gate terminal of an N-channel MOS transistor 31 used as a pull-down resistor attached to the bidirectional input / output buffer.

When this LSI is normally used, IDD
Since the Q terminal 21 is open and nothing is connected, the IDD
The Q terminal 21 becomes “0”, the transistor 31 is turned on and functions as a pull-up resistor, and the pull-up resistor is connected to the bidirectional input / output pin 6.

When measuring the IDDQ current, the ID
A signal of “1” is applied to the DQ terminal 21. As a result, the transistor 31 is turned off, and the function as the pull-up resistor is stopped, so that the pull-up resistor is in the same state as not connected to the bidirectional input / output buffer. Therefore, even if the transistor 11 is turned on, the current of the disturbance noise disappears and the circuit state becomes the same as that of FIG.
Only the Q current can be easily measured.

In the above-described embodiment, during normal operation, the current flowing through the pull-up resistor or the pull-down resistor is cut off only by controlling the conduction of the transistor.
Since the DQ current is measured, the IDDQ current can be measured very easily and accurately. In addition, a control circuit is provided for controlling the conduction of a transistor that cuts off a current flowing through a pull-up resistor or a pull-down resistor during IDDQ current measurement, and the control circuit ensures that the transistor is in a conducting state without applying an external signal during normal operation. And the IDDQ terminal 21 to which a signal for controlling the conduction of the transistor is applied is provided inside the device, so that the wiring processing on the printed circuit board for controlling the conduction of the transistor is not required, and the chip state is reduced. If the IDDQ current is measured, it is not necessary to newly provide a control pin for controlling the conduction of the transistor during actual use of a packaged chip, and it is possible to avoid an increase in the number of pins.

Further, the input buffer provided with the pull-up resistor and the bidirectional input / output buffer provided with the pull-up resistor or the pull-down resistor according to the above-described embodiment, and the conduction of the current of the pull-up resistor or the pull-down resistor or By registering a control circuit for controlling non-conduction as a cell library of a gate array, a standard cell, and an embedded array composed of CMOS, the circuit can be incorporated into a circuit design as a specification required by a customer.

By doing so, the circuit required by the customer can be changed to C
When designing products with AD, these IDDQ test facilitation circuits can be automatically incorporated into products. If necessary, the IDDQ terminal 21 may not be connected to an external pin of the package.
There is no need to worry about securing package pins for easy Q test. However, in this case, the effect of the present invention is limited to only the test in the wafer state (die sort test), and the effect in the pre-shipment test after the completion of assembly and the acceptance test in the customer is not applied.

[0049]

As described above, according to the present invention, during normal operation, the IDDQ current is measured while the current flowing through the pull-up resistor or the pull-down resistor is cut off only by controlling the conduction of the transistor. I
The DDQ current can be measured very easily and accurately.

In addition, a control circuit is provided to control the conduction of the transistor that cuts off the current flowing through the pull-up resistor or the pull-down resistor when measuring the IDDQ current.
During normal operation, the transistor that cuts off the current can be reliably controlled to be conductive without applying a signal from outside.

Further, since a terminal to which a signal for controlling the conduction of the transistor is applied is provided, wiring processing on the printed circuit board for controlling the conduction of the transistor is not required, and the IDDQ current in the chip state is not required. If the measurement is performed, it is not necessary to newly provide a control pin for controlling the conduction of the transistor at the time of actual use in which the chip is packaged, and it is possible to avoid an increase in the number of pins.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 5 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 6 is a diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.

FIG. 7 is a diagram showing a configuration of a conventional semiconductor device for measuring an IDDQ current.

FIG. 8 is a diagram showing a configuration of another conventional semiconductor device for measuring an IDDQ current.

FIG. 9 is a diagram showing a configuration of a conventional semiconductor device provided with a pull-up resistor for measuring an IDDQ current.

FIG. 10 is a diagram showing a configuration of a conventional semiconductor device provided with a pull-up resistor for measuring a noise current.

FIG. 11 is a diagram showing a configuration of another conventional semiconductor device provided with a pull-up resistor for measuring an IDDQ current.

FIG. 12 is a diagram showing a configuration of another conventional semiconductor device provided with a pull-up resistor for measuring a noise current.

FIG. 13 is a diagram showing a configuration of another conventional semiconductor device provided with a pull-up resistor for measuring an IDDQ current.

FIG. 14 is a diagram showing a configuration of a conventional semiconductor device provided with a pull-down resistor for measuring an IDDQ current.

FIG. 15 is a diagram showing a configuration of a conventional semiconductor device provided with a pull-down resistor for measuring a noise current.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 DC power supply 2 DC ammeter 3 High power supply pin 4 Low power supply pin 5 Input pin 6 Output pin 7 Internal circuit 8,13,22 Protection resistor 9,11,14,25,26,29,30 P channel MOS transistor 10, 12, 15, 28, 31 N-channel MOS transistor 16, 17 Pull-up resistor 18, 23 Pull-down resistor 21 IDDQ terminal 24 Input buffer 27 Inverter

Claims (4)

[Claims] An input buffer having a pull-up resistor;
Or a bidirectional input / output buffer with a pull-up resistor,
Alternatively, in a semiconductor device having a bidirectional input / output buffer provided with a pull-down resistor, the semiconductor device is inserted into a path of a current flowing through the pull-up resistor or the pull-down resistor during normal operation, and flows through the pull-up resistor or the pull-down resistor during IDDQ current measurement. A transistor for interrupting a current, and a control circuit for controlling the transistor to be conductive without receiving a control signal during normal operation and controlling the transistor to be non-conductive based on the control signal when measuring IDDQ current. A semiconductor device characterized by the above-mentioned. 2. An input buffer having a pull-up resistor,
Or a bidirectional input / output buffer with a pull-up resistor,
Alternatively, in a semiconductor device having a bidirectional input / output buffer having a pull-down resistor, a transistor that functions as the pull-up resistor or the pull-down resistor by an ON resistor during normal operation and is controlled to be non-conductive when measuring IDDQ current; A semiconductor device comprising: a control circuit that controls the transistor to be conductive without receiving a control signal during operation, and controls the transistor to be non-conductive based on the control signal when measuring IDDQ current. 3. The control circuit includes an IDDQ terminal connected to a gate terminal of the transistor, to which a control signal for controlling conduction of the transistor is applied, and a pull-down resistor connected between the IDDQ terminal and a low-level power supply. 3. The semiconductor device according to claim 1, comprising: 4. The semiconductor device according to claim 1, wherein the semiconductor device is registered as a cell array of a gate array, a standard cell or an embedded array composed of CMOS.