JPH11208008A - Thermal head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable simultaneous printing of data of the same scan line with a plurality of kinds of energies and enable printing by a thermal head of a plurality of colors at high speed correctly by providing a plurality of strobe signal input means and heating time control means. SOLUTION: When an application dot q1 of a low energy part of a thermal head has printing data, dots q2, q3 have no printing data and a printing dot Q2 of a high energy part has printing data, a NAND circuit 20 outputs '1' because the q3 is '0'. The Q2 is '1' although the q2 is '0', whereby Q2=1 is applied to an input terminal of the q2 via a diode 30. Therefore, a NAND circuit 19 outputs '0' while an inverting signal of a GATE C1 signal is '1'. As a result, an AND circuit 6 outputs '0' from a STROBE 2 signal while the inverting signal of the GATE C1 signal is '1'. A heating time of a heater of a thermal head is thus shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thermal head capable of outputting different heating temperatures during the same scanning, which is suitable for, for example, a heat-sensitive element which develops a different color depending on the heating temperature. The present invention relates to an apparatus that suppresses influence on energy data.

[0002]

When printing with respect to the thermal paper by the Related Art Thermal head, conventionally, as shown in FIG. 7 (A), printing energy (temperature) and T ₀ from as high as the print temperature constant, such as for example, black color When the energy is lower than that, the print density becomes lighter, so that the portion not desired to be printed does not heat the thermal head. That is, only the operation control of printing or not printing is performed based on the presence or absence of data on one line.

In order to perform this control, there is a type in which a hysteresis control circuit is added to limit a rise in temperature due to heat storage of the thermal head substrate. However, when printing, the thermal head is set to a single temperature, that is, a single energy. Control was the goal.

In recent years, a multi-color thermal paper has been manufactured in which, for example, printing is performed in black when printing with a high-temperature thermal head, and printed in red, for example, when printing with a low-temperature thermal head. For example, it is provided as product name MB-23 of Oji Paper Co., Ltd.

Namely, the heat-sensitive paper of this kind, as shown in FIG. 7 (B), when the thermal head of the printing energy (temperature) is T _2, and color, for example red, printing energy is T ₁
When (T ₂ <T ₁ ), the color develops black. Note whitening phenomenon appears when still higher than T _1. In addition to this type of heat-sensitive paper, not only a combination of red and black, but also a combination of other colors based on low / high printing energy exists.

[0006] Using such a multi-color thermal paper, when performing multi-color printing, for example, as shown in FIG. 8 (A), when performing red and black print on the scanning line L _0, the thermal head in the conventional , for example first data is transferred via the current amount corresponding to the low temperature of the print data portions for red, then it is necessary to perform a data transfer by a current amount corresponding to the high temperature on the same scanning line L ₀ again Was.

Also, as shown in FIG. 8B, even in the case of performing two-color printing of red and black, the printing data of the red portion is also changed by the current amount corresponding to the low temperature in the scanning lines L ₁ , L _2. Data transfer is performed, and then the same scan lines L ₁ , L
₂ ... Data transfer was performed by the amount of current corresponding to the high temperature above.

In order to cope with two types of energy, data transfer is performed twice in one line, and each energy is set. Therefore, there is a problem that the printing speed is slow because two data transfers are required for one line.

In order to solve this problem, the present inventor has previously proposed in Japanese Patent Application No. 9-302728 a thermal head which can perform this in one scan even when different energy settings are made for one line.

A thermal head filed as Japanese Patent Application No. 9-302728 will be described with reference to FIGS. FIG. 9 shows a control circuit per dot of the thermal head, and FIG. 10 is an explanatory diagram of control signals applied to this control circuit.

In FIG. 9A, reference numeral 1 denotes an FET,
A one-dot heater of the thermal head (not shown) is connected to the terminal DOn, and controls on / off of the terminal DOn. 2 is an OR circuit, 3 to 5 are multi-input AND circuits, 6
Is an AND circuit, 7 to 10 are NAND circuits, 11 and 12 are E
An OR (exclusive or) circuit, 13 is an output protection circuit, 14 to 18 are inverters, 19 and 20 are NAND circuits, 21 is an EOR circuit, and 22 to 24 are inverters.

When the IC constituting the thermal head is operating normally, the output protection circuit 13 is provided with the multi-input AND circuits 3 and 4.
Is output as "1". Also, the print dots Q1, Q2, Q3, L of the high energy portion shown in FIG.
Signals indicating the presence / absence of Q2 and RQ2 are input as signals Q1, Q2, Q3, LQ2 and RQ2 shown in FIG.
As shown in FIG. 9C, the print dots q1 in the low energy portion,
Signals indicating the presence / absence of q2 and q3 are input as signals q1, q2 and q3 shown in FIG.

As will be described later, the strobe signal S
TROBE1 is for heating the thermal head as a high-energy part for a long time to print black on paper, and strobe signal STROBE2 is heating the thermal head for a short time as a low-energy part to print red, for example, on paper. STROBE1> STR
OBE2.

When the corresponding print Q1 shown in FIG. 9B is printed, if there is no print data in Q2, Q3, LQ2, and RQ2, these are "0" and the NAND circuits 7-1
Since 0 outputs “1”, both the multi-input AND circuit 5 and the multi-input AND circuit 3 output “1”,
The OR circuit 2 thereby receives the strobe signal STROBE1.
FET1 is turned on for a time T1 determined by the formula ( ₁₎ , and the heater of the thermal head is heated.

However, if there is print data in at least one of Q2, Q3, LQ2, and RQ2, the gate signals A1,
B1, A2, only being controlled time based on B2 output time of multi-input AND "1" of the the circuit 5 is output is "0" strobe signal STROBE1 by multi-input AND circuit 3 is shorter than the T ₁ And the energy of the heater of the thermal head in the strobe signal STROBE1 is controlled to be equal.

The corresponding print q1 shown in FIG. 9C is printed.
When there is no print data in q2 and q3,
Is “0”, and both of the NAND circuits 19 and 20 are
Since "1" is output, the AND circuit 6 and the multi-input AND circuit
The path 4 outputs “1”, and the OR circuit 2 outputs “1”.
Time determined by the strobe signal STROBE2
T _Two(T₁> T_Two) Only FET1 is turned on and thermal
Heat the heater of the head.

However, if there is print data in at least one of q2 and q3, the AND circuit 6 is controlled for a time controlled based on the gate signals C1 and C2 corresponding to the print data in consideration of the heat storage effect, as described later. controlled to be shorter than the T ₂ output time of "1" of the multi-input aND circuit 4 according to the strobe signal STROBE2 "0" is outputted from the equal heater energy of the thermal head in the strobe signal STROBE2 Control so that

In this manner, the print head can be energized by a plurality of types of long and short strobe signals in one scanning line. On the other hand, the print head can be controlled by a plurality of thermal energies by one print scan, and a plurality of colors can be printed by one print scan.

Accordingly, it is not necessary to scan the same scanning line a plurality of times in accordance with the number of colors as in the conventional case, and printing of a plurality of colors can be performed at high speed. The operation of the control circuit shown in FIG. 9 will be described in more detail with reference to the control signals in FIG.

The various control signals shown in FIG. 10 are output from a control signal output circuit (not shown).
Both are output in the same cycle S. FIG.
The control signals shown in (A) are various control signals for controlling the thermal head in a high energy state.
Are various control signals for controlling the thermal head in a low energy state.

[0021] STROBE1 signal, the printing control range shown in FIG. 9 (B), when printing only the appropriate print dot Q1 dot is present, a thermal head connected thereto to turn on period T ₁ only FET1 The heating is controlled only for the period T ₁ , and as shown in FIG. 10A, it is at the low level only for the period T ₁ .

[0022] GATE A1 signal, falls at the same time as the STROBE1 signal, in which rises after a period t _1. The GATE A2 signal falls at the same time as the STROBE1 signal, and rises after a period (t ₁ + t ₂ ).

The GATE B1 signal is a STROBE1 signal.
Period (t₁+ T _Two+ T_Three+ T_Four)rear
And then the period t_FiveLater, STROBE1
It rises simultaneously with the issue.

The GATE B2 signal is a STROBE1 signal.
Period (t₁+ T _Two+ T_Three) Fall after
And then the period (t_Four+ T_Five) Later, STROBE
It rises at the same time as one signal.

Further STROBE2 signal, the printing control range shown in FIG. 9 (C), if there is a printed dot only the appropriate print dot q1, thermal head connected thereto turns on the period T ₂ by FET1 For period T ₂
(T ₂ <T ₁ ).
As (B), the falls simultaneously with STROBE1 signal only during the period T ₂ is at a low level.

[0026] GATE C1 signal, falls at the same time as the STROBE2 signal, in which rises after a period t _6. The GATE C2 signal falls at the same time as the STROBE2 signal, and rises after a period (t ₆ + t ₇ ).

And T ₁ , T ₂ , t _{1 to} t ₈ are:
It can be set appropriately according to the characteristics of the paper. First, based on FIGS. 9 and 10, the thermal history control in Japanese Patent Application No. 9-302728 will be described with reference to FIGS. 9B and 9C.
In the print control range shown in (1), print data exists for the print dots Q1 to Q3, LQ2, and RQ2 in the high energy portion as described below, and print data in the print dots q1 to q3 for the low energy portion as described below. Will be described.

Here, when Q1 is the corresponding print dot,
Q2 indicates a print dot immediately before the one line, and Q3 indicates a print dot immediately before the two lines. LQ2 indicates the left print dot one line before, and RQ2 indicates the right print dot one line before.

When q1 is the corresponding print dot,
q2 indicates a print dot immediately before the one line, and q3 indicates 2
Indicates the print dot immediately before the line. (1) When print data exists only in the print dot Q1, in the print control range shown in FIG. 9B, print data exists only in the corresponding print dot Q1, and Q2, Q3, LQ2,
When print data does not exist in RQ2, in FIG. 9A, Q1 = “1”, Q2 = “0”, Q3 = “0”, and LQ2 =
"0", RQ2 = "0".

Since each of the NAND circuits 7 to 10 outputs "1" according to each "0", the multi-input AND circuit 5 outputs "1". At this time, if the thermal head is normal, “1” is output from the output protection circuit 13 and Q1 = “1”.
Since STROBE1 signal as shown in (A) is transmitted, "1" is output from the period T ₁ only multi-input AND circuit 3 shown in FIG. 10 (A). At this time, since q1 = “0”, the multi-input AND circuit 4 outputs “0”.

As described above, since "1" output from the multi-input AND circuit 3 is input to the FET 1 via the OR circuit 2, the OR circuit 2 eventually has print data in Q1, Q2, Q3, LQ2, if there is no print data to RQ2, which was turned on by applying only the period T ₁ to "1" to the FET1, to heating control of the heater of the thermal head connected to FET1 only for the period T _1.

(2) When print data exists in the print dots Q1 and Q2, the corresponding print dot Q1 and the print dot Q2 one line before the print dot Q1
When print data exists in FIG. 9A, Q1 and Q in FIG.
2 is applied with “1”, Q3 = “0”, LQ2
= “0”, RQ2 = “0” is applied. Thus, each of the NAND circuits 8 to 10 outputs “1”.

At this time, the NAND circuit 7 includes the inverter 1
The 5, since FIG. 10 the inverted signal and Q2 = "1" GATE A1 signal shown in (A) is applied, the NAND circuit only during the period t ₁ in FIG. 10 7 outputs "0", the other is "1" is output. Thus the multi-input AND circuit 5, the remaining time obtained by subtracting the time t ₁ from the period T ₁ shown in FIG. _{10 (t 2 + t 3 +} t 4 + t 5) outputs "1", FET
1 is also turned on only during this period, and controls the heating of the heater of the thermal head connected to the FET _{1 for the} period (T ₁ −t ₁ ).

(3) When print data exists in the print dots Q1 and LQ2, the print dot Q1 and the adjacent left front print dot LQ2
When print data exists in Q1, L1 and Q1 in FIG.
2 are respectively applied with “1”, Q2 = “0”, Q3 =
“0” and RQ2 = “0” are applied. As a result, the NAND circuit 7 and the NAND circuits 9 and 10 each output "1".

At this time, LQ2 =
“1” and the output of the EOR circuit 11 are input. EO
The R circuit 11 includes an inverter 15 shown in FIG.
And the inverted signal of the GATE A1 signal shown in FIG.
6, the inverted signal of the GATE A2 signal shown in FIG. 10A is applied, so that the EOR circuit 11 outputs “1” only during the period t ₂ shown in FIG. 10 and “0” during the other periods. Output. For this reason the NAND circuit 8 is only for the period t ₂ "0"
And outputs “1” in other periods.

[0036] Thus the multi-input AND circuit 3, the remaining time obtained by subtracting the time t ₂ from time T ₁ shown in FIG. 10 (t ₁ + t
₃ + t ₄ + t ₅₎ outputs "1", FET1 also only this time turned on to heating control of the heater of the thermal head connected to FET1 only (T ₁ -t ₂₎ period.

(4) When print data exists in the print dots Q1 and RQ2, the corresponding print dot Q1 and the adjacent right front print dot RQ2
When print data exists in Q1, RQ and RQ in FIG.
2 are respectively applied with “1”, Q2 = “0”, Q3 =
“0” and LQ2 = “0” are applied. Thereby, the NAND circuits 7 to 9 each output "1".

At this time, the RQ2 =
“1” and the output of the EOR circuit 12 are input. EO
The R circuit 12 includes an inverter 17 shown in FIG.
The inverted signal of the GATE B1 signal shown in FIG.
According to 8, since the inverted signal of GATE B2 shown in FIG. 10 (A) is applied only during the period t ₄ when FIG 2 EOR
The circuit 12 outputs “1”, and outputs “0” in other periods. Therefore the NAND circuit 10 outputs only the period t ₄ "0", other periods outputs "1".

[0039] Thus the multi-input AND circuit 3, the remaining time obtained by subtracting the time t ₄ from the period T ₁ shown in FIG. 10 (t ₁ + t
₂ + t ₃ + t ₅₎ outputs "1", FET1 also only this time turned on to heating control of the heater of the thermal head connected to FET1 only (T ₁ -t ₄₎ period.

(5) When print data exists in the print dots Q1 and Q3, the corresponding print dot Q1 and the print dot Q3 two dots before the print dot Q1
When print data exists in Q1, Q1 and Q3 in FIG.
Are respectively applied, Q2 = “0”, LQ2 =
“0” and RQ2 = “0” are applied. Thus, the NAND circuits 7, 8 and 10 each output "1".

At this time, Q3 = "1" is applied to the NAND circuit 9.
And the GAT shown in FIG.
Since the inverted signal of the E B1 signal is applied, only the NAND circuit 9 period t ₅ shown in FIG. 10 outputs "0", other periods outputs "1".

[0042] Thus the multi-input AND circuit 3, the remaining time obtained by subtracting the time t ₅ the time period T ₁ shown in FIG. 10 (t ₁ + t
₂ + t ₃ + t ₄₎ outputs "1", FET1 also only this time turned on to heating control of the heater of the thermal head connected to FET1 only (T ₁ -t ₅₎ period.

(6) When print data exists in the print dots Q1, Q2, and Q3, the print dot Q1 and the print dot Q2 immediately before the print dot Q1
When print data exists in the print dot Q3 two dots before that, “1” is applied to each of Q1, Q2, and Q3 in FIG. 9A, and LQ2 = “0” and RQ2 = “0” are applied. Is done. Thereby, the NAND circuit 8 and the NAND circuit 1
0 outputs "1".

At this time, Q2 = "1" is applied to the NAND circuit 7.
And the GAT shown in FIG.
Since the inverted signal of the E A1 signal and is applied, the NAND circuit 7 only during the period t ₁ in FIG. 10 outputs "0", other periods outputs "1". In the NAND circuit 9, Q3 = “1” and the inverter 17
Since the inverted signal of the GATE B1 signal shown in (A) and is applied, the NAND circuit 9 only for the period t ₅ shown in FIG. 10 outputs "0", other periods outputs "1".

Therefore, the multi-input AND circuit 3 outputs “1” for the remaining period (t ₂ + t ₃ + t ₄ ) obtained by subtracting the periods t ₁ and t ₅ from the period T ₁ shown in FIG. It turns on only during this period, and controls the heating of the heater of the thermal head connected to the FET ₁ only for the period (T ₁ −t ₁ −t ₅ ).

(7) Print dots Q1, Q2, Q3, L
When print data exists in a plurality of print dots of Q2 and RQ3, the corresponding print dot Q1 and print dots Q2, Q3, LQ
2, a plurality of print dots of RQ2, for example, Q2 and L
When print data exists in Q2, Q3 = "0", R
Since Q2 = “0”, the NAND circuits 9 and 10 each output “1”.

At this time, the GATE A1 signal shown in FIG. 10A and Q2 = "1" are applied to the NAND circuit 7 by the inverter 15 as shown in (2) above.
Only the NAND circuit 7 during the period t ₁ in FIG. 10 is "0"
Is output.

As shown in the above (3), LQ2 = "1" and the output of the EOR circuit 11 are input to the NAND circuit 8. The EOR circuit 11 includes an inverted signal of the GATE A1 signal shown in FIG. 10A by the inverter 15 and a GATE A signal shown in FIG.
Since the inverted signal of the two signals is applied, only the EOR circuit period t ₂ shown in FIG. 10 11 outputs "1", other periods outputs "0". Therefore, the NAND circuit 8 operates in the period t ₂
Only "0" is output.

Therefore, when print data exists in Q2 and LQ2, when data exists in the corresponding print dot Q1 and print dot Q2, the period t ₁ during which the multi-input AND circuit 5 outputs “0”, and the corresponding print dot Q1 outputs (t ₁ + t ₂₎ only multi-input aND circuit 5 is "0" in the sum of the time period t ₂ to the multi-input aND circuit 5 outputs "0" when the data in the print dots LQ2 is present and, FET1 Is controlled by (T ₁ −t ₁ −t ₂ ).

That is, when print data is present in the print dot Q1 and a plurality of print dots among the print dots Q2, Q3, LQ2, and RQ2, the print dot Q1 and other print dots Q2, Q3, LQ2, and RQ2 are present. When there is data in the print dot of the multi-input AND circuit 5, the multi-input AND circuit 5 is operated by the sum of the periods of “0” described in the above (2) to (5) according to the other print dots. outputs "0", the period F which is obtained by subtracting from only T ₁ period of the sum of these
The heater of the thermal head connected to ET1 is heated.

For example, Q1, Q2, Q3, LQ2, RQ
When all of the 2 printing data is present, T ₁ - (t <sub>1
+ T 2 + t 4 + t</sub> 5) = period only multi-input AND circuit 5 of t ₃ outputs "1" to heat the heater of the connected thermal head only FET1 this period t _3.

(8) When print data exists only in print dot q1, in the print control range shown in FIG. 9C, print data exists only in print dot q1, and print data does not exist in q2 and q3. In this case, in FIG. 9A, q1 = “1”, q
2 = “0” and q3 = “0”.

Therefore, since "1" is output to the NAND circuits 19 and 20 by q2 = "0" and q3 = "0", the multi-input NAND circuit 6 outputs "1". At this time, if the thermal head is normal, "1" is output from the output protection circuit 13. At this time, q1 = “1”, and the inverter 22 has STROBE2 as shown in FIG.
Since the signal is transmitted, "1" is output from the period T ₂ by multi-input AND circuit 4 shown in FIG. 10 (B). At this time, since Q1 = “0”, the multi-input AND circuit 3 outputs “0”.

As described above, since "1" output from the multi-input AND circuit 4 is input to the FET 1 through the OR circuit 2, the OR circuit 2 eventually has print data in q1, q2, If there is no print data in q3, the period T
₂ (T ₂ <T ₁ ), “1” is applied to the FET 1 to turn it on, and the heater of the thermal head connected to the FET 1 is heated and controlled for the period T ₂ .

(9) When print data exists in the print dots q1 and q2, the corresponding print dot q1 and the print dot q2 one line before the print dot q1
9A, when print data exists, q1 and q in FIG.
"1" is applied to each of 2 and q3 = "0" is applied. Thereby, the NAND circuit 20 outputs “1”.

[0056] The NAND circuit 19 at this time, the inverter 23, since 10 inverted signal and q2 = "1" of the GATE C1 signal shown in (B) is applied, NAND only during the period t ₆ in FIG. 10 The circuit 19 outputs "0", and the other outputs "1". Therefore, the AND circuit 6 outputs “1” for the remaining period (t ₇ + t ₈ ) obtained by subtracting the period t ₆ from the period T ₂ shown in FIG.
And because even the OR circuit 2 outputs "1" during this period only (t ₇ + t _8), becomes even only this time on FET1, F
Set the heater of the thermal head connected to ET1 to (T ₂ −
t ₆₎ to only heating control period.

(10) When print data exists in the print dots q1 and q3, the print dot q1 and the print dot q3 two dots before the print dot q1
9A, when print data exists, q1 and q in FIG.
3 is applied with “1” and q2 = “0” is applied. Thus, the NAND circuit 19 outputs “1”.

At this time, in the NAND circuit 20, q3 =
“1” and the output of the EOR circuit 21 are input. EO
The R circuit 21 includes an inverter 23, as shown in FIG.
The inverted signal of the GATE C1 signal shown in FIG.
According to 4, since the inversion signal of the GATE C2 signal shown in FIG. 10 (B) is applied, "1" of the two signals, the period t ₇ only EOR circuit 21 shown in FIG. 10 does not match the "0""1 ”And outputs“ 0 ”during other periods. Therefore the NAND circuit 20 outputs "0" only for the period t _7, other periods outputs "1".

Therefore, the AND circuit 6 outputs “1” for the remaining period (t ₆ + t ₈ ) obtained by subtracting the period t ₇ from the period T ₂ shown in FIG. 10, and the multi-input AND circuit 4 and the OR circuit 2 also Since “1” is output only during this period (t ₆ + t ₈ ), F
ET1 becomes ON only this period, the heating control of the heater of the thermal head connected to FET1 by (T ₂ -t ₇₎ period.

(11) When print data exists in the print dots q1, q2, q3, the corresponding print dot q1 and the print dot q immediately before the print dot q1
When print data exists in both the print dot q3 and the print dot q3 two dots before the print data, q1, q2, q3 in FIG.
Is applied to each of them.

At this time, as shown in the above (9), the inverted signal of the GATE C1 signal shown in FIG. 10B and q2 = "1" are applied to the AND circuit 19 by the inverter 23. The NAND circuit 19 outputs “0” only during the period t ₆ in 10.

As shown in the above (10), q3 = “1” and the output of the EOR circuit 21 are input to the NAND circuit 20. At this time, the inverted signal of the GATE C1 signal shown in FIG. 10B by the inverter 23 and the inverted signal of the GATE C2 signal shown in FIG. 10B by the inverter 24 are applied to the EOR circuit 21. , "1" of the two signals, EOR circuit 21 only for the period t ₇ shown in FIG. 10 does not match the "0" outputs "1", other periods outputs "0". Therefore the NAND circuit 20 outputs "0" only for the period t _7, other periods outputs "1".

Therefore, the AND circuit 6 operates during the period shown in FIG.
T_TwoTo period t₆And t₇Remaining time t minus₈Is
Outputs “1”, and the multi-input AND circuit 4 and the OR circuit 2
This period t₈Output "1" only, so FET1
Period t₈= T_Two− (T₆+ T₇) Only turns on and F
The heater of the thermal head connected to ET1 is turned on during this period.
T _Two− (T₆+ T₇) Only heating control.

As described above, the heater of the thermal head can arbitrarily output data of a high energy portion and data of a low energy portion. For example, it is possible to control the printing of black on the multi-color thermal paper by the data of the high energy part, and to control the red printing by the data of the low energy part.

[0065]

By the way, in such a control circuit, the control of the data of the high energy part and the control of the data of the low energy part are performed independently. Therefore, when such two types of input energy data coexist, for example, the print dot q shown in FIG.
In the case where high-energy data, that is, print dots Q2 and Q3 are present at the positions 2 and q3, the print dot q1 cannot be printed with low-energy data due to this effect, and the print result is close to the high-energy data. Becomes
For example, what should be printed in red will be printed in black.

Accordingly, an object of the present invention is to provide a thermal head which does not affect the print output of low energy data in accordance with the presence or absence of such high energy print data near the print point.

[0067]

In order to achieve the above-mentioned object, in the present invention, a control circuit for a thermal head is constructed as shown in FIG. And the print control range is
In the high energy part, the selection is made as shown in FIG. 1B, and in the low energy part, the selection is made as shown in FIG.
2. When print data exists in Q3, the heating time of the thermal head by the low energy portion is controlled in accordance with the print data as described later.

In FIG. 1A, 1 is an FET, 2 is an OR circuit, 3 to 5 are multi-input AND circuits, 6 is an AND circuit,
7 to 10 are NAND circuits, 11 and 12 are EOR (exclusive or) circuits, 13 is an output protection circuit, and 14 to 18
Is an inverter, 19 and 20 are NAND circuits, 21 is EOR
Circuits 22 to 24 are inverters. And 30, 3
Reference numeral 1 denotes a diode, which forms a connection circuit that connects the signals Q2 and q2 and Q3 and q3 shown in FIG.

Now, there is print data at the print dot q1 in the low energy portion shown in FIG.
When no print data exists in the print dot 3 but print data exists in the print dot Q2 in the high energy portion shown in FIG. 1B, the NAND circuit 20 outputs "1" because q3 is "0". Further, since q2 is "0" and Q2 is "1" and this Q2 = "1" is applied to the input terminal of q2 of the NAND circuit 19 via the diode 30, the NAND circuit 1
Reference numeral 9 outputs "0" while the inverted signal of the GATE C1 signal is "1", and outputs "1" during other periods.

Accordingly, the AND circuit 6 outputs "0" during the period when the inverted signal of the GATE C1 signal is "1" from the STROBE2 signal, and determines the heating time of the heater of the thermal head connected to the FET1 from the STROBE2 signal during this period. Control to make it shorter. Therefore, when print data is present in the print dot Q2 in the high energy portion, the heating control for the print dot q1 in the low energy portion can be performed in consideration of the heat storage effect.

Further, although the print data is present in the print dot q1 in the low energy portion and the print data is not present in the print dots q2 and q3, the print data is present in the print dot Q3 in the high energy portion shown in FIG. Then, since the value q2 is "0", the NAND circuit 19 outputs "1". Also, if q3 is “0”, Q3 is “1” and the diode 31
This Q3 = "1" is applied to the input terminal of q3 of the NAND circuit 20 via the
It outputs "0" during a period when "1" and "0" of the inverted signal of the C1 signal and the inverted signal of the GATE C2 signal do not match, and outputs "1" during the other periods.

Therefore, the AND circuit 6 converts the STROBE2 signal into an inverted signal of the GATE C1 signal and the GATE C1 signal.
A period "0" is output during a period when "1" and "0" do not match the two signals, and the heating time of the heater of the thermal head connected to the FET1 is controlled so as to be shorter than the STROBE2 signal during this period. Therefore, when print data exists in the print dot Q3 in the high energy portion, the heating control for the print dot q1 in the low energy portion can be performed in consideration of the heat storage effect.

When the high energy part and the low energy part are controlled independently, the control is performed in the same manner as in the prior art shown in FIG. In this manner, the print head can be energized by a plurality of types of long and short strobe signals in one scanning line. The print head can be controlled with multiple thermal energies by multiple print scans, and the heating control of the low energy part can be performed in consideration of the heat storage effect on the low energy part based on the printing of the high energy part. By the print scan, the printing of a plurality of colors can be performed accurately.

[0074]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a control circuit per dot of a thermal head according to the present invention in an example in which forward print data of a high energy portion is added to a control range.
FIG. 2 is an explanatory diagram of control signals applied to the control circuit, and FIG. 3 is an embodiment of the present invention.

The diode 30 connects the signal input circuit for the print dot Q2 in the high energy portion and the signal input circuit for the print dot q2 in the low energy portion. As a result, the same control as when print data exists in the print dot q2 in the low energy portion when print data exists in the print dot Q2 in the high energy portion is performed.

The diode 31 connects the signal input circuit for the print dot Q3 in the high energy portion and the signal input circuit for the print dot q3 in the low energy portion. As a result, the same control as when print data exists in the print dot q3 in the low energy portion when print data exists in the print dot Q3 in the high energy portion is performed.

FIG. 1 except for diodes 30 and 31
The configuration is the same as that of the control circuit shown in FIG.
FIGS. 10A and 10B are the same patterns as FIGS. 10A and 10B. Therefore, in the control circuit shown in FIG. 1, the control of the high energy portion alone is the same as the control in the high energy portion shown in FIG. 9A, and the control of the low energy portion alone is the low control shown in FIG. Since the control is the same as the control in the energy section, these controls are omitted for simplification of description.

The control operation will be described below, for example, when there is print data in q1 of the low energy part, there is no print data in q2 or q3 of the low energy part, and there is print data in Q2 or Q3 of the high energy part. Due to the nature of the print data, the print data is created so that the print data of the high energy portion and the print data of the low energy portion do not exist together in the same dot.

(1) When print data exists in the print dots q1 and Q2, in the print control range of the low energy portion shown in FIG. 1C, print data exists only in the print dot q1 and q2,
When there is no print data in q3, and there is print data in print dot Q2 in the high energy portion shown in FIG. 1B and no print data in Q3, q1 = "1" in FIG.
2 = “0”, q3 = “0”, Q2 = “1”, Q3 =
It becomes "0".

At this time, since q3 = "0", the NAND circuit 2
0 outputs “1”. However, in the NAND circuit 19, although q2 = "0", Q2 = "1" is input to the signal input circuit of q2 via the diode 30. Further, the NAND circuit 19 is connected to the
Since the inverted signal of the GATE C1 signal shown in (B) is applied, only the NAND circuit 19 during the period t ₆ in FIG. 2
Outputs “0”, and the other outputs “1”.

Therefore, the AND circuit 6 has the STR shown in FIG.
Period T due to OBE2 signal_TwoTo t ₆Remaining period minus
Between (t₇+ T₈) Outputs "1" and outputs a multi-input AND circuit.
4 and the OR circuit also during this period (t₇+ T₈) Only "1"
Output, FET1 is also turned on only during this period, and F1
Set the heater of the thermal head connected to ET1 to (T_Two−
t₆) Heating control only for a period.

By shortening the heating time by the period t ₆ in this way, it is possible to prevent the effect of heat accumulation on the print dot Q2 in the high energy portion with respect to the print dot q1.

(2) When print data exists in the print dots q1 and Q3, in the print control range of the low energy portion shown in FIG.
If there is no print data in q2 and q3 and there is print data in print dot Q3 in the high energy portion shown in FIG. 1B and no print data in Q2, then q1 =
“1”, q2 = “0”, q3 = “0”, Q2 = “0”,
Q3 = “1”.

At this time, since q2 = “0”, the NAND circuit 19 outputs “1”. However, in the NAND circuit 20, although q3 = "0", Q3 = "1" is input to the signal input circuit of q3 via the diode 31.
Further, the output of the EOR circuit 21 is input to the NAND circuit 20. At this time, the EOR circuit 21 includes the inverter 2
2 and the inverted signal of the GATE C1 signal shown in FIG.
Since the inverted signal of the TE C2 signal is applied, "1" of the two signals do not match the "0", only the EOR circuit 21 period t ₇ shown in FIG. 2 outputs "1", the other periods "0"
Is output. Therefore the NAND circuit 20 outputs "0" only for the period t _7, other periods outputs "1".

Therefore, the AND circuit 6 operates as shown in FIG.
The remaining period (t ₆ + t ₈ ) obtained by subtracting the period t ₇ from the period T ₂ by the ROBE2 signal outputs “1”, and the multi-input AND circuit 4 and the OR circuit 2 also output “1” during this period (t ₆ + t ₈ ). since outputs 1 ', FET1 becomes oN only this period, the heating control of the heater of the thermal head connected to FET1 by (T ₂ -t ₇₎ period.

By shortening the heating period by the period t ₇ in this way, it is possible to prevent the effect of heat accumulation on the print dot Q 3 of the high energy portion with respect to the corresponding print dot q 1.

(3) When print data exists in the print dots q1, Q2, and Q3, in the print control range of the low energy portion shown in FIG. 1C, print data exists only in the print dot q1 and q
If there is no print data in q2 and q3 and print data exists in the print dots Q2 and Q3 in the high energy portion shown in FIG. 1B, q1 = “1” and q2 =
“0”, q3 = “0”, Q2 = “0”, and Q3 = “0”.

At this time, in the NAND circuit 19, q2 = "0"
However, the diode 30 is connected to the signal input circuit of q2.
= “1” is input via the. Further, the NAND circuit 19 is connected to the inverter circuit 23 so that the G signal shown in FIG.
Since the inverted signal of the ATE C1 signal is applied, the NAND circuit 19 only during the period t ₆ in FIG. 2 outputs "0" and the other outputs "1".

In the NAND circuit 20, although q3 = "0", Q3 = "1" is input to the signal input circuit of q3 via the diode 31. In the NAND circuit 20,
The output of the EOR circuit 21 is input.
The OR circuit 21 outputs the inverted signal of the GATE C1 signal and the GAT signal.
"1" and the inverted signal of the E C2 signal, does not match the "0", only the EOR circuit 21 period t ₇ shown in FIG. 2 outputs "1", other periods outputs "0". Therefore, FIG.
During the NAND circuit 20 of the time t ₇ at outputs "0" and the other outputs "1".

Therefore, the AND circuit 6 operates as shown in FIG.
Period (t ₆ + t ₇ ) from period T ₂ by ROBE2 signal
Since the rest of the only period t ₈ outputs "1" obtained by subtracting, F
ET1 also the period t ₈ = T ₂ - only turned on (t ₆ + t _7), for heating control of the heater of the thermal head connected to FET1 only the period t _8.

In this way, by shortening the heating period by the period (t ₆ + t ₇ ), it is possible to prevent the effect of heat accumulation on the printing dots Q2 and Q3 in the high energy portion with respect to the printing dot q1.

(4) When print data exists in print dots q1, q2, and Q3, in the print control range of the low energy portion shown in FIG. 1C, print data is written in print dot q1 and print dot q2. If there is no print data in q3 and there is print data in print dot Q3 in the high energy portion shown in FIG. 1 (B) but no print data in Q2, FIG. 1 (A)
, Q1 = “1”, q2 = “1”, q3 =
“0”, Q2 = “0”, and Q3 = “1”.

In this case, the same control as in the above (3) is performed, and the FET 1 is turned on for a period t ₈ = T _2- (t ₆ + t ₇ ). By shortening the heating time by the period (t ₆ + t ₇ ) in this manner, it is possible to prevent the heat storage effect of not only the print dot q2 of the low energy part but also the print dot Q3 of the high energy part with respect to the corresponding print dot q1. it can.

(5) When print data exists in the print dots q1, q3, and Q2, in the print control range of the low energy portion shown in FIG. 1C, the print data is stored in the print dot q1 and the print dot q3. When there is no print data in q2 and there is print data in the print dot Q2 in the high energy portion shown in FIG. 1B but no print data in Q3, FIG.
, Q1 = “1”, q2 = “0”, q3 =
“1”, Q2 = “1”, and Q3 = “0”.

In this case, the same control as in the above (3) is performed, and the FET 1 is turned on only for the period t ₈ = T ₂ − (t ₆ + t ₇ ). In this way, by shortening the heating time by the period (t ₆ + t ₇ ), it is possible to prevent the heat storage effect of not only the print dot q3 of the low energy part but also the print dot Q2 of the high energy part with respect to the corresponding print dot q1. it can.

An embodiment of the thermal head of the present invention having such a control circuit will be described with reference to FIG. 3 and other drawings. FIG. 3 shows an example in which a 64-bit print head is controlled, and the same parts as those in the other figures are denoted by the same reference numerals. In FIG. 3, FET1 controls the printing of the corresponding print dot Q1 described in FIG. 1A, L1 indicates the FET for controlling the printing of the print dot on the left side of the relevant print dot Q1, and R1 indicates the corresponding print dot. An FET for controlling printing of a print dot on the right side of the dot Q1 is shown, VSS indicates a ground signal, and VDD indicates a power supply voltage of a control system.

A shift register 40 is a 64-bit first register to which print data for the high energy portion Q is inputted.
(Not shown) and a 64-bit second shift register (not shown) to which print data for the low energy portion q is input. In this example, CL
According to the OCK signal, 64-bit input data of the high energy part Q is serially input to the first shift register from DATAin1 (Q), and 64-bit input data of the low energy part q is input to the second shift register from DATAin2 (q). Serial input, DATAout
From 1 (Q) and DATAout (q), for example, the data is serially output to the next stage. Reference numerals 41, 42, 43,... Denote data holding registers for holding print data of 3 bits for the high energy portion Q and 3 bits for the low energy portion q.

The data holding register 41 sequentially holds three lines of the 1-bit print data transmitted to the input terminal D ₁ by the LOAD signal, and also prints the 1-bit print data transmitted to the input terminal d _1. The data is sequentially held for only three lines. Data holding register 42,
43 are the same.

For example, the first print data line for the high energy portion is set in the first shift register of the shift register 40, and the first print data line for the low energy portion is set in the second shift register of the shift register 40. after, entering the LOAD signal to the LATCH terminal of the data holding register 41, 42, 43, ..., the data 1 bit of data in the first shift register is transmitted to the input terminal D ₁ transmitted data retention is output from the terminal Q1 is held in the use register 41, the held in the second shift register of the first bit input terminal d data which also data holding register 41 is transferred to the ₁ data is transmitted in Output from terminal q1.

Similarly, the second bit data of the first shift register and the second shift register is output from the output terminals Q1 and q1 of the data holding register 42, and the third bit of the first shift register and the second bit of the second shift register. Are output from the output terminals Q1 and q1 of the data holding register 43.

Next, the second print data line for the high energy portion is set in the first shift register of the shift register 40, and the second print data line for the low energy portion is set in the second shift register of the shift register 40. and then, if you enter a LOAD signal to the LATCH terminal of the data holding register 41, 42, 43, ..., which are transmitted one new bit of data in the first shift register to the input terminal D ₁ registers for data retention The data held at 41 and output from the output terminal Q1 and the data previously output from the output terminal Q1 are shifted to the next stage and output from the output terminal Q2. Similar control is performed for the second shift register, which new first bit of data of the second shift register is transmitted to the input terminal d ₁ is output from the terminal q1 is held in the data holding register 41, The data previously output from the output terminal q1 is shifted to the next stage and output data is output to the output terminal q2.
Output.

Similarly, the data of the second bit of each of the first shift register and the second shift register is output from the output terminals Q1 and q1 of the data holding register 42, and the data previously output from the output terminals Q1 and q1. Is shifted to the next stage and output from the output terminals Q2 and q2.

The same control is performed in the data holding register 43, and the third bit data of the first shift register and the second shift register are output from the output terminals Q1 and q1 of the data holding register 43, respectively. The data that has been output from the output terminals Q1 and q1 is shifted to the next stage and output from the output terminals Q2 and q2.

The third print data line for the high energy portion is set in the first shift register of the shift register 40, and the third print data line for the low energy portion is set in the second shift register of the shift register 40. After that, when the LOAD signal is input to the LATCH terminals of the data holding registers 41, 42, 43,..., The same control as described above is performed.
The data of the bit is output from the output terminal Q1, and the data output from the output terminals Q1 and Q2 is shifted to the next stage and output from the output terminals Q2 and Q3, respectively. Also, new first bit data of the second shift register is output from the output terminal q1, and the output terminal q
The data output from 1, q2 is shifted to the next stage and output from output terminals q2, q3, respectively.

Similarly, in the data holding register 42, the new second bit data of the first shift register is output from the output terminal Q1, and the output terminal Q
The data output from Q1 and Q2 is shifted to the next stage and output from output terminals Q2 and Q3, respectively. Further, new second bit data of the second shift register is output from the output terminal q1, and the data output from the output terminals q1 and q2 is shifted to the next stage and output from the output terminals q2 and q3, respectively. .

The output terminal Q2 is connected to the output terminal q2 via the diode 30, and the output terminal Q3 is connected to the output terminal q3 via the diode 31. Further, in the data holding register 43, similarly,
The new third bit data of the first shift register is output from the output terminal Q1, and the output terminals Q1, Q
The data output from 2 is shifted to the next stage and output from output terminals Q2 and Q3, respectively. The new third bit data of the second shift register is output from the output terminal q1.
The data output from the output terminals q1 and q2 is shifted to the next stage and output from the output terminals q2 and q3, respectively.

Here, the first print data line corresponds to the previous two print lines shown in FIGS.
The third print data line corresponds to the preceding print line, and the third print data line corresponds to the corresponding print line.

The output of the output terminal Q2 of the register 41 is input to the NAND circuit 8 (corresponding to LQ2 in FIG. 1A), and the output of the output terminal Q2 of the register 43 is input to the NAND circuit 10 (FIG. A) RQ2). Thus, a control circuit similar to that described with reference to FIG. 1A is configured based on the outputs of the data holding registers 41, 42, and 43.

Therefore, for FET1, FIG.
(B) A print control range shown in (C) which includes thermal history control according to the state of each print dot.
Control is performed based on the E1 signal and the STROBE2 signal. This control is similarly performed for the FETs L1, R1.

Therefore, the print data of the high energy portion is input to the first shift register of the shift register 40,
The print data of the low energy portion is input to the shift register, and the STROBE1 signal, STROBE2 signal, G
ATE A1 signal, GATEA2 signal, GATE B1
Signal, GATE B2 signal, GATE C1 signal, GA
When a control signal such as a TEC2 signal is input, the control including the printing control range and the control for preventing the heat storage effect on the low energy portion of the high energy portion can be performed as described above. At the same time as the printing control based on the data, the printing is performed at the same time. For example, as shown in FIG.

Next, a second control circuit for one dot of the thermal head according to the present invention will be described with reference to FIGS. FIG. 4 shows an example in which forward print data and adjacent data of a high energy portion are added to a control range, and FIG. 5 is an explanatory diagram of control signals applied to this control circuit.

In the control circuit shown in FIG. 4A, in the unique control in the high-energy section, as shown in FIG. Previous print dot Q at
2 and the left and right print dots LQ2 and RQ2, and the print control range of the previous print dot Q3 in the previous two print lines.

In the independent control in the low energy section, as shown in FIG. 4D, when the line of the corresponding print dot q1 is set as the corresponding print line, the previous print dot q2 in the preceding one print line, and It has a print control range of the previous print dot q3 in the previous two print lines.

In this example, as shown in FIG. 4C, the influence range of the high energy portion on the corresponding print dot q1 in the low energy portion is determined by the print dots Q2 and Q3 and the LQ2 and LQ2 of the print dot adjacent to the previous print line. RQL2.

For this reason, as shown in FIG.
Mode 30, 31, 32, 33, inverter 25, NAND
A circuit 26, an EOR circuit 27, and the like are provided. GATE C3
The signal is a STROBE2 signal as shown in FIG.
At the same time, the falling period (t₆+ T₇+ T₈) After the rise
Things. Of course, these (t ₆+ T₇+ T₈) Is paper
Can be set as appropriate according to the characteristics of.

The diodes 30 and 31 are the same as those in the control circuit shown in FIG. The diode 32 is for controlling the influence of the print data in the print dot LQ2 of the high energy portion when the print data is present. The diode 32 has a signal input circuit of the print dot LQ2 of the high energy portion and an input circuit of the NAND circuit 26. Connect.

The diode 33 is for controlling the influence of print data on the print dot RQ2 in the high energy portion when the print data is present. The signal input circuit of the print dot RQ2 in the high energy portion and the input of the NAND circuit 26 are provided. It connects to a circuit.

The other input circuit of the NAND circuit 26 has EOR
The output of the circuit 27 is input. The EOR circuit 27 has a GA
An inverted signal of the TEC2 signal and an inverted signal of the GATE C3 signal are input.

FIG. 4A shows the same operation as that of the control circuit shown in FIG. 9A for controlling the high energy portion alone. For the control of the low energy part alone, LQ
Since both RQ2 and RQ2 are "0", the NAND circuit 26 outputs "1" to the multi-input AND circuit 6-0. Otherwise, the operation is the same as that of the control circuit shown in FIG. Therefore, these single operations are omitted for simplification of description.

A typical control for the corresponding print dot q1 in the low energy portion when print data exists in LQ2 and RQ2 in FIG. 4C will be described below. (1) When print data exists in the print dots q1 and LQ2, in the print control range of the low energy portion shown in FIG.
There is no print data in q3, and there is print data in print dots LQ2 in the high energy portion shown in FIG.
3, when there is no print data in RQ2, q1 = “1”, q2 = “0”, q3 = “0”, and Q2 =
“0”, Q3 = “0”, LQ2 = “1”, RQ2 =
It becomes "0".

At this time, since q2 = "0" and Q2 = "0", the NAND circuit 19 outputs "1" and q3 = "0" and Q3
Since 3 = “0”, the NAND circuit 20 outputs “1”.
Since LQ2 = “1”, “1” is applied to one input circuit of the NAND circuit 26 and EOR is applied to the other input circuit.
The output of the circuit 27 is input. At this time, the EOR circuit 27
The GATE shown in FIG.
FIG. 5 shows an inverted signal of the C2 signal and an inverter 25.
Since the inverted signal of the GATE C3 signal shown in (B) is applied, "1" and "0" of both signals do not match.
EOR circuit 27 only during the period t ₈ shown in (B) outputs a "1", other periods outputs "0". Therefore the NAND circuit 26 outputs "0" only for the period t _8, other periods outputs "1".

Therefore, the multi-input AND circuit 6-0 has a structure shown in FIG.
Period T due to STROBE2 signal shown_TwoTo period t₈To
Remaining period (t₆+ T₇+ T₉) Outputs "1"
The multi-input AND circuit 4 and the OR circuit 2 also operate during this period (t
₆+ T₇+ T₉) = T_Two-T ₈Only output "1"
Thus, FET1 is also turned on only during this period, and is connected to FET1.
The heater of the continued thermal head is_Two-T₈)
The heating is controlled only for the period.

In this way, by shortening the heating time by the period t _8, it is possible to prevent the effect of heat accumulation on the print dot LQ 2 of the high energy portion with respect to the corresponding print dot q 1.

(2) When print data exists in print dots q1 and RQ2, in the print control range of the low energy portion shown in FIG. 4D, print data exists only in print dot q1 and q
No print data exists in q2 and q3, and print data exists in print dots RQ2 in the high energy portion shown in FIG.
When there is no print data in Q3 and LQ2, in FIG. 4A, q1 = “1”, q2 = “0”, q3 = “0”,
2 = “0”, Q3 = “0”, LQ2 = “0”, RQ2 =
It becomes "1".

At this time, since q2 = "0" and Q2 = "0", the NAND circuit 19 outputs "1", and q3 = "0" and Q3
Since 3 = “0”, the NAND circuit 20 outputs “1”.
Since RQ2 = “1”, “1” is applied to one input circuit of the NAND circuit 26 and EOR is applied to the other input circuit.
The output of the circuit 27 is input. Thus as in the case where print data exists in the print dot q1 and LQ2 of the (1), the period t ₈ only EOR circuit 27 shown in FIG. 5 (B)
Outputs “1” and outputs “0” in other periods,
1 is connected to the heater of the thermal head (T ₁ −
t ₈₎ to only heating control period.

Thus, by shortening the heating time by the period t _8, it is possible to prevent the effect of heat accumulation on the print dot RQ 2 in the high energy portion with respect to the corresponding print dot q 1.

(3) Print dot q1, LQ2, RQ2
When the print data exists in the print control range of the low energy portion shown in FIG.
When there is no print data in q2 and q3, print data is present in print dots LQ2 and RQ2 in the high energy portion shown in FIG. 4C, and there is no print data in Q2 and Q3, q1 = “ 1 ”, q2 =“ 0 ”, q3 =“ 0 ”, Q
2 = “0”, Q3 = “0”, LQ2 = “1”, LQ2 =
It becomes "1".

At this time, the print dot q1 of (1)
As in the case where print data exists in LQ2, FIG.
Period t shown in (B)₈Only the EOR circuit 27 outputs "1".
Output "0" for the other period, and connected to FET1.
The thermal head heater (T _Two-T₈) Only for a period
Heat control.

[0129] By shortening the way by the period t ₈ the heating time, it is possible to prevent the heat accumulation effect in the print dot LQ2, RQ2 high energy portion to the corresponding print dot q1.

When print dots are present in LQ2 and RQ2, the same control as when print dots are present in either LQ2 or RQ2 is performed for the following reason.

That is, in such multi-color printing, it is necessary to clearly output the boundaries of each color, and there are few cases where such bits are present intermittently. This is because there is little requirement for a complicated control circuit necessary for the operation.

(4) When print data exists in the print dots q1, Q2 and LQ2, in the print control range of the low energy portion shown in FIG.
When there is no print data in q2 and q3, there is print data in the print dots Q2 and LQ2 in the high energy portion shown in FIG. 4C, and there is no print data in Q3 and RQ2, q1 = “1” in FIG. , Q2 = “0”, q3 = “0”, Q2
= "1", LQ2 = "1", Q3 = "0", RQ2 =
It becomes "0".

At this time, since q3 = "0" and Q3 = "0", the NAND circuit 20 outputs "1". However, in the NAND circuit 19, although q2 = "0", Q2 = "1" is input to the signal input circuit of q2 via the diode 30. Further by the inverter 23 to the NAND circuit 19, the inverted signal of the GATE C1 signal shown in FIG. 5 (B) is applied, the NAND circuit 19 only during the period t ₆ in FIG. 5 (B) to "0" The other outputs "1".

Since LQ2 = "1", the diode 3
2 to one input circuit of the NAND circuit 26 via "1"
And the output of the EOR circuit 27 is input to the other input circuit. At this time, the inverted signal of GATE C2 shown in FIG. 5B by the inverter 24 and the GAT signal shown in FIG.
Since the inverted signal of the EC3 signal is applied, "1" and "0" of both signals do not coincide with each other, and the period t shown in FIG.
_{For eight, the} EOR circuit 27 outputs “1”, and outputs “0” in other periods. Therefore, the NAND circuit 26 operates in the period t ₈
Only "0" is output, and "1" is output during other periods.

Therefore, the multi-input AND circuit 6-0 has the structure shown in FIG.
The remaining period (t ₇ + t ₉ ) obtained by subtracting the periods t ₆ and t ₈ from the period T ₂ by the STROBE2 signal shown in FIG. 3B outputs “1”, and the multi-input AND circuit 4 and the OR circuit 2 also output this signal. Since “1” is output only during the period (t ₇ + t ₉ ) = T ₂ − (t ₆ + t ₈ ), the FET 1 is also turned on only during this period, and the heater of the thermal head connected to the FET 1 is turned on by [T ₂ − ( t ₆ + t ₈ )] The heating is controlled only for the period.

In this way, by shortening the heating time by the period (t ₆ + t ₈ ), it is possible to prevent the effect of heat accumulation on the printing dots Q2 and LQ2 in the high energy portion with respect to the printing dot q1.

(5) When print data exists in the print dots q1, Q3 and LQ2, in the print control range of the low energy portion shown in FIG.
When there is no print data in q2 and q3, there is print data in print dots Q3 and LQ2 in the high energy portion shown in FIG. 4C, and there is no print data in Q2 and RQ2, q1 = “1” in FIG. , Q2 = “0”, q3 = “0”, Q2
= "0", Q3 = "1", LQ2 = "1", RQ2 =
It becomes "0".

At this time, since q2 = "0" and Q2 = "0", the NAND circuit 19 outputs "1". However, in the NAND circuit 20, although q3 = "0", Q3 = "1" is input to the signal input circuit of q3 via the diode 31. Further, the output of the EOR circuit 21 is input to the other input circuit of the NAND circuit 20. At this time, EOR
Since the inverted signal of the GATE C1 signal shown in FIG. 5B by the inverter 23 and the inverted signal of the GATE C2 signal shown in FIG. No match, FIG. 5 (B)
The EOR circuit 21 outputs “1” only for the period t ₇ shown in FIG.
In other periods, “0” is output. Therefore, the NAND circuit 20
Outputs only the period t ₇ "0", the other period, the output "1".

[0139] Further LQ2 = only for the period t ₈ the NAND circuit 26, as shown when the print data to the print dots q1 and LQ2 of the (1) for the "1" is present and outputs "0", the other During the period, “1” is output.

Therefore, the multi-input AND circuit 6-0 has the structure shown in FIG.
The remaining period (t ₆ + t ₉ ) obtained by subtracting the periods t ₇ and t ₈ from the period T ₂ by the STROBE2 signal shown in FIG. 3B outputs “1”, and the multi-input AND circuit 4 and the OR circuit 2 also output this signal. period _{(t 6 + t 9) =} T 2 - since only (t ₇ + t ₈₎ outputs "1", FET1 becomes oN only this time, the heater of the thermal head connected to FET1 [T ₂ - ( t ₇ + t _8)] for only heating control period.

In this way, by shortening the heating time by the period (t ₇ + t ₈ ), it is possible to prevent the effect of heat accumulation on the printing dots Q3 and LQ2 in the high energy portion with respect to the printing dot q1.

In other cases, the control circuit shown in FIG. 4A can prevent the adverse effect of the print dots in the high energy portion. As described above, according to the present invention, high-energy printing control and low-energy printing control can be performed very accurately, so that printing can be performed accurately even when two colors of data are mixed.

For example, as shown in FIG. 6A, when a black character area B and a red character area R are formed on a sheet of paper, the black area and the red area are clearly printed by the control circuit shown in FIG. can do. However, as shown in FIG. 6B, in a case where black characters are printed on a red background, that is, when a red region R and a black region B are mixed, a low portion of a portion adjacent to the printing of the high energy portion and a low portion of the preceding and following portions are printed. According to the present invention, the character or pattern becomes inaccurate because the low-energy part prints a color close to the high-energy part print due to the high-energy part print when the energy part print is present, according to the present invention. As shown in FIG. 6B, even when a plurality of types of input energy data are mixed, the adverse effect of the high energy data on the low energy data can be effectively controlled, so that even in the case of FIG. ,
Accurate printing can be performed.

In the above description, the embodiments for two energies, high and low, have been described. However, the present invention is not limited to this, but is limited to three, such as high, middle, and low.
Print control for two energies.
In this case, the OR circuit 2 shown in FIGS. 1 and 4 is of a three-input type, and a third input portion thereof has a strobe signal for medium energy and a print control signal (a print (Including a heat history control circuit based on the control range).

The colors are not limited to red and black, but may be green and black, another combination, or a combination of three or more colors. Another embodiment of the present invention will be described.

Some print media, such as Aladdin Card (registered trademark) manufactured by Tokyo Magnetic Printing Co., Ltd., can print when high energy is applied by a thermal head, but change to another color when low energy is applied. There are rewritable media that can erase characters and the like printed with high energy and write character figures and the like again with high energy printing.

The control circuit shown in FIGS. 1 and 4 can be used for such a medium. In this case, S
The TROBE1 signal is set to add high energy for printing, and the STROBE2 signal is set to give low energy for erasing printed characters and the like. In this case, q1, q2, and q3 are print erasure data for performing print erasure control. In this medium, since the setting of the low energy range for erasing is very severe, not only the magnitude of the STROBE2 signal but also the thermal history control based on the presence or absence of the q2 and q3, that is, the heating control based on the print erasure data q2 and q3. In addition, it is preferable to perform energy adjustment.

Thus, a thermal head for a rewritable medium can be provided.

[0149]

According to the present invention, the following effects can be obtained. (1) According to the present invention, not only can the data of the same scan line be printed simultaneously with a plurality of types of energy, but also the effect on the low energy printing portion based on the heat storage of the high energy printing portion can be effectively prevented. Since the suppression can be suppressed, it is not necessary to perform scanning in different color units as in the related art, and printing by a thermal head of a plurality of colors can be performed accurately at high speed.

(2) According to the present invention, not only the data holding means for holding the print data of a plurality of print lines is provided, but also the adverse effect on the low energy printing portion due to the heat storage of the high energy printing portion can be effectively prevented. This allows not only simultaneous printing of data on the same scan line with multiple types of energy, but also thermal history control based on the previous print data. Fine adjustments can be made by the control, and high-speed printing of a precise pattern with beautiful colors and a plurality of colors by a thermal head becomes possible.

(3) According to the present invention, the adverse effect on the low energy portion due to the high energy storage can be effectively suppressed, so that erasing and writing can be performed at high speed and accurately even on a rewritable medium. it can.

[Brief description of the drawings]

FIG. 1 is a control circuit per dot of a thermal head according to the present invention.

FIG. 2 is an explanatory diagram of a control signal applied to the control circuit of FIG. 1;

FIG. 3 is an embodiment of the present invention.

FIG. 4 is a second control circuit per dot of the thermal head according to the present invention.

FIG. 5 is an explanatory diagram of a control signal applied to the control circuit of FIG. 4;

FIG. 6 is an explanatory diagram of a multi-color printing state.

FIG. 7 is an explanatory diagram of printing energy for thermal paper.

FIG. 8 is an explanatory diagram of multicolor printing.

FIG. 9 is a prior art control circuit.

FIG. 10 is an explanatory diagram of control signals applied to the control circuit of FIG. 9;

[Explanation of symbols]

 1 FET 2 OR circuit 3, 4, 5 Multi-input AND circuit 6 AND circuit 7, 8, 9, 10 NAND circuit 11, 12 EOR circuit 13 Output protection circuit 14, 15, 16, 17, 18 Inverter 19, 20 NAND circuit 21 EOR circuit 22, 23, 24 Inverter 30, 31 Diode 40 Shift register 41, 42, 43 Data holding register

Claims (3)

[Claims] 1. A heating unit for heating a plurality of different energies, a heated print body to be heated by the heating unit, and a first unit for performing heating control corresponding to a first energy on the heating unit. Strobe signal input means, and second strobe signal input means for performing heating control corresponding to a second energy to the heating means, wherein print control is performed by the first energy, and a print control range of the corresponding print data is provided. First heating time control means for controlling the heating time of the heating means based on the first strobe signal in accordance with the presence / absence of the print data, and printing control by the second energy, and printing of the corresponding print data A second heating time control unit that controls a heating time of the heating unit based on the second strobe signal in accordance with the presence or absence of print data in a control range; When there is print data which affects printing control by the second energy, the connection means notifies the second heating time control means of the presence of the printing data. Wherein the heating time of the second heating time control means is controlled based on a signal transmitted from the thermal head. 2. A heating unit for heating a plurality of different energies, a print body to be heated by the heating unit, and a first unit for performing heating control corresponding to a first energy on the heating unit. A strobe signal input unit for performing heating control corresponding to a second energy to the heating unit; a data holding unit for holding print data of a plurality of print lines; A first heating time control unit that controls the heating time of the heating unit based on the first strobe signal in accordance with the presence or absence of print data in a print control range of the corresponding print data; The printing is controlled by the second energy, and based on the second strobe signal according to the presence or absence of print data in a print control range of the corresponding print data. Second heating time control means for controlling the heating time of the heating means, and printing is performed by the first energy, and when there is print data which affects printing control by the second energy, the presence of the printing data is determined. A thermal head, comprising: connecting means for notifying the second heating time control means, and controlling the heating time of the second heating time control means based on a signal transmitted from the connection means. 3. A heating unit for heating a plurality of different energies, a print body to be heated by the heating unit, and a first unit for performing a heating control corresponding to a first energy to the heating unit. Strobe signal input means, and second strobe signal input means for performing heating control corresponding to a second energy to the heating means, wherein print control is performed by the first energy, and a print control range of the corresponding print data is provided. First heating time control means for controlling the heating time of the heating means based on the first strobe signal in accordance with the presence / absence of the print data, and heating controlled by the second energy, and the heating time is printed. A second heating control unit that adjusts according to erasure data; and printing is performed using the first energy, and the printing affects printing control using the second energy. Connecting means for notifying the second heating time control means when the print data exists, and controlling the heating time of the second heating time control means based on a signal transmitted from the connection means; A thermal head.