JPH11205278A - Automatic gain control circuit and automatic gain control method for ofdm demodulator - Google Patents
Automatic gain control circuit and automatic gain control method for ofdm demodulatorInfo
- Publication number
- JPH11205278A JPH11205278A JP10002265A JP226598A JPH11205278A JP H11205278 A JPH11205278 A JP H11205278A JP 10002265 A JP10002265 A JP 10002265A JP 226598 A JP226598 A JP 226598A JP H11205278 A JPH11205278 A JP H11205278A
- Authority
- JP
- Japan
- Prior art keywords
- gain control
- signal
- automatic gain
- control
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はディジタル無線通信
システムに用いるＯＦＤＭ（Ｏｒｔｈｏｇｏｎａｌ Ｆ
ｒｅｑｕｅｎｃｙ Ｄｉｖｉｓｉｏｎ Ｍｕｌｔｉｐｌ
ｅｘｉｎｇ）信号の復調器に係り、特に復調器において
受信信号レベルを制御するＡＧＣ（自動利得制御）回路
およびＡＧＣ方法に関する。The present invention relates to an OFDM (Orthogonal F) used in a digital radio communication system.
frequency Division Multipl
More specifically, the present invention relates to an AGC (automatic gain control) circuit and an AGC method for controlling a received signal level in a demodulator.
【０００２】[0002]
【従来の技術】ＯＦＤＭ変調は複数のサブキャリア上に
ＱＰＳＫ（ＱｕａｄａｒａｔｕｒｅＰｈａｓｅ Ｓｈｉ
ｆｔ Ｋｅｙｉｎｇ）等の変調を行う方式である。ＯＦ
ＤＭ変調信号は複数の変調波の合成信号と考えられるた
め、平均振幅に対するピーク振幅の比が大きく振幅変動
が大きい。ディジタル復調器では、アナログ／ディジタ
ル（Ａ／Ｄ）変換をおこなうＡ／Ｄコンバータのダイナ
ミックレンジには限りがあるため、このダイナミックレ
ンジを越えてＡ／Ｄ変換されたディジタル信号は信号歪
みを含んだ形で出力されることになる。通常、無線ＬＡ
Ｎ等の無線通信システムでは、ユーザがいつも同じ受信
レベルのところで信号の送受信をしているわけではな
く。送信アンテナからの距離が近いあるいは距離が遠い
など、各ユーザごとに異なるレベルの信号を受信してい
る。従って、受信信号のレベルをＡ／Ｄコンバータのダ
イナミックレンジ範囲内に抑えることは無線通信システ
ムにとって必須な技術となる。復調器では、この操作を
ＡＧＣ回路で行っており、ＯＦＤＭ復調器においても同
様にＡＧＣ回路が必要不可欠となる。ＡＧＣ回路におい
て受信信号の振幅をダイナミックレンジ内に調節するた
めには、図５に示すように、パケット先頭部の、スター
トシンボル等の信号の前に、ＡＧＣ回路用プリアンブル
信号を送信し、ＡＧＣ回路はこのプリアンブル信号の受
信レベルに基づいて増幅利得の制御を行う。無線ＬＡＮ
等の無線パケット通信では、プリアンブルが長いと無線
区間のスループットが低下するため、ＡＧＣ回路の制御
に必要なプリアンブルの長さは短い方が望ましい。2. Description of the Related Art OFDM modulation employs QPSK (Quadrature Phase Shi) on a plurality of subcarriers.
ft Keying) or the like. OF
Since the DM modulation signal is considered to be a composite signal of a plurality of modulation waves, the ratio of the peak amplitude to the average amplitude is large and the amplitude fluctuation is large. In a digital demodulator, the dynamic range of an A / D converter that performs analog / digital (A / D) conversion is limited. Therefore, a digital signal A / D converted beyond this dynamic range contains signal distortion. It will be output in the form. Normally, wireless LA
In wireless communication systems such as N, users do not always transmit and receive signals at the same reception level. Each user receives a signal at a different level, such as a short distance or a long distance from the transmission antenna. Therefore, suppressing the level of the received signal within the dynamic range of the A / D converter is an essential technique for a wireless communication system. In a demodulator, this operation is performed by an AGC circuit, and an AGC circuit is also indispensable in an OFDM demodulator. In order to adjust the amplitude of the received signal within the dynamic range in the AGC circuit, as shown in FIG. 5, a preamble signal for the AGC circuit is transmitted before a signal such as a start symbol at the head of the packet, and the AGC circuit Controls the amplification gain based on the reception level of the preamble signal. Wireless LAN
In wireless packet communication such as this, if the preamble is long, the throughput in the wireless section is reduced. Therefore, it is desirable that the length of the preamble required for controlling the AGC circuit be short.
【０００３】また、上述したようにＯＦＤＭ変調信号は
振幅変動が大きい。この大きな振幅変動に必要以上に追
従すると変調信号に歪みを生じるが、これをさけるため
にはＡＧＣ回路の時定数を長くとる必要がありＡＧＣ用
プリアンブル長が長くなるという欠点がある。[0003] As described above, the OFDM modulation signal has a large amplitude fluctuation. If this large amplitude fluctuation is followed more than necessary, the modulation signal will be distorted. To avoid this, however, it is necessary to increase the time constant of the AGC circuit, and there is a disadvantage that the preamble length for AGC becomes longer.
【０００４】図４に従来技術のＯＦＤＭ復調器用ＡＧＣ
回路の構成例を示す。従来のＯＦＤＭ復調器用ＡＧＣ回
路はバースト検出回路等同期系回路とＡＧＣ回路が独立
して動作している。図において、ＯＦＤＭ受信信号ａ１
０１はＡＧＣ回路１０１に入力される。ＡＧＣ回路１０
１ではＡＧＣ用プリアンブル信号の受信レベルに基づい
てＡＧＣ回路の利得が一定のＡＧＣ回路出力レベルを得
るように調節される。ＡＧＣ回路出力信号ａ１０２はバ
ースト検出回路１０２に入力されバースト検出が行われ
バースト同期受信信号ａ１０３が出力される。バースト
同期受信信号ａ１０３は直列並列変換回路（Ｓ／Ｐ）１
０３に入力される。直列並列変換回路１０３では、直列
信号を並列信号に変換する。ここで信号の読み込みタイ
ミングを制御してＯＦＤＭ変調信号に付加されたガード
インターバル（ＧＩ）の繰り返しを取り去る。直列並列
変換回路１０３で並列信号ａ１０４に変換された後ＦＦ
Ｔ（高速フーリエ変換）回路１０４に入力され、ＯＦＤ
Ｍ信号から、各サブキャリアごとのＤＱＰＳＫ（Ｄｉｆ
ｆｅｒｅｎｔｉａｌ Ｑｕａｄａｒａｔｕｒｅ Ｐｈａ
ｓｅ Ｓｈｉｆｔ Ｋｅｙｉｎｇ）変調信号ａ１０５に
変換される。遅延検波回路１０５では差動符号化がほど
かれ、並列出力信号ａ１０６を出力する。並列直列変換
回路（Ｐ／Ｓ）１０６では並列出力信号ａ１０６から出
力信号ａ１０７をデータとして出力する。上述したよう
に、従来技術ではＡＧＣ回路とバースト検出回路が個別
に動作し受信信号を復調している。FIG. 4 shows a conventional AGC for an OFDM demodulator.
2 shows a configuration example of a circuit. In a conventional AGC circuit for an OFDM demodulator, a synchronous circuit such as a burst detection circuit and an AGC circuit operate independently. In the figure, an OFDM reception signal a1
01 is input to the AGC circuit 101. AGC circuit 10
In 1, the gain of the AGC circuit is adjusted based on the reception level of the AGC preamble signal so as to obtain a constant AGC circuit output level. The AGC circuit output signal a102 is input to the burst detection circuit 102, where burst detection is performed, and a burst synchronization reception signal a103 is output. The burst synchronization received signal a103 is converted to a serial / parallel converter (S / P) 1
03 is input. The serial / parallel conversion circuit 103 converts a serial signal into a parallel signal. Here, the repetition of the guard interval (GI) added to the OFDM modulated signal is removed by controlling the signal read timing. After being converted to a parallel signal a104 by the serial / parallel conversion circuit 103, the FF
T (fast Fourier transform) circuit 104
From the M signal, DQPSK (Dif
ferential Quadrature Pha
(Shift Keying) modulated signal a105. The differential detection circuit 105 performs differential encoding and outputs a parallel output signal a106. The parallel / serial conversion circuit (P / S) 106 outputs an output signal a107 as data from the parallel output signal a106. As described above, in the related art, the AGC circuit and the burst detection circuit operate individually to demodulate a received signal.
【０００５】[0005]
【発明が解決しようとする課題】無線通信システムで
は、各ユーザが受信レベルの異なる信号を受信する。こ
の受信レベルをＡ／Ｄコンバータのダイナミックレンジ
内に制御調節するのがＡＧＣ回路である。特に、従来の
シングルキャリア変調信号と異なり、ＯＦＤＭ変調信号
は、この大きい振幅変動に対しＡＧＣ回路が追従しない
ようにするためには、従来の構成では、図５（ａ）に示
す様に長いＡＧＣ用プリアンブル信号が必要であった。
しかしながら、パケット通信においてＡＧＣ用プリアン
ブル信号長の増加は、スループットの低下につながり問
題であった。In a wireless communication system, each user receives a signal having a different reception level. The AGC circuit controls and adjusts the reception level within the dynamic range of the A / D converter. In particular, unlike the conventional single carrier modulation signal, the OFDM modulation signal has a long AGC as shown in FIG. 5A in the conventional configuration in order to prevent the AGC circuit from following the large amplitude fluctuation. Preamble signal was required.
However, an increase in the preamble signal length for AGC in packet communication leads to a decrease in throughput, which is a problem.
【０００６】また、スループットの低下を避けるため
に、図５（ｂ）に示すようにＡＧＣ用プリアンブル信号
長を短くすると、ＡＧＣ回路がＯＦＤＭ変調信号自身の
振幅変動に追従し、変調信号を歪ませてしまうという問
題があった。When the length of the AGC preamble signal is shortened as shown in FIG. 5B in order to avoid a decrease in throughput, the AGC circuit follows the amplitude fluctuation of the OFDM modulation signal itself and distorts the modulation signal. There was a problem that would.
【０００７】これらの問題点を図６にまとめて示す。す
なわち、ＡＧＣ回路引き込み時定数が長い、ＡＧＣ用プ
リアンブル長が長いと、長いＡＧＣ用プリアンブル信号
のため、スループットが低下するという問題点がある。
また、ＡＧＣ回路引き込み時定数が短い、ＡＧＣ用プリ
アンブル長が短いと、ＯＦＤＭ変調信号の振幅変動に、
ＡＧＣが追従するため、受信信号が歪むという問題点が
ある。[0007] These problems are summarized in FIG. That is, if the AGC circuit pull-in time constant is long and the AGC preamble length is long, there is a problem that the throughput is reduced due to the long AGC preamble signal.
Also, if the AGC circuit pull-in time constant is short and the AGC preamble length is short, the amplitude fluctuation of the OFDM modulated signal is
Since AGC follows, there is a problem that a received signal is distorted.
【０００８】本発明ではこれら問題を解決し、短いＡＧ
Ｃ用プリアンブル信号で良好な受信信号利得制御が可能
なＯＦＤＭ復調器用自動利得制御回路および自動利得制
御方法を提供することを目的とする。The present invention solves these problems and provides a short AG.
An object of the present invention is to provide an automatic gain control circuit and an automatic gain control method for an OFDM demodulator capable of performing good reception signal gain control with a C preamble signal.
【０００９】[0009]
【課題を解決するための手段】上記目的を達成するため
に本発明のＯＦＤＭ復調器用自動利得制御回路は、入力
した受信信号レベルに応じて出力信号レベルが一定とな
るよう利得制御を行い、その利得制御を行う場合と制御
利得を固定する場合を切替可能な自動利得制御増幅手段
と、前記自動利得制御増幅手段の出力信号を一定時間遅
延させる遅延手段と、前記自動利得制御増幅手段の出力
信号と前記遅延手段の出力信号の相関演算を行い、所定
時間後に繰り返される信号の検出を行うバースト検出手
段と、前記自動利得制御増幅手段の出力信号を前記バー
スト検出手段の出力信号に基づいて離散フーリエ変換し
てＯＦＤＭ信号の復調を行うＯＦＤＭ復調手段と、前記
ＯＦＤＭ復調手段の出力信号を復調してパケット信号の
受信およびパケット信号の終了時刻の検出を行うパケッ
ト信号検出手段と、前記バースト検出手段と前記パケッ
ト信号検出手段の出力信号によって前記自動利得制御増
幅手段を制御する自動利得制御増幅手段制御手段と、を
備えることを特徴とするものである。In order to achieve the above object, an automatic gain control circuit for an OFDM demodulator according to the present invention performs gain control so that an output signal level becomes constant in accordance with an input received signal level. Automatic gain control amplifying means capable of switching between performing gain control and fixing the control gain, delay means for delaying an output signal of the automatic gain control amplifying means for a fixed time, and an output signal of the automatic gain control amplifying means And a burst detecting means for performing a correlation operation between the output signal of the delay means and the signal which is repeated after a predetermined time, and a discrete Fourier signal based on the output signal of the burst detecting means. An OFDM demodulating means for converting and demodulating an OFDM signal; a demodulating means for demodulating an output signal of the OFDM demodulating means to receive and receive a packet signal; Packet signal detection means for detecting the end time of a signal, and automatic gain control amplification means control means for controlling the automatic gain control amplification means by an output signal of the burst detection means and the packet signal detection means. It is a feature.
【００１０】また本発明の自動利得制御方法は、前記Ｏ
ＦＤＭ復調器用自動利得制御回路を用い、受信信号の到
来を待つ状態では自動利得制御増幅手段制御手段は自動
利得制御増幅手段が受信信号レベルに応じて出力信号レ
ベルが一定となるよう利得制御を行う状態に制御し、受
信信号が到来し、自動利得制御増幅手段が受信信号レベ
ルに利得制御を行った後、バースト検出手段がバースト
を検出した場合に自動利得制御増幅手段制御手段は自動
利得制御増幅手段の制御利得を固定するように制御し、
自動利得制御増幅手段制御手段はバースト検出手段がバ
ーストを検出したのに引き続いてパケット信号検出手段
によりパケット信号の検出が行われた場合は自動利得制
御増幅手段の制御利得の固定を継続し、パケット信号の
検出が行われない場合は自動利得制御増幅手段の制御利
得の固定を中止し、受信信号レベルへの利得制御を開始
して新たな受信信号の到来を待ち、さらに自動利得制御
増幅手段制御手段はパケット信号検出手段によりパケッ
ト信号の検出が行われた場合は検出されたパケット信号
の終了時刻に達し次第自動利得制御増幅手段の制御利得
の固定を中止し、受信信号レベルへの利得制御を開始し
て新たな受信信号の到来を待つことを特徴とする。Further, the automatic gain control method of the present invention
In the state of waiting for the arrival of the received signal, the automatic gain control amplification means control means performs gain control so that the automatic gain control amplification means keeps the output signal level constant in accordance with the received signal level using the automatic gain control circuit for the FDM demodulator. After the received signal arrives and the automatic gain control amplifying means performs gain control on the received signal level, when the burst detection means detects a burst, the automatic gain control amplifying means control means controls the automatic gain control amplification. Controlling the control gain of the means to be fixed,
The automatic gain control amplification means control means continues to fix the control gain of the automatic gain control amplification means when the packet signal detection is performed by the packet signal detection means subsequent to the burst detection means detecting the burst. When the signal is not detected, the fixing of the control gain of the automatic gain control amplification means is stopped, the gain control to the reception signal level is started, and the arrival of a new reception signal is waited. The means stops fixing the control gain of the automatic gain control amplifying means as soon as the end time of the detected packet signal is reached when the detection of the packet signal is performed by the packet signal detecting means, and controls the gain to the received signal level. It is characterized by starting and waiting for the arrival of a new received signal.
【００１１】[0011]
【発明の実施の形態】以下図面を参照して本発明の実施
の形態例を詳細に説明する。本発明では、ＡＧＣ回路に
続く、バースト検出手段の出力信号を用いてＡＧＣの受
信信号に対する利得制御動作を制御する。図１は本発明
による復調器の一例を示す構成説明図であり、図２は図
１の復調器の制御方法の一例を示すフローチャートであ
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. In the present invention, the gain control operation for the received signal of the AGC is controlled by using the output signal of the burst detection means following the AGC circuit. FIG. 1 is an explanatory diagram showing an example of a demodulator according to the present invention, and FIG. 2 is a flowchart showing an example of a control method of the demodulator of FIG.
【００１２】まず、図１の復調器の動作について説明す
る。ＯＦＤＭ受信信号ａ２０１は自動利得制御増幅手段
２０１に入力される、自動利得制御増幅手段出力信号ａ
２０２は、遅延手段２０２に入力される。バースト検出
手段２０３では、自動利得制御増幅手段出力信号ａ２０
２と遅延手段出力信号ａ２０３を用いて、バースト検出
が行われる。バースト検出手段出力信号ａ２０４は自動
利得制御増幅手段制御手段２０４に入力され、自動利得
制御増幅手段２０１を制御する、自動利得制御増幅手段
制御手段出力信号ａ２０７が出力される。一方、自動利
得制御増幅手段出力信号ａ２０２はＯＦＤＭ復調手段２
０５に入力され、バースト検出手段出力ａ２０４に基づ
いたタイミングで離散フーリエ変換により出力データａ
２０５が得られる。出力データの中にはパケット符号検
出情報も含まれており次のパケット信号検出に用いる。
このパケット信号検出は、ユニークワード検出とパケッ
トの物理層のヘッダ情報による検査を共に含んでいる。
ユニークワード検出に失敗すれば、その時点で自動利得
制御回路の保持を終了する。また、物理層のヘッダ情報
による検査に失敗したときも同様である。共に成功した
ときのみパケット長全体に渡る利得制御値の保持を行
う。これを実現するパケット信号検出手段２０６でパケ
ット信号の検出が行われ、パケット信号検出手段出力信
号ａ２０６が出力される。この出力信号ａ２０６は、同
様に自動利得制御増幅手段制御手段２０４に入力され
る。First, the operation of the demodulator shown in FIG. 1 will be described. The OFDM reception signal a201 is input to the automatic gain control amplification means 201, and the automatic gain control amplification means output signal a
202 is input to the delay unit 202. In the burst detecting means 203, the automatic gain control amplifying means output signal a20
2 and the delay means output signal a203, burst detection is performed. The burst detection means output signal a204 is input to the automatic gain control amplification means control means 204, and the automatic gain control amplification means control means output signal a207 for controlling the automatic gain control amplification means 201 is output. On the other hand, the output signal a202 of the automatic gain control amplification means is
05 and output data a by discrete Fourier transform at a timing based on the burst detection means output a204.
205 is obtained. The output data also includes packet code detection information, which is used for detecting the next packet signal.
This packet signal detection includes both a unique word detection and a check based on header information of the physical layer of the packet.
If the unique word detection fails, the holding of the automatic gain control circuit ends at that point. The same applies when the inspection based on the physical layer header information fails. Only when both succeed, the gain control value is retained over the entire packet length. The packet signal is detected by the packet signal detecting means 206 which realizes this, and the packet signal detecting means output signal a206 is output. This output signal a206 is similarly input to the automatic gain control amplification means control means 204.
【００１３】この復調器の具体的動作は以下の通りであ
る。動作を図２のフローチャートを用いて説明する。Ａ
ＧＣ回路では１シンボル以内のＡＧＣ用プリアンブル信
号で収束するように時定数を調整する。ＡＧＣ用プリア
ンブル信号の後には、バースト検出を行うための同期用
プリアンブル信号が送信され、バースト検出部ではこの
同期用プリアンブル信号を用いてバーストを検出する。
同期用プリアンブル信号は、ある固定パターンに対する
ＯＦＤＭ変調波を２回繰り返した信号であり、このＯＦ
ＤＭ変調波は遅延検波に用いるスタートシンボルをかね
ることができる。バースト検出回路では、この同期用プ
リアンブル信号において、一定時間後の信号との相関を
とり、その相関値のピーク検出によりバーストを検出す
る。このピーク検出タイミングを利用して、ＡＧＣ回路
の制御動作を受信中のパケット内では停止し、そのとき
の制御利得を保持する。このＡＧＣ回路の制御利得を固
定させることにより、大きな振幅変動を持つＯＦＤＭ変
調信号が、ＡＧＣ回路に入力されても、この振幅変動に
追従することなく利得制御が可能になる。さらに、バー
スト検出に続く、次のパケット信号検出においては、ま
ずスタートシンボルの次に送信されるユニークワードの
検出を行う。このときにユニークワード検出が成功すれ
ば、ＡＧＣ回路の制御利得保持を行いながら、さらに次
のステップに進む。また、このユニークワード検出に失
敗するとＡＧＣ回路で制御利得を固定せずに再び動作さ
せ、次のパケットに備える。ユニークワード検出の次の
ステップはパケットの物理層ヘッダ情報の検査を行いこ
れに基づいたＡＧＣ回路での制御利得の固定か解除かの
判断を行う。物理層ヘッダ情報がきちんと判定されれ
ば、パケット長時間が復調器でわかるので、パケット長
時間全体に渡る規定時間の間、ＡＧＣ回路の制御利得保
持が行われる。この規定時間が経過した後、ＡＧＣ回路
の制御利得固定動作はだだちに解除され、新たな受信パ
ケットを待つ状態に移る。しかし、物理層へッダ情報が
きちんと判定されないときには、ユニークワード検出の
場合と同様にＡＧＣ回路の制御利得の固定解除が直ちに
行われる。また、無線ＬＡＮ等のシステムでは、このス
タートシンボルによるバースト検出によりＯＦＤＭ信号
のシンボルタイミングも検出できるため、特にユニーク
ワードを持たずにスタートシンボルがユニークワードの
機能を兼ねるシステムも考えられる。このときには上述
したパケット信号検出手段でのユニークワード検出によ
る制御は行われない。The specific operation of this demodulator is as follows. The operation will be described with reference to the flowchart of FIG. A
The GC circuit adjusts the time constant so as to converge with the AGC preamble signal within one symbol. After the AGC preamble signal, a synchronization preamble signal for performing burst detection is transmitted, and the burst detection unit detects a burst using the synchronization preamble signal.
The synchronization preamble signal is a signal obtained by repeating the OFDM modulation wave for a certain fixed pattern twice, and
The DM modulation wave can serve as a start symbol used for differential detection. In the burst detection circuit, the synchronization preamble signal is correlated with a signal after a predetermined time, and a burst is detected by detecting a peak of the correlation value. Using this peak detection timing, the control operation of the AGC circuit is stopped in the packet being received, and the control gain at that time is held. By fixing the control gain of the AGC circuit, even if an OFDM modulated signal having a large amplitude fluctuation is input to the AGC circuit, the gain can be controlled without following the amplitude fluctuation. Further, in the next packet signal detection subsequent to the burst detection, first, a unique word transmitted after the start symbol is detected. At this time, if the unique word detection is successful, the process proceeds to the next step while maintaining the control gain of the AGC circuit. If the unique word detection fails, the AGC circuit operates again without fixing the control gain to prepare for the next packet. In the next step of the unique word detection, the physical layer header information of the packet is examined, and based on this, it is determined whether the control gain in the AGC circuit is fixed or released. If the physical layer header information is properly determined, the packet long time can be known by the demodulator, so that the control gain of the AGC circuit is maintained for a specified time over the entire packet long time. After the lapse of the specified time, the control gain fixing operation of the AGC circuit is immediately released, and the operation shifts to a state of waiting for a new received packet. However, when the physical layer header information is not properly determined, the fixed release of the control gain of the AGC circuit is immediately performed as in the case of the unique word detection. In a system such as a wireless LAN, the symbol timing of an OFDM signal can also be detected by the burst detection using the start symbol. Therefore, a system in which the start symbol also has a unique word function without having a unique word can be considered. At this time, the control based on the unique word detection by the packet signal detecting means described above is not performed.
【００１４】このように本発明ではＡＧＣ用プリアンブ
ル信号を短縮し、ＯＦＤＭ変調信号のピークに反応する
ことのない安定動作が可能な自動利得制御が可能にな
る。また、本発明では複数の情報を用いてＡＧＣ回路の
制御動作固定時間を制御することになり、ＡＧＣ回路の
誤動作を防ぐ効果も高まる。As described above, according to the present invention, it is possible to shorten the AGC preamble signal and perform automatic gain control capable of performing a stable operation without responding to the peak of the OFDM modulation signal. Further, in the present invention, the control operation fixed time of the AGC circuit is controlled using a plurality of pieces of information, and the effect of preventing malfunction of the AGC circuit is enhanced.
【００１５】図３は本発明によるＯＦＤＭ復調器用自動
利得制御回路の一例を示す構成説明図である。本例で
は、バースト検出出力信号を用いてＡＧＣ回路を制御す
るところまでを示している。本例はＤＱＰＳＫの復調に
遅延検波を用いている。図において、ＯＦＤＭ受信信号
ａ１は自動利得制御増幅手段のＡＧＣ回路１に入力され
る。ＡＧＣ回路１ではＡＧＣ用プリアンブル信号に基づ
いて受信ＯＦＤＭ変調信号振幅が調節される。ＡＧＣ回
路出力信号ａ２は遅延手段の遅延回路２に入力されＡＧ
Ｃ回路出力信号の遅延が行われる。遅延回路２の出力信
号ａ３は共役複素信号生成回路（（）*）３に入力され
る。共役複素出力信号ａ４は、ＡＧＣ回路出力信号ａ２
と乗算回路４で乗算される。乗算回路出力信号ａ５は移
動平均フィルタ５に入力される。フィルタ５では乗算回
路出力信号ａ５の平均化が行われる。フィルタ出力信号
ａ６は自乗回路（Ｉ2 ＋Ｑ2 ）６に入力され自乗回路出
力信号ａ７を出力する。また、ＡＧＣ回路出力信号ａ２
は自乗回路（Ｉ2 ＋Ｑ2 ）７で自乗回路出力信号ａ８に
変換される。その後、移動平均フィルタ８に入力され
る。フィルタ８では自乗回路出力信号ａ８の平均化が行
われる。フィルタ８の出力信号ａ９は自乗回路（（）
2 ）９に入力され、自乗回路出力信号ａ１０として出力
される。ピーク検出回路１０では、自乗回路信号ａ７と
自乗回路出力信号ａ１０とに碁づいたピーク検出が行わ
れる。ピーク検出回路出力信号ａ１１は、自動利得制御
増幅手段制御手段の制御回路１７に入力される。制御回
路１７ではパケット検出信号ａ１８も入力される。これ
らの入力信号ａ１１、ａ１８に基づいてＡＧＣ回路１を
制御する制御信号ａ１９が出力され、これがＡＧＣ回路
１に入力され、ＡＧＣ回路１の制御利得値を固定させ
る。前記共役複素信号生成回路３、乗算回路４、移動平
均フィルタ５、自乗回路６、自乗回路７、移動平均フィ
ルタ８、自乗回路９、ピーク検出回路１０はバースト検
出手段を構成する。FIG. 3 is an explanatory diagram showing an example of an automatic gain control circuit for an OFDM demodulator according to the present invention. In this example, up to the point where the AGC circuit is controlled using the burst detection output signal is shown. In this example, differential detection is used for DQPSK demodulation. In the figure, an OFDM reception signal a1 is input to an AGC circuit 1 of an automatic gain control amplifier. The AGC circuit 1 adjusts the amplitude of the received OFDM modulation signal based on the AGC preamble signal. The AGC circuit output signal a2 is input to the delay circuit 2
The output signal of the C circuit is delayed. The output signal a3 of the delay circuit 2 is input to the conjugate complex signal generation circuit (() * ) 3. The conjugate complex output signal a4 is an AGC circuit output signal a2
Is multiplied by the multiplication circuit 4. The multiplication circuit output signal a5 is input to the moving average filter 5. The filter 5 averages the multiplication circuit output signal a5. The filter output signal a6 is input to the squaring circuit (I 2 + Q 2 ) 6 and outputs a squaring circuit output signal a7. Also, the AGC circuit output signal a2
Is converted into a squared circuit output signal a8 by a squared circuit (I 2 + Q 2 ) 7. Then, it is input to the moving average filter 8. The filter 8 averages the square circuit output signal a8. The output signal a9 of the filter 8 is a squared circuit (()
2 ) It is input to 9 and output as a squared circuit output signal a10. The peak detection circuit 10 performs peak detection based on the square circuit signal a7 and the square circuit output signal a10. The peak detection circuit output signal a11 is input to the control circuit 17 of the automatic gain control amplification means control means. The control circuit 17 also receives a packet detection signal a18. A control signal a19 for controlling the AGC circuit 1 is output based on these input signals a11 and a18, and is input to the AGC circuit 1 to fix the control gain value of the AGC circuit 1. The conjugate complex signal generation circuit 3, the multiplication circuit 4, the moving average filter 5, the squaring circuit 6, the squaring circuit 7, the moving average filter 8, the squaring circuit 9, and the peak detection circuit 10 constitute burst detection means.
【００１６】以上、ＡＧＣ回路１からピーク検出回路１
０までの構成が本発明のＯＦＤＭ復調器の特徴とすると
ころであり、それぞれ、自動利得制御増幅手段、遅延手
段、共役複素演算手段、相関演算手段、相関出力平均手
段、自乗演算手段、第１の自乗演算手段、受信電力平均
手段、第２の自乗演算手段、ピーク検出手段に対応して
いる。As described above, the AGC circuit 1 to the peak detection circuit 1
0 is a feature of the OFDM demodulator according to the present invention. The automatic gain control amplifying means, the delay means, the conjugate complex calculating means, the correlation calculating means, the correlation output averaging means, the square calculating means, and the first It corresponds to the square calculating means, the received power averaging means, the second square calculating means, and the peak detecting means.
【００１７】また、ピーク検出回路出力信号ａ１１はＦ
ＦＴのウィンドウ制御回路１１に入力され、ウィンドウ
制御回路出力信号ａ１２を出力する。一方、受信信号ａ
１に基づくＡＧＣ回路出力信号ａ２はバースト検出手段
で信号処理を行う間、遅延回路１２で遅延され、遅延受
信信号ａ１３が直列並列変換回路（Ｓ／Ｐ）１３に出力
される。直列並列変換回路１３では、ＦＦＴウィンドウ
制御回路出力信号ａ１２を用いて直列信号を並列信号ａ
１４に変換する。ここで信号の読み込みタイミングを制
御してＯＦＤＭ変調信号に付加されたガードインターバ
ル（ＧＩ）の繰り返しを除去する。直列並列変換回路１
３で並列信号ａ１４に変換された後ＦＦＴ回路１４に入
力され、ＯＦＤＭ信号から、各サブキャリアごとのＤＱ
ＰＳＫ変調信号ａ１５に変換され遅延検波回路１５に出
力される。遅延検波回路１５では差動符号化がほどか
れ、並列出力信号ａ１６を出力する。並列直列変換回路
（Ｐ／Ｓ）１６では並列出力信号ａ１６から出力信号ａ
１７をデータとして出力する。The output signal a11 of the peak detection circuit is F
It is input to the FT window control circuit 11 and outputs a window control circuit output signal a12. On the other hand, the reception signal a
The AGC circuit output signal a2 based on 1 is delayed by the delay circuit 12 while the signal processing is performed by the burst detection means, and the delayed reception signal a13 is output to the serial / parallel conversion circuit (S / P) 13. The serial / parallel conversion circuit 13 converts the serial signal into a parallel signal a using the FFT window control circuit output signal a12.
Convert to 14. Here, the signal read timing is controlled to remove the repetition of the guard interval (GI) added to the OFDM modulated signal. Serial-to-parallel conversion circuit 1
3 is converted into a parallel signal a14, and then input to the FFT circuit 14, where the DQ for each subcarrier is obtained from the OFDM signal.
The signal is converted into a PSK modulation signal a15 and output to the differential detection circuit 15. The differential detection circuit 15 performs differential encoding, and outputs a parallel output signal a16. The parallel / serial conversion circuit (P / S) 16 converts the parallel output signal a16 to the output signal a.
17 is output as data.
【００１８】[0018]
【発明の効果】以上述べたように本発明によれば、短い
ＡＧＣ用プリアンブル信号で良好な受信信号利得制御が
可能なＯＦＤＭ復調器用自動利得制御回路および自動利
得制御方法を提供することができる。As described above, according to the present invention, it is possible to provide an automatic gain control circuit and an automatic gain control method for an OFDM demodulator capable of performing good reception signal gain control with a short AGC preamble signal.
【図１】本発明に係る復調器の一例を示す構成説明図で
ある。FIG. 1 is an explanatory diagram illustrating a configuration of an example of a demodulator according to the present invention.
【図２】本発明に係る復調器の制御方法の一例を示すフ
ローチャートである。FIG. 2 is a flowchart illustrating an example of a demodulator control method according to the present invention.
【図３】本発明の一実施形態例を示す構成説明図であ
る。FIG. 3 is a configuration explanatory view showing an embodiment of the present invention.
【図４】従来の復調器を示す構成説明図である。FIG. 4 is a configuration explanatory view showing a conventional demodulator.
【図５】（ａ）は従来のＡＧＣ用プリアンブル長が長い
ときのＡＧＣ回路用プリアンブル信号を示す説明図であ
り、（ｂ）は従来のＡＧＣ用プリアンブル長が短いとき
のＡＧＣ回路用プリアンブル信号を示す説明図である。FIG. 5A is an explanatory diagram illustrating a conventional AGC circuit preamble signal when the conventional AGC preamble length is long, and FIG. 5B is a diagram illustrating an AGC circuit preamble signal when the conventional AGC preamble length is short. FIG.
【図６】従来の問題点を示した図である。FIG. 6 is a diagram showing a conventional problem.
ａ１ ＯＦＤＭ受信信号 ａ２ ＡＧＣ回路出力信号 ａ３ 遅延回路出力信号 ａ４ 共役複素出力信号 ａ５ 乗算回路出力信号 ａ６ フィルタ出力信号 ａ７ 自乗回路出力信号 ａ８ 自乗回路出力信号 ａ９ フィルタ出力信号 ａ１０ 自乗回路出力信号 ａ１１ ピーク検出回路出力信号 ａ１２ ウィンドウ制御回路出力信号 ａ１３ 遅延受信信号 ａ１４ 並列信号 ａ１５ ＤＱＰＳＫ変調信号 ａ１６ 並列出力信号 ａ１７ 出力信号 ａ１８ パケット検出信号 ａ１９ 制御信号 １ ＡＧＣ回路 ２ 遅延回路 ３ 共役複素信号生成回路 ４ 乗算回路 ５ 移動平均フィルタ ６ 自乗回路 ７ 自乗回路 ８ 移動平均フィルタ ９ 自乗回路 １０ ピーク検出回路 １１ ＦＦＴウィンドウ制御回路 １２ 遅延回路 １３ 直列並列変換回路 １４ ＦＦＴ回路 １５ 遅延検波回路 １６ 並列直列変換回路 １７ 制御回路 ａ１０１ ＯＦＤＭ受信信号 ａ１０２ ＡＧＣ回路出力信号 ａ１０３ バースト同期受信信号 ａ１０４ 並列信号 ａ１０５ ＤＱＰＳＫ変調信号 ａ１０６ 並列出力信号 ａ１０７ 出力信号 １０１ ＡＧＣ回路 １０２ バースト検出回路 １０３ 直列並列変換回路 １０４ ＦＦＴ回路 １０５ 遅延検波回路 １０６ 並列直列変換回路 ａ２０１ ＯＦＤＭ受信信号 ａ２０２ 自動利得制御増幅手段出力信号 ａ２０３ 遅延手段出力信号 ａ２０４ バースト検出手段出力信号 ａ２０５ 出力データ ａ２０６ パケット信号検出手段出力信号 ａ２０７ 自動利得制御増幅手段制御手段出力信号 ２０１ 自動利得制御増幅手段 ２０２ 遅延手段 ２０３ バースト検出手段 ２０４ 自動利得制御増幅手段制御手段 ２０５ ＯＦＤＭ復調手段 ２０６ パケット信号検出手段 a1 OFDM reception signal a2 AGC circuit output signal a3 Delay circuit output signal a4 Conjugate complex output signal a5 Multiplier circuit output signal a6 Filter output signal a7 Square circuit output signal a8 Square circuit output signal a9 Filter output signal a10 Square circuit output signal a11 Peak detection Circuit output signal a12 Window control circuit output signal a13 Delayed reception signal a14 Parallel signal a15 DQPSK modulation signal a16 Parallel output signal a17 Output signal a18 Packet detection signal a19 Control signal 1 AGC circuit 2 Delay circuit 3 Conjugate complex signal generation circuit 4 Multiplication circuit 5 Moving average filter 6 Square circuit 7 Square circuit 8 Moving average filter 9 Square circuit 10 Peak detection circuit 11 FFT window control circuit 12 Delay circuit 13 Serial / parallel conversion circuit 14 FFT circuit 15 Delay detection circuit 16 Column serial conversion circuit 17 Control circuit a101 OFDM reception signal a102 AGC circuit output signal a103 Burst synchronization reception signal a104 Parallel signal a105 DQPSK modulation signal a106 Parallel output signal a107 Output signal 101 AGC circuit 102 Burst detection circuit 103 Serial / parallel conversion circuit 104 FFT circuit Reference Signs List 105 delay detection circuit 106 parallel-to-serial conversion circuit a201 OFDM reception signal a202 automatic gain control amplification means output signal a203 delay means output signal a204 burst detection means output signal a205 output data a206 packet signal detection means output signal a207 automatic gain control amplification means control means Output signal 201 Automatic gain control amplification means 202 Delay means 203 Burst detection means 204 Automatic gain control amplification means control means 205 OFDM demodulation means 206 packet signal detecting means
───────────────────────────────────────────────────── フロントページの続き (72)発明者 高梨 斉 東京都新宿区西新宿三丁目19番２号 日本 電信電話株式会社内 (72)発明者 守倉 正博 東京都新宿区西新宿三丁目19番２号 日本 電信電話株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hitoshi Takanashi 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo Japan Telegraph and Telephone Corporation (72) Inventor Masahiro Morikura 3-19, Nishishinjuku, Shinjuku-ku, Tokyo No. 2 Nippon Telegraph and Telephone Corporation
Claims (2)
号レベルが一定となるよう利得制御を行い、その利得制
御を行う場合と制御利得を固定する場合を切替可能な自
動利得制御増幅手段と、 前記自動利得制御増幅手段の出力信号を一定時間遅延さ
せる遅延手段と、 前記自動利得制御増幅手段の出力信号と前記遅延手段の
出力信号の相関演算を行い、所定時間後に繰り返される
信号の検出を行うバースト検出手段と、 前記自動利得制御増幅手段の出力信号を前記バースト検
出手段の出力信号に基づいて離散フーリエ変換してＯＦ
ＤＭ信号の復調を行うＯＦＤＭ復調手段と、 前記ＯＦＤＭ復調手段の出力信号を復調してパケット信
号の受信およびパケット信号の終了時刻の検出を行うパ
ケット信号検出手段と、 前記バースト検出手段と前記パケット信号検出手段の出
力信号によって前記自動利得制御増幅手段を制御する自
動利得制御増幅手段制御手段と、 を備えることを特徴とするＯＦＤＭ復調器用自動利得制
御回路。1. An automatic gain control amplification unit that performs gain control so that an output signal level is constant according to an input received signal level, and that can switch between a case where the gain control is performed and a case where a control gain is fixed. Delay means for delaying the output signal of the automatic gain control amplification means for a predetermined time; correlation calculation between the output signal of the automatic gain control amplification means and the output signal of the delay means to detect a signal repeated after a predetermined time A burst detecting means, and a discrete Fourier transform of the output signal of the automatic gain control amplifying means based on the output signal of the burst detecting means, and OF
OFDM demodulation means for demodulating a DM signal; packet signal detection means for demodulating an output signal of the OFDM demodulation means for receiving a packet signal and detecting the end time of the packet signal; the burst detection means and the packet signal An automatic gain control circuit for an OFDM demodulator, comprising: automatic gain control amplification means control means for controlling the automatic gain control amplification means according to an output signal of a detection means.
得制御回路を用い、 受信信号の到来を待つ状態では自動利得制御増幅手段制
御手段は自動利得制御増幅手段が受信信号レベルに応じ
て出力信号レベルが一定となるよう利得制御を行う状態
に制御し、受信信号が到来し、自動利得制御増幅手段が
受信信号レベルに利得制御を行った後、 バースト検出手段がバーストを検出した場合に自動利得
制御増幅手段制御手段は自動利得制御増幅手段の制御利
得を固定するように制御し、 自動利得制御増幅手段制御手段はバースト検出手段がバ
ーストを検出したのに引き続いてパケット信号検出手段
によりパケット信号の検出が行われた場合は自動利得制
御増幅手段の制御利得の固定を継続し、 パケット信号の検出が行われない場合は自動利得制御増
幅手段の制御利得の固定を中止し、受信信号レベルへの
利得制御を開始して新たな受信信号の到来を待ち、 さらに自動利得制御増幅手段制御手段はパケット信号検
出手段によりパケット信号の検出が行われた場合は検出
されたパケット信号の終了時刻に達し次第自動利得制御
増幅手段の制御利得の固定を中止し、受信信号レベルへ
の利得制御を開始して新たな受信信号の到来を待つこと
を特徴とする自動利得制御方法。2. The automatic gain control amplifying means control means for using the automatic gain control circuit for an OFDM demodulator according to claim 1 wherein the automatic gain control amplifying means controls the output signal in accordance with the level of the received signal. When the received signal arrives and the automatic gain control amplifier controls the gain to the received signal level, and the burst detector detects the burst, the automatic gain is controlled. The control amplifying means control means controls the control gain of the automatic gain control amplifying means to be fixed, and the automatic gain control amplifying means control means controls the packet signal detection by the packet signal detecting means following the detection of the burst by the burst detecting means. If the detection is performed, the control gain of the automatic gain control amplifier is fixed.If the packet signal is not detected, the automatic gain control is performed. The fixing of the control gain of the width means is stopped, the gain control to the received signal level is started, and the arrival of a new received signal is waited. If performed, stop fixing the control gain of the automatic gain control amplifier as soon as the end time of the detected packet signal is reached, start gain control to the received signal level, and wait for the arrival of a new received signal. An automatic gain control method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10002265A JP2968954B2 (en) | 1998-01-08 | 1998-01-08 | Automatic gain control circuit for OFDM demodulator and automatic gain control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10002265A JP2968954B2 (en) | 1998-01-08 | 1998-01-08 | Automatic gain control circuit for OFDM demodulator and automatic gain control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11205278A true JPH11205278A (en) | 1999-07-30 |
| JP2968954B2 JP2968954B2 (en) | 1999-11-02 |
Family
ID=11524552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10002265A Expired - Lifetime JP2968954B2 (en) | 1998-01-08 | 1998-01-08 | Automatic gain control circuit for OFDM demodulator and automatic gain control method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2968954B2 (en) |
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