JPH11194751A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of excellently displaying a picture in a high resolution in which the number of picture elements increases and bit rate of serial video data increases, by providing a margin to processing time intervals of a sample-hold circuit in one S/P converter. SOLUTION: Plural systems of S/P converters and D/A converter to convert serial video data SVD1 -SVDN into parallel video data PVD1 -PVDN are arranged in parallel. The data of each picture element composing the serial video data SVD inputted to input terminal 6 are converted into parallel video data PVD1 - PVDN by using plural S/P converters 111 -11N for each line. The parallel video data PVD1 -PVDN are converted into analog video signals SV1 -SVN by the corresponding D/A converters 121 -12N, and then, supplied to the corresponding signal lines of the liquid-crystal display panel 15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a digital input type liquid crystal display device. More specifically, serial video data is input, and the data of each pixel constituting the serial video data is distributed to a plurality of serial / parallel conversion means and converted into parallel data. The present invention relates to a liquid crystal display device in which a processing time interval of a sample and hold circuit in a serial / parallel conversion means has a margin, and the number of pixels increases to increase the bit rate of serial video data. is there.

[0002]

2. Description of the Related Art Heretofore, video signals input to a liquid crystal display device used as a display of a personal computer or the like have been mainly analog signals. However, with the rapid digitization of peripheral devices in recent years, the number of digitalized input video signals in liquid crystal display devices has been increasing. However, in the case of such a digital input method, since the video signal is input to the liquid crystal display device as n-bit parallel data, if the number of bits of the video signal is increased in order to improve the image quality, the input terminal corresponding thereto is increased. We need to increase the number. Increasing the number of input terminals causes problems such as the influence of disturbance such as static electricity on the input terminals and the reliability of the terminal connection portion.

In order to solve this problem, n-bit parallel data as a video signal for determining the display state of a liquid crystal display panel is converted into serial data and input to the liquid crystal display device, and the serial data is stored in the liquid crystal display device. There has been proposed a liquid crystal display device capable of reducing the number of input terminals by returning the data to n-bit parallel data again by using a serial / parallel converter provided in the device.

A liquid crystal display device 10 shown in FIG. 3 is a liquid crystal display device to which serial video data is input. An analog video signal SV is input to an input terminal 6 of the liquid crystal display device 10 by an A / D (analog / digital) converter 2 to generate n-bit parallel video data PVD (D _0).
.. Dn _-1 ), which are further converted by a P / S (parallel / serial) converter 4 into serial video data SVD and supplied.

FIG. 4 shows a conventional liquid crystal display device 10 described above.
1 shows a schematic configuration of the embodiment. The liquid crystal display device 10 has an input terminal 6 for inputting serial video data SVD.
And an S / P (serial / parallel) converter 11 for converting the input serial video data SVD into n-bit parallel video data PVD, and converting the parallel video data PVD output from the S / P converter 11 into analog video data. D / A (digital / analog) for converting to signal SV
Converter 12, liquid crystal display panel 15, D / A converter 1
A selector 14 that distributes pixel signals constituting each line of the analog video signal SV output from the N 2 to the N signal lines X _{1 to} X _N of the liquid crystal display panel 15 and supplies them to the D / A
Buffer 1 arranged between converter 12 and selector 14
3 are provided. As a result, an image corresponding to the serial video data SVD input to the input terminal 6 is displayed on the liquid crystal display panel 15.

FIG. 5 shows a specific configuration of the S / P converter 11. The S / P converter 11, the n-number of the sample and hold circuit 20 ₀ to 20 _n-1, and an n number of sample and hold circuits 21 ₀ through 21 _n-1 is constructed. In this case, the serial video data SVD is input to the sample-and-hold circuit 20 ₀ ~20 _n-1, an input each of these sample and hold circuits 20 ₀ ~20 _n-1 of the output signal to the sample hold circuit 21 ₀ through 21 _{n -1} Is done.

[0007] In such a configuration, the sample and hold circuit 20 ₀ ~20 _n-1, the serial video data SV
For each bit data of D (FIG. 6A), sampling pulses φ0 to φn−1 are supplied at timings shown in FIG. 6B, and bit data D _{0 to} D _{n− 1} are sequentially sampled and held. Also, the sample hold circuit 21 ₀
The through 21 _n-1, is supplied the sampling pulse φr at the timing shown in FIG. 6C, bit data D ₀ ~D _n-1 is held is sampled simultaneously. Thus from the sample-and-hold circuit 21 ₀ ~21 _n-1, n-bit parallel video data PVD is output.

[0008]

In the conventional liquid crystal display device 10 described above, the S / P converter 11 and the D / P converter 11 respond to the input serial video data SVD.
Only one system of the A converter 12 is provided. That is, all the serial data of the N pixels constituting the serial video data SVD of each line are converted into parallel data by the S / P converter 11. Therefore, the processing time interval of the sample and hold circuit of the S / P converter 11 has no margin.

Therefore, when the number of pixels increases and the bit rate of the serial video data SVD increases, the S / P
Conversion processing is difficult, and it is difficult to perform high-resolution display.

Therefore, according to the present invention, the processing time interval of the sample-and-hold circuit in one S / P converter has a margin, and a high-resolution display in which the number of pixels increases and the bit rate of serial video data increases is excellent. It is an object of the present invention to provide a liquid crystal display device which can be performed at a time.

[0011]

A liquid crystal display device according to the present invention comprises: an input terminal for serial video data; serial / parallel conversion means for converting serial video data input to the input terminal into parallel data; Digital / analog conversion means for converting parallel video data output from the parallel conversion means into an analog signal, and an analog video signal output from the digital / analog conversion means, and a liquid crystal display for displaying an image based on the analog video signal A liquid crystal display device comprising a panel and a plurality of serial / parallel conversion means and digital / analog conversion means provided in parallel.

[0012] Serial video data input to the input terminal is supplied to a plurality of S / P converters. And
The data of each pixel constituting the serial video data is distributed to a plurality of S / P converters and converted into parallel video data. The parallel video data output from the plurality of S / P converters is converted into an analog video signal by a corresponding D / A converter. And a plurality of D
An analog video signal output from the / A converter is supplied to a corresponding signal line of the liquid crystal display panel.

As a result, it is possible to provide a margin for the processing time interval of the sample-and-hold circuit in one serial / parallel conversion means, and to achieve high-resolution display in which the number of pixels increases and the bit rate of serial video data increases. Can be done.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration of a liquid crystal display device 100 according to the first embodiment. In the first embodiment, when the number of signal lines of the liquid crystal display panel is N, the S / P converter and the D /
A converter is provided in N systems in parallel. FIG.
In the figure, the parts corresponding to those in FIG. 4 are denoted by the same reference numerals.

The liquid crystal display device 100 has an input terminal 6 for inputting serial video data SVD, and N S / P converters for converting the input serial video data SVD into n-bit parallel video data PVD. 11
_{1 to} 11 _N. These S / P converters 11 ₁
To 11 _N are each configured similarly to the S / P converter 11 in the liquid crystal display device 10 shown in FIG. 4 (see FIG. 5). In these S / P converter 11 ₁ to 11 _N, respectively, for each line, one pixel of the serial data of N pixels constituting the serial video data in the line is converted into parallel data.

Further, the liquid crystal display device 100, S / P converter 11 ₁ to 11 N-number of D / A converter 12 ₁ to 12 for converting parallel video data PVD to an analog video signal SV outputted respectively from the _{N N} and LCD panel 15
If, for each line, D / A converter 12 ₁ to 12 _N analog video signal SV ₁ Sv _N the N signal lines X ₁ ~ of the liquid crystal display panel 15 as pixel signals of the line to be outputted from the and a buffer 13 ₁ to 13 _N and supplies the X _N.

In the above configuration, the serial video data SVD input to the input terminal 6 is transmitted to the S / P converter 11
It is supplied to the _{1 ~11 N.} Then, this S / P converter 11
_In each of _{1 to} 11 _N , _one pixel of serial data of N pixels constituting serial video data of the line is converted into parallel data for each line. For example, 1
Serial data _{d 1 [D 0 ~D n-} 1] of the N pixels constituting the serial video data _{line, d 2 [D 0 ~D n} -1],
... When a _{d N [D 0 ~D n-} 1], only the S / P converter 11 _{1, d 1 [D 0 ~D n-} 1] is converted into parallel data, S / P converter 11 only in _{2 d 2 [D 0 ~D n} -1] it is converted into parallel data, as well as the S / P converter 1
1, ₃ to 11 _N, respectively _{d 3 [D 0 ~D n-} 1] ~d N [D
_{0 to} D _{n -1} ] are converted into parallel data.

The parallel data output from the S / P converters 11 _{1 to} 11 _N are respectively converted into D / A converters 12 ₁
N12 _N and converted to an analog signal. Then, D / A converter 12 ₁ to 12 analog video signal SV ₁ is outputted from the _N Sv _N, respectively buffers 13 ₁ ~
_13N through the N signal lines X ₁ to X of the liquid crystal display panel 15.
It is supplied to the X _N. Therefore, the N signal lines X ₁ to X _N of the liquid crystal display panel 15, line by line, the analog video signal SV ₁ Sv _N supply according to the serial data of N pixels constituting the serial video data for the line Is done. Thus, the input terminal 6 is provided on the liquid crystal display panel 15.
The image corresponding to the serial video data SVD input to the device is displayed.

As described above, in the first embodiment, each of the S / P converters 11 _{1 to} 11 _N performs the S / P conversion process only once per line. Therefore, FIG.
S / P converter and D / A as in the liquid crystal display device 10 shown in FIG.
S / P converter 11 ₁ compared to one having a single converter
In this case, it is possible to provide a margin for the processing time interval of the sample-and-hold circuit in each of N.about.11 _N , and it is possible to favorably perform high-resolution display in which the number of pixels increases and the bit rate of serial video data increases.

Next, a second embodiment of the present invention will be described. FIG. 2 shows a configuration of a liquid crystal display device 110 according to the second embodiment. In the second embodiment, the signal lines of the liquid crystal display panel 15 are N (= 4).
× Q) When the number is Q, the S / P converter and the D / A converter are provided in Q system in parallel. 2, parts corresponding to those in FIG. 1 are denoted by the same reference numerals.

The liquid crystal display device 110 has an input terminal 6 for inputting serial video data SVD, and Q S / P converters for converting the input serial video data SVD into n-bit parallel video data PVD. 11
And a _{1 ~11 Q.} These S / P converters 11 ₁
11 to 11 _Q have the same configuration as the S / P converter 11 in the liquid crystal display device 10 shown in FIG. 4 (see FIG. 5). In these S / P converter 11 ₁ to 11 _Q, respectively, for each line, the Q pixel interval of serial data of N pixels constituting the serial video data for the line 4
The pixels are converted into parallel data.

Further, the liquid crystal display device 110 includes a latch unit 30 ₁ to 30 for latching the parallel video data PVD ₁ ~PVD _Q of four pixels are sequentially output from the S / P converter 11 ₁ to 11 _Q in each line and _Q, the latches portions 30 ₁ to 30 _Q
Analog video signal SV ₁ more parallel video data PVD ₁ ~PVD _Q of four pixels are sequentially output in each line
And a number Q of the D / A converter 12 ₁ to 12 _Q for converting the Sv _Q. Latch unit 30 ₁ to 30 _Q are respectively provided with four latch circuits.

Further, the liquid crystal display device 110 includes a liquid crystal display panel 15, D / A converter 12 ₁ than to 12 _Q, the analog video signal SV ₁ of four pixels are sequentially output in each line
The Sv _Q, corresponding selectively supplying the selector 14 ₁ to 14 _Q to the signal lines of the liquid crystal display panel 15, an analog video signal SV ₁ outputted from the D / A converter 12 ₁ to 12 _Q
Sv _Q respectively and a buffer 13 ₁ to 13 _Q to the selector 14 ₁ to 14 _Q. Here, the switching of the four latch circuits of the output switching the selector 14 ₁ to 14 output signal lines in _Q of the latch unit 30 ₁ to 30 _Q is performed in conjunction with each other.

In the above configuration, the serial video data SVD input to the input terminal 6 is transmitted to the S / P converter 11
It is supplied to the _{1 ~11 Q.} Then, this S / P converter 11
In ₁ to 11 _Q, respectively, for each line, four pixels Q pixel interval of serial data of N pixels constituting the serial video data in the line is converted into parallel data. For example, serial data of N pixels constituting one line of serial video data is d ₁ [D _{0 to} D _n−1 ], d _{2
[D 0 ~D n-1]} , ····, when a _{d N [D 0 ~D n- 1} ], the S / P converter _{11 1 d 1 [D 0 ~D} n-1], d
_{Q + 1 [D 0 ~D n} -1], d 2Q + 1 [D 0 ~D n-1], d
_{3Q + 1} [D _{0 to} D _n-1 ] is converted into parallel data, and S /
P converter 11 _{2, d 2 [D 0 ~D n-} 1], d Q + 2 [D 0 ~D
_{n-1], d 2Q +} 2 [D 0 ~D n-1], d 3Q + 2 [D 0 ~D n-1]
Is converted into parallel data, and the S / P converter 11 ₃
Similarly, in the case of ４11 _Q , four pixels at the Q pixel interval are converted into parallel data.

Further, S / P converter 11 ₁ to 11 4 pixels parallel video data PVD sequentially output in each line from _{Q 1 ~PVD Q} is supplied to the latch unit 30 ₁ to 30 _Q respectively latch Is done. Then, these latch units 30
The parallel video data PVD _{1 to} PVD _Q for 4 pixels sequentially output on each line from ₁ to 30 _Q are D / A
The analog video signal S supplied to the converters 12 _{1 to} 12 _Q
It is converted to V _{1 to} SV _Q.

The analog video signals SV _{1 to} SV _Q for four pixels sequentially output from the D / A converters 12 _{1 to} 12 _Q on each line are respectively supplied to buffers 13 _{1 to} 13 _Q and selectors 14 _{1 to} 14. _The signal is supplied to the corresponding signal line of the liquid crystal display panel 15 through _Q. Therefore, the liquid crystal display panel 1
An analog video signal relating to serial data of N pixels constituting serial video data of the line is supplied to the N signal lines of 5 for each line. As a result, an image corresponding to the serial video data SVD input to the input terminal 6 is displayed on the liquid crystal display panel 15.

As described above, in the second embodiment, the S / P converters 11 _{1 to} 11 _Q perform the S / P conversion process four times at one Q pixel interval on each line. Therefore, as compared with a liquid crystal display device 10 shown in FIG. 4 having one S / P converter and one D / A converter, the S / P
Converter 11 ₁ to 11 _Q of the processing time interval of the sample-and-hold circuit can impart a margin at each be favorably performing display of high resolution bit rate increases the serial video data increases the number of pixels it can. When the number of signal lines of the liquid crystal display panel 15 is N (= 4 × Q), the S / P converter and the D / A converter are provided in parallel with the Q system, and the first system shown in FIG. There is an advantage that the circuit scale can be reduced as compared with the embodiment.

In the second embodiment shown in FIG. 2, the system of the S / P converter and the D / A converter is provided by １ ／ of the number of signal lines of the liquid crystal display panel 15. But,
This is an example, and the present invention is not limited to this. The point is that the number of systems may be set so as to allow a margin for the processing time interval of the sample and hold circuit in the S / P converter.

[0029]

According to the present invention, serial video data is input, and the data of each pixel constituting the serial video data is distributed to a plurality of S / P converters and converted into parallel data. Is what you do. Therefore, a margin can be given to the processing time interval of the sample and hold circuit in one S / P converter, and high resolution display in which the number of pixels increases and the bit rate of serial video data increases can be performed satisfactorily. it can.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to a first embodiment.

FIG. 2 is a block diagram illustrating a configuration of a liquid crystal display device according to a second embodiment.

FIG. 3 is a block diagram showing a schematic configuration of a serial data input type liquid crystal display device.

FIG. 4 is a block diagram illustrating a configuration of a conventional liquid crystal display device.

FIG. 5 is a block diagram showing a specific configuration of an S / P converter.

FIG. 6 is a timing chart showing a sampling timing of a sample and hold circuit constituting the S / P converter.

[Explanation of symbols]

6 ... input terminal, 11 _{1 to} 11 _N ... S / P converter,
12 _{1 to} 12 _N ... D / A converter, 13 _{1 to} 13 _N ...
Buffer, 14 ₁ to 14 _Q ... selector, 15 ... liquid crystal display _{panel, 20 0 ~20 n-1,} 21 0 ~21 n-1 ···
Sample hold circuit, 30 ₁ to 30 _Q: Latch,
100, 110: liquid crystal display device

Claims (4)

[Claims] An input terminal for serial video data, serial / parallel conversion means for converting serial video data input to the input terminal into parallel data, and parallel video data output from the serial / parallel conversion means. Digital / Analog conversion
A liquid crystal display device comprising: an analog conversion unit; and a liquid crystal display panel to which an analog video signal output from the digital / analog conversion unit is supplied and which displays an image based on the analog video signal. And a plurality of digital / analog conversion means provided in parallel. 2. When the number of signal lines of the liquid crystal display panel is N, the plurality of systems are N systems, and the serial / parallel conversion means of the N systems respectively provide a serial video signal for each line. One pixel of serial data of N pixels constituting data is converted into parallel data, and an analog video signal related to the serial data of the N pixels output from the N-system digital / analog conversion means is converted to the liquid crystal display panel. 2. The liquid crystal display device according to claim 1, wherein the signal is supplied to each of the N signal lines. 3. When the number of signal lines of the liquid crystal display panel is N, the plurality of systems are M systems (M <N). In the M serial / parallel conversion means, One pixel or a plurality of discontinuous pixels of the N-pixel serial data constituting the serial video data of the line are converted into parallel data, and the N-pixel serial data output from the M-system digital / analog conversion means. The liquid crystal display device according to claim 1, wherein the analog video signals according to (1) and (2) are respectively supplied to the N signal lines of the liquid crystal display panel. 4. The digital / analog conversion means outputs between the liquid crystal display panel and a digital / analog conversion means of the same system as the serial / parallel conversion means for converting the discontinuous plural pixels into parallel data. 4. The liquid crystal display device according to claim 3, further comprising a selector for distributing and supplying the analog video signals of the plurality of pixels to corresponding signal lines of the liquid crystal display panel.