JPH11191634A - Semiconductor light-emitting device - Google Patents

Semiconductor light-emitting device

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Publication number
JPH11191634A
JPH11191634A JP35834997A JP35834997A JPH11191634A JP H11191634 A JPH11191634 A JP H11191634A JP 35834997 A JP35834997 A JP 35834997A JP 35834997 A JP35834997 A JP 35834997A JP H11191634 A JPH11191634 A JP H11191634A
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semiconductor
lead
light emitting
electrode
chip resistor
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JP35834997A
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Japanese (ja)
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Takeshi Sano
武志 佐野
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Sanken Electric Co Ltd
サンケン電気株式会社
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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

PROBLEM TO BE SOLVED: To prevent the generation of the electrostatic breakdown of a semiconductor light-emitting device. SOLUTION: A chip resistor 8 is rigidly fixed on at least one side of first and second leads 3 and 4, both ends of the resistor 8 are respectively connected electrically with first and second electrodes 13 and 14 of a semiconductor light- emitting element 2, and at the same time, the resistor 8 is covered with a resin encapsulating material 5. Since the electrical energy of static electricity which is applied between the leads 3 and 4 is radiated through the resistor 8, an electrostatic energy of such a level as to break the element 2 is not applied between the electrodes 13 and 14 of the element 2, and the element 2 can be protected from static electricity.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【発明の属する技術分野】本発明は、半導体発光装置、 BACKGROUND OF THE INVENTION The present invention relates to a semiconductor light emitting device,
特に静電破壊を防止できる半導体発光装置に関する。 To a semiconductor light emitting device capable of preventing electrostatic breakdown.

【0002】 [0002]

【従来の技術】半導体発光素子としてGaN(窒化ガリウム)系半導体チップを使用した半導体発光装置(発光ダイオード装置)は公知である。 The semiconductor light emitting device using a GaN (gallium nitride) based semiconductor chip 2. Description of the Related Art As a semiconductor light emitting element (light-emitting diode device) are known. この発光ダイオード装置では、青色系から緑色系の発光色が得られ、様々な用途に利用されることが期待されている。 In this light-emitting diode device, greenish emission color is obtained from the blue, it is expected to be utilized in a variety of applications.

【0003】 [0003]

【発明が解決しようとする課題】ところで、この種のG The object of the invention is to be Solved by the way, this kind of G
aN系半導体素子を発光素子として使用した発光ダイオード装置は、数ある発光ダイオード装置の中でも特に静電破壊に弱いことが明らかとなった。 Light emitting diode device using aN based semiconductor device as a light emitting element, weak especially electrostatic breakdown among other light-emitting diode device was revealed. 従来では、この種の発光ダイオード装置では、静電破壊を十分に防止できないのが実情である。 Conventionally, in this type of light emitting diode device is a fact is not sufficiently prevent electrostatic breakdown.

【0004】本発明は、静電破壊を防止できる半導体発光装置を提供することを目的とする。 [0004] The present invention aims to provide a semiconductor light emitting device capable of preventing electrostatic breakdown.

【0005】 [0005]

【課題を解決するための手段】本発明による半導体発光装置は、第1のリード(3)及び第2のリード(4) The semiconductor light-emitting device according to the present invention SUMMARY OF], the first lead (3) and a second lead (4)
と、第1のリード(3)及び第2のリード(4)の少なくとも一方に固着された発光半導体素子(2)と、第1 When, the first lead (3) and a second lead (4) of the light-emitting semiconductor element fixed to at least one (2), first
のリード(3)と発光半導体素子(2)との間を電気的に接続する第1の金属細線(6a)と、発光半導体素子(2)と第2のリード(4)との間を電気的に接続する第2の金属細線(6b)と、発光半導体素子(2)、第1の金属細線(6a)、第2の金属細線(6b)、第1 The first thin metal wires (6a), electricity between the light-emitting semiconductor device (2) and the second lead (4) for the electrical connection between the lead (3) and the light-emitting semiconductor device (2) a second metal thin wire (6b) for connecting light-emitting semiconductor device (2), the first metal thin wire (6a), a second metal thin wire (6b), the first
のリード(3)及び第2のリード(4)の上端側を被覆する樹脂封止体(5)とを備えている。 Comprises of a lead (3) and a second resin sealing body (5) covering the upper side of the lead (4). 第1のリード(3)及び第2のリード(4)の少なくとも一方にチップ抵抗(8)を固着し、チップ抵抗(8)の両端を発光半導体素子(2)の第1の電極(13)と第2の電極(14)とに電気的に接続すると共に、チップ抵抗(8)を樹脂封止体(5)により被覆する。 First lead (3) and fixing a chip resistor (8) in at least one of the second lead (4), light emitting semiconductor devices at both ends of the chip resistor (8) (2) a first electrode (13) If well as electrically connected to the second electrode (14), the chip resistor (8) is covered with a resin sealing body (5).

【0006】第1のリード(3)と第2のリード(4) [0006] The first lead (3) and the second lead (4)
の間に印加される静電気の電気エネルギはチップ抵抗(8)を通じて放出されるため、発光半導体素子(2) The electrical energy of the static electricity applied between the order to be released through the chip resistor (8), light emitting semiconductor devices (2)
を破壊するレベルの静電エネルギーが発光半導体素子(2)の第1の電極(13)及び第2の電極(14)間に印加されず、発光半導体素子(2)を静電気から保護できる。 Electrostatic energy level to break is not applied between the first electrode (13) and the second electrode of the light emitting semiconductor element (2) (14) to be protected emitting semiconductor device (2) from static electricity. また、約3MΩの高い抵抗値を有するチップ抵抗(8)を通るリーク電流は発光半導体素子(2)のリーク電流の検査時の特性測定上又は使用上に無視できる程度のレベルである。 Also, the leakage current through the chip resistor (8) having a highly about 3MΩ resistance is level negligible on or Usage characteristic measurement during a test of the leak current of the light emitting semiconductor element (2).

【0007】本発明の実施の形態では、チップ抵抗(8)は半導体チップ(2)と共に第1のリード(3) [0007] In the embodiment of the present invention, the chip resistor (8) is first read together with the semiconductor chip (2) (3)
及び第2のリード(4)の少なくとも一方に形成された皿状の支持板(15)に接着される。 And it is bonded to the second lead dish-like support plate formed on at least one of (4) (15). 発光半導体素子(2)は、基板(9)と、基板(9)の上面に形成された半導体基体(12)とを備えている。 Emitting semiconductor device (2) includes a substrate (9), a substrate formed on the upper surface (9) a semiconductor substrate (12). 半導体基体(1 Semiconductor substrate (1
2)は第1の半導体領域(10)及び第2の半導体領域(11)から成る。 2) consists of a first semiconductor region (10) and a second semiconductor region (11). 半導体基体(12)の上部には段差部(12a)が形成される。 At the top of the semiconductor substrate (12) stepped portion (12a) is formed. 第1の半導体領域(10) The first semiconductor region (10)
に第1の電極(13)が設けられ、第2の半導体領域(11)に第2の電極(14)が設けられる。 The first electrode (13) is provided, the second electrode (14) is provided in the second semiconductor region (11). 第1の電極(13)は第1の金属細線(6a)により第1のリード(3)に接続され、第2の電極(14)は第2の金属細線(6b)によりチップ抵抗(8)に接続され、チップ抵抗(8)は第3の金属細線(6c)により第2のリード(4)に接続される。 The first electrode (13) is connected to the first lead (3) by a first metal thin wire (6a), a second electrode (14) is a chip resistor with a second metal thin wire (6b) (8) It is connected to the chip resistor (8) is connected to the second lead (4) by the third metal thin wire (6c). 第1のリード(3)の上部には、第1の突起部(3a)と、第1の突起部(3a)から離間して形成された第2の突起部(3b)と、第1の突起部(3a)と第2の突起部(3b)との間に設けられた凹部(3c)とが形成される。 On top of the first lead (3), the first protrusion and (3a), a second protruding portion formed spaced apart from the first protrusion (3a) and (3b), first and the recess (3c) provided is formed between the protruding portion and (3a) and a second protrusion (3b). 発光半導体素子(2)の第1の電極(13)は、第1の金属細線(6 The first electrode of the light emitting semiconductor element (2) (13), a first metal thin wire (6
a)によって第1の突起部(3a)に電気的に接続される。 It is electrically connected to the first protrusion by a) (3a). 発光半導体素子(2)の基板(9)は、導電性接着剤(16)によって凹部(3c)に形成された支持板(15)の底面に接着される。 Light emitting substrate of the semiconductor element (2) (9) is adhered to the bottom surface of the recess a support plate formed in (3c) (15) by a conductive adhesive (16). チップ抵抗(8)の上面と下面にはそれぞれ上面電極(17)と下面電極(1 Upper and respectively the lower surface upper surface electrode (17) and the lower electrode of the chip resistor (8) (1
8)が設けられる。 8) is provided. 下面電極(18)は、導電性接着剤(16)によって第1のリード(3)の皿状支持板(1 The lower electrode (18) is dish-like support plate of the first lead by an electrically conductive adhesive (16) (3) (1
5)の底面に固着されて、第1のリード(3)及び金属細線(6a)を介して半導体素子(2)の第1の電極(13)に電気的に接続される。 5) it is fixed to the bottom surface of and is electrically connected to the first electrode of the semiconductor element (2) (13) via a first lead (3) and the metal thin wire (6a). 発光半導体素子(2) Emitting semiconductor device (2)
の第2の電極(14)は第2の金属細線(6b)によりチップ抵抗(8)の上面電極(17)に接続される。 A second electrode (14) of which is connected to the upper electrode (17) of the chip resistor (8) by a second metal thin wire (6b). チップ抵抗(8)の上面電極(17)は、第3の金属細線(6c)により第2のリード(4)に接続される。 The upper electrode of the chip resistor (8) (17) are connected by a third metal thin wire (6c) to the second lead (4). チップ抵抗(8)は非直線抵抗体であってもよい。 Chip resistor (8) may be non-linear resistor.

【0008】 [0008]

【発明の実施の形態】以下、GaN系発光ダイオード装置に適用した本発明による半導体発光装置の実施の形態を図1〜図3について説明する。 BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the semiconductor light-emitting device according to the present invention applied to a GaN-based light-emitting diode device for FIGS explaining.

【0009】本実施形態の発光ダイオード装置(1) [0009] light emitting diode device of the present embodiment (1)
は、第1のリード(3)及び第2のリード(4)と、第1のリード(3)に固着された発光ダイオードチップ(2)及びチップ抵抗(8)と、第1のリード(3)と発光ダイオードチップ(2)との間を電気的に接続する第1の金属細線(6a)と、発光ダイオードチップ(2)とチップ抵抗(8)との間を電気的に接続する第2の金属細線(6b)と、チップ抵抗(8)と第2のリード(4)との間を電気的に接続する第3の金属細線(6c)と、外囲体として機能する樹脂封止体(5)とを備えている。 Includes a first lead (3) and a second lead (4), a light emitting diode chip fixed to the first lead (3) (2) and the chip resistor (8), a first lead (3 ) and the light emitting diode first thin metal wires for electrically connecting between the chip (2) (6a), the light emitting diode chip (2) and the second electrically connecting the chip resistor (8) a metal thin wire (6b), and the third thin metal wires for electrically connecting between the chip resistor (8) and the second lead (4) (6c), the resin functions as the outer surrounding body sealing body (5) and a. 樹脂封止体(5)は光透過性樹脂から成り、発光ダイオードチップ(2)、チップ抵抗(8)、 Resin sealing body (5) is made of a light transmitting resin, a light emitting diode chip (2), the chip resistor (8),
皿状支持板(15)、第1の金属細線(6a)〜第3の金属細線(6c)並びに第1のリード(3)及び第2のリード(4)の上端側を被覆する。 Dish-like support plate (15), covering the upper side of the first metal thin wire (6a) ~ third metal thin wire (6c) and a first lead (3) and a second lead (4).

【0010】発光ダイオードチップ(2)は、図2に示すように、サファイア基板(9)と、サファイア基板(9)の上面に形成された半導体基体(12)とを備えている。 [0010] LED chip (2), as shown in FIG. 2, a sapphire substrate (9), and a semiconductor body formed on the upper surface of the sapphire substrate (9) (12). 半導体発光素子としてのGaN系半導体からなる半導体基体(12)は周知のエピタキシャル成長法によって形成されたn形GaN半導体領域(第1の半導体領域)(10)及びp形GaN半導体領域(第2の半導体領域)(11)から成る。 A GaN-based semiconductor as a semiconductor light emitting device semiconductor body (12) is well-known n-type GaN semiconductor region formed by epitaxial growth method (first semiconductor region) (10) and the p-type GaN semiconductor region (second semiconductor consisting region) (11). 半導体基体(12)の上部には段差部(12a)が形成され、n形GaN半導体領域(10)に第1の電極(カソード電極)(13)が接続され、p形GaN半導体領域(11)に第2の電極(アノード電極)(14)が接続される。 Step portion on the top of the semiconductor substrate (12) (12a) is formed, the first electrode (cathode electrode) (13) is connected to the n-type GaN semiconductor region (10), p-type GaN semiconductor region (11) the second electrode (anode electrode) (14) is connected to.

【0011】発光ダイオードチップ(2)のカソードリードとして機能する第1のリード(3)の上部には、第1の突起部(3a)と、第1の突起部(3a)から離間して形成された第2の突起部(3b)と、第1の突起部(3a)と第2の突起部(3b)との間に設けられた凹部(3c)とが形成される。 [0011] The upper portion of the first lead which serves as a cathode lead of the LED chip (2) (3), the first protrusion and (3a), spaced from the first protrusion (3a) forming a second protrusion which is (3b), and the recess (3c) provided is formed between the first protrusion and (3a) and a second protrusion (3b). 凹部(3c)に形成された皿状の支持板(ヘッダ)(15)の底面には導電性接着剤(16)によって発光ダイオードチップ(2)のサファイア基板(9)が固着される。 Sapphire substrate (9) is fixed in the recess dish-like support plate formed in (3c) (header) light emitting diode chip by a bottom surface (15) the conductive adhesive (16) (2). 第1の突起部(3a) First protrusion (3a)
と発光ダイオードチップ(2)の第1の電極(13)との間は、金属細線(6a)によって電気的に接続される。 Between the light emitting diode first electrode of the chip (2) (13) are electrically connected by a metal thin wire (6a).

【0012】図1に示すように、抵抗値約3MΩのチップ型抵抗であるチップ抵抗(8)の上面と下面にはそれぞれ上面電極(17)と下面電極(18)が設けられる。 [0012] As shown in FIG. 1, lower electrode (18) are provided respectively on the upper and lower surfaces of the chip resistor is a chip type resistor of the resistance value of about 3 milliohms (8) upper electrode (17). 下面電極(18)は、導電性接着剤(16)によって第1のリード(3)の皿状支持板(15)の底面に固着され、第1のリード(3)及び金属細線(6a)を介して発光ダイオードチップ(2)の第1の電極(13) The lower electrode (18), the conductive adhesive by (16) is secured to the bottom surface of the dish-like support plate (15) of the first lead (3), the first lead (3) and the metal thin lines (6a) through light-emitting diode first electrode of the chip (2) (13)
に電気的に接続される。 It is electrically connected to. 発光ダイオードチップ(2)の第2の電極(14)は金属細線(6b)によりチップ抵抗(8)の上面電極(17)に接続される。 A second electrode of the light emitting diode chip (2) (14) is connected to the upper surface electrode (17) of the chip resistor of a metal thin wire (6b) (8). チップ抵抗(8)の上面電極(17)は、金属細線(6c)により第2のリード(4)の上端に接続される。 The upper electrode of the chip resistor (8) (17) is connected to the upper end of the second lead by a metal thin wire (6c) (4). 第1の金属細線(6a)〜第3の金属細線(6c)は周知のワイヤボンディング方法によって接続される。 The first metal thin wire (6a) ~ third metal thin wire (6c) are connected by a well-known wire bonding method. この結果、第2のリード(4)は、金属細線(6c)、チップ抵抗(8) As a result, the second lead (4) is a metal thin wire (6c), the chip resistor (8)
の上面電極(17)及び金属細線(6b)を介して発光ダイオードチップ(2)の第2の電極(14)に電気的に接続され、発光ダイオードチップ(2)のアノードリードとして機能する。 The upper electrode (17) and electrically connected to the second electrode (14) of the metal thin wire (6b) via a light emitting diode chip (2), functions as a light emitting diode the anode lead of the chip (2). 図3は、発光ダイオードチップ(2)の第1の電極(13)と第2の電極(14)間にチップ抵抗(8)を並列に接続した本実施の形態の発光ダイオード装置の等価回路を示す。 Figure 3 is an equivalent circuit of the first electrode (13) and second electrode (14) light-emitting diode device of the present embodiment connecting a chip resistor (8) in parallel between the light emitting diode chip (2) show.

【0013】第1のリード(3)と第2のリード(4) [0013] The first lead (3) and the second lead (4)
の間に印加される静電気の電気エネルギはチップ抵抗(8)を通じて放出されるため、発光ダイオードチップ(2)を破壊するレベルの静電エネルギーが発光ダイオードチップ(2)の第1の電極(13)及び第2の電極(14)間に印加されず、発光ダイオードチップ(2) Since the electrical energy of the static electricity applied between the emitted through the chip resistor (8), the light emitting diode first electrode (13 chip-level electrostatic energy emitting diode chip to destroy (2) (2) ) and not applied to the second electrode (14) between a light emitting diode chip (2)
を静電気から保護できる。 The can be protected from static electricity. また、約3MΩの高い抵抗値を有するチップ抵抗(8)を通るリーク電流は発光ダイオードチップ(2)のリーク電流の検査時の特性測定上又は使用上に無視できる程度のレベルである。 Also, the leakage current through the chip resistor (8) having a highly about 3MΩ resistance is level negligible on or Usage characteristic measurement during a test of the leak current of the light emitting diode chip (2).

【0014】本発明の実施の形態は前記の例に限定されず、種々の変更が可能である。 [0014] Embodiments of the present invention is not limited to the examples above, and various modifications are possible. 例えば、第1のリード(3)に接着する代わりに、発光半導体素子(2)及びチップ抵抗(8)を第2のリード(4)に接着したり、 For example, instead of adhering to the first lead (3), or adhered to a light-emitting semiconductor device (2) and the chip resistor (8) a second lead (4),
第1のリード(3)に発光半導体素子(2)又はチップ抵抗(8)を接着すると共に、第2のリード(4)に発光半導体素子(2)又はチップ抵抗(8)を別個に接着してもよい。 With bonding the light-emitting semiconductor device (2) or chip resistor (8) to the first lead (3), separately bonded a light emitting semiconductor device (2) or chip resistor (8) to the second lead (4) it may be. 第2の金属細線(6b)を第2のリード(4)に直接接続してもよい。 The second metal thin lines (6b) may be directly connected to the second lead (4). 半導体基体(12)は図2に示す形状に限られない。 Semiconductor body (12) is not limited to the shape shown in FIG. 例えば、半導体基体(1 For example, the semiconductor substrate (1
2)の上部に段差部(12a)を形成しなくてもよい。 On top of 2) it may not be formed stepped portion (12a).
チップ抵抗(8)は必要に応じて種々の抵抗値を選択することが可能である。 Chip resistor (8) is capable of selecting various resistor values ​​as necessary. また、チップ抵抗(8)は一般の抵抗体ではなくバリスタ等の非直線抵抗体を用いることもできる。 The chip resistor (8) can also be used a non-linear resistor such as a varistor instead of the ordinary resistor. 非直線抵抗体は一般の抵抗よりもリーク電流の面で有利である。 Nonlinear resistor is advantageous in terms of leakage current than ordinary resistor. 半導体発光素子としてGaN(窒化ガリウム)系半導体チップを使用する代わりに、GaP Instead of using a GaN (gallium nitride) based semiconductor chip as a semiconductor light-emitting device, GaP
(ガリウム燐)系、GaAs(砒化ガリウム)系等他の発光ダイオード装置又は半導体レーザ装置に本発明を適用することができる。 It is possible to apply the present invention (gallium phosphide) system, a GaAs (gallium arsenide) system such as another light emitting diode device or a semiconductor laser device.

【0015】 [0015]

【発明の効果】前記のように、発光半導体素子に印加される静電気の電気エネルギをチップ抵抗を通じて放出できるため、発光半導体素子の静電破壊を防止することができ、半導体発光装置を使用する電子回路の信頼性を高めることができる。 [Effect of the Invention] As described above, since the electric energy of the static electricity applied to the light emitting semiconductor device capable of emitting through the chip resistor, it is possible to prevent electrostatic breakdown of the light-emitting semiconductor device, using a semiconductor light-emitting device electron it is possible to improve the reliability of the circuit.

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】 本発明による発光ダイオード装置の断面図 Cross-sectional view of a light emitting diode device according to the invention; FIG

【図2】 発光ダイオードチップの断面図 2 is a cross-sectional view of the light-emitting diode chips

【図3】 発光ダイオード装置の等価回路図 Equivalent circuit diagram of Figure 3 light-emitting diode device

【符号の説明】 DESCRIPTION OF SYMBOLS

1・・発光ダイオード装置、 2・・発光ダイオードチップ(発光半導体素子)、 3・・第1のリード、 4 1 · light emitting diode device, 2 ... light-emitting diode chips (emitting semiconductor device), 3 ... first lead, 4
・・第2のリード、 5・・樹脂封止体、 6a・・第1の金属細線、 6b・・第2の金属細線、 6c・・ ... second lead, 5 ... resin sealing body, 6a ... first thin metal wire, 6b ... second thin metal wires, 6c ...
第3の金属細線、 8・・チップ抵抗、 9・・基板、 Third metal thin wire, 8 ... chip resistor, 9 ... substrate,
10・・n形GaN半導体領域(第1の半導体領域)、 11・・p形GaN半導体領域(第2の半導体領域)、 12・・半導体基体、 13・・第1の電極、 14・・第2の電極、 15・・支持板、 16 10 ... n-type GaN semiconductor region (first semiconductor region), 11 ... p-type GaN semiconductor region (second semiconductor region), 12 ... semiconductor substrate, 13 ... first electrode, 14 ... first second electrode, 15 ... support plate 16
・・導電性接着剤、 17・・上面電極、 18・・下面電極、 ... conductive adhesive 17 ... upper electrode, 18 ... lower electrode,

Claims (8)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 第1のリード及び第2のリードと、前記第1のリード及び第2のリードの少なくとも一方に固着された発光半導体素子と、前記第1のリードと発光半導体素子との間を電気的に接続する第1の金属細線と、前記発光半導体素子と前記第2のリードとの間を電気的に接続する第2の金属細線と、前記発光半導体素子、第1 And 1. A first lead and the second lead, between the first lead and a light emitting semiconductor element fixed to at least one of the second leads, said first lead and the light emitting semiconductor element a second thin metal wires for electrically connecting the first metal thin wire for electrically connecting, between the light emitting semiconductor element and the second lead, the light emitting semiconductor device, the first
    の金属細線、第2の金属細線、第1のリード及び第2のリードの上端側を被覆する樹脂封止体とを備えた半導体発光装置において、 前記第1のリード及び第2のリードの少なくとも一方にチップ抵抗を固着し、 該チップ抵抗の両端を前記発光半導体素子の第1の電極と第2の電極とに電気的に接続し、 前記チップ抵抗を前記樹脂封止体により被覆したことを特徴とする半導体発光装置。 Of thin metal wires, a second thin metal wires, in the semiconductor light-emitting device having a resin sealing body which covers the upper side of the first lead and the second lead, at least the first lead and the second lead on the other hand, fixing a chip resistor, the two ends of the chip resistor electrically connected to the first electrode and the second electrode of the light emitting semiconductor device, in that the chip resistor was covered with the resin sealing body the semiconductor light emitting device according to claim.
  2. 【請求項2】 前記チップ抵抗は前記半導体チップと共に前記第1のリード及び第2のリードの少なくとも一方に形成された皿状の支持板に接着される請求項1に記載の半導体発光装置。 Wherein said chip resistor semiconductor light emitting device according to claim 1 which is bonded to the dish-like support plate formed on at least one of the first lead and the second lead with the semiconductor chip.
  3. 【請求項3】 前記発光半導体素子は、基板と、該基板の上面に形成された半導体基体とを備え、 該半導体基体は第1の半導体領域及び第2の半導体領域から成り、 前記半導体基体の上部には段差部が形成され、 前記第1の半導体領域に第1の電極が設けられ、前記第2の半導体領域に第2の電極が設けられた請求項1又は2に記載の半導体発光装置。 Wherein the light emitting semiconductor device includes a substrate and a semiconductor body formed on the upper surface of the substrate, the semiconductor substrate comprises a first semiconductor region and the second semiconductor region, of said semiconductor body the step portion is formed in the upper, the first electrode disposed on the first semiconductor region, the semiconductor light-emitting device according to claim 1 or 2, a second electrode provided on the second semiconductor region .
  4. 【請求項4】 前記第1の電極は第1の金属細線により前記第1のリードに接続され、前記第2の電極は前記第2の金属細線により前記チップ抵抗に接続され、該チップ抵抗は第3の金属細線により前記第2のリードに接続された請求項1〜3のいずれか1項に記載の半導体発光装置。 Wherein said first electrode is connected to said first lead by a first metal thin wire, the second electrode is connected to the chip resistor by the second fine metallic wire, the chip resistor the semiconductor light emitting device according to claim 1 which is connected to the second lead by the third metal thin wire.
  5. 【請求項5】 前記第1のリードの上部には、第1の突起部と、第1の突起部から離間して形成された第2の突起部と、第1の突起部と第2の突起部との間に設けられた凹部とが形成され、 前記発光半導体素子の第1の電極は、前記第1の金属細線によって前記第1の突起部に電気的に接続される請求項1〜4のいずれか1項に記載の半導体発光装置。 The top of claim 5, wherein the first lead, the first protrusion, a second protrusion that is spaced apart from the first protrusion, a second first protrusion a recess provided between the protrusions is formed, the first electrode of the light emitting semiconductor device, according to claim 1 in which electrically connected to said first projection by said first thin metal wire the semiconductor light emitting device according to any one of 4.
  6. 【請求項6】 前記発光半導体素子の基板は、導電性接着剤によって前記凹部に形成された前記支持板の底面に接着された請求項2に記載の半導体発光装置。 Substrate wherein said light emitting semiconductor device, the semiconductor light emitting device according to claim 2 which is adhered to the bottom surface of the support plate which is formed in the recess by a conductive adhesive.
  7. 【請求項7】 前記チップ抵抗の上面と下面にはそれぞれ上面電極と下面電極が設けられ、 前記下面電極は、導電性接着剤によって前記第1のリードの皿状支持板の底面に固着されて、前記第1のリード及び金属細線を介して前記半導体素子の第1の電極に電気的に接続され、 前記発光半導体素子の第2の電極は第2の金属細線によりチップ抵抗の上面電極に接続され、 前記チップ抵抗の上面電極は、第3の金属細線により前記第2のリードに接続される請求項1〜6のいずれか1 Wherein said tip each of the upper and lower surfaces of the resistor top electrode and the lower electrode is provided, wherein the lower electrode is fixed to the bottom surface of the dish-like support plate of said first lead by an electrically conductive adhesive the the first lead and the first electrode of the semiconductor element via a thin metal wire is electrically connected to the second electrode of the light emitting semiconductor element is connected to the upper surface electrode of the chip resistor by the second fine metallic wire is, the upper electrode of the chip resistor, any one of the preceding claims connected to said second lead by the third metal thin wire
    項に記載の半導体発光装置。 The semiconductor light emitting device according to claim.
  8. 【請求項8】 前記チップ抵抗は非直線抵抗体である請求項1〜7のいずれか1項に記載の半導体発光装置。 8. The semiconductor light emitting device according to claim 1 wherein the chip resistor is a non-linear resistor.
JP35834997A 1997-12-25 1997-12-25 Semiconductor light-emitting device Pending JPH11191634A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
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Publications (1)

Publication Number Publication Date
JPH11191634A true true JPH11191634A (en) 1999-07-13

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303190A (en) * 2005-04-20 2006-11-02 Matsushita Electric Works Ltd Light emitting device
US9024334B2 (en) 2009-11-13 2015-05-05 Sharp Kabushiki Kaisha Light-emitting device having a plurality of concentric light transmitting areas
US9093357B2 (en) 2010-01-22 2015-07-28 Sharp Kabushiki Kaisha Light emitting device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006303190A (en) * 2005-04-20 2006-11-02 Matsushita Electric Works Ltd Light emitting device
US9024334B2 (en) 2009-11-13 2015-05-05 Sharp Kabushiki Kaisha Light-emitting device having a plurality of concentric light transmitting areas
US9231023B2 (en) 2009-11-13 2016-01-05 Sharp Kabushiki Kaisha Light-emitting device having a plurality of concentric light transmitting areas
US9607970B2 (en) 2009-11-13 2017-03-28 Sharp Kabushiki Kaisha Light-emitting device having a plurality of concentric light transmitting areas
US9093357B2 (en) 2010-01-22 2015-07-28 Sharp Kabushiki Kaisha Light emitting device
US9312304B2 (en) 2010-01-22 2016-04-12 Sharp Kabushiki Kaisha LED illuminating device comprising light emitting device including LED chips on single substrate
US9425236B2 (en) 2010-01-22 2016-08-23 Sharp Kabushiki Kaisha Light emitting device
US9679942B2 (en) 2010-01-22 2017-06-13 Sharp Kabushiki Kaisha Light emitting device
US9966367B2 (en) 2010-01-22 2018-05-08 Sharp Kabushiki Kaisha Light emitting device

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