JPH11191634A - Semiconductor light-emitting device - Google Patents
Semiconductor light-emitting deviceInfo
- Publication number
- JPH11191634A JPH11191634A JP35834997A JP35834997A JPH11191634A JP H11191634 A JPH11191634 A JP H11191634A JP 35834997 A JP35834997 A JP 35834997A JP 35834997 A JP35834997 A JP 35834997A JP H11191634 A JPH11191634 A JP H11191634A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- light emitting
- electrode
- semiconductor
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/32257—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体発光装置、
特に静電破壊を防止できる半導体発光装置に関する。The present invention relates to a semiconductor light emitting device,
In particular, the present invention relates to a semiconductor light emitting device that can prevent electrostatic breakdown.
【０００２】[0002]
【従来の技術】半導体発光素子としてＧａＮ（窒化ガリ
ウム）系半導体チップを使用した半導体発光装置（発光
ダイオード装置）は公知である。この発光ダイオード装
置では、青色系から緑色系の発光色が得られ、様々な用
途に利用されることが期待されている。2. Description of the Related Art A semiconductor light emitting device (light emitting diode device) using a GaN (gallium nitride) based semiconductor chip as a semiconductor light emitting element is known. In this light emitting diode device, emission colors of blue to green can be obtained, and it is expected to be used for various applications.
【０００３】[0003]
【発明が解決しようとする課題】ところで、この種のＧ
ａＮ系半導体素子を発光素子として使用した発光ダイオ
ード装置は、数ある発光ダイオード装置の中でも特に静
電破壊に弱いことが明らかとなった。従来では、この種
の発光ダイオード装置では、静電破壊を十分に防止でき
ないのが実情である。By the way, this kind of G
It has become clear that a light emitting diode device using an aN-based semiconductor element as a light emitting device is particularly vulnerable to electrostatic breakdown among a number of light emitting diode devices. Conventionally, in this type of light emitting diode device, electrostatic breakdown cannot be sufficiently prevented.
【０００４】本発明は、静電破壊を防止できる半導体発
光装置を提供することを目的とする。An object of the present invention is to provide a semiconductor light emitting device that can prevent electrostatic breakdown.
【０００５】[0005]
【課題を解決するための手段】本発明による半導体発光
装置は、第１のリード（３）及び第２のリード（４）
と、第１のリード（３）及び第２のリード（４）の少な
くとも一方に固着された発光半導体素子（２）と、第１
のリード（３）と発光半導体素子（２）との間を電気的
に接続する第１の金属細線（６ａ）と、発光半導体素子
（２）と第２のリード（４）との間を電気的に接続する
第２の金属細線（６ｂ）と、発光半導体素子（２）、第
１の金属細線（６ａ）、第２の金属細線（６ｂ）、第１
のリード（３）及び第２のリード（４）の上端側を被覆
する樹脂封止体（５）とを備えている。第１のリード
（３）及び第２のリード（４）の少なくとも一方にチッ
プ抵抗（８）を固着し、チップ抵抗（８）の両端を発光
半導体素子（２）の第１の電極（１３）と第２の電極
（１４）とに電気的に接続すると共に、チップ抵抗
（８）を樹脂封止体（５）により被覆する。A semiconductor light emitting device according to the present invention comprises a first lead (3) and a second lead (4).
A light emitting semiconductor element (2) fixed to at least one of the first lead (3) and the second lead (4);
A first thin metal wire (6a) for electrically connecting between the lead (3) and the light emitting semiconductor element (2), and an electric connection between the light emitting semiconductor element (2) and the second lead (4). A second thin metal wire (6b), a light emitting semiconductor element (2), a first thin metal wire (6a), a second thin metal wire (6b),
And a resin sealing body (5) for covering the upper ends of the leads (3) and the second leads (4). A chip resistor (8) is fixed to at least one of the first lead (3) and the second lead (4), and both ends of the chip resistor (8) are connected to a first electrode (13) of the light emitting semiconductor element (2). And a second electrode (14), and the chip resistor (8) is covered with a resin sealing body (5).
【０００６】第１のリード（３）と第２のリード（４）
の間に印加される静電気の電気エネルギはチップ抵抗
（８）を通じて放出されるため、発光半導体素子（２）
を破壊するレベルの静電エネルギーが発光半導体素子
（２）の第１の電極（１３）及び第２の電極（１４）間
に印加されず、発光半導体素子（２）を静電気から保護
できる。また、約３ＭΩの高い抵抗値を有するチップ抵
抗（８）を通るリーク電流は発光半導体素子（２）のリ
ーク電流の検査時の特性測定上又は使用上に無視できる
程度のレベルである。A first lead (3) and a second lead (4)
Since the electric energy of the static electricity applied during is discharged through the chip resistor (8), the light emitting semiconductor device (2)
Is not applied between the first electrode (13) and the second electrode (14) of the light emitting semiconductor element (2), and the light emitting semiconductor element (2) can be protected from static electricity. Further, the leakage current passing through the chip resistor (8) having a high resistance value of about 3 MΩ is at a level that can be neglected in measuring characteristics or using the leakage current of the light emitting semiconductor element (2).
【０００７】本発明の実施の形態では、チップ抵抗
（８）は半導体チップ（２）と共に第１のリード（３）
及び第２のリード（４）の少なくとも一方に形成された
皿状の支持板（１５）に接着される。発光半導体素子
（２）は、基板（９）と、基板（９）の上面に形成され
た半導体基体（１２）とを備えている。半導体基体（１
２）は第１の半導体領域（１０）及び第２の半導体領域
（１１）から成る。半導体基体（１２）の上部には段差
部（１２ａ）が形成される。第１の半導体領域（１０）
に第１の電極（１３）が設けられ、第２の半導体領域
（１１）に第２の電極（１４）が設けられる。第１の電
極（１３）は第１の金属細線（６ａ）により第１のリー
ド（３）に接続され、第２の電極（１４）は第２の金属
細線（６ｂ）によりチップ抵抗（８）に接続され、チッ
プ抵抗（８）は第３の金属細線（６ｃ）により第２のリ
ード（４）に接続される。第１のリード（３）の上部に
は、第１の突起部（３ａ）と、第１の突起部（３ａ）か
ら離間して形成された第２の突起部（３ｂ）と、第１の
突起部（３ａ）と第２の突起部（３ｂ）との間に設けら
れた凹部（３ｃ）とが形成される。発光半導体素子
（２）の第１の電極（１３）は、第１の金属細線（６
ａ）によって第１の突起部（３ａ）に電気的に接続され
る。発光半導体素子（２）の基板（９）は、導電性接着
剤（１６）によって凹部（３ｃ）に形成された支持板
（１５）の底面に接着される。チップ抵抗（８）の上面
と下面にはそれぞれ上面電極（１７）と下面電極（１
８）が設けられる。下面電極（１８）は、導電性接着剤
（１６）によって第１のリード（３）の皿状支持板（１
５）の底面に固着されて、第１のリード（３）及び金属
細線（６ａ）を介して半導体素子（２）の第１の電極
（１３）に電気的に接続される。発光半導体素子（２）
の第２の電極（１４）は第２の金属細線（６ｂ）により
チップ抵抗（８）の上面電極（１７）に接続される。チ
ップ抵抗（８）の上面電極（１７）は、第３の金属細線
（６ｃ）により第２のリード（４）に接続される。チッ
プ抵抗（８）は非直線抵抗体であってもよい。In the embodiment of the present invention, the chip resistor (8) is connected to the first lead (3) together with the semiconductor chip (2).
And a plate-like support plate (15) formed on at least one of the second leads (4). The light emitting semiconductor element (2) includes a substrate (9) and a semiconductor substrate (12) formed on the upper surface of the substrate (9). Semiconductor substrate (1
2) comprises a first semiconductor region (10) and a second semiconductor region (11). A step (12a) is formed on the upper part of the semiconductor substrate (12). First semiconductor region (10)
Is provided with a first electrode (13), and a second electrode (14) is provided in the second semiconductor region (11). The first electrode (13) is connected to the first lead (3) by a first thin metal wire (6a), and the second electrode (14) is connected to a chip resistor (8) by a second thin metal wire (6b). And the chip resistor (8) is connected to the second lead (4) by a third thin metal wire (6c). A first projection (3a), a second projection (3b) formed apart from the first projection (3a), and a first projection (3b) on the upper part of the first lead (3). A recess (3c) provided between the projection (3a) and the second projection (3b) is formed. The first electrode (13) of the light-emitting semiconductor element (2) is provided with a first thin metal wire (6).
a) electrically connects to the first protrusion (3a). The substrate (9) of the light emitting semiconductor element (2) is bonded to the bottom surface of the support plate (15) formed in the recess (3c) by the conductive adhesive (16). On the upper and lower surfaces of the chip resistor (8), an upper electrode (17) and a lower electrode (1
8) is provided. The lower electrode (18) is connected to the dish-like support plate (1) of the first lead (3) by the conductive adhesive (16).
5) is fixed to the bottom surface and is electrically connected to the first electrode (13) of the semiconductor element (2) via the first lead (3) and the thin metal wire (6a). Light emitting semiconductor device (2)
The second electrode (14) is connected to the upper electrode (17) of the chip resistor (8) by a second thin metal wire (6b). The upper electrode (17) of the chip resistor (8) is connected to the second lead (4) by a third thin metal wire (6c). The chip resistor (8) may be a non-linear resistor.
【０００８】[0008]
【発明の実施の形態】以下、ＧａＮ系発光ダイオード装
置に適用した本発明による半導体発光装置の実施の形態
を図１〜図３について説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor light emitting device according to the present invention applied to a GaN-based light emitting diode device will be described below with reference to FIGS.
【０００９】本実施形態の発光ダイオード装置（１）
は、第１のリード（３）及び第２のリード（４）と、第
１のリード（３）に固着された発光ダイオードチップ
（２）及びチップ抵抗（８）と、第１のリード（３）と
発光ダイオードチップ（２）との間を電気的に接続する
第１の金属細線（６ａ）と、発光ダイオードチップ
（２）とチップ抵抗（８）との間を電気的に接続する第
２の金属細線（６ｂ）と、チップ抵抗（８）と第２のリ
ード（４）との間を電気的に接続する第３の金属細線
（６ｃ）と、外囲体として機能する樹脂封止体（５）と
を備えている。樹脂封止体（５）は光透過性樹脂から成
り、発光ダイオードチップ（２）、チップ抵抗（８）、
皿状支持板（１５）、第１の金属細線（６ａ）〜第３の
金属細線（６ｃ）並びに第１のリード（３）及び第２の
リード（４）の上端側を被覆する。The light emitting diode device of this embodiment (1)
Are a first lead (3) and a second lead (4), a light emitting diode chip (2) and a chip resistor (8) fixed to the first lead (3), and a first lead (3). ) And the light emitting diode chip (2), and a second thin metal wire (6a) for electrically connecting between the light emitting diode chip (2) and the chip resistor (8). A thin metal wire (6b), a third thin metal wire (6c) for electrically connecting between the chip resistor (8) and the second lead (4), and a resin sealing body functioning as an envelope (5). The resin sealing body (5) is made of a light transmitting resin, and includes a light emitting diode chip (2), a chip resistor (8),
The dish-like support plate (15), the first thin metal wire (6a) to the third thin metal wire (6c), and the upper ends of the first lead (3) and the second lead (4) are covered.
【００１０】発光ダイオードチップ（２）は、図２に示
すように、サファイア基板（９）と、サファイア基板
（９）の上面に形成された半導体基体（１２）とを備え
ている。半導体発光素子としてのＧａＮ系半導体からな
る半導体基体（１２）は周知のエピタキシャル成長法に
よって形成されたｎ形ＧａＮ半導体領域（第１の半導体
領域）（１０）及びｐ形ＧａＮ半導体領域（第２の半導
体領域）（１１）から成る。半導体基体（１２）の上部
には段差部（１２ａ）が形成され、ｎ形ＧａＮ半導体領
域（１０）に第１の電極（カソード電極）（１３）が接
続され、ｐ形ＧａＮ半導体領域（１１）に第２の電極
（アノード電極）（１４）が接続される。As shown in FIG. 2, the light emitting diode chip (2) includes a sapphire substrate (9) and a semiconductor substrate (12) formed on the upper surface of the sapphire substrate (9). A semiconductor substrate (12) made of a GaN-based semiconductor as a semiconductor light-emitting element has an n-type GaN semiconductor region (first semiconductor region) (10) and a p-type GaN semiconductor region (second semiconductor) formed by a well-known epitaxial growth method. Area) (11). A step (12a) is formed on the upper portion of the semiconductor substrate (12), a first electrode (cathode electrode) (13) is connected to the n-type GaN semiconductor region (10), and a p-type GaN semiconductor region (11) is formed. Is connected to a second electrode (anode electrode) (14).
【００１１】発光ダイオードチップ（２）のカソードリ
ードとして機能する第１のリード（３）の上部には、第
１の突起部（３ａ）と、第１の突起部（３ａ）から離間
して形成された第２の突起部（３ｂ）と、第１の突起部
（３ａ）と第２の突起部（３ｂ）との間に設けられた凹
部（３ｃ）とが形成される。凹部（３ｃ）に形成された
皿状の支持板（ヘッダ）（１５）の底面には導電性接着
剤（１６）によって発光ダイオードチップ（２）のサフ
ァイア基板（９）が固着される。第１の突起部（３ａ）
と発光ダイオードチップ（２）の第１の電極（１３）と
の間は、金属細線（６ａ）によって電気的に接続され
る。A first projection (3a) is formed above the first lead (3) functioning as a cathode lead of the light emitting diode chip (2), and is formed apart from the first projection (3a). The formed second protrusion (3b) and the recess (3c) provided between the first protrusion (3a) and the second protrusion (3b) are formed. The sapphire substrate (9) of the light emitting diode chip (2) is fixed to the bottom of the dish-shaped support plate (header) (15) formed in the concave portion (3c) by a conductive adhesive (16). First protrusion (3a)
And the first electrode (13) of the light emitting diode chip (2) are electrically connected by a thin metal wire (6a).
【００１２】図１に示すように、抵抗値約３ＭΩのチッ
プ型抵抗であるチップ抵抗（８）の上面と下面にはそれ
ぞれ上面電極（１７）と下面電極（１８）が設けられ
る。下面電極（１８）は、導電性接着剤（１６）によっ
て第１のリード（３）の皿状支持板（１５）の底面に固
着され、第１のリード（３）及び金属細線（６ａ）を介
して発光ダイオードチップ（２）の第１の電極（１３）
に電気的に接続される。発光ダイオードチップ（２）の
第２の電極（１４）は金属細線（６ｂ）によりチップ抵
抗（８）の上面電極（１７）に接続される。チップ抵抗
（８）の上面電極（１７）は、金属細線（６ｃ）により
第２のリード（４）の上端に接続される。第１の金属細
線（６ａ）〜第３の金属細線（６ｃ）は周知のワイヤボ
ンディング方法によって接続される。この結果、第２の
リード（４）は、金属細線（６ｃ）、チップ抵抗（８）
の上面電極（１７）及び金属細線（６ｂ）を介して発光
ダイオードチップ（２）の第２の電極（１４）に電気的
に接続され、発光ダイオードチップ（２）のアノードリ
ードとして機能する。図３は、発光ダイオードチップ
（２）の第１の電極（１３）と第２の電極（１４）間に
チップ抵抗（８）を並列に接続した本実施の形態の発光
ダイオード装置の等価回路を示す。As shown in FIG. 1, an upper electrode (17) and a lower electrode (18) are provided on the upper and lower surfaces of a chip resistor (8) which is a chip resistor having a resistance value of about 3 MΩ, respectively. The lower electrode (18) is fixed to the bottom surface of the dish-shaped support plate (15) of the first lead (3) by a conductive adhesive (16), and the first lead (3) and the fine metal wire (6a) are attached. Via the first electrode (13) of the light emitting diode chip (2)
Is electrically connected to The second electrode (14) of the light emitting diode chip (2) is connected to the upper electrode (17) of the chip resistor (8) by a thin metal wire (6b). The upper electrode (17) of the chip resistor (8) is connected to the upper end of the second lead (4) by a thin metal wire (6c). The first to third metal wires (6a) to (6c) are connected by a known wire bonding method. As a result, the second lead (4) has a thin metal wire (6c) and a chip resistor (8).
Is electrically connected to the second electrode (14) of the light emitting diode chip (2) via the upper surface electrode (17) and the thin metal wire (6b), and functions as an anode lead of the light emitting diode chip (2). FIG. 3 shows an equivalent circuit of a light emitting diode device according to the present embodiment in which a chip resistor (8) is connected in parallel between a first electrode (13) and a second electrode (14) of a light emitting diode chip (2). Show.
【００１３】第１のリード（３）と第２のリード（４）
の間に印加される静電気の電気エネルギはチップ抵抗
（８）を通じて放出されるため、発光ダイオードチップ
（２）を破壊するレベルの静電エネルギーが発光ダイオ
ードチップ（２）の第１の電極（１３）及び第２の電極
（１４）間に印加されず、発光ダイオードチップ（２）
を静電気から保護できる。また、約３ＭΩの高い抵抗値
を有するチップ抵抗（８）を通るリーク電流は発光ダイ
オードチップ（２）のリーク電流の検査時の特性測定上
又は使用上に無視できる程度のレベルである。First lead (3) and second lead (4)
The electrostatic energy applied between the first electrode (13) of the light emitting diode chip (2) and the electrostatic energy at a level that destroys the light emitting diode chip (2) is discharged through the chip resistor (8). ) And the second light emitting diode chip (2)
Can be protected from static electricity. Further, the leakage current passing through the chip resistor (8) having a high resistance value of about 3 MΩ is negligible in measuring the characteristics of the light-emitting diode chip (2) during leakage current inspection or in use.
【００１４】本発明の実施の形態は前記の例に限定され
ず、種々の変更が可能である。例えば、第１のリード
（３）に接着する代わりに、発光半導体素子（２）及び
チップ抵抗（８）を第２のリード（４）に接着したり、
第１のリード（３）に発光半導体素子（２）又はチップ
抵抗（８）を接着すると共に、第２のリード（４）に発
光半導体素子（２）又はチップ抵抗（８）を別個に接着
してもよい。第２の金属細線（６ｂ）を第２のリード
（４）に直接接続してもよい。半導体基体（１２）は図
２に示す形状に限られない。例えば、半導体基体（１
２）の上部に段差部（１２ａ）を形成しなくてもよい。
チップ抵抗（８）は必要に応じて種々の抵抗値を選択す
ることが可能である。また、チップ抵抗（８）は一般の
抵抗体ではなくバリスタ等の非直線抵抗体を用いること
もできる。非直線抵抗体は一般の抵抗よりもリーク電流
の面で有利である。半導体発光素子としてＧａＮ（窒化
ガリウム）系半導体チップを使用する代わりに、ＧａＰ
（ガリウム燐）系、ＧａＡｓ（砒化ガリウム）系等他の
発光ダイオード装置又は半導体レーザ装置に本発明を適
用することができる。The embodiment of the present invention is not limited to the above example, and various modifications are possible. For example, instead of bonding to the first lead (3), the light emitting semiconductor element (2) and the chip resistor (8) are bonded to the second lead (4),
The light emitting semiconductor element (2) or the chip resistor (8) is bonded to the first lead (3), and the light emitting semiconductor element (2) or the chip resistor (8) is separately bonded to the second lead (4). You may. The second thin metal wire (6b) may be directly connected to the second lead (4). The semiconductor substrate (12) is not limited to the shape shown in FIG. For example, a semiconductor substrate (1
The step (12a) may not be formed on the upper part of 2).
Various resistance values can be selected for the chip resistor (8) as needed. Further, a non-linear resistor such as a varistor can be used as the chip resistor (8) instead of a general resistor. Non-linear resistors are more advantageous in terms of leakage current than ordinary resistors. Instead of using a GaN (gallium nitride) based semiconductor chip as a semiconductor light emitting device, GaP
The present invention can be applied to other light emitting diode devices or semiconductor laser devices such as a (gallium phosphide) system, a GaAs (gallium arsenide) system, and the like.
【００１５】[0015]
【発明の効果】前記のように、発光半導体素子に印加さ
れる静電気の電気エネルギをチップ抵抗を通じて放出で
きるため、発光半導体素子の静電破壊を防止することが
でき、半導体発光装置を使用する電子回路の信頼性を高
めることができる。As described above, since the electrostatic electric energy applied to the light emitting semiconductor element can be released through the chip resistor, the electrostatic breakdown of the light emitting semiconductor element can be prevented, and the electronic device using the semiconductor light emitting device can be used. The reliability of the circuit can be improved.
【図１】 本発明による発光ダイオード装置の断面図FIG. 1 is a sectional view of a light emitting diode device according to the present invention.
【図２】 発光ダイオードチップの断面図FIG. 2 is a sectional view of a light emitting diode chip.
【図３】 発光ダイオード装置の等価回路図FIG. 3 is an equivalent circuit diagram of a light emitting diode device.
１・・発光ダイオード装置、 ２・・発光ダイオードチ
ップ（発光半導体素子）、 ３・・第１のリード、 ４
・・第２のリード、 ５・・樹脂封止体、 ６ａ・・第
１の金属細線、 ６ｂ・・第２の金属細線、 ６ｃ・・
第３の金属細線、 ８・・チップ抵抗、 ９・・基板、
１０・・ｎ形ＧａＮ半導体領域（第１の半導体領
域）、 １１・・ｐ形ＧａＮ半導体領域（第２の半導体
領域）、 １２・・半導体基体、 １３・・第１の電
極、 １４・・第２の電極、 １５・・支持板、 １６
・・導電性接着剤、 １７・・上面電極、 １８・・下
面電極、1. Light emitting diode device, 2. Light emitting diode chip (light emitting semiconductor element), 3. First lead, 4.
..The second lead, 5..the resin-sealed body, 6a..the first thin metal wire, 6b..the second thin metal wire, 6c ..
3rd metal wire, 8 chip resistance, 9 board
10. n-type GaN semiconductor region (first semiconductor region), 11 p-type GaN semiconductor region (second semiconductor region), 12 semiconductor substrate, 13 first electrode, 14 2 electrode, 15 support plate, 16
..Conductive adhesive, 17 top electrode, 18 bottom electrode,
Claims (8)
第１のリード及び第２のリードの少なくとも一方に固着
された発光半導体素子と、前記第１のリードと発光半導
体素子との間を電気的に接続する第１の金属細線と、前
記発光半導体素子と前記第２のリードとの間を電気的に
接続する第２の金属細線と、前記発光半導体素子、第１
の金属細線、第２の金属細線、第１のリード及び第２の
リードの上端側を被覆する樹脂封止体とを備えた半導体
発光装置において、 前記第１のリード及び第２のリードの少なくとも一方に
チップ抵抗を固着し、 該チップ抵抗の両端を前記発光半導体素子の第１の電極
と第２の電極とに電気的に接続し、 前記チップ抵抗を前記樹脂封止体により被覆したことを
特徴とする半導体発光装置。A first lead and a second lead; a light-emitting semiconductor element fixed to at least one of the first lead and the second lead; and a light-emitting semiconductor element between the first lead and the light-emitting semiconductor element. A first thin metal wire that electrically connects the light emitting semiconductor element, a second thin metal wire that electrically connects the light emitting semiconductor element and the second lead,
A thin metal wire, a second metal wire, and a resin sealing body covering the upper ends of the first lead and the second lead, wherein at least one of the first lead and the second lead is provided. A chip resistor is fixed to one side, both ends of the chip resistor are electrically connected to a first electrode and a second electrode of the light emitting semiconductor element, and the chip resistor is covered with the resin sealing body. Characteristic semiconductor light emitting device.
に前記第１のリード及び第２のリードの少なくとも一方
に形成された皿状の支持板に接着される請求項１に記載
の半導体発光装置。2. The semiconductor light emitting device according to claim 1, wherein said chip resistor is bonded to a dish-shaped support plate formed on at least one of said first lead and said second lead together with said semiconductor chip.
の上面に形成された半導体基体とを備え、 該半導体基体は第１の半導体領域及び第２の半導体領域
から成り、 前記半導体基体の上部には段差部が形成され、 前記第１の半導体領域に第１の電極が設けられ、前記第
２の半導体領域に第２の電極が設けられた請求項１又は
２に記載の半導体発光装置。3. The light-emitting semiconductor device includes a substrate, and a semiconductor substrate formed on an upper surface of the substrate. The semiconductor substrate includes a first semiconductor region and a second semiconductor region. 3. The semiconductor light emitting device according to claim 1, wherein a step portion is formed in an upper portion, a first electrode is provided in the first semiconductor region, and a second electrode is provided in the second semiconductor region. 4. .
前記第１のリードに接続され、前記第２の電極は前記第
２の金属細線により前記チップ抵抗に接続され、該チッ
プ抵抗は第３の金属細線により前記第２のリードに接続
された請求項１〜３のいずれか１項に記載の半導体発光
装置。4. The first electrode is connected to the first lead by a first thin metal wire, and the second electrode is connected to the chip resistor by the second thin metal wire. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is connected to the second lead by a third thin metal wire.
起部と、第１の突起部から離間して形成された第２の突
起部と、第１の突起部と第２の突起部との間に設けられ
た凹部とが形成され、 前記発光半導体素子の第１の電極は、前記第１の金属細
線によって前記第１の突起部に電気的に接続される請求
項１〜４のいずれか１項に記載の半導体発光装置。5. A first protrusion, a second protrusion formed apart from the first protrusion, and a first protrusion and a second protrusion formed on an upper portion of the first lead. A concave portion provided between the light-emitting semiconductor element and the first protrusion; and a first electrode of the light-emitting semiconductor element is electrically connected to the first protrusion by the first thin metal wire. 5. The semiconductor light emitting device according to any one of items 4 to 5.
着剤によって前記凹部に形成された前記支持板の底面に
接着された請求項２に記載の半導体発光装置。6. The semiconductor light emitting device according to claim 2, wherein the substrate of the light emitting semiconductor element is bonded to a bottom surface of the support plate formed in the concave portion by a conductive adhesive.
れ上面電極と下面電極が設けられ、 前記下面電極は、導電性接着剤によって前記第１のリー
ドの皿状支持板の底面に固着されて、前記第１のリード
及び金属細線を介して前記半導体素子の第１の電極に電
気的に接続され、 前記発光半導体素子の第２の電極は第２の金属細線によ
りチップ抵抗の上面電極に接続され、 前記チップ抵抗の上面電極は、第３の金属細線により前
記第２のリードに接続される請求項１〜６のいずれか１
項に記載の半導体発光装置。7. An upper electrode and a lower electrode are provided on an upper surface and a lower surface of the chip resistor, respectively, and the lower electrode is fixed to a bottom surface of the dish-like support plate of the first lead by a conductive adhesive. A second electrode of the light emitting semiconductor element is electrically connected to a first electrode of the semiconductor element via the first lead and the thin metal wire, and a second electrode of the light emitting semiconductor element is connected to an upper electrode of the chip resistor by a second thin metal wire. The top electrode of the chip resistor is connected to the second lead by a third thin metal wire.
13. The semiconductor light emitting device according to item 9.
求項１〜７のいずれか１項に記載の半導体発光装置。8. The semiconductor light emitting device according to claim 1, wherein said chip resistor is a non-linear resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35834997A JPH11191634A (en) | 1997-12-25 | 1997-12-25 | Semiconductor light-emitting device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP35834997A JPH11191634A (en) | 1997-12-25 | 1997-12-25 | Semiconductor light-emitting device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11191634A true JPH11191634A (en) | 1999-07-13 |
Family
ID=18458843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP35834997A Pending JPH11191634A (en) | 1997-12-25 | 1997-12-25 | Semiconductor light-emitting device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11191634A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006303190A (en) * | 2005-04-20 | 2006-11-02 | Matsushita Electric Works Ltd | Light emitting device |
| KR100658042B1 (en) * | 2003-11-06 | 2006-12-15 | 주식회사 신창전기 | LED combined with resistence |
| CN100423307C (en) * | 2004-09-15 | 2008-10-01 | 三垦电气株式会社 | Light-emitting semiconductor device having an overvoltage protector, and method of fabrication |
| US9024334B2 (en) | 2009-11-13 | 2015-05-05 | Sharp Kabushiki Kaisha | Light-emitting device having a plurality of concentric light transmitting areas |
| US9093357B2 (en) | 2010-01-22 | 2015-07-28 | Sharp Kabushiki Kaisha | Light emitting device |
-
1997
- 1997-12-25 JP JP35834997A patent/JPH11191634A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100658042B1 (en) * | 2003-11-06 | 2006-12-15 | 주식회사 신창전기 | LED combined with resistence |
| CN100423307C (en) * | 2004-09-15 | 2008-10-01 | 三垦电气株式会社 | Light-emitting semiconductor device having an overvoltage protector, and method of fabrication |
| JP2006303190A (en) * | 2005-04-20 | 2006-11-02 | Matsushita Electric Works Ltd | Light emitting device |
| US9024334B2 (en) | 2009-11-13 | 2015-05-05 | Sharp Kabushiki Kaisha | Light-emitting device having a plurality of concentric light transmitting areas |
| US9231023B2 (en) | 2009-11-13 | 2016-01-05 | Sharp Kabushiki Kaisha | Light-emitting device having a plurality of concentric light transmitting areas |
| US9607970B2 (en) | 2009-11-13 | 2017-03-28 | Sharp Kabushiki Kaisha | Light-emitting device having a plurality of concentric light transmitting areas |
| US9093357B2 (en) | 2010-01-22 | 2015-07-28 | Sharp Kabushiki Kaisha | Light emitting device |
| US9312304B2 (en) | 2010-01-22 | 2016-04-12 | Sharp Kabushiki Kaisha | LED illuminating device comprising light emitting device including LED chips on single substrate |
| US9425236B2 (en) | 2010-01-22 | 2016-08-23 | Sharp Kabushiki Kaisha | Light emitting device |
| US9679942B2 (en) | 2010-01-22 | 2017-06-13 | Sharp Kabushiki Kaisha | Light emitting device |
| US9966367B2 (en) | 2010-01-22 | 2018-05-08 | Sharp Kabushiki Kaisha | Light emitting device |
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