JPH11176986A - Semiconductor package for high frequency use and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a hermetic high-frequency package which is easily manufacture of a low-dielectric const. organic material and has a simple structure and signal microstrip lines or similarly structured lines on the org. material surface. SOLUTION: An organic material-made board 10 has a recess 12 having slants 14 extending wide, up to top end opening edges from the bottom face 16 of the recess 12 and a cavity 20 for housing a semiconductor chip at the center of the bottom face 16. Signal lines 30 continuously are formed in the form of microstrip lines or similarly structured lines over the entire length on the bottom face 16, slants 14 and top face 18 of the board 10. A ground layer 40 is formed wide on the bottom face of the board 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an LCC package (Leadl) for accommodating a high frequency semiconductor chip.
ess Chip Carrier Package)
The present invention relates to a semiconductor package of a type and a high-frequency semiconductor device formed using the package.

[0002]

2. Description of the Related Art In general, a ceramic package is used as a semiconductor package for accommodating a high-frequency semiconductor chip operated at several GHz or the like. This package is
A multilayer structure is formed by laminating a plurality of ceramic layers. The signal line provided in the package is formed in a microstrip line or a strip line. The characteristic impedance of the signal line is adjusted to 50 ohms or the like. The transmission loss of the high-frequency signal transmitted through the signal line is configured to be kept low.

[0003] Incidentally, ceramic packages are expensive because of their high production materials and complicated production steps, and are unsuitable for general-purpose semiconductor packages.

[0004] As a package that can solve such problems, a package formed using an organic material such as a thermoplastic resin or a thermosetting resin can be considered. Organic materials have a lower dielectric constant than ceramics. Therefore, if the package is formed using an organic material, the transmission speed of the high-frequency signal transmitted through the signal line formed on the surface of the organic layer of the package is reduced by the high-frequency signal transmitted through the signal line formed on the surface of the ceramic layer of the ceramic package. It can be faster than the signal transmission speed. Therefore, it is preferable that the high-frequency package be formed using an organic material having a low dielectric constant.

[0005]

However, when a high-frequency semiconductor package having a multilayer structure similar to that of a ceramic package is formed using an organic material,
A via (connection line) provided in the organic layer of the package by vertically penetrating the layer has a structure in which a metal plating layer is applied to the inner peripheral surface of the through hole. Then, the via has a structure having a through hole vertically penetrating at the center. Therefore, the hermeticity of the organic layer of the package is impaired through the via, and the hermeticity of the package is lost.

Further, a ground layer is provided on the surface of the organic layer located above or below the signal line formed on the surface of the organic layer, and the signal line is formed as a microstrip line or a strip line. If you try to match the impedance to 50 ohms,
Since the dielectric constant of the organic layer is low, the organic layer including the ground layer must be formed as thin as 0.1 mm or the like. However, it is extremely difficult to form the organic layer as thin as 0.1 mm.

On the other hand, in order to facilitate the formation of the organic layer having the above-mentioned ground layer, when the organic layer is formed thick, the organic layer below or above the ground layer formed on the surface of the organic layer is formed. The signal line provided on the layer surface must be formed extremely wide in order to match the characteristic impedance of the line to 50 ohms or the like. Therefore, if you do so, the package will be more compact and
It is not possible to increase the density of signal lines provided in the package.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and is directed to a hermetically sealed package formed using an organic material, wherein a signal line formed on the surface of the organic material is a microstrip line. Or formed on a line having a structure similar to that, the transmission speed of the high-frequency signal transmitted to the signal line can be increased, or the transmission loss of the high-frequency signal transmitted to the signal line can be suppressed small, the structure is simple,
A high-frequency semiconductor package that is easy to manufacture (hereinafter referred to as
It is an object to provide a high-frequency semiconductor device (hereinafter, referred to as a semiconductor device) formed using the package.

[0009]

In order to achieve the above object, a first package according to the present invention has a concave portion formed on an upper surface of a substrate formed by using an organic material, and an inner surface of the concave portion is formed. A cavity is formed on the inclined surface that expands obliquely outward from the bottom surface of the concave portion toward the upper open edge of the concave portion, and the cavity for accommodating the semiconductor chip is provided on the bottom surface of the concave portion with a portion of the substrate left at the bottom. The signal line is formed continuously on the bottom surface of the concave portion, the inclined surface and the upper surface of the substrate connected thereto, and a ground layer for adjusting the characteristic impedance of the signal line is formed on the lower surface of the substrate. Features.

In a second package of the present invention, a concave portion is formed on an upper surface of a substrate formed using an organic material, and an inner side surface of the concave portion extends from a bottom surface of the concave portion to an upper open edge of the concave portion. A cavity for forming a semiconductor chip is formed on a bottom surface of the concave portion so as to penetrate the substrate up and down, and a signal line is formed on a bottom surface of the concave portion.
A ground layer for adjusting the characteristic impedance of the signal line is formed on the lower surface of the substrate, and a heat sink is joined to the ground layer. The bottom of the cavity is sealed.

In the first or second package, the signal line is formed continuously on the concave portion of the substrate formed using an organic material having a low dielectric constant, the inclined surface of the substrate, and the upper surface of the substrate connected thereto. ing. Therefore, as compared with the signal line formed on the substrate made of ceramic, the transmission speed of the high-frequency signal transmitted on the signal line formed on the substrate made of the organic material can be increased.

Further, the inner side surface of the concave portion of the substrate is formed as an inclined surface expanding obliquely outward toward the upper end open edge of the concave portion. And a signal line is formed on the slope,
A ground layer is formed on the lower surface of the substrate located below the signal line. Therefore, the signal line formed on the inclined surface can be formed in a structure close to the microstrip line. Then, the characteristic impedance of the signal line can be matched to 50 ohms or the like by using the ground layer. Then, the transmission loss of the high-frequency signal transmitted to the signal line can be reduced.

In addition, a ground layer is formed on the lower surface of the substrate below the signal line formed on the bottom surface of the concave portion of the substrate and the signal line formed on the upper surface of the substrate. Therefore, those signal lines can be formed into microstrip lines. Then, the characteristic impedance of these signal lines can be matched to 50 ohms or the like by using the ground layer. And the transmission loss of the high-frequency signal transmitted to those signal lines can be reduced.

Further, as described above, the signal line is formed continuously on the bottom surface of the concave portion of the substrate formed using the organic material, the inclined surface of the substrate, and the upper surface of the substrate connected thereto. Therefore, a signal line is provided between the organic layers of the substrate made of an organic material, and the inner periphery of the through hole for electrically connecting the signal line provided between the organic layers to the signal line on the surface of the organic layer exposed to the outside of the substrate. It is possible to eliminate the necessity of providing a via having a metal plating layer adhered to the surface thereof by vertically penetrating the organic layer. In addition, it is possible to prevent the hermeticity of the organic layer constituting the substrate from being impaired by the via.

In the second package, the semiconductor chip is mounted on the heat sink exposed at the bottom of the cavity, and the heat generated by the chip can be efficiently radiated to the outside of the package through the heat sink.

In the first or second package according to the present invention, the ground line is formed continuously on both sides of the signal line on the bottom surface of the concave portion, the inclined surface and the signal line on the upper surface of the substrate connected thereto, and the ground line is formed. It is preferable that the line is electrically connected to a ground layer formed on a lower surface of the substrate via a connection line formed on an outer surface of the substrate or an inner surface of the cavity.

In the first or second package, the signal line can be formed as a coplanar line by using ground lines formed on both sides of the signal line with the signal line interposed therebetween. In addition, the signal line can be formed as a grounded coplanar line by using a ground layer provided on the lower surface of the substrate, which is located below the signal line.
Then, the characteristic impedance of the signal line can be accurately matched to 50 ohms or the like. At the same time, a high-frequency signal transmitted through the signal line is mixed into another signal line formed adjacent to the signal line adjacent to the signal line, the concave portion of the same substrate, the inclined surface, and the upper surface of the substrate connected thereto. Thus, the occurrence of crosstalk between the signal lines can be prevented by the ground line formed between the signal lines and along the signal lines.

In the first semiconductor device of the present invention, a semiconductor chip is mounted on the bottom of a cavity having a bottom of a semiconductor package, and electrodes of the chip are electrically connected to signal lines formed on the bottom surface of the concave portion. The semiconductor chip is sealed with a sealing resin.

In a second semiconductor device according to the present invention, a semiconductor chip is mounted on a heat sink exposed at the bottom of a cavity of a semiconductor package, and an electrode of the chip and a signal line formed on the bottom surface of the recess are electrically connected. And the semiconductor chip is sealed with a sealing resin.

In the first or second semiconductor device, the semiconductor chip is not adversely affected by moisture and dust.
It can be prevented by the sealing resin.

Further, the first or second semiconductor device can be turned upside down and mounted on a circuit board. Then, the signal line formed on the upper surface of the substrate of the semiconductor device can be electrically connected to the corresponding signal connection line formed on the upper surface of the circuit substrate by soldering or the like. Then, the first or second semiconductor device can be surface-mounted on the circuit board.

Further, in the second semiconductor device, heat generated by the semiconductor chip mounted on the heat sink can be efficiently radiated to the outside of the second semiconductor device through the heat sink.

[0023]

Next, embodiments of the present invention will be described with reference to the drawings. 1 and 2 show a preferred embodiment of the first package of the present invention. FIG. 1 is a perspective view thereof, and FIG. 2 is a front sectional view thereof. Hereinafter, the first package will be described.

In FIG. 1, reference numeral 10 denotes a substrate formed using an organic material such as a thermoplastic resin such as an epoxy resin or a thermosetting resin such as polybutylene terephthalate. The substrate 10 has a rectangular block shape. The upper and lower surfaces of the substrate 10 are formed parallel to each other. On the upper surface of the substrate 10, a rectangular recess 12 is formed. Recess 12
Is formed parallel to the upper and lower surfaces of the substrate 10.

As shown in FIG. 2, the inner side surface of the concave portion 12 is formed as an inclined surface 14 which expands obliquely outward toward the upper open edge of the concave portion 12.

In the center of the bottom surface of the concave portion 12, a cavity 20 for accommodating a semiconductor chip is formed in a bottomed state with a part of the substrate 10 left at the bottom.

On the bottom surface 16 of the concave portion 12, the inclined surface 14, and the upper surface 18 of the substrate 10 connected to the inclined surface 14,
A plurality of 0s are formed substantially radially around the cavity 20.

The substrate 10 located below the signal line 30
A ground layer 40 for adjusting the characteristic impedance of the signal line 30 is continuously and widely formed on the lower surface of the signal line 30.

The signal line 30 and the ground layer 40 are formed by a MID (Molded Interconnect D) for forming a metal plating layer on the surface of a plastic molded product.
substrate) made of an organic material using the technology of
0 is formed three-dimensionally and two-dimensionally. In particular,
A Cu plating layer for forming the signal line 30 and the ground layer 40 is formed three-dimensionally and two-dimensionally on the substrate 10 using the MID technique. Ni plating for rust prevention is provided on the Cu plating layer.
Au plating or Ag plating for plating and for surface mounting is applied in layers. Then, the signal line 30 and the ground layer 4
0 are formed three-dimensionally and two-dimensionally on the substrate 10.

The first package shown in FIGS. 1 and 2 is configured as described above. In the first package, a signal line formed continuously on the bottom surface 16 of the concave portion of the substrate 10 formed using an organic material having a low dielectric constant, the inclined surface 14 of the substrate 10, and the upper surface 18 of the substrate connected thereto. 30 can transmit a high-frequency signal at a high transmission speed.

Further, the signal line 30 formed on the inclined surface 14 of the substrate 10 can be formed into a structure close to a microstrip line by using the ground layer 40 widely formed on the lower surface of the substrate 10 below the signal line 30. That is, the signal line 30 formed on the inclined surface 14 can be arranged above the ground layer 40 in an oblique vertical direction close to being parallel to the ground layer 40. Then, the characteristic impedance of the signal line 30 can be accurately matched to 50 ohms or the like using the ground layer 40 described above. And the signal line 30
Transmission loss of a high-frequency signal transmitted to

The recess 12 is parallel to the upper and lower surfaces of the substrate 10.
The signal line 30 formed on the bottom surface 16 of the substrate 10 and the signal line 30 formed on the upper surface 18 of the substrate 10 are connected to each other by using a ground layer 40 widely formed on the lower surface of the substrate 10 below the microstrip line. Can be formed. That is, the signal line 30 formed on the bottom surface 16 of the recess 12 and the substrate 10
And the signal line 30 formed on the upper surface 18 of the device can be arranged above and in parallel with the ground layer 40. The characteristic impedances of the signal lines 30 can be accurately matched to 50 ohms or the like using the ground layer 40 described above. Then, transmission loss of the high-frequency signal transmitted to the signal line 30 can be reduced.

The signal line 30 is provided between the organic layers of the substrate 10.
Or a metal plating layer is applied to the inner peripheral surface of a through hole for electrically connecting the signal line 30 provided between the organic layers to the signal line 30 on the surface of the organic layer exposed to the outside of the substrate 10. It is possible to obviate the need to provide a via that extends vertically through the organic layer. In addition, it is possible to prevent the hermeticity of the organic layer of the substrate 10 from being impaired by the via.

FIGS. 3 and 4 show a preferred embodiment of the second package according to the present invention. FIG. 3 is a perspective view thereof, and FIG. 4 is a front sectional view thereof. Hereinafter, the second package will be described.

In the second package shown in FIG.
In the center of 6, a cavity 22 for accommodating a semiconductor chip,
It is formed penetrating the substrate 10 vertically.

On the lower surface of the substrate 10, the ground layer 40 for adjusting the characteristic impedance of the signal line 30 is provided.
D is formed using the technique of D. Then, a heat sink 70 made of Cu or the like having good thermal conductivity is joined to the ground layer 40 by brazing or the like. And
The bottom of the cavity 22 is hermetically sealed by the heat sink 70.

Other components are the same as those of the first package shown in FIGS. In the second package, a semiconductor chip is mounted on the heat sink 70 exposed at the bottom of the cavity 22, and heat generated by the chip can be efficiently radiated to the outside of the package through the heat sink 70. Other functions of the second package are the same as those of the first package shown in FIGS.
It is the same as the package.

FIG. 5 shows another preferred embodiment of the first package of the present invention, and FIG. 5 is a perspective view thereof. FIG.
Shows another preferred embodiment of the second package of the present invention, and FIG. 6 is a perspective view thereof. Hereinafter, the first or second package will be described.

In the first or second package shown in the figure, the ground line 50 is arranged continuously on the signal line 30 on both sides of the signal line 30 on the bottom surface 16 of the concave portion, the inclined surface 14 and the upper surface 18 of the substrate connected thereto. Is formed.

The outer end of the ground line 50 is electrically connected in series to the ground layer 40 formed on the lower surface of the substrate 10 via a connection line 60 formed on the outer surface of the substrate 10.

The ground line 50 and the connection line 60 are formed on the substrate 10 made of an organic material by using the above-described MID technique.
It is formed three-dimensionally and two-dimensionally. Specifically, a Cu plating layer for forming the ground line 50 and the connection line 60 is formed three-dimensionally and two-dimensionally on the substrate 10 using MID technology. Ni plating for rust prevention is provided on the Cu plating layer.
Au plating or Ag plating for plating and for surface mounting is applied in layers. The ground line 50 and the connection line 60 are formed three-dimensionally and two-dimensionally on the substrate 10.

The rest is configured similarly to the first package shown in FIGS. 1 and 2 or the second package shown in FIGS. 3 and 4. In the first or second package, the signal line 3 is formed by using the ground line 50 formed on both sides of the signal line 30 so as to be arranged on the signal line 30.
0 can be formed in the coplanar line. In addition, the substrate 10
The signal line 30 can be formed as a grounded coplanar line by using the ground layer 40 provided on the lower surface of the semiconductor device or by using a heat sink 70 constituting a ground bonded to the ground layer 40. Then, the characteristic impedance of the signal line 30 can be accurately matched to 50 ohms or the like. At the same time, the high-frequency signal transmitted through the signal line 30 is a signal line 30 adjacent to the signal line 30, the bottom surface 16 of the concave portion of the same substrate 10, the inclined surface 14, and the upper surface 18 of the substrate connected thereto.
Is mixed into other signal lines 30 formed continuously in the same way, and crosstalk occurs between those signal lines 30.
The ground line 5 formed between the signal lines 30
0 can prevent this. Other operations of the first or second package are the same as those of the first package shown in FIGS. 1 and 2 or the second package shown in FIGS.

FIG. 7 shows another preferred embodiment of the second package of the present invention, and FIG. 7 is a perspective view thereof. Hereinafter, the second package will be described.

In the second package, the inner end of the ground line 50 formed side by side with the signal line 30 is
It is electrically connected to a ground layer 40 formed on the lower surface of the substrate 10 via a connection line 62 formed on the inner surface of the cavity 22. Or, in addition, the signal line 3
The outer ends of the ground lines 50 arranged side by side are electrically connected to the ground layer 40 formed on the lower surface of the substrate 10 via the connection lines 60 formed on the outer surface of the substrate 10. The signal line 30 is formed as a coplanar line. Other operations of the second package are the same as those of the second package shown in FIG.

FIG. 8 shows a preferred embodiment of the first semiconductor device of the present invention, and FIG. 8 is a front sectional view showing a state of use of the first semiconductor device. Hereinafter, the first semiconductor device will be described.

In this first semiconductor device, FIGS.
Or the first package shown in FIG. 5 (FIG. 8 shows an example of the first package shown in FIG. 1 and FIG. 2), and has a bottomed cavity. 2
At the bottom of the cavity 20 of the first package with 0
The semiconductor chip 80 is mounted. The semiconductor chip 80 is housed in the cavity 20.

The electrodes of the semiconductor chip 80 are connected to the bottom 1 of the recess.
6 is electrically connected to the inner end of the signal line 30 via a wire 90.

The semiconductor chip 80 is hermetically sealed in a sealing resin 100 together with the inner ends of the signal lines 30 to which the electrodes of the chip are connected and the wires 90. Sealing resin 100
UV curable resin or the like is used, and the resin is potted from above to the semiconductor chip 80, the inner end of the signal line 30 to which the electrode of the chip is connected, and the wire 90, and is cured. I have.

The first semiconductor device shown in FIG. 8 is configured as described above. In the first semiconductor device, the sealing resin 100 can prevent the semiconductor chip 80 from being adversely affected by moisture and dust.

Also, as shown in FIG. 8, the first semiconductor device is turned upside down and the semiconductor device is mounted on the circuit board 11.
0. The signal line 30 formed on the upper surface 18 of the substrate 10 of the semiconductor device is connected to the signal connection line 120 formed on the corresponding upper surface of the circuit board 110.
Can be electrically connected by soldering or the like. Then, the first semiconductor device can be surface-mounted on the circuit board 110.

FIG. 9 shows a preferred embodiment of the second semiconductor device of the present invention, and FIG. 9 is a front sectional view showing a state of use of the second semiconductor device. Hereinafter, the second semiconductor device will be described.

In this second semiconductor device, FIGS.
, Or the second package shown in FIG. 6 (FIG. 9 shows an example of the first package shown in FIGS. 3 and 4), Is hermetically sealed by a heat sink 70
The semiconductor chip 80 is mounted on the heat sink 70 exposed at the bottom of the cavity 22 of the package. The semiconductor chip 80 is housed in the cavity 22.

The rest of the configuration is the same as that of the first semiconductor device shown in FIG. In the second semiconductor device, the semiconductor chip 80 mounted on the heat sink 70
Can be efficiently dissipated to the outside of the second semiconductor device through the heat sink 70. Other functions of the second semiconductor device are similar to those of the first semiconductor device shown in FIG.
This is the same as the semiconductor device.

[0054]

As described above, if the first or second semiconductor device of the present invention is formed by using the first or second package of the present invention, the first or second semiconductor device is formed. The characteristic impedance of the signal line provided in the device can be accurately matched to 50 ohms or the like over the entire length of the signal line. Then, the transmission loss of the high-frequency signal transmitted to the signal line can be reduced.

Further, a signal line can be formed on a substrate made of an organic material having a low dielectric constant. Then, the transmission speed of the high-frequency signal transmitted to the signal line can be increased.

Further, it is not necessary to provide a signal line between the organic layers of the substrate. And in the organic layer of the substrate,
It is possible to obviate the need to provide a via that penetrates the layer up and down and that has a metal plating layer applied to the inner peripheral surface of the through hole. Then, it is possible to prevent the hermeticity of the organic layer of the substrate from being impaired by the via, and the hermeticity of the first or second package or the first or second semiconductor device from being lost. In addition, the troublesome work of forming a signal line between the organic layers of the substrate is not required, and the structure of the first or second package or the first or second semiconductor device is greatly simplified, and the manufacture thereof is facilitated. I can do it.

[Brief description of the drawings]

FIG. 1 is a perspective view of a first package of the present invention.

FIG. 2 is a front sectional view of a first package of the present invention.

FIG. 3 is a perspective view of a second package of the present invention.

FIG. 4 is a front sectional view of a second package of the present invention.

FIG. 5 is a perspective view of a first package of the present invention.

FIG. 6 is a perspective view of a second package of the present invention.

FIG. 7 is a perspective view of a second package of the present invention.

FIG. 8 is a front sectional view showing a use state of the first semiconductor device of the present invention.

FIG. 9 is a front sectional view showing a use state of the second semiconductor device of the present invention.

[Explanation of symbols]

 Reference Signs List 10 substrate 12 concave portion 14 inclined surface 16 concave portion bottom surface 18 substrate upper surface 20, 22 cavity 30 signal line 40 ground layer 50 ground line 60, 62 connection line 70 heat sink 80 semiconductor chip 90 wire 100 sealing resin 110 circuit board 120 signal Connection track

Claims (5)

[Claims] 1. A concave portion is formed on an upper surface of a substrate formed by using an organic material, and an inner surface of the concave portion is formed on an inclined surface which expands obliquely outward from a bottom surface of the concave portion toward an upper open edge of the concave portion. A cavity for semiconductor chip accommodation is formed on the bottom surface of the concave portion in a bottomed state leaving a part of the substrate at the bottom portion, and the signal line is continuous with the bottom surface of the concave portion, the inclined surface, and the upper surface of the substrate connected thereto. And a ground layer for adjusting the characteristic impedance of the signal line is formed on the lower surface of the substrate. 2. A concave portion is formed on an upper surface of a substrate formed by using an organic material, and an inner surface of the concave portion is formed on an inclined surface which expands obliquely outward from a bottom surface of the concave portion toward an upper open edge of the concave portion. Formed, a cavity for accommodating a semiconductor chip is formed on the bottom surface of the concave portion so as to penetrate the substrate vertically, and a signal line is formed continuously on the bottom surface of the concave portion, the inclined surface and the upper surface of the substrate connected thereto, A ground layer for adjusting the characteristic impedance of the signal line is formed on the lower surface of the substrate, a heat sink is joined to the ground layer, and the bottom of the cavity is sealed by the heat sink. Semiconductor package. 3. A ground layer formed on the bottom surface of the concave portion, the inclined surface, and both sides of the signal line on the upper surface of the substrate connected to the concave portion so as to be aligned with the signal line, and the ground line is formed on the lower surface of the substrate. 3. The high-frequency semiconductor package according to claim 1, wherein the high-frequency semiconductor package is electrically connected to the substrate via a connection line formed on an outer surface of the substrate or an inner surface of the cavity. 4. A semiconductor chip is mounted on the bottom of a bottomed cavity of the semiconductor package according to claim 1, and an electrode of the chip is electrically connected to a signal line formed on a bottom surface of the concave portion. A semiconductor device for high frequency, wherein the semiconductor chip is sealed with a sealing resin. 5. A semiconductor chip is mounted on a heat sink exposed at the bottom of the cavity of the semiconductor package according to claim 2, and an electrode of the chip is electrically connected to a signal line formed on a bottom surface of the concave portion. Wherein the semiconductor chip is sealed with a sealing resin.