JPH1117102A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device for enabling high density integration, by mounting bare chips on both surfaces of a substrate. SOLUTION: A recess 6 is formed in one surface 21 of a module substrate 2 and memory bare chips 1 are mounted in this recess 6. A resin is filled into the recess 6 so that a flat resin layer 7 is formed. Memory bare chips 1 are mounted in the form of COB by means of wire-bonding on the other surface 22 of the module substrate 2 by heating the flat surface of the resin layer 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having bare chips mounted on both sides of a substrate.

[0002]

2. Description of the Related Art A memory bare chip or a processor bare chip cut out of a semiconductor wafer is usually mounted on a printed circuit board or the like in a packaged state. However, since the external dimensions of the package are considerably larger than the size of various bare chips themselves, the number of memory packages and the like that can be mounted on a printed circuit board or the like cannot be increased so much.

On the other hand, recently, C by wire bonding has been used.
A technology for directly mounting a bare chip on a substrate has been developed by OB (Chip On Board) mounting. By performing COB mounting by wire bonding, the mounting area can be reduced in size and weight, and high-performance wiring and high performance and speed can be achieved by bare chip mounting.

[0004]

In the case where COB mounting is performed by wire bonding, a wide area is provided on one surface of the substrate and the surface opposite to the chip mounting surface in order to easily attach bonding wires to pads. It is necessary to set the temperature of the pad formed on the substrate (substrate pad) and the pad formed on the bare chip (chip pad) to a uniform constant temperature by heating by contacting a heat source such as a heater over the substrate. However, when a bare chip is already mounted on one surface of the substrate, a heat source such as a heater cannot be brought into contact with the whole of the one surface. It is difficult to perform COB mounting by wire bonding on a surface, and high-density mounting cannot be performed by mounting both sides of a bare chip using wire bonding.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device which enables high-density mounting by mounting bare chips on both sides of a substrate. is there.

[0006]

In order to solve the above-mentioned problems, in a semiconductor device according to the present invention, a bare chip mounted on one surface of a substrate is covered with a resin layer having a flat surface.
Therefore, when a bare chip is mounted on the other surface of the substrate by wire bonding, a heat source such as a heater is brought into contact with the flat surface of the above-described resin layer without any gap, and the substrate is formed on the other surface of the substrate. The pad and the chip pad formed on the bare chip on the other surface can be set to a uniform and uniform temperature. Accordingly, the bare chip can be mounted on the other surface of the substrate by wire bonding, and high-density mounting can be realized by mounting the bare chip on both surfaces of the substrate. The resin layer described above is formed by forming a concave portion on one surface of the substrate and filling the inside with a resin, or forming a convex portion on one surface of the substrate and forming a concave portion on the inside surrounded by the convex portion. Can be easily formed.

In particular, when bare chips are mounted on both sides of the substrate such that the bare chip mounting area on one side of the substrate overlaps the bare chip mounting area on the other side of the substrate, the bare chip is mounted on one side of the substrate. It is difficult to COB mount a bare chip on the other surface of the substrate by wire bonding due to the unevenness caused by the process, but it is possible to set a uniform temperature by forming the above resin layer and heating the surface. Alternatively, bare chips can be mounted on both sides of the substrate. Further, by making the region on one side of the substrate where the resin layer is formed encompass the entire mounting region of the bare chip on the other side of the substrate, the bare chip is heated by heating the surface of the resin layer. This enables uniform heating of the entire mounting area.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a memory module which is a semiconductor device according to an embodiment of the present invention will be specifically described with reference to the drawings.

FIG. 1 is a diagram schematically showing one surface of a memory module 10 which is a semiconductor device according to one embodiment.
As shown in the figure, four memory bare chips 1 individually cut out from a semiconductor wafer are mounted on one surface 21 of a module substrate 2 by wire bonding. The memory bare chip 1 is, for example, a DRAM having a capacity of 4M × 4 bits. Each of the memory bare chips 1 has a rectangular shape, and chip pads 3 are formed in a line in the center along the long side. Have been.

The module substrate 2 is made of SO-DIMM (Sm
all Outline Dual Inline Memory Module) It has external dimensions that can be mounted on a substrate or the like, and two concave portions 6 are formed on one surface 21 of the module substrate 2. The concave portion 6 has a depth larger than the thickness of the memory bare chip 1, and a plurality of substrate pads 4 are formed on the bottom surface of the concave portion 6 substantially in a line. Further, the memory bare chips 1 are mounted one by one on both sides with the plurality of substrate pads 4 interposed therebetween, and the direction in which the plurality of substrate pads 4 are arranged is substantially parallel to the direction in which the plurality of chip pads 3 are arranged. .

The chip pads 3 of the memory bare chip 1 and the substrate pads 4 of the module substrate 2 fixed to the bottom of each recess 6 are connected to each other by bonding wires 5. The substrate pads 4 include one in which two bonding wires 5 are connected and one in which one bonding wire 5 is connected. For terminals commonly connected to a plurality of memory bare chips 1, such as address terminals of the memory bare chip 1, a plurality of bonding wires 5 are connected to the board pads 4 to share the board pads 4. ing.

FIG. 2 is a sectional view taken along line II of FIG. As shown in the figure, a resin layer 7 having a flat surface is formed by filling the space defined by the concave portion 6 formed on one surface 21 of the module substrate 2 with a resin. As described above, since the recess 6 has a depth larger than the thickness of the memory bare chip 1, the bonding wire 5 does not protrude from the surface of the resin layer 7. Therefore, the surface of the resin layer 7 becomes flat.

FIG. 3 is a diagram showing the other surface of the memory module 10 (the surface opposite to the surface shown in FIG. 1). As shown in the figure, four memory bare chips 1 are bonded to the other surface 22 of the module substrate 2 by wire bonding.
OB implemented. As described above, since the surface of the resin layer 7 formed on one surface 21 of the module substrate 2 is flat, a heater (not shown) is provided on the resin layer 7 and the like.
Can be heated by contacting the module substrate 2 without any gap, and the module substrate 2 is heated to a predetermined temperature, and the chip of the memory bare chip 1 fixed to the substrate pad 4 on the other surface 22 or the other surface 22 of the module substrate 2 Pad 3 can be set to a uniform constant temperature. Therefore, the memory bare chip 1 can be mounted on the other surface 22 of the module substrate 2 by COB mounting by wire bonding.

As described above, the memory bare chip 1 is provided on the bottom surface of the concave portion 6 formed on the one surface 21 of the module substrate 2.
Is mounted, and further, resin is filled in a space defined by the concave portion 6,
By forming the resin layer 7 having a flat surface, a heater can be brought into contact with the resin layer 7 and the like without gaps.
Therefore, the substrate pads 4 on the other surface 22 of the module substrate 2 and the chip pads 3 of the memory bare chip 1 fixed to the other surface 22 can be set to a uniform and constant temperature, and the COB by wire bonding can be set. Depending on the implementation,
The memory bare chip 1 can be mounted on the other surface 22. Therefore, the memory bare chip 1 can be mounted on both sides of the module substrate 2, and high-density mounting can be realized by halving the mounting area. In addition, the concave portion 6 is formed by digging down one surface 21 of the module substrate 2, and the memory bare chip 1 is mounted on the bottom surface of the concave portion 6. This is the same as the case where the memory bare chip 1 is COB mounted by wire bonding, and can meet the demand for miniaturization.

In particular, when the area on one surface 21 of the module substrate 2 on which the memory bare chip 1 is mounted and the area on the other surface 22 on which the memory bare chip 1 is mounted partially overlap, Although the unevenness due to the mounting of the memory bare chip 1 on one surface 21 of the module substrate 2 occurs, in the memory module 10 of the present embodiment, the unevenness is covered with the resin layer 7 and the surface is flattened. The memory bare chip 1 can be COB-mounted on the other surface 22 of the module substrate 2 by wire bonding.

Further, by including the entire mounting area of the memory bare chip 1 on the other surface 22 of the module substrate 2 in the region where the resin layer 7 is formed on one surface 21 of the module substrate 2, the resin layer 7 is formed. By contacting the heater with the flat surface of the substrate, the substrate pads 4 on the other surface 22 can be heated to a uniform temperature.

Next, a process of mounting the memory bare chip 1 on both sides of the module substrate 2 will be described.

FIGS. 4 to 6 are views showing a process of mounting the memory bare chip 1 on both sides of the module substrate 2. FIG.

First, as shown in FIG. 4, a concave portion 6 is formed on one surface 21 of the module substrate 2, and the memory bare chip 1 is fixed to the bottom surface of the concave portion 6 with an adhesive or the like, and the bonding wire 5 is connected to the memory wire. The semiconductor device is connected to the chip pads 3 of the bare chip 1 and the substrate pads 4 of the module substrate 2 and mounted by wire bonding. Further, the space defined by the recesses 6 is filled with resin, and a resin layer 7 having a flat surface is formed.
To form After the mounting of the memory bare chip 1 on one surface 21 of the module substrate 2 is completed, the memory bare chip 1 is fixed to the other surface 22 of the module substrate 2 with an adhesive or the like.

Next, as shown in FIG. 5, the module substrate 2 is transported to the upper surface of the heater 30 and heated. Transport is
The operation is performed with the one surface 21 of the module substrate 2 facing downward so that the one surface 21 of the module substrate 2 is in contact with the heater 30. When the heater 30 contacts the resin layer 7 and the like without any gap, the module substrate 2 can be heated uniformly.

By performing such uniform heating, the substrate pads 4 formed on the other surface 22 of the module substrate 2 and the chip pads 3 of the memory bare chip 1 fixed to the other surface 22 are uniformly formed. After the temperature is set to a certain constant value, as shown in FIG. 6, the bonding wire 5 is connected to the chip pad 3 and the substrate pad 4, and COB mounting by wire bonding is performed.

Next, a modified example of the memory module having the memory bare chips 1 mounted on both sides will be described. FIG. 7 is a diagram schematically showing one surface 21 of the memory module 10a, and FIG. 8 is a diagram showing the memory module 1 shown in FIG.
FIG. 3 is a diagram showing a cross section of Oa (a cross section corresponding to FIG. 2).
As shown in these figures, four memory bare chips 1 are mounted on one surface 21 of the module substrate 2a by wire bonding, and a resin layer 7a is formed on almost the entire surface. A sealing frame 8 as a projection having a height greater than the thickness of the memory bare chip 1 is attached to the vicinity of the outer periphery of the module substrate 2a. , Resin layer 7
The surface position a can be adjusted to the height of the sealing frame 8. By making the height of the sealing frame 8 larger than the thickness of the memory bare chip 1, the surface of the resin layer 7a can be flattened without the bonding wires 5 protruding from the surface of the resin layer 7a. If the surface area of the resin layer 7a is large, it is not easy to flatten the surface. Therefore, a rib 9 as a protrusion having a height equal to the height of the sealing frame 8 is provided in the center of the module substrate 2a in parallel with the short side. Is formed and the resin layer 7a is divided into two to form the resin layer 7a.
Has a small surface area. Also, the module substrate 2a
On the other surface 22, four memory bare chips 1 are COB-mounted by wire bonding.

As described above, by forming the resin layer 7a having a flat surface using the sealing frame 8, when the memory bare chip 1 is mounted on the other surface 22 of the module substrate 2a, the resin layer 7a and the like are removed. The module substrate 2a is heated by bringing the module substrate 2a into contact with the heater without any gap, and the memory bare chip 1 fixed to the substrate pad 4 on the other surface 22 or the other surface 22
Can be set to a uniform constant temperature, so that the memory bare chip 1 can be COB-mounted on the other surface 22 by wire bonding. For this reason, the bare chip for memory 1 can be mounted on both sides of the module substrate 2a, and high-density mounting is possible by halving the mounting area.

The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the present invention. In the embodiment described above, the concave portion 6 is formed on one surface 21 of the module substrate 2, or the sealing frame 8 is formed on one surface 21 of the module substrate 2 a, and the resin is filled in the inside thereof. Although the layer 7 is formed, the resin layer 7 can be formed by another method. For example, the memory module 10b shown in FIG.
In, the resin layer 7b is formed by injection molding using a transfer molding method. In the transfer molding method, the resin layer 7b is formed by injecting a resin into a mold, so that the surface of the resin layer 7b can be easily flattened.

In the above embodiment, the module substrate 2
The memory bare chip 1 is mounted by wire bonding on one of the surfaces on which the resin layer 7 is formed, but another mounting method, for example, flip chip mounting may be used.

In the embodiment described above, the module substrate 2
Although an example in which four memory bare chips 1 are mounted has been described above, the number of memory bare chips 1 mounted on the module substrate 2 is not limited to four. However, in ordinary computer equipment, the memory capacity is often set to a multiple of 4, and therefore, the number of memory bare chips 1 mounted on the module substrate 2 is preferably an even number.

In the above-described embodiment, the substrate pads 4 are formed so as to be sandwiched between the two memory bare chips 1 as shown in FIG. Outside. In the above-described embodiment, an example in which a DRAM is mounted as the memory bare chip 1 on the module substrate 2 has been described.
It is also possible to mount another type of memory bare chip 1 such as M or flash ROM, or a bare chip other than a memory.

In the above-described embodiment, the example in which the memory bare chip 1 is mounted on the module substrate 2 has been described. However, the memory bare chip 1 may be mounted on a package substrate,
It may be directly mounted on a memory board such as an SO-DIMM board or a motherboard or a daughter board. Further, in the above-described embodiment, an example in which the memory bare chip 1 is mounted on the module substrate 2 by COB mounting has been described. However, so-called COG (Chip On Glass) mounting in which the memory bare chip 1 is mounted on a glass substrate is performed. Well,
The material of the module substrate 2 can be appropriately changed.

[0029]

As described above, in the semiconductor device of the present invention, a bare chip is mounted on one surface of a substrate, and the bare chip is covered with a flat resin layer. Therefore, when the bare chip is COB-mounted on the other surface of the substrate by wire bonding, a heat source such as a heater can be brought into contact with the resin layer or the like without any gap, and the substrate is heated to a predetermined temperature, and the chip pad or the substrate The pad can be set to a uniform constant temperature. Therefore, bare chips can be mounted on both sides of the substrate, and high-density mounting can be achieved by halving the mounting area.

[Brief description of the drawings]

FIG. 1 is a view schematically showing one surface of a memory module in which a concave portion is formed.

FIG. 2 is a view showing a cross section taken along line II of FIG. 1;

FIG. 3 is a diagram schematically showing an opposite surface of the memory module shown in FIG. 1;

FIG. 4 is a view showing a process of mounting a memory bare chip on one surface of a module substrate and then fixing the memory bare chip on the other surface.

FIG. 5 is a view showing a step of heating by bringing one surface of the module substrate into contact with a heater.

FIG. 6 is a diagram illustrating a process of COB mounting a memory bare chip on the other surface of the module substrate by wire bonding.

FIG. 7 is a diagram schematically illustrating one surface of a memory module in which a protrusion is formed.

FIG. 8 is a diagram showing a cross section of the memory module shown in FIG. 7;

FIG. 9 is a view schematically showing a memory module having a resin layer formed on one surface by a transfer molding method.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 bare chip for memory 2 module substrate 3 pad for chip 4 pad for substrate 5 bonding wire 6 recess 7 resin layer 8 sealing frame 9 rib 10 memory module

Claims (5)

[Claims] 1. A semiconductor device in which bare chips cut out from a semiconductor wafer are mounted on both surfaces of a substrate, wherein the bare chips mounted on one surface of the substrate are covered with a resin layer having a flat surface. A semiconductor device, wherein the bare chip is mounted on the other surface of the substrate by wire bonding. 2. The substrate according to claim 1, wherein the substrate has a concave portion at one surface on which the resin layer is formed, at a position where the bare chip is formed, and a bottom surface of the concave portion. A semiconductor device on which the bare chip is mounted. 3. The substrate according to claim 1, wherein the substrate has a convex portion on one surface on which the resin layer is formed, and an upper surface of the convex portion and a surface of the resin layer are substantially flush with each other. A semiconductor device, which is located above. 4. The substrate according to claim 1, wherein at least a part of the bare chip mounting area on one surface of the substrate overlaps with the bare chip mounting area on the other surface of the substrate. A semiconductor device characterized by the above-mentioned. 5. The substrate according to claim 1, wherein the region on one surface of the substrate on which the resin layer is formed includes the entire mounting region of the bare chip on the other surface of the substrate. A semiconductor device characterized by the above-mentioned.