JPH11163387A - Light-receiving element, and manufacture of, ultraviolet-ray receiving element and light receiving element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a manufacturing method for ultraviolet-ray receiving element, having high response speed and good quantum efficiency. SOLUTION: In a light-receiving element of P-N junction type, PIN junction type, or photodiode such as APD(avalanche photodiode) or FET type, a higher resistance is given by the activation of semiconductor layers FL and SL and heat treatment of ion implantation region HR, and each semiconductor layer is formed by Iny Alx Ga1-x-y N-based materials (x>=0, y>=0) containing impurities, an ion implantation region is formed through ion implantation in a particular region of each semiconductor layer. Thereafter a heat treatment is performed at a heat treatment temperature, capable of having activation treatment of a semiconductor layer containing impurities performed and capable of providing a higher resistance for the ion implantation region, and the activation treatment for the semiconductor layer and high resistance treatment of the ion implantation region are performed at the same time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a structure in which a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type having a different conductivity type from the semiconductor layer are stacked side by side in the thickness direction. ,
A light-receiving element comprising a light-receiving portion having sensitivity to light, and having a pair of electrodes formed so as to be energized over the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type. And a method for producing the same.

[0002]

2. Description of the Related Art As a typical example of such a light receiving element, 3
A semiconductor flame sensor (a type of ultraviolet light receiving element) configured to have sensitivity in a wavelength region of around 00 nm or less will be described below as an example. Such a semiconductor flame sensor can detect a flame radiated by a flame in a wavelength region of about 300 nm or less, thereby detecting the flame in a state distinguished from other light (noise light (sunlight, room light, etc.)). it can.
Such a semiconductor flame sensor has a configuration in which a semiconductor layer of a first conductivity type (for example, p-type) and a semiconductor layer of a second conductivity type (for example, n-type) are stacked side by side in the thickness direction.
There is a so-called PN junction type, PIN junction type, or a photodiode configured as an APD (avalanche photodiode). Further, as an approximate configuration, a so-called FET type is currently proposed by the inventors. Here, when such a semiconductor layer is to be formed, a layer made of a material containing a predetermined impurity is once formed, and after this layer is formed, a heat treatment is performed to activate the semiconductor layer. And a semiconductor layer in a favorable state can be obtained.

On the other hand, when considering such a flame sensor, the leakage current at the time of reverse bias at the Mesa interface between the PN junction, the PIN and the APD, and the leakage current between the source and the drain at the time of pinch-off bypassing around the FET gate are large. Then, the signal corresponding to the weak light is easily buried in the leakage current, or only a signal having a low S / N is easily obtained. In particular, in the case of a flame sensor, in a high-temperature use environment, 1
This is a significant problem because it is a necessary condition to detect light of nW / cm ² or less. Therefore, for the purpose of increasing the resistance of the PN junction, the Mesa interface, and a specific portion around the gate of the FET structure, nitrogen, oxygen, fluorine,
The inventors propose that hydrogen, helium, or the like be ion-implanted to form the ion-implanted region as a high-resistance portion. The process of forming such a high resistance portion includes a combination of an ion implantation step and a heat treatment step of bringing the entire device including the ion implantation region into a predetermined high temperature state. Within the temperature range of ° C,
Heat treatment is performed for 1 minute to 15 minutes.

Therefore, considering heat treatment of a light receiving element,
According to the current method, after forming a semiconductor layer accompanied by a heat treatment, ion implantation is performed for the purpose of forming a high resistance region, and further, a heat treatment for increasing the resistance is performed. This step is shown in FIG. Further, FIG. 1C shows the relationship between the temperature ranges of the heat treatment for different purposes.

[0005]

However, in experiments conducted by the present inventors, when such a heat treatment for the purpose of increasing the resistance is performed, even portions that do not require the increase in the resistance have a slightly higher resistance. A phenomenon was observed. This phenomenon is
According to the inventors, the grain boundaries of the crystals of the single crystal growth film forming the semiconductor layer were widened by the heat treatment, and the defects in the crystals already existing contributed to the generation of deep levels at the time of the crystal growth. thinking. That is, it has been confirmed that the normal semiconductor layer may be deteriorated due to the high resistance treatment.
Therefore, the present invention has been made in view of the above-described circumstances, and its purpose is to prevent the deterioration of a normal semiconductor layer even in the formation of a high resistance portion accompanied by ion implantation and heat treatment. An object of the present invention is to provide a method for manufacturing a light receiving element.

[0006]

According to the present invention, a semiconductor layer of a first conductivity type and a second conductivity type semiconductor layer having a different conductivity type are used.
A semiconductor layer of a conductivity type is stacked side by side in the thickness direction, and a light-receiving portion having sensitivity to light is provided, and the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type are provided. A feature of a method of manufacturing a light receiving element in which a pair of electrodes are formed so as to be energized is that the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type are made of In _y A containing impurities.
I _x Ga _1-xy N (x ≧ 0, y ≧ 0) based material and ion-implanted into a specific portion of the first conductivity type semiconductor layer or the second conductivity type semiconductor layer by ion implantation. Forming an implantation region, performing a heat treatment at a heat treatment temperature capable of activating the semiconductor layer containing the impurity and increasing the resistance of the ion implantation region, and activating the semiconductor layer and the ion implantation region; To simultaneously perform the resistance increasing process. That is, In _y Al _x G
By constituting the light receiving element with a _1-xy N (x ≧ 0, y ≧ 0) -based material, for example, the composition ratio of the group III element (x,
By appropriately selecting y), an element having photosensitivity in a specific wavelength region can be formed. Furthermore, PN junction, Me
By forming the high resistance portion at the sa interface, around the gate of the FET structure, or the like, so-called leakage current can be reduced. When the semiconductor layer and the high resistance portion are formed in this manner, the order of the steps is as follows: 1) formation of a semiconductor layer containing impurities, 2) heat treatment for the purpose of activation, 3) ion implantation, The processing steps performed in the order of heat treatment for the purpose of increasing the resistance are: (1) formation of a semiconductor layer containing impurities, (2) ion implantation, and (3) heat treatment to activate the semiconductor layer and increase the resistance of a specific region. Can be achieved while simplifying the process and minimizing thermal damage to the device. Such a changed state of the process order is shown in comparison with FIGS. The change of this process is performed in the temperature range of the heat treatment for the activation process,
The inventors have found that there is a temperature range that overlaps with the temperature range for the purpose of increasing the resistance, and that such a temperature range is selected and heat treatment is performed at a stretch within this temperature range. According to what they found. FIG.
(C) shows such a temperature range.

[0007] Such a heat treatment temperature range is from 700 ° C to
The temperature is in the range of 850 ° C., and if the processing temperature is lower than this range, the resistance increasing processing may not be sufficiently performed. On the other hand, if the processing temperature is high, there is a possibility that a normal semiconductor layer portion may be deteriorated. As a processing time within such a processing temperature range, a time within a range of 5 minutes to 15 minutes is preferable. Through such a process, it is possible to form a high resistance portion at a predetermined specific portion while preventing deterioration of the semiconductor layer,
An element with good quantum efficiency and high response speed can be manufactured.

In forming a p-type semiconductor layer,
As the impurity, one or more selected from Mg, Ca, and C can be used, and as the ion for performing the high resistance treatment, one or more of nitrogen, oxygen, fluorine, hydrogen, and helium are used. Is preferred. In this case, Mg is particularly easy to handle, and as the ion for implantation,
When using hydrogen, ions can be implanted to a deep position. In the formation of the n-type semiconductor layer, Si can be used as the impurity, and one or more of nitrogen, oxygen, fluorine, hydrogen, and helium are used as ions for performing the high-resistance treatment. Is preferred. Also in this case, as the ion for implantation,
When using hydrogen, ions can be implanted to a deep position.

That is, by manufacturing the light receiving element according to the method for manufacturing a light receiving element according to any one of claims 1 to 4, the deterioration in the semiconductor layer is small and the resistance in the high resistance portion is high. Can be obtained.

[0010] So far when the description of, has been subjected to description relates to the formation of the light-receiving element comprising a specific material _{(In y Al x Ga 1-} xy N (x ≧ 0, y ≧ 0) based material), In the case where an element is configured as an ultraviolet light receiving element and flame light is to be detected in a state where disturbance light is removed, 30 μm is applied according to the method of manufacturing a light receiving element described above.
It is preferable to obtain the semiconductor flame sensor by forming the light receiving portion having sensitivity in a wavelength region near 0 nm or less. Here, the vicinity of 300 nm includes not only 300 nm itself but also a range on the short wavelength side up to about 280 lower than 300 nm.

Now, regarding the detection of the presence of a flame,
The presence or absence of the light can be detected by detecting the light emitted from the flame. In this case, if the light from a light source other than the flame is detected, the flame is erroneously detected. In general, sunlight and fluorescent lamps can be considered as light that causes such erroneous detection. Here, as shown in FIG.
Comparing the spectrum of the flame to be detected with the spectrum of sunlight and a fluorescent lamp (shown as "indoor light" in FIG. 6), the spectrum of the flame has a certain intensity below 300 nm. , Sunlight and fluorescent lights have sufficiently small relative intensities. Therefore, by configuring the flame sensor using a light receiving element having no sensitivity in the visible light region and having a sensitivity in the ultraviolet region, it is possible to detect the presence or absence of a flame by excluding disturbance light such as sunlight or a fluorescent lamp. It will be. In this case, the thickness is preferably 300 nm or less in a room where the influence of a fluorescent lamp is mainly considered, and is preferably 280 nm or less in an outdoor where sunlight is considered. In this case, too, an ultraviolet light receiving element capable of detecting a flame while suppressing the influence of disturbance light,
It can be manufactured with good quantum efficiency and high response speed.

That is, the material composition of each semiconductor layer is selected so that the sensitivity region in the light-receiving portion is less than or equal to about 300 nm, each semiconductor layer is formed, and the semiconductor layer is stacked. By forming a high resistance portion at a predetermined specific portion according to the method of the present application, the obtained flame sensor can have high quantum efficiency in terms of sensitivity and a high response speed to light. Also in this case, 300 nm or less,
Alternatively, the thickness is preferably 280 nm or less.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, a light receiving element (ultraviolet ray) of the present invention will be described.
Embodiment of semiconductor flame sensor as an example of light receiving element)
Will be described with reference to the drawings. The semiconductor flame sensor PS
As shown in FIG. 2, a sapphire substrate 1 which is a single crystal substrate
AlN buffer layer 2, n on top⁺In_yAl_xGa_1-xyN only
Crystal film 3, n^-In _yAl_xGa_1-xyN single crystal film 4,
High resistance In_yAl_xGa_1-xyN single crystal film 5, p^-I
n_yAl_xGa_1-xyN single crystal film 6, p⁺In_yAl_x
Ga_1-xyAn N single crystal film 7 is laminated, and n⁺In_yAl_xG
a_1-xyOn the N single crystal film 3 and p⁺In_yAl_xGa_1-xy
A pair of electrodes 8a and 8b are formed on the N single crystal film 7,
Further, a high-resistance region HR is formed in a peripheral portion of each of the above layers.
Is done.

That is, the first conductivity type semiconductor layer FL is formed.
N⁺In_yAl_xGa_1-xyN single crystal film 3 and n^-
In_yAl_xGa_1-xyN single crystal film 4 and second conductivity type
P as the semiconductor layer SL^-In_yAl_xGa_1-xyN only
Crystal film 6 and p⁺In_yAl _xGa_1-xyN single crystal film 7
Between the high resistance In_yAl_xGa_1-xyN single crystal film
5 to form a light receiving portion PR, and a semiconductor of the first conductivity type.
Electric current is applied between the body layer FL and the semiconductor layer SL of the second conductivity type.
A pair of electrodes 8a and 8b are formed as described above. or,
As is clear from the notation of the conductivity type, the semiconductor of the first conductivity type is used.
In either the body layer FL or the semiconductor layer SL of the second conductivity type
Is also composed of two layers with different carrier concentrations,
In_yAl_xGa_1-xyThe layer closer to the N single crystal film 5 has
The rear concentration is configured to be low. this
In such an element configuration, each layer constituting the light receiving portion PR
Among them, mainly high-resistance In_yAl_xGa_1-xyN single crystal
The film 5 contributes to generation of electron-hole pairs due to incident light. still,
The semiconductor flame sensor PS is a so-called PIN type light receiving element.
And the so-called APD
May be different, but the element configuration differs between the two.
Is the high-resistance In_yAl_xGa_1-xyN single crystal film
5 only.

The spectral sensitivity of the light receiving unit PR having the above configuration is as follows.
It is defined by the composition ratio of the group III element of the In _y Al _x Ga _1-xy N single crystal constituting the light receiving portion PR. Specifically, as the relationship between the band gap and the Al mixed crystal ratio x of the Al _x Ga _1-x N containing no In shown in FIG. 3, the band gap higher Al mixed crystal ratio becomes larger wider light The absorption edge moves to the shorter wavelength side. In _y Al _x Ga in which a part of Al of Al _x Ga _1-x N replaces In
_In the case of _1-xy N, the band gap becomes narrower and the light absorption edge moves to the longer wavelength side as the ratio of replacing In with Al or Ga increases. In the present invention, the semiconductor flame sensor PS is used as a flame sensor. As described above, the spectrum of the light emitted from the gas flame shown as “gas flame light” in FIG. 6 is also shown in FIG. It is desirable that detection can be performed in a state excluding the influence of sunlight or indoor light (light of a fluorescent lamp) acting as noise light.

Therefore, the long wavelength end of the absorption spectrum is 3
It is preferable that the thickness be around 00 nm or less. Specifically, Al _x Ga _{1 -x} containing no In with y = 0
In the case of N, if the Al mixed crystal ratio is selected in the range of 0.42 to 0.45, the band gap becomes approximately 4.5 eV, and the long wavelength end of the absorption spectrum becomes approximately 275 nm. When In is included in the component with y> 0, the above band gap can be obtained by increasing the Al mixed crystal ratio x and reducing the gallium ratio accordingly. However, in the range of y ≧ 0.5, even if the ratio of Al is maximized, the long wavelength end of the absorption spectrum moves too much to the long wavelength side, and in reality, the range of 0 ≦ y <0.5 is satisfied. desirable. On the other hand, if the Al mixed crystal ratio x is too large, the sensitivity to “gas flame light” shown in FIG. 6 also decreases, making it difficult to use as a flame sensor. It is desirable that In addition, if it is assumed that the device is used in a room where sunlight is completely shielded, the band gap is set to approximately 4.3 eV, and even if the absorption edge is slightly moved to the longer wavelength side, almost the same value is obtained. Performance is obtained.

Next, a method of manufacturing the semiconductor flame sensor PS having the above configuration will be described. Each layer constituting the semiconductor flame sensor PS is formed on the sapphire substrate 1 in a wafer state by M
The layers are stacked by an OCVD apparatus. As the MOCVD apparatus, a normal pressure type reactor in which a reaction chamber (film formation chamber) is near normal pressure is used. The lamination of each of the above layers is performed on the sapphire substrate 1 in a wafer state.
The sapphire substrate 1 is heated in a state where is set in the reaction chamber (film forming chamber), and the supply state of the material gas of each constituent element is sequentially switched, whereby the layers are sequentially laminated. Note that the substrate temperature of the sapphire substrate 1 is 400 when the AIN buffer layer 2 is grown.
C. to 600 ° C., and 900 ° C. to 1100 ° C. (most preferably 1050 ° C.) during the growth of each of the above layers on the AIN buffer layer 2.
° C). As the material gas, the constituent elements of In, Al, Ga and N are TMIn (trimethylindium), TMAl (trimethylaluminum), and TMG, respectively.
a (trimethylgallium) and NH ₃ (ammonia), Si as an n-type impurity, Mg as a p-type impurity, SiH ₄ (silane), CP ₂ Mg, respectively.
(Cyclopentane magnesium). When Ca is used as the p-type impurity, so-called ionine plantation is used.

In the lamination of the above layers, the AlN buffer layer 2
Grows to a layer thickness of about 200 ° and n ⁺In_yAl_xGa
_1-xyThe N single crystal film 3 is made of SiH_FourCarry while flowing gas
A concentration is about 1 × 10¹⁸cm^-3Grown to a layer thickness of about 3μm
Let n^-In_yAl_xGa_{1- xy}The N single crystal film 4 is made of SiH
_FourCarrier concentration is about 1 × 10 while flowing gas¹⁷cm ^-3
 To grow to a layer thickness of about 0.1 μm. The product of these layers
Other film forming conditions for the layer are the same as in a known method.
Note that n⁺In_yAl_xGa_1-xyThe layer thickness of the N single crystal film 3 is
Preferably, the thickness is 2 μm or more.
3 μm as shown in FIG.

The high resistance In_yAl_xGa_1-xyN only
When the crystal film 5 is laminated, TMIn, TMA
1, TMGa and NH_ThreeThe material supply amount of each is a (m
ol / sec), b (mol / sec), c (mol / sec)
sec) and X (mol / sec), group V elements
Of the material supply to the group III element, ie, X /
(A + b + c) is set to be 5000 or more
Form a film. By forming a film under such conditions, In
_yAl_xGa_1-xyThe N single crystal film 5 has a carrier concentration of 1
× 10^Fifteencm^-3The following high-resistance single crystal film was obtained,
As an example, a GaN single crystal film is formed with x = 0 and y = 0.
5 × 10 ¹³cm^-3The following carrier concentration
Is obtained. In addition, high resistance In_yAl_xGa
_1-xyWhen forming the N single crystal film 5 as necessary,
Doping with Si, Mg, C or Ca as impurities
Then, the carrier concentration may be adjusted. In addition, normal pressure type MO
The film is formed by the CVD apparatus under the above-described film forming conditions.
With this, very good characteristics can be obtained.
So-called reduced pressure type MOCVD is not limited to normal pressure type.
An apparatus may be used. Decompression type VOCVD equipment
And In_yAl_xGa_1-xyPressure at the time of forming the N single crystal film 5
When the force is about 1/3 to 1/2 atm, III
The material supply ratio to the group elements is set to a high value as described above.
Can be set easily.

The layer thickness of the high-resistance In _y Al _x Ga _{1 -xy} N single crystal film 5 is 0.1 μm when the semiconductor flame sensor PS is a PIN type light receiving element, and the thickness of the semiconductor flame sensor PS is A.
In the case of PD, it is 0.5 μm. The reason why the layer thickness is increased in the case of the APD is to prevent the electric field intensity in the film from being excessively increased when a high voltage is applied to the APD. However, the high-resistance _{In y Al x Ga 1-xy} N
If the layer thickness of the single crystal film 5 is too large, it is necessary to keep in mind that the response speed is reduced. However, when the thickness is about 0.5 μm, a practically sufficient response speed can be obtained.

After the formation of the high resistance In _y Al _x Ga _{1 -xy} N single crystal film 5, the p ^- In _y Al _x Ga _{1 -xy} N single crystal film 6 has a carrier concentration of about ₂ while flowing CP ₂ Mg. 1x1
Grown at 0 ¹⁷ cm ^-3 to a layer thickness of about 0.1 μm, p ⁺ I
The n _y Al _x Ga _{1 -xy} N single crystal film 7 has a carrier concentration of about 1 × 10 ¹⁸ cm ⁻³ and about 0.3 μm while flowing CP ₂ Mg.
m to a layer thickness of m. By the above-described processing, a light receiving portion in which semiconductor layers that have not been subjected to the activation processing are stacked in a multilayer shape can be primitively formed. Next, the process proceeds to an ion implantation process for forming a high resistance region. This process is performed by ion implantation using hydrogen ions, and hydrogen ions are implanted in the thickness direction of the wafer into a region IP indicated by oblique lines in FIG. 4 which is a drawing viewed in the thickness direction of the wafer. Acceleration voltage of ions, implantation depth, as shown in FIG. ^{_{2, n - In y Al x}} Ga 1-xy N is set to be as single-crystal film depth or deeper than reaches 4.

After the formation of the semiconductor layer and the ion implantation for the element specific portion are completed in this manner, the processing for performing the activation of the semiconductor layer and the processing for increasing the resistance, which are features of the present invention, are simultaneously performed. Do it. This processing is performed between 700 and 8
The treatment is performed at 50 ° C. (specifically, 820 ° C.) for 5 to 15 minutes (specifically, 10 minutes).

[0023] Thereafter, as shown in FIG. 5 performs photo-etching process to strip the implanted's partial hydrogen ions to ^{_{n + In y Al x Ga 1}} -xy N single crystal film 3 depth is exposed, the strip The electrode 8b is formed in a portion corresponding to the individual semiconductor flame sensor PS in the portion etched in the above manner, and the electrode 8a is formed in a portion not implanted with hydrogen ions. In FIG. 5, a broken line BL indicates a boundary between a region where hydrogen ions are implanted and a region where hydrogen ions are not implanted. The electrode 8a has a two-layer structure of Ni and Au, and has p ⁺ In _y A
The l _x Ga _1-xy N single crystal film 7 side is Ni, whereas the electrode 8b of a two-layer structure of Ti and ^{_{Al, n + In y Al x}} Ga
_{After the 1-xy} N single crystal film 3 side is made of Ti and laminated by, for example, electron beam evaporation, the electrode 8a is formed in a mesh shape by a lift-off method or chemical etching, and the electrode 8b is formed in a rectangular shape. . After the formation of the electrodes 8a and 8b, elements are separated into individual elements by dicing or the like along element separation lines indicated by alternate long and short dash lines CL in FIG. After the electrodes 8a and 8b are formed, a heat treatment may be performed in order to obtain a more reliable ohmic contact. In this case, the amount of implanted hydrogen ions is considered in consideration of the fact that the implanted hydrogen ions are separated by the heat treatment. Is desirably set to a large value. By performing the element isolation in this manner, as shown in FIG. 2, the first conductive type semiconductor layer FL and the first conductive type semiconductor layer FL are formed on the side surfaces where the first conductive type semiconductor layer FL and the second conductive type semiconductor layer SL are exposed. A high resistance region HR having a high resistance by ion implantation is provided over the second conductivity type semiconductor layer SL.

The semiconductor flame cell manufactured as described above
The sensor PS has an effective light receiving area of 1 cm ^TwoWhen converted to
In addition, a dark current of about 10 nA is obtained. In addition, above
Without the high resistance region HR, the other conditions are the same.
In this case, the dark current becomes about 1 nA or more,
Has been improved. Further, through the process shown in FIG.
And the case where the process shown in FIG.
It is simpler to take the step of FIG.
The response speed of the child to light could be increased. Further
In addition, its quantum efficiency has been improved in the order of%.

[Other Embodiments] Hereinafter, other embodiments will be listed. (1) In the above-described embodiment, the case where the semiconductor flame sensor is configured as a PIN junction type photodiode or an APD is illustrated. However, in the stacked configuration of the light receiving unit PR in the above-described embodiment, a high-resistance In _y Al _x Ga _1-xy N
A stacked structure without the single crystal film 5 may be configured as a PN junction type photodiode. The semiconductor flame sensor PS having the above configuration is the same as the semiconductor flame sensor PS according to the above-described embodiment in the method of manufacturing the semiconductor flame sensor PS.
n _y Al _x except that Ga _1-xy N single crystal film 5 shall not be deposited may be prepared by the same process, if obtained by converting the effective light receiving area to 1 cm ^2, obtained of about dark current of about 10pA Can be Also in this case, in the case of going through the step shown in FIG. 1B and the step of going to the step shown in FIG. 1A, the method of FIG. But,
The response speed of the device to light could be increased. Furthermore, its quantum efficiency has been improved on the order of%. Also,
The method of the present application can be applied even in the case of increasing the resistance around the gate when the FET structure is adopted.

(2) In the above embodiment, the high resistance region HR
Although the case where a hydrogen ion is implanted to form the above is exemplified, other ions such as N, O, F, He, Cl, etc. may be implanted to increase the resistance. In this case, when the implantation depth at the same accelerating voltage, such as N ions, is shallower than that of hydrogen ions, the accelerating voltage is increased accordingly, or the thickness of each layer constituting the light receiving portion PR is increased. Need to be thin. (3) In the above embodiment, as shown in FIG. 4, the ion implantation is performed in the wafer state. However, after the element is separated from the wafer state, the first conductive type semiconductor layer F is formed.
Ion implantation may be performed from the side or obliquely upward toward the side surface portion where L and the second conductive type semiconductor layer SL are exposed.

(4) The electrode 8a may be configured as a so-called transparent electrode. When a transparent electrode is used, the electrode 8a can be formed on the entire light receiving surface. As a specific example of the transparent electrode, for example, Pd may be laminated with a thickness of about 50 °. (5) In the above embodiment, the light to be detected is ^{_{p + In y Al x Ga 1}} -xy through the opening portions of the mesh-like electrode 8a
Although it is configured to be incident on the N single crystal film 7, p ⁺ In _y
On the Al _x Ga _1-xy N single crystal film 7, an AlN anti-reflection film having a thickness equivalent to a quarter wavelength may be formed. Since the material of the antireflection film is made of AlN having a wide band gap, the absorption of the light to be detected by the antireflection film can be suppressed, and the antireflection film is formed to include the antireflection film in a single growth process by MOCVD. It becomes possible.

(6) In the above embodiment, on the single crystal substrate 1
The AlN buffer layer 2 is laminated on the
AlGaN may be used as the buffer layer instead of 2
No. Even when AlGaN is used as the buffer layer,
The lattice constant mismatch with the plate side can be reduced.
You. In this case, n⁺In_yAl_xGa_1-xyN single crystal film
3, n^-In_yAl_xGa_1-xyN single crystal film 4, high resistance
In_yAl_xGa_{1- xy}N single crystal film 5, p^-In_yA
l_xGa_1-xyN single crystal film 6, p⁺In_yAl _xGa
_1-xyAl mixed crystal ratio of N single crystal film 7 and AlGaN buffer layer
If the difference from the Al mixed crystal ratio is 0.1 or less, the high resistance I
n_yAl_xGa_1-xyBetter crystallinity of N single crystal film 5 etc.
You can do something good.

(7) In the above embodiment, a sapphire substrate is used as the single crystal substrate 1, but for example, a SiC single crystal substrate may be used instead of the sapphire substrate. (8) In the above-described embodiment, each of the first conductivity type semiconductor layer FL and the second conductivity type semiconductor layer SL has a two-layer structure with different carrier concentrations, but each may have a single layer structure. . That is, in the above embodiment, n ⁻ In _y A
l _x Ga _1-xy N single crystal film 4 and p ^- In _y Al _x Ga
_{The 1-xy} N single crystal film 6 may be omitted. Further, on the contrary, it constituted by three or more layers, of high resistance _{In y Al x Ga 1-xy} N
It may be configured such that a layer closer to the single crystal film 5 has a lower carrier concentration. (9) In the above embodiment, the first conductivity type is described as n-type and the second conductivity type is described as p-type. However, this is associated for convenience of description, and the first conductivity type is p-type. The type and the second conductivity type can be described as n-type. Further, in the above-described embodiment, an n-type semiconductor layer is arranged on the side closer to the single crystal substrate 1 to form a PIN type. However, a p-type semiconductor layer is arranged on the side closer to the single crystal substrate 1. May be configured as a PIN type. (10) In the above embodiment, the case where the crystal is grown by the MOCVD apparatus is exemplified.
Crystal growth of each layer may be performed by an apparatus.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a semiconductor flame sensor manufacturing process and a heat treatment temperature.

FIG. 2 is a sectional view of the semiconductor flame sensor according to the embodiment of the present invention;

FIG. 3 is a diagram showing a relationship between a composition ratio and a band gap according to the embodiment of the present invention.

FIG. 4 is a plan view schematically showing a part of the manufacturing process of the semiconductor flame sensor according to the embodiment of the present invention.

FIG. 5 is a plan view schematically showing a part of a manufacturing process of the semiconductor flame sensor according to the embodiment of the present invention.

FIG. 6 is a diagram showing a spectrum of gas light or the like;

[Explanation of symbols]

1 of the single-crystal substrate 2 AlN buffer layer 5 high resistance _{In y Al x Ga 1-xy} N single crystal film 8a, the semiconductor layer PR receiving portion SL second conductivity type 8b pair of electrodes HR high resistance region FL first conductivity type Semiconductor layer

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Isamu Akasaki 1-401 Shiogamaguchi, Tenpaku-ku, Nagoya-shi, Aichi Pref.

Claims (7)

[Claims] 1. A light-receiving section having a first conductivity type semiconductor layer and a second conductivity type semiconductor layer having a different conductivity type, which are stacked side by side in the thickness direction. A method for manufacturing a light receiving element, comprising: a pair of electrodes formed so as to be energized over the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type; The semiconductor layer of the conductivity type and the semiconductor layer of the second conductivity type are formed of In _y Al _x Ga _1-xy N (x ≧
(0, y ≧ 0) -based material, and an ion implantation region is formed by ion implantation in a specific portion of the first conductivity type semiconductor layer or the second conductivity type semiconductor layer, and contains the impurity. A light-receiving element capable of activating a semiconductor layer and performing a heat treatment at a heat treatment temperature capable of increasing the resistance of the ion-implanted region, and simultaneously performing the activation treatment of the semiconductor layer and the resistance-improving treatment of the ion-implanted region. Manufacturing method. 2. The method according to claim 1, wherein the impurities are at least one selected from Mg, Ca, and C, and the ions are at least one of nitrogen, oxygen, fluorine, hydrogen, and helium. . 3. The method according to claim 1, wherein the impurity is Si, and the ions are at least one of nitrogen, oxygen, fluorine, hydrogen, and helium. 4. The heat treatment temperature is from 700 ° C. to 850 ° C.
The method for manufacturing a light-receiving element according to any one of claims 1 to 3, wherein the temperature is in a range of: 5. A light-receiving element manufactured according to the method for manufacturing a light-receiving element according to claim 1. 6. The light-receiving element is manufactured according to the method for manufacturing a light-receiving element according to claim 1, wherein the light-receiving part is 30
A method for manufacturing an ultraviolet light receiving element for obtaining an ultraviolet light receiving element having sensitivity in a wavelength region of about 0 nm or less. 7. A flame sensor manufactured according to the method for manufacturing an ultraviolet light receiving element according to claim 6, wherein the light receiving section is an ultraviolet light receiving element having a sensitivity in a wavelength region near 300 nm or less.