JPH11154785A - Manufacture of electronic component - Google Patents

Manufacture of electronic component

Info

Publication number
JPH11154785A
JPH11154785A JP9319745A JP31974597A JPH11154785A JP H11154785 A JPH11154785 A JP H11154785A JP 9319745 A JP9319745 A JP 9319745A JP 31974597 A JP31974597 A JP 31974597A JP H11154785 A JPH11154785 A JP H11154785A
Authority
JP
Japan
Prior art keywords
solder
atmosphere
pressure
soldering
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9319745A
Other languages
Japanese (ja)
Other versions
JP3753524B2 (en
Inventor
Yasuhiro Iwata
泰宏 岩田
Hideaki Sasaki
秀昭 佐々木
Mitsugi Shirai
貢 白井
Kaoru Katayama
薫 片山
Takeshi Miitsu
健 三井津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP31974597A priority Critical patent/JP3753524B2/en
Publication of JPH11154785A publication Critical patent/JPH11154785A/en
Application granted granted Critical
Publication of JP3753524B2 publication Critical patent/JP3753524B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81053Bonding environment
    • H01L2224/81054Composition of the atmosphere
    • H01L2224/81065Composition of the atmosphere being reducing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81053Bonding environment
    • H01L2224/81054Composition of the atmosphere
    • H01L2224/81075Composition of the atmosphere being inert
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/81204Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for efficiently forming an electronic component with a highly reliable solder junction. SOLUTION: Solder set between two components is melted in a chamber 8 that is filled with a gas having a lower oxygen concentration and a higher thermal conductivity than those of the normal atmosphere under a pressure low enough to obtain the same temperature profile as under a normal pressure. Then, while the soldering temperature is maintained, the pressure inside the chamber 8 is rapidly increased immediately before the molten solder is solidified so that voids in the molten solder 3 are compressed. Consequently, the solder volume is reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品の製造方
法に係り、特に、電子部品の製造技術に不可欠とされる
ソルダリング等による接合の信頼性を向上させた電子部
品の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic component, and more particularly, to a method for manufacturing an electronic component in which the reliability of bonding by soldering or the like, which is indispensable for the technology for manufacturing an electronic component, is improved.

【0002】[0002]

【従来の技術】基板とLSI等の電子素子との接合、パ
ッケージの気密封止等に使用されるソルダリング、ある
いは、電子素子への冷却フィン等の接着等はエレクトロ
ニクス分野における最も重要な製造技術として位置付け
られている。このため、ソルダリング等の接合部の信頼
性の確立は、エレクトロニクス分野において非常に重要
な課題とされている。
2. Description of the Related Art The most important manufacturing technology in the electronics field is bonding of a substrate to an electronic element such as an LSI, soldering used for hermetically sealing a package, or bonding a cooling fin or the like to the electronic element. It is positioned as. For this reason, the establishment of the reliability of the joint such as soldering is a very important issue in the electronics field.

【0003】さて、ソルダリング等の接合部の信頼性を
低下させ、ひいては電子機器自体の性能をも低下させる
要因として特に問題視されるのは、はんだ接合部と母材
(基板上の部品搭載用パターン、電子素子の端子パター
ン等)との界面や、はんだ接合部の内部に形成されるボ
イド(気泡)である。
[0003] One of the factors that are considered to be particularly problematic as a factor that lowers the reliability of a joint such as soldering and, consequently, the performance of an electronic device itself, is that a solder joint and a base material (component mounting on a substrate). Voids (bubbles) formed in the interface with the solder pattern and the solder joint.

【0004】図3は前述したような接合部に形成されて
いるボイドの状態を示す図であり、以下、この種のボイ
ドについて図3を参照して説明する。図3において、1
は基板、2は電子素子、4は部品搭載用パターン、5は
端子パターン、6ははんだ接合部、7はボイドである。
FIG. 3 is a view showing a state of a void formed in the above-mentioned joint. This type of void will be described below with reference to FIG. In FIG. 3, 1
Is a substrate, 2 is an electronic element, 4 is a component mounting pattern, 5 is a terminal pattern, 6 is a solder joint, and 7 is a void.

【0005】一般に、電子部品は、2つの母材である基
板1上の部品搭載用パターン4と電子素子2の端子パタ
ーン5との間にはんだ接合部6を形成して構成されてい
る。そして、基板1上への電子素子2の接合は、通常、
基板1上の部品搭載用パターン4と電子素子2の端子パ
ターン5との間にはんだ材を挟み、全体を加熱してはん
だ材を溶融させた後冷却することにより、はんだ接合部
6を形成することにより行われる。この接合の処理にお
いて、図3に示すように、はんだ接合部6の内部、ある
いは、はんだ接合部6内の基板1上の部品搭載用パター
ン4と電子素子2の端子パターン5との界面にボイド7
が形成されてしまうことがある。
In general, an electronic component is formed by forming a solder joint 6 between a component mounting pattern 4 on a substrate 1 which is two base materials and a terminal pattern 5 of an electronic element 2. Then, the bonding of the electronic element 2 onto the substrate 1 is usually performed.
A solder material is sandwiched between the component mounting pattern 4 on the substrate 1 and the terminal pattern 5 of the electronic element 2, and the whole is heated to melt the solder material and then cooled to form a solder joint portion 6. This is done by: In this joining process, as shown in FIG. 3, voids are formed in the solder joint 6 or at the interface between the component mounting pattern 4 on the substrate 1 and the terminal pattern 5 of the electronic element 2 in the solder joint 6. 7
May be formed.

【0006】そこで、ソルダリングによって電子素子等
を接合する際には、一般に、前述したようなボイドの形
成を抑制するための種々の工夫が行われている。例え
ば、こうした工夫を行った従来技術の1つとして、むか
えはんだと呼ばれる前処理を実行する方法が知られてい
る。
Therefore, when joining electronic elements and the like by soldering, generally, various measures are taken to suppress the formation of voids as described above. For example, as one of the prior arts that have made such a contrivance, there is known a method of performing a pre-treatment called "older soldering".

【0007】図4は前処理としてむかえはんだを実行す
る従来技術によるはんだ付け方法の手順を説明する断面
図であり、以下、図4を参照して従来技術によるはんだ
付け方法を説明する。図4において、3ははんだ、9は
ヒータであり、他の符号は図3の場合と同一である。
FIG. 4 is a cross-sectional view for explaining the procedure of a conventional soldering method for performing a pre-treatment of performing pre-soldering. The conventional soldering method will be described below with reference to FIG. In FIG. 4, 3 is solder, 9 is a heater, and other reference numerals are the same as those in FIG.

【0008】図4に示す方法は、まず、図4(a)に示
すように、基板1上の部品搭載用パターン4上にはんだ
3を載せた状態で、図4(b)に示すように、これらを
ヒータ9上に載置し、一旦はんだ3を加熱溶融する。こ
れにより、はんだ3内部に取り込まれた不純物等が気化
し、はんだ3が加熱溶融された溶融はんだ内にボイド7
を発生させる。このボイド7は、溶融はんだの上に脱泡
していく邪魔をするものがないため、図4(b)に示す
状態から速やかに外部に抜け出すことができる。
In the method shown in FIG. 4, first, as shown in FIG. 4 (a), the solder 3 is placed on the component mounting pattern 4 on the substrate 1, and as shown in FIG. These are placed on the heater 9 and the solder 3 is once heated and melted. As a result, impurities and the like taken into the solder 3 are vaporized, and the voids 7 are formed in the molten solder in which the solder 3 is heated and melted.
Generate. Since the void 7 does not obstruct defoaming on the molten solder, the void 7 can quickly escape from the state shown in FIG. 4B.

【0009】その後、図4(c)に示すように、ボイド
7のなくなったはんだ3の上に端子パターン5を有する
電子素子2を載せ、通常のはんだ付けと同様にはんだ3
を再度加熱溶融させるて冷却することにより、図4
(d)に示すように、基板1の上の部品搭載用パターン
4と電子素子2の端子パターン5との間がはんだ接合部
6により接合された電子部品を得ることができる。この
場合、はんだ接合部6内に、ボイドを含まないものとす
ることができ、電子部品の高信頼化を図ることができ
る。
Thereafter, as shown in FIG. 4C, the electronic element 2 having the terminal pattern 5 is placed on the solder 3 having no void 7, and the solder
Is heated and melted again and cooled to obtain FIG.
As shown in (d), an electronic component in which the component mounting pattern 4 on the substrate 1 and the terminal pattern 5 of the electronic element 2 are joined by the solder joint 6 can be obtained. In this case, it is possible to eliminate voids in the solder joint 6, and to increase the reliability of the electronic component.

【0010】なお、前述したようなむかえはんだに関す
る従来技術として、例えば、特開平3−202787号
公報等に記載された技術が知られている。
[0010] As a conventional technique relating to the above-mentioned cross soldering, a technique described in, for example, JP-A-3-202787 is known.

【0011】また、前述したむかえはんだによる方法以
外のボイドの形成を抑制する従来技術のはんだ付け方法
として、例えば、特開平5−291314号公報に記載
された技術が知られている。この方法は、真空熱処理炉
を利用してはんだ付けを行う方法(以下、真空加熱方式
はんだ付け方法という)であり、真空中ではんだ付けを
行うことによってはんだ付け最中に溶融はんだにふくま
れている気泡を強制的に除去してしまうという方法であ
る。
In addition, as a conventional soldering method for suppressing the formation of voids other than the above-mentioned method using the conventional soldering, a technique described in, for example, Japanese Patent Application Laid-Open No. 5-291314 is known. This method is a method of performing soldering using a vacuum heat treatment furnace (hereinafter, referred to as a vacuum heating type soldering method). By performing soldering in a vacuum, it is included in molten solder during soldering. This is a method of forcibly removing bubbles that are present.

【0012】さらに、他の従来技術として、例えば、特
開昭63−22603号公報に記載された技術が知られ
ている。この従来技術による方法は、予めはんだ付けの
ための空間領域を作った状態ではんだを供給しておき、
前記空間領域を真空状態として真空中で加熱を行っては
んだを溶融させ、はんだ溶融時に空間領域内の雰囲気の
圧力を上昇させて、溶融したはんだの内部に生じるボイ
ド潰してしまうという方法(以下、真空空間方式とい
う)である。
Further, as another conventional technique, for example, a technique described in Japanese Patent Application Laid-Open No. 63-22603 is known. In this method according to the prior art, solder is supplied in a state where a space area for soldering is created in advance,
A method in which the space is heated in a vacuum to melt the solder in a vacuum state, the pressure of the atmosphere in the space is increased at the time of melting the solder, and voids generated inside the melted solder are crushed (hereinafter, referred to as a method). Vacuum space method).

【0013】[0013]

【発明が解決しようとする課題】前述したむかえはんだ
を実行する方法は、事前にはんだを一旦溶融させること
によりボイドを除去することができ、はんだ接合部の信
頼性を向上させることができるが、事前にはんだを溶融
させる処理に要する時間だけ余分の時間を要することに
なり、はんだ接合のための処理全体の効率が低下してし
まういう新たな問題点が発生する。
According to the above-described method of performing the soldering, the voids can be removed by once melting the solder in advance, and the reliability of the solder joint can be improved. Extra time is required for the time required for the process of melting the solder in advance, and a new problem occurs in that the efficiency of the entire process for solder joining is reduced.

【0014】また、真空加熱方式のはんだ付け方法は、
真空状態にある真空熱処理炉内においてワーク温度を常
温からはんだ付け温度まで昇温させる必要があり、この
ために要する時間が、常圧で加熱した場合の約2倍にな
ってしまい、効率的でないという問題点を有している。
このような、効率面における問題は、複数のはんだ付け
装置を同時に稼動させることによって容易に解決するこ
とができるが、この方法は、複数のはんだ付け装置の導
入に関連して新たに相当な設備投資を行わなければなら
ず、製造コストを抑制の要求が一層強まりつつある現状
に対しての妥当な解決策とはいえないという問題点を有
している。
The soldering method of the vacuum heating method is as follows.
It is necessary to raise the temperature of the work from room temperature to the soldering temperature in a vacuum heat treatment furnace in a vacuum state, and the time required for this is about twice as long as heating at normal pressure, which is not efficient. There is a problem that.
Such efficiency problems can be easily solved by operating multiple soldering apparatuses simultaneously, but this method requires a considerable amount of new equipment in connection with the introduction of multiple soldering apparatuses. There is a problem that it is not a reasonable solution to the current situation where investment has to be made and the demand for suppressing the production cost is increasing.

【0015】また、前述の真空空間方式によるはんだ付
け方法は、前述した真空加熱方式と同様に真空中での加
熱を必要とするため、はんだ付け温度まで昇温させるた
めに相当な時間を要するという問題点を有しており、ま
た、予め空間領域を作った状態ではんだを供給しなけれ
ばならず、作業性が悪い等の問題点を有している。
Further, since the above-mentioned soldering method using the vacuum space method requires heating in a vacuum as in the above-described vacuum heating method, it takes a considerable time to raise the temperature to the soldering temperature. There is a problem that solder must be supplied in a state where a space region has been created in advance, which causes a problem such as poor workability.

【0016】さらに、前述したむかえはんだ方式、上記
真空加熱方式、真空空間方式の何れ方式の場合にも、基
板がセラミックス等の多孔質材料で構成されているこ
と、はんだ付けに先立つ前処理(めっきなど)で液体に
浸漬された基板が乾燥しきっていないなどの理由から、
はんだ加熱溶融中に、気体が基板内部から常に発生し続
けてくるため、溶融はんだ内への気体の巻き込み及び発
生を完全に抑制するができず、最終的に形成されるはん
だ接合部には必ずボイドが形成されてしまうという問題
点を有している。
In any of the above-mentioned soldering method, vacuum heating method, and vacuum space method, the substrate is made of a porous material such as ceramics, and a pretreatment (plating) prior to soldering is performed. Etc.), the substrate immersed in the liquid is not completely dried,
During the heating and melting of the solder, gas is constantly generated from the inside of the board, so the entrainment and generation of gas into the molten solder cannot be completely suppressed. There is a problem that voids are formed.

【0017】本発明の目的は、前述した従来技術の問題
点を解決し、より信頼性の高いはんだ接合部を効率的に
形成することができるはんだ付け方法による電子部品の
製造方法を提供することにあり、かつ、併せて、従来の
はんだ付け方法により形成された不良なはんだ接合部の
信頼性を簡単に確保することができるはんだ付け方法に
よる電子部品の製造方法を提供することにある。
An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a method of manufacturing an electronic component by a soldering method capable of efficiently forming a more reliable solder joint. Another object of the present invention is to provide a method of manufacturing an electronic component by a soldering method which can easily secure the reliability of a defective solder joint formed by a conventional soldering method.

【0018】[0018]

【課題を解決するための手段】本発明によれば前記目的
は、密封容器内に形成された雰囲気中で、2つの母材間
に介在するはんだまたははんだペーストを加熱溶融し、
または、すでにはんだ接合された2つの母材間のはんだ
を再溶融することにより、はんだ接合部を形成する電子
部品の製造方法において、前記雰囲気として大気よりも
熱伝導率の高い気体で形成された雰囲気を準備し、前記
はんだの加熱溶融に先立ち前記雰囲気の圧力を減少させ
た状態で前記はんだを溶融させ、溶融されたはんだの凝
固前に前記雰囲気の圧力を加熱溶融前の圧力よりも高く
することにより達成される。
According to the present invention, an object of the present invention is to heat and melt a solder or a solder paste interposed between two base materials in an atmosphere formed in a sealed container.
Alternatively, in the method for manufacturing an electronic component that forms a solder joint by re-melting the solder between two base materials that have already been solder-joined, the atmosphere is formed with a gas having a higher thermal conductivity than the atmosphere as the atmosphere. An atmosphere is prepared, and the solder is melted in a state where the pressure of the atmosphere is reduced prior to the heating and melting of the solder, and the pressure of the atmosphere is higher than the pressure before the heating and melting before the molten solder is solidified. This is achieved by:

【0019】また、前記目的は、前記大気よりも熱伝導
率の高い気体による雰囲気として、大気よりも酸素濃度
の低い雰囲気とすることにより、また、前記はんだの加
熱溶融に先立って圧力を減少させた雰囲気の圧力を、は
んだ接合を行う2つの母材温度の上昇が常圧のときとほ
ぼ同一となる範囲の圧力とすることにより達成される。
[0019] The object of the present invention is to provide a gas atmosphere having a higher thermal conductivity than the atmosphere, the atmosphere having a lower oxygen concentration than the air, and to reduce the pressure prior to the heating and melting of the solder. This can be achieved by setting the pressure of the atmosphere in a range in which the temperature of the two base materials for performing the solder joining rises substantially at the same level as at normal pressure.

【0020】前述した大気よりも熱伝導率の高い気体で
形成された常圧以下の雰囲気は、外部から与えられる熱
により速やかに常温からはんだ付け温度まで昇温させる
ことができる。従って、短い余熱時間で、はんだを溶融
させることができる。例えば、この気体として、熱伝導
率1.4×10~1w/mKのヘリウム(He)ガスを使
用し、常圧(760Torr)の1/5(約150To
rr)としたとき、従来技術の欄で説明した真空加熱方
式のはんだ付け方法に使用されていると同性能なヒータ
を使用しても、この従来方式の1/2以下の余熱時間で
はんだを加熱溶融させることができ、はんだを常圧で加
熱溶融した場合と同一の温度プロファイルを得ることが
できる。
The above-mentioned atmosphere formed by a gas having a higher thermal conductivity than that of the atmosphere and below normal pressure can be quickly heated from normal temperature to the soldering temperature by externally applied heat. Therefore, the solder can be melted in a short preheating time. For example, as this gas, helium (He) gas having a thermal conductivity of 1.4 × 10 -1 w / mK is used, and / of normal pressure (760 Torr) (about 150
rr), even if a heater having the same performance as that used in the vacuum heating type soldering method described in the section of the prior art is used, the solder can be heated in less than half the time of the conventional method. It can be heated and melted, and the same temperature profile can be obtained as when the solder is heated and melted at normal pressure.

【0021】大気よりも熱伝導率の高い気体として、前
述したHeガス以外に水素(H2) ガスがあり、Heガス
よりさらに熱伝導率の高いが、H2 ガスは、大気と混合
されたとき爆発しやすく、取り扱いが難しい。しかし、
Heガスに4%程度のH2 ガスを混入することにより安
全に使用することができ、本発明は、このような混合ガ
スを使用することにより、さらに良い結果を得ることが
できる。
As a gas having a higher thermal conductivity than the atmosphere, there is a hydrogen (H 2 ) gas in addition to the above-mentioned He gas, which has a higher thermal conductivity than the He gas, but the H 2 gas is mixed with the atmosphere. Sometimes explodes easily and is difficult to handle. But,
By mixing about 4% of H 2 gas into He gas, it can be used safely, and in the present invention, even better results can be obtained by using such a mixed gas.

【0022】また、加熱溶融されたはんだが凝固する前
(好ましくは加熱溶融されたはんだが、完全に凝固する
直前のタイミングで)に、雰囲気の圧力を常圧まで急激
に戻すこと(増加させる)により、加熱溶融中に形成さ
れた気泡が、その形跡をほとんど残さない程度に圧縮さ
れる。従って、最終的に形成されるはんだ接合部には、
ボイドがほとんど残存しない状態とするすることができ
る。このとき、加熱溶融前の圧力と加熱溶融中のはんだ
が凝固する直前に戻した圧力との差が大きければそれだ
けボイドが圧力比に比例して圧縮されることになる。
Before the heat-melted solder solidifies (preferably at a timing immediately before the heat-melted solder completely solidifies), the pressure of the atmosphere is rapidly returned to normal pressure (increased). Thereby, the bubbles formed during the heating and melting are compressed to such an extent that the bubbles hardly remain. Therefore, the finally formed solder joints
A state in which almost no void remains can be obtained. At this time, if the difference between the pressure before the heat melting and the pressure returned immediately before the solder being solidified during the heat melting is large, the void is compressed in proportion to the pressure ratio.

【0023】[0023]

【発明の実施の形態】以下、本発明による電子部品の製
造方法の一実施形態を図面により詳細に説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a method for manufacturing an electronic component according to the present invention will be described in detail with reference to the drawings.

【0024】図1は本発明の一実施形態による電子部品
の製造方法の処理動作を説明するフローチャート、図2
は処理の途中におけるワークの状態を示す断面図であ
る。図2において、8はチャンバであり、他の符号は図
3、図4の場合と同一である。
FIG. 1 is a flowchart for explaining the processing operation of the electronic component manufacturing method according to one embodiment of the present invention, and FIG.
FIG. 3 is a cross-sectional view showing a state of a workpiece during processing. In FIG. 2, reference numeral 8 denotes a chamber, and other reference numerals are the same as those in FIGS.

【0025】なお、以下に説明する本発明の一実施形態
は、2つの母材としての基板1上の部品搭載用パターン
4(表面積40cm2 程度)と、電子素子2の端子パター
ン5(表面積50cm2 程度)との間をはんだ接合して電
子部品を製造するものとする。また、当然のことではあ
るが、基板1にスルホールが形成されているか否かは問
わない。また、基板1の部品搭載用パターン4と電子素
子2の端子パターン5の面積の大小関係も問わない。
In one embodiment of the present invention described below, a component mounting pattern 4 (surface area of about 40 cm 2 ) on a substrate 1 as two base materials and a terminal pattern 5 (surface area of 50 cm 2 ) of the electronic element 2 are used. 2 )) to manufacture electronic components by soldering. In addition, it does not matter whether or not the through hole is formed in the substrate 1 as a matter of course. Also, the size relationship between the component mounting pattern 4 of the substrate 1 and the terminal pattern 5 of the electronic element 2 does not matter.

【0026】(1)まず、作業者は、図2(A)に示す
ように、基板1の部品搭載パターン4上にはんだ3をセ
ットする。このとき、基板1の部品搭載パターン4上に
はんだペースト等を塗布してもよい。その後、その上に
重ねて電子素子2を搭載することにより、基板1の部品
搭載パターン4と電子素子2の端子パターン5との間に
はんだ3を挟み込む。そして、このように構成されたワ
ークを、図2(B)に示すようにチャンバ8内部のヒー
タ9上に配置する。この場合、基板1の部品搭載パター
ン4とは反対側の面がヒータ9と接触するようにワーク
をヒータ9上に載置する(ステップ100)。
(1) First, an operator sets the solder 3 on the component mounting pattern 4 of the board 1 as shown in FIG. At this time, a solder paste or the like may be applied on the component mounting pattern 4 of the substrate 1. After that, the electronic element 2 is mounted thereon so that the solder 3 is sandwiched between the component mounting pattern 4 of the substrate 1 and the terminal pattern 5 of the electronic element 2. Then, the work thus configured is arranged on the heater 9 inside the chamber 8 as shown in FIG. In this case, the work is placed on the heater 9 such that the surface of the substrate 1 opposite to the component mounting pattern 4 contacts the heater 9 (step 100).

【0027】(2)以上のセッティングの終了後、密封
容器により構成される処理室であるチャンバ8の内部を
真空ポンプにより減圧し、熱伝導率の高いガス(例え
ば、Heガス、HeとH2 との混合ガス等)を導入す
る。このとき、導入されたガスにより形成された雰囲気
がある一定の酸素濃度になるまでこの作業を繰り返す
(ステップ101)。
(2) After the above setting is completed, the inside of the chamber 8, which is a processing chamber constituted by a sealed container, is depressurized by a vacuum pump, and a gas having a high thermal conductivity (for example, He gas, He and H 2) is used. Etc.). At this time, this operation is repeated until the atmosphere formed by the introduced gas reaches a certain oxygen concentration (step 101).

【0028】(3)その後、さらにもう一度真空ポンプ
により減圧し、チャンバ8内の雰囲気が所定の圧力にな
るように圧力コントローラにより制御しなから前述した
熱伝導率の高いガスをチャンバ8内に導入して所定の圧
力にする。なお、この処理は、高性能な真空ポンプを使
用して一旦高真空にした後にガスの供給を行うようにす
ることにより、ステップ101との処理と合わせて1度
の処理で行うようにすることもできる。このとき、ガス
導入によるチャンバ内の圧力は、常圧までガスを導入を
して加熱を行った場合と同一の温度プロファイルが得ら
れることが必要である。そして、このときの雰囲気内の
圧力は、導入するガスの熱伝導率や、基板サイズ及び材
質により異なることになる。説明している実施形態で
は、熱伝導率の高いガスとしてHeガスを使用し、前述
した大きさの部品搭載パターン4を持つ基板1の処理を
行った場合、雰囲気の圧力として、常圧の1/5程度ま
で加熱溶融前の圧力を下げても、常温までガスを導入し
た場合と同一の温度プロファイル(時間対温度上昇の特
性)を得ることができた(ステップ102)。
(3) Thereafter, the pressure is further reduced again by the vacuum pump, and the gas having a high thermal conductivity is introduced into the chamber 8 while the atmosphere in the chamber 8 is controlled by the pressure controller so as to have a predetermined pressure. To a predetermined pressure. Note that this process is performed once by using a high-performance vacuum pump to supply high-vacuum gas and then supplying the gas, so that the process is performed once together with the process in step 101. Can also. At this time, the pressure in the chamber due to gas introduction needs to obtain the same temperature profile as when heating is performed by introducing gas to normal pressure. The pressure in the atmosphere at this time differs depending on the thermal conductivity of the gas to be introduced, the substrate size and the material. In the described embodiment, when He gas is used as the gas having a high thermal conductivity and the substrate 1 having the component mounting pattern 4 having the above-described size is processed, the atmospheric pressure is set to 1 at normal pressure. Even if the pressure before heating and melting was reduced to about / 5, the same temperature profile (time-to-temperature rise characteristic) as that when the gas was introduced to room temperature could be obtained (step 102).

【0029】(4)その後、ヒータ9を作動させてチャ
ンバ8の内部を一気に加熱するように加熱を開始する。
前述までの処理において、チャンバ8の内部が減圧され
た状態とされているが、チャンバ8内は、大気よりも熱
伝導率の高い雰囲気ガスで充満されており、さらに温度
プロファイルが常温時と同様になる圧力までしか減圧し
ていないため、真空加熱方式のはんだ付け方法に使用さ
れているヒータと同等な性能のヒータを使用しても、こ
の方法の1/2以下の余熱時間で、チャンバ8の内部温
度を常温からはんだ付け温度まで速やかに昇温させるこ
とができる。なお、ここでいうはんだ付け温度とは、使
用しているはんだ3の種類に応じて設定される温度であ
り、例えば、はんだ3として共晶はんだ(Sn−37P
b:融点183℃)を使用する場合、融点よりもやや高
めの約200℃程度の温度に設定するのが通常である
(ステップ103)。
(4) Thereafter, the heater 9 is operated to start heating so as to heat the inside of the chamber 8 at a stretch.
In the processing described above, the inside of the chamber 8 is depressurized, but the inside of the chamber 8 is filled with an atmosphere gas having a higher thermal conductivity than the atmosphere, and the temperature profile is the same as that at normal temperature. Therefore, even if a heater having the same performance as the heater used in the vacuum heating type soldering method is used, the chamber 8 can be heated in less than half the time of this method. Can be quickly raised from the normal temperature to the soldering temperature. Here, the soldering temperature is a temperature set according to the type of the solder 3 used, for example, a eutectic solder (Sn-37P
b: 183 ° C.) is usually set at a temperature of about 200 ° C., which is slightly higher than the melting point (step 103).

【0030】(5)チャンバ8の内部温度をはんだ付け
温度まで上昇させた後、予め定めたはんだ付け時間が経
過するまでの間、チャンバ8の内部温度(正確には基板
1と電子素子2の温度)が維持される程度にヒータ9を
作動させ続ける。この間に、基板1の部品搭載用パター
ン4と電子素子2の端子パターン5との間に挟み込まれ
たはんだ3は、加熱溶融して図2(C)に示すように、
基板1上の部品搭載用パターン4と電子素子2の端子パ
ターン5とに充分ぬれ広がる。なお、大気よりも酸素濃
度の低い雰囲気中では、溶融はんだ3の表面に、溶融は
んだ3のぬれ広がりを妨げる酸化皮膜が形成されること
がほとんどないため、予めはんだ3の表面にフラックス
を塗布しておく必要はない。そのため、有機溶剤等によ
る洗浄工程も必要としない(ステップ104)。
(5) After the internal temperature of the chamber 8 has been raised to the soldering temperature, the internal temperature of the chamber 8 (to be precise, the substrate 1 (Temperature) is maintained so that the heater 9 is maintained. During this time, the solder 3 sandwiched between the component mounting pattern 4 of the substrate 1 and the terminal pattern 5 of the electronic element 2 is heated and melted, as shown in FIG.
It spreads sufficiently on the component mounting pattern 4 on the substrate 1 and the terminal pattern 5 of the electronic element 2. In an atmosphere having an oxygen concentration lower than that of the atmosphere, an oxide film that hinders the spread of the molten solder 3 is hardly formed on the surface of the molten solder 3. You don't have to. Therefore, a cleaning step using an organic solvent or the like is not required (step 104).

【0031】(6)その後、溶融されたはんだが凝固す
る前、できればその直前にチャンバ8内にガスを導入し
て、チャンバ8の内部圧力を適当な圧力(定圧である7
60Torr程度)まで急速に上昇させる。そして、チ
ャンバ8内部の圧力状態を維持したまま、適当な時間
(通常30秒程度)だけ放置しておく。これにより、溶
融はんだ3に含まれているボイド7は、この圧力の急激
な上昇により強制的に圧縮され、その形跡をほとんど残
さない程度に縮小され、図2(D)に示すように、最終
的に形成されるはんだ接合部6にほとんどボイド7が残
存しない状態とされる。すなわち、これにより、従来除
去しきれなかったボイドをほぼ完全に除去することがで
きる。なお、この処理におけるチャンバ8の内部圧力と
放置時間とは、一意に定まるものではないため、使用す
るはんだ3の組成や体積、チャンバ8の容積に応じて適
宜調節することが望ましい(ステップ105)。
(6) Thereafter, a gas is introduced into the chamber 8 before, if possible, immediately before the molten solder solidifies, and the internal pressure of the chamber 8 is adjusted to an appropriate pressure (a constant pressure of 7).
(About 60 Torr). Then, while maintaining the pressure state inside the chamber 8, the chamber 8 is left for an appropriate time (usually about 30 seconds). As a result, the voids 7 contained in the molten solder 3 are forcibly compressed by the rapid rise of the pressure, and are reduced to such a degree that almost no trace is left, and as shown in FIG. The voids 7 hardly remain in the solder joints 6 to be formed. That is, this makes it possible to almost completely remove the voids that could not be removed conventionally. Since the internal pressure and the standing time of the chamber 8 in this process are not uniquely determined, it is desirable to appropriately adjust the composition and volume of the solder 3 to be used and the volume of the chamber 8 (step 105). .

【0032】(7)その後、ヒータの駆動を停止し、冷
却装置を駆動することによりチャンバ8の内部を冷却
し、溶融はんだ3を徐々に凝固させ、最終的に、基板1
自体を常温まで冷却した後、チャンバ8内部から基板1
を取り出す(ステップ106、107)。
(7) After that, the driving of the heater is stopped, and the inside of the chamber 8 is cooled by driving the cooling device, and the molten solder 3 is gradually solidified.
After cooling itself to room temperature, the substrate 1
Is taken out (steps 106 and 107).

【0033】前述した本発明の一実施形態による方法に
よれば、むかえはんだ等の前処理をまったく実行するこ
となく、かつ、加熱時間をまったく延長させることな
く、より良好なはんだ接合部を形成することができ、効
率的電子部品を製造することができる。
According to the method according to the embodiment of the present invention described above, a better solder joint can be formed without performing any pretreatment such as soldering and without extending the heating time at all. And an efficient electronic component can be manufactured.

【0034】前述した本発明の一実施形態は、基板1上
の部品搭載用パターン4と、電子素子2の端子パターン
5とをはんだ接合して電子部品を製造する場合を例にあ
げて説明してが、本発明は、これ以外にほかの部品同士
をはんだ接合する場合、例えば、基板上に放熱板をはん
だ接合する場合、あるいは、パッケージをはんだ封止す
る場合等にも、操作上になんら特別な変更を必要とする
ことなく適用することができる。
In the above-described embodiment of the present invention, a case where an electronic component is manufactured by soldering the component mounting pattern 4 on the substrate 1 and the terminal pattern 5 of the electronic element 2 will be described as an example. However, the present invention does not require any operation when soldering other components to each other, for example, when soldering a heat sink on a substrate, or when sealing a package. It can be applied without any special changes.

【0035】また、前述した本発明の実施形態は、チャ
ンバ8の内部温度等をセンサでインプロセス計測し、そ
の計測結果に基づいて圧力をコントロールするようにし
ているが、本発明は、必ずしもこのようにする必要はな
く、例えば、過去の経験に基づいてはんだ付け処理のタ
イムチャートを予め作成しておき、タイマで計測したは
んだ付け処理開始時間から経過時間に基づいて圧力を制
御してもよい。
In the above-described embodiment of the present invention, the internal temperature of the chamber 8 and the like are measured in-process by a sensor, and the pressure is controlled based on the measurement result. For example, a time chart of the soldering process may be prepared in advance based on past experience, and the pressure may be controlled based on the elapsed time from the soldering process start time measured by the timer. .

【0036】さらに、前述した本発明の一実施形態は、
従来のはんだ付け方法によって形成された不良なはんだ
接合部の信頼性をも容易に回復させ、不良なはんだ接合
部を有する電子部品を正常な信頼性の高いものに回復さ
せることができる。この場合、はんだ接合部が不良な電
子部品を、チャンバ8内にセットした後、図1により説
明した処理を実行すればよい。
Further, the above-described embodiment of the present invention
The reliability of the defective solder joint formed by the conventional soldering method can be easily restored, and the electronic component having the defective solder joint can be restored to a normal and highly reliable one. In this case, the process described with reference to FIG. 1 may be performed after an electronic component having a defective solder joint is set in the chamber 8.

【0037】[0037]

【発明の効果】以上説明したように本発明によれば、従
来よりもより信頼性の高いはんだ接合部を特別な治工具
を必要とせずに効率的に形成することができ、はんだ接
合を行う電子部品を効率的に製造することができる。ま
た、併せて、従来のはんだ付け方法によって形成された
不良なはんだ接合部の信頼性をも容易に回復させること
ができる。さらに、フラックスを使用する必要もないた
め、環境に悪影響を与えることがないという効果をも得
ることができる。
As described above, according to the present invention, a solder joint having higher reliability than before can be formed efficiently without the need for special jigs and tools. Electronic components can be manufactured efficiently. In addition, the reliability of the defective solder joint formed by the conventional soldering method can be easily recovered. Furthermore, since there is no need to use a flux, an effect of not adversely affecting the environment can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態による電子部品の製造方法
の処理動作を説明するフローチャートである。
FIG. 1 is a flowchart illustrating a processing operation of an electronic component manufacturing method according to an embodiment of the present invention.

【図2】処理の途中におけるワークの状態を示す断面図
である。
FIG. 2 is a cross-sectional view showing a state of a workpiece during processing.

【図3】はんだ接合部に形成されているボイドの状態を
示す図である。
FIG. 3 is a diagram showing a state of a void formed in a solder joint.

【図4】前処理としてむかえはんだを実行する従来技術
によるはんだ付け方法の手順を説明する断面図である。
FIG. 4 is a cross-sectional view for explaining a procedure of a soldering method according to a conventional technique for performing pre-soldering as preprocessing.

【符号の説明】[Explanation of symbols]

1 基板 2 電子素子 3 はんだ 4 基板1の部品搭載用パターン 5 電子素子の端子パターン 6 はんだ接合部 7 ボイド 8 チャンバ 9 ヒータ DESCRIPTION OF SYMBOLS 1 Substrate 2 Electronic element 3 Solder 4 Component mounting pattern of substrate 1 5 Terminal pattern of electronic element 6 Solder joint 7 Void 8 Chamber 9 Heater

───────────────────────────────────────────────────── フロントページの続き (72)発明者 片山 薫 神奈川県秦野市堀山下1番地 株式会社日 立製作所汎用コンピュータ事業部内 (72)発明者 三井津 健 神奈川県秦野市堀山下1番地 株式会社日 立製作所汎用コンピュータ事業部内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Kaoru Katayama 1st Horiyamashita, Hadano-shi, Kanagawa Prefecture General-purpose Computer Division, Hitachi, Ltd. (72) Inventor Ken Ken Mitsui 1st Horiyamashita, Hadano-shi, Kanagawa Japan Inside the General-purpose Computer Division of Ritsu Works

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 密封容器内に形成された雰囲気中で、2
つの母材間に介在するはんだまたははんだペーストを加
熱溶融し、または、すでにはんだ接合された2つの母材
間のはんだを再溶融することにより、はんだ接合部を形
成する電子部品の製造方法において、前記雰囲気として
大気よりも熱伝導率の高い気体で形成された雰囲気を準
備し、前記はんだの加熱溶融に先立ち前記雰囲気の圧力
を減少させた状態で前記はんだを溶融させ、溶融された
はんだの凝固前に前記雰囲気の圧力を加熱溶融前の圧力
よりも高くすることを特徴とする電子部品の製造方法。
In an atmosphere formed in a sealed container, 2
In a method for manufacturing an electronic component that forms a solder joint by heating and melting a solder or a solder paste interposed between two base materials, or by remelting a solder between two base materials that have already been soldered, An atmosphere formed of a gas having a higher thermal conductivity than the atmosphere is prepared as the atmosphere, and the solder is melted in a state where the pressure of the atmosphere is reduced prior to the heating and melting of the solder, and the molten solder is solidified. A method of manufacturing the electronic component, wherein the pressure of the atmosphere is made higher than the pressure before the heating and melting.
【請求項2】 前記大気よりも熱伝導率の高い気体によ
る雰囲気は、大気よりも酸素濃度の低い雰囲気であるこ
とを特徴とする請求項1記載の電子部品の製造方法。
2. The method for manufacturing an electronic component according to claim 1, wherein the atmosphere of the gas having a higher thermal conductivity than the atmosphere is an atmosphere having a lower oxygen concentration than the atmosphere.
【請求項3】 前記はんだの加熱溶融に先立って圧力を
減少させた雰囲気の圧力は、はんだ接合を行う2つの母
材温度の上昇が常圧のときとほぼ同一となる範囲の圧力
であることを特徴とする請求項1または2記載の電子部
品の製造方法。
3. The pressure of the atmosphere in which the pressure is reduced prior to the heating and melting of the solder is a pressure within a range in which a rise in the temperature of two base materials for performing the solder joining is substantially the same as that at normal pressure. The method for manufacturing an electronic component according to claim 1, wherein:
JP31974597A 1997-11-20 1997-11-20 Manufacturing method of electronic parts Expired - Fee Related JP3753524B2 (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6905063B2 (en) 2002-03-29 2005-06-14 Fuji Electric Co., Ltd. Method of manufacturing semiconductor device
JP2007067145A (en) * 2005-08-31 2007-03-15 Mitsubishi Materials Corp METHOD OF BONDING SUBSTRATE TO ELEMENT USING Au-Sn ALLOY SOLDER PASTE
JP2008277757A (en) * 2007-03-06 2008-11-13 Infineon Technologies Ag Solder connection section between semiconductor chip and substrate, and manufacturing process for the same
WO2014115702A1 (en) * 2013-01-24 2014-07-31 株式会社日立国際電気 Method for manufacturing semiconductor device, substrate treatment apparatus and recording medium
CN114754916A (en) * 2022-05-11 2022-07-15 北京七星华创流量计有限公司 Pressure sensor and method for manufacturing the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6905063B2 (en) 2002-03-29 2005-06-14 Fuji Electric Co., Ltd. Method of manufacturing semiconductor device
JP2007067145A (en) * 2005-08-31 2007-03-15 Mitsubishi Materials Corp METHOD OF BONDING SUBSTRATE TO ELEMENT USING Au-Sn ALLOY SOLDER PASTE
JP2008277757A (en) * 2007-03-06 2008-11-13 Infineon Technologies Ag Solder connection section between semiconductor chip and substrate, and manufacturing process for the same
WO2014115702A1 (en) * 2013-01-24 2014-07-31 株式会社日立国際電気 Method for manufacturing semiconductor device, substrate treatment apparatus and recording medium
JP6045610B2 (en) * 2013-01-24 2016-12-14 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing apparatus, and program
US9974191B2 (en) 2013-01-24 2018-05-15 Hitachi Kokusai Electric Inc. Method of manufacturing semiconductor device, substrate processing apparatus and recording medium
CN114754916A (en) * 2022-05-11 2022-07-15 北京七星华创流量计有限公司 Pressure sensor and method for manufacturing the same
WO2023216972A1 (en) * 2022-05-11 2023-11-16 北京七星华创流量计有限公司 Pressure sensor and manufacturing method therefor
CN114754916B (en) * 2022-05-11 2024-01-09 北京七星华创流量计有限公司 Pressure sensor and method for manufacturing the same

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