JPH11135826A - Optically coupled semiconductor relay - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optically coupled semiconductor relay, capable of reducing an output capacity. SOLUTION: An optically coupled semiconductor relay is provided with input terminals 9 and 10, a light-emitting element 8 connected between the input terminals 9 and 10, a photodiode array 11 optically coupled with the light-emitting element 8 for generating photovoltaic force in response to light irradiation by the light-emitting element 8, a control circuit 12 supplied with a photovoltaic force generated in the photodiode array 11 for controlling MOSFETs 13 and 14, the MOSFETs 13 and 14 controlled by the control circuit 12, and a common terminal 1 and output terminals 2 and 3 connected to the MOSFETs 13 and 14. The source electrodes and gate electrodes of the MOSFETs 13 and 14 are reversely serially connected in common, the source electrodes are connected to the common terminal 1, drain electrodes are connected to the respectively corresponding output terminals 2 and 3, and the gate electrodes of the MOSFETs 13 and 14 receive the output of the control circuit 12. The surface height of a metallic frame for forming the common terminal 1 is made higher than the surface height of the metallic frame for forming the output terminals 2 and 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optically coupled semiconductor relay, and more particularly to a high frequency relay for controlling a high frequency signal.

[0002]

2. Description of the Related Art An example of a conventional optically coupled semiconductor relay will be described with reference to FIGS. FIG. 2 is a circuit diagram showing an example of an optically coupled semiconductor relay according to a conventional example. When the light emitting element 8 on the input side emits an optical signal in response to an input signal applied to the input terminals 9 and 10, the photodiode array 11 receiving the light signal generates a photoelectromotive force.

In FIG. 2, the photodiode array 11 is composed of a plurality of photodiodes, but may be a single photodiode.

The control circuit 12 receives the photoelectromotive force from the photodiode array 11 and receives vertical N-type MOSFETs 13 and 1.
4 is charged to the gate input capacitance of the N-type MOSFET 13,
Reference numeral 15 indicates a conductive state.

When the input signals to the input terminals 9 and 10 are cut off, light irradiation stops, the photodiode array 12 does not generate photovoltaic power, and the N-type MOSFETs 14 and 1 do not emit light.
The gate charge of No. 4 is immediately discharged, and the N-type MOSFET 13,
14 is in a cutoff state.

The source electrodes and the gate electrodes of the N-type MOSFETs 13 and 14 are connected to each other, the respective drain electrodes are connected to the output terminals 2 and 3, respectively, and the source electrodes are connected to the common terminal 1. In the figure, 7 is a light receiving chip in which a photodiode array 11 and a control circuit 12 are integrated, and 5 and 6 are vertical N-type MOSFETs 13 and 14, respectively.
This is a vertical MOSFET chip.

FIG. 3 is a schematic plan view showing an example of a state viewed from the top of an optically coupled semiconductor relay sealed with a resin 4 according to a conventional example, and FIG. FIG. As shown in FIG. 3, the optically coupled semiconductor relay is sealed with a resin 4, and has a configuration in which a part of the common terminal 1, the output terminals 2, 3 and the input terminals 9, 10 protrudes from the resin 4. I have. The common terminal 1 is formed of a metal frame, and a light receiving chip 7 is arranged on the common terminal 1. An input terminal 9 made of a metal frame having a light emitting element 8 arranged so as to be able to optically couple with the light receiving chip 7 faces the common terminal 1. Are located.

FIG. 5 is a schematic sectional view showing an example of vertical type N-type MOSFETs 13 and 14, and FIG. 6 is a schematic plan view showing an example of an output side of a conventional optically coupled semiconductor relay. is there. The N-type MOSFETs 13 and 14 have an n + -type drain region 16 formed on one surface of an n-type semiconductor substrate 15, a p-type well region 17 formed on the other surface, and a p-type well region 1.
The n + type source region 18 is formed so as to be included in.

The p-type well region 17 exposed between the n + -type source region 18 and the semiconductor substrate 15 exposed on the surface of the semiconductor substrate 15 is made of polysilicon via a thin gate oxide film 19. An insulated gate 20 is formed.

A drain electrode 21 made of aluminum (Al) or the like is formed so as to be electrically connected to n + type drain region 16, and a gate made of aluminum or the like is electrically connected to insulated gate 20. Electrode 2
2 are formed, and a source electrode 23 made of aluminum or the like is formed so as to be electrically connected to the n + type source region 18.

On the output side of the optically coupled semiconductor relay, a light receiving chip 7 is disposed on a common terminal 1 and vertical MOSFETs are disposed on output terminals 2 and 3 made of a metal frame disposed on both sides of the common terminal 1, respectively. Chips 5 and 6 are arranged.

N-type MOS constituting vertical MOSFET chips 5 and 6
The back surfaces of the FETs 13 and 14 are drain electrodes, and are electrically connected to the output terminals 2 and 3, respectively. N-type MOSFET
Source electrodes 13 and 14 and one electrode of the light-receiving chip 7 (negative electrode in the case of an N-type MOSFET) are electrically connected to the common terminal 1 by wires 24, 25 and 26, respectively, and the gate electrodes are respectively wires 27 and 28 are electrically connected to the other electrode (+ side electrode in the case of an N-type MOSFET) of the light receiving chip 7.

[0013]

However, in the optically coupled semiconductor relay having the above configuration, a vertical N-type M
Due to the arrangement of the electrodes of the OSFETs 13 and 14, one semiconductor chip is arranged on each of the metal frames constituting the common terminal 1 and the output terminals 2 and 3, so that the three metal frames are close to each other over a wide area of the end face. The parasitic capacitance due to the metal-frame-facing capacitor (approximately 0.4 p
F) has occurred and has been an obstacle in pursuing the low output capacity performance required for high-frequency relays.

To reduce the capacitance, a vertical N-type MOSFE
Although there is a method of reducing the channel width by focusing on the surface structure of T13, 14, there is a problem that the on-resistance of the vertical N-type MOSFETs 13, 14, which has a trade-off relationship, increases.

The present invention has been made in view of the above points, and an object of the present invention is to provide an optically coupled semiconductor relay capable of reducing the output capacity.

[0016]

According to the first aspect of the present invention,
Two input terminals, a light emitting element connected between the input terminals, and at least one optically coupled to the light emitting element for generating a photoelectromotive force in response to light irradiation by the light emitting element.
A photodiode array having at least two photodiodes, a control circuit supplied with photovoltaic power generated by the photodiode array to control the vertical MOSFET, and two vertical MOSFETs controlled by the control circuit. , The vertical MOSF
ET has a common terminal and two output terminals connected thereto, a source electrode and a gate electrode of the vertical MOSFET are connected in anti-series in common, the source electrode is connected to the common terminal, and a drain electrode is In the optically coupled semiconductor relay, each of which is connected to the corresponding output terminal and the gate electrode of the vertical MOSFET receives the output of the control circuit, the surface height of the metal frame forming the common terminal is determined by the output. It is characterized in that it is higher than the surface height of the metal frame forming the terminals.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic sectional view of an optically coupled semiconductor relay according to one embodiment of the present invention. The basic configuration of the optically coupled semiconductor relay according to the present embodiment is the same as the conventional configuration shown in FIGS. 2, 3, 5, and 6, and only different points will be described.

The optically coupled semiconductor relay according to the present embodiment differs from the optically coupled semiconductor relay shown in FIGS. 2 to 6 as a conventional example in that the surface height of the common terminal 1 is made larger than the surface height of the output terminals 2 and 3. This is a configuration that is also higher.

Therefore, in the present embodiment, by shifting the positions of the common terminal 1 and the output terminals 2 and 3 facing each other, the distance between the plates of the parasitic capacitor made of the metal frame can be increased. The output capacitance of the optically coupled semiconductor relay can be reduced by reducing the parasitic capacitance of the capacitor.

Output terminals 2 and 3 are connected to input terminals 9 and 1 respectively.
Since it is shifted in the direction away from 0, the dielectric strength between input and output does not deteriorate.

In this embodiment, an N-type LDMOS
Although the case of the FET has been described, the present invention is also applicable to the case of a P-type LDMOSFET. In this case, it is necessary to reverse the output polarity of the light receiving chip 7.

[0022]

According to the first aspect of the present invention, two input terminals, a light emitting element connected between the input terminals, and a light emitting element are optically coupled to the light emitting element and respond to light irradiation by the light emitting element. A photodiode array having at least one or more photodiodes for generating electric power, a control circuit for controlling a vertical MOSFET supplied with photovoltaic power generated by the photodiode array, and two control circuits controlled by the control circuit It has a vertical MOSFET, a common terminal to which the vertical MOSFET is connected, and two output terminals. The source electrode and the gate electrode of the vertical MOSFET are commonly connected in anti-series, and the source electrode is connected to the common terminal. , The drain electrode is connected to the corresponding output terminal, and the metal frame forming the common terminal in the optically coupled semiconductor relay in which the gate electrode of the vertical MOSFET receives the output of the control circuit. Surface height of the metal frame that forms the output terminal, the distance between the plates of the parasitic capacitor by the metal frame can be increased, thereby reducing the parasitic capacitance of the parasitic capacitor. An optically coupled semiconductor relay capable of reducing the output capacity can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of an optically coupled semiconductor relay according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an example of an optically coupled semiconductor relay according to a conventional example.

FIG. 3 is a schematic plan view showing an example of a state viewed from a top surface of an optically coupled semiconductor relay sealed with a resin according to a conventional example.

FIG. 4 is a schematic cross-sectional view taken along line X-X ′ in the upper figure.

FIG. 5 is a schematic sectional view showing an example of a vertical N-type MOSFET.

FIG. 6 is a schematic plan view showing an example of an output side of an optically coupled semiconductor relay according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Common terminal 2, 3 Output terminal 4 Resin 5, 6 Vertical MOSFET chip 7 Light receiving chip 8 Light emitting element 9, 10 Input terminal 11 Photodiode array 12 Control circuit 13, 14 MOSFET 15 Semiconductor substrate 16 n + type drain region 17 p type Well region 18 n + type source region 19 gate oxide film 20 insulated gate 21 drain electrode 22 gate electrode 23 source electrode 24 to 28 wire

[Procedure amendment]

[Submission date] May 20, 1998

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0004

[Correction method] Change

[Correction contents]

The control circuit 12 receives the photoelectromotive force from the photodiode array 11 and receives vertical N-type MOSFETs 13 and 1.
4 is charged to the gate input capacitance of the N-type MOSFET 13,
1 4 becomes conductive.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction contents]

Further, when the input signal to the input terminal 9, 10 is cut off eliminating the light irradiation, the photodiode array 1 1 no longer generates photovoltaic, N-type MOSFET 1 3, 1
The gate charge of No. 4 is immediately discharged, and the N-type MOSFET 13,
14 is in a cutoff state.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

A drain electrode 21 made of aluminum (Al) or the like is formed so as to be electrically connected to n + type drain region 16, and a gate made of aluminum or the like is electrically connected to insulated gate 20. Electrode 2
2 are formed, and the n + type source region 18 and the p type well region are formed.
A source electrode 23 made of aluminum or the like is formed so as to be electrically connected to region 17 .

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Yoshiki Hayasaki 1048 Kazumasa Kadoma, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd. (72) Inventor Hitoshi Takano 1048 Kadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Works, Ltd.

Claims (1)

[Claims] At least one of two input terminals, a light emitting element connected between the input terminals, and at least optically coupled to the light emitting element, for generating a photoelectromotive force in response to light irradiation by the light emitting element. A photodiode array having one or more photodiodes, a control circuit for controlling a vertical MOSFET supplied with photovoltaic power generated by the photodiode array, and two vertical MOSFETs controlled by the control circuit
And a common terminal to which the vertical MOSFET is connected and two output terminals. A source electrode and a gate electrode of the vertical MOSFET are commonly connected in anti-series, and the source electrode is connected to the common terminal. The drain electrode is connected to the corresponding output terminal, and the gate electrode of the vertical MOSFET receives the output of the control circuit. An optical coupling type semiconductor relay, wherein the height is higher than the surface height of the metal frame forming the output terminal.