JPH11135805A - Manufacture of semiconductor accelerometer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor accelerometer in which a flexure part can be formed with good accuracy. SOLUTION: A P<+> -type embedded sacrificial layer 3a is formed inside a single-crystal silicon substrate 1. An epitaxial layer 4 is formed on the side of a face, on which the p<+> -type buried sacrificial layer 3a is formed inside the single-crystal silicon substrate 1. In succession, a piezoresistance 5 and a diffusion interconnection 6 are formed in the epitaxial layer 4. Then, a p<+> -type impurity layer 7 which reaches the p<+> -type embedded sacrificial layer 3a is formed inside the epitaxial layer 4. Silicon oxide films 8 are formed on the single-crystal silicon substrate 1 and on the epitaxial layer 4. Protective films 9 are formed on the silicon oxide films 8. Then, a part which corresponds to the outer peripheral edge of a bob part 15 in the single-crystal silicon substrate 1 is etched anisotropically. As a result, cutout parts 11 which reach the p<+> -type embedded sacrificial layer are formed. Then, the p<+> -type impurity layer 7 is etched and removed. An etchant inlet port 12 is formed. An etchant is introduced from the etchant inlet port 12. The p<+> -type embedded sacrificial layer 3a is etched and removed, and then a cutout groove 3 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to an automobile, an aircraft,
The present invention relates to a method for manufacturing a semiconductor acceleration sensor used for home electric appliances and the like, and particularly to a three-axis acceleration sensor having sensitivity in the x-axis, y-axis, and z-axis.

[0002]

2. Description of the Related Art In general, a cantilever type and a doubly supported type have been proposed as acceleration sensors. As a detection method, there are a method of detecting mechanical strain as a change in electric resistance and a method of detecting a change in capacitance. For example, Japanese Patent Application Laid-Open No. 6-109755 discloses a doubly-supported acceleration sensor that detects mechanical strain as a change in electric resistance.
100782.

FIG. 11 is a schematic sectional view showing a manufacturing process of a conventional semiconductor acceleration sensor, and FIG. 12 is a schematic plan view showing a state of the conventional semiconductor acceleration sensor as viewed from above. First, an n-type single-crystal silicon substrate 1
A silicon oxide film 2 is formed thereon by thermal oxidation or the like, and an opening 2a is formed by etching the silicon oxide film 2 using a resist mask (not shown) patterned in a predetermined shape to form a plasma. The resist mask is removed by ashing or the like. At this time, the opening 2a is formed at a location surrounding the substantially square central portion 1a of the single crystal silicon substrate 1.

Subsequently, p-type impurities such as boron (B) are deposited and thermally diffused or ion-implanted and annealed by using the silicon oxide film 2 in which the opening 2a is formed as a mask, thereby forming a p + -type impurity. An embedded sacrificial layer 3a is formed (FIG. 11A), and the silicon oxide film 2 is removed by etching.

Next, an n-type epitaxial layer 4 is formed on the surface of the single crystal silicon substrate 1 on which the p + type buried sacrificial layer 3a is formed.
To form an epitaxial layer 4 as shown in FIG.
Using a resist mask (not shown), a p-type impurity such as boron (B) is deposited in a rectangular shape which is substantially opposed to a beam portion 14b to be described later and has a portion near the center portion 14a missing. By performing thermal diffusion or ion implantation and annealing, p reaches p + type buried sacrificial layer 3a.
A + type impurity layer (not shown) is formed, and the resist mask is removed (FIG. 11B). Here, the epitaxial layer 4 is formed to have a thickness that bends when an acceleration is applied, because the epitaxial layer 4 later becomes the bent portion 14.

Next, a piezoresistor 5 is formed by diffusing a p-type impurity such as boron (B) at a position corresponding to the bent portion 14 of the epitaxial layer 4 (FIG. 11C). A diffusion wiring 6 is formed by diffusing a p-type impurity such as boron (B) into the epitaxial layer 4 so as to be electrically connected (FIG. 11D).

Next, CV is applied on the two main surfaces of the single crystal silicon substrate 1 and on the surface of the epitaxial layer 4 on which the piezoresistor 5 is formed.
A protective film 9 such as a silicon nitride film is formed by the method D or the like, and the protective film 9 is formed on the two main surfaces of the single crystal silicon substrate 1 using a resist mask (not shown) patterned in a predetermined shape. By performing the above etching, an opening 10 is formed at a position corresponding to the outer peripheral edge of the weight 15 described later, and the resist mask is removed (FIG. 11E).

Next, the single crystal silicon substrate 1 is anisotropically etched using an alkaline etchant such as a potassium hydroxide (KOH) solution using the protective film 9 having the opening 10 as a mask. , P + type buried sacrificial layer 3
a is formed to reach the cutout 11 (FIG. 11)
(F)).

Next, the protective film 9 at a desired position on the diffusion wiring 6 is removed by etching, and a metal wiring 17 is formed by sputtering, etching or the like so as to be electrically connected to the diffusion wiring 6. 11 (g)).

Next, an etchant made of an acidic solution containing hydrofluoric acid or the like is introduced into the cut portion 11, and the p + type buried sacrificial layer 3a and the p + type impurity layer are removed by isotropic etching. The bending portion 14 is formed on the frame 13 of the layer 4 and connected to the neck portion 15a of the weight portion 15. Then, the slit 2 for partially dividing the bending portion 14 so that the bending of the bending portion 14 is concentrated.
1 is formed by RIE (Reactive Ion Etching) or the like, and the beam portion 14b is formed on the bending portion 14 (FIG. 11).
(H)).

In this semiconductor acceleration sensor, when acceleration is applied to the weight portion 15, the weight portion 15 is displaced in a direction opposite to the direction in which the acceleration is applied, and the bending portion 14 bends.
The piezoresistor 5 formed on one surface of the substrate 4 is bent, and the resistance value of the piezoresistor 5 changes. The change in the resistance value is converted into an electric signal to detect the acceleration.

[0012]

However, in the manufacturing process of the semiconductor acceleration sensor as described above, when etching the p + type buried sacrificial layer 3a, the aspect ratio of about 1 mm in depth and 5 to 10 μm in gap is 200 mm. Since the above closed space is etched in the longitudinal direction of the bending portion 14, there is a problem that convection of the etchant hardly occurs and the etching does not progress.

The etchant staying in the closed space is
Deterioration of selectivity is caused by composition fluctuation due to nitric acid self-catalysis, and even the bent portion 14, which greatly affects the sensitivity of the semiconductor acceleration sensor, is etched, and there is a problem that desired characteristics cannot be obtained.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method of manufacturing a semiconductor acceleration sensor capable of forming a flexure with high accuracy.

[0015]

According to the first aspect of the present invention,
Forming a sacrificial layer at a predetermined position on one surface of the semiconductor substrate; forming an epitaxial layer on the surface of the semiconductor substrate on which the sacrificial layer is formed; and forming a high-concentration impurity layer on the epitaxial layer reaching the sacrificial layer. Forming a;
A step of forming an acceleration detecting unit for detecting acceleration by converting strain into an electric signal at a position corresponding to the bending portion of the epitaxial layer, and forming a portion corresponding to an outer peripheral edge of a weight portion of the semiconductor substrate by the semiconductor; Forming a notch reaching the sacrificial layer by anisotropic etching from a side of the substrate different from the epitaxial layer forming surface, forming a notch by etching away the sacrificial layer, Forming a bent portion for suspending and supporting the weight portion and a frame for supporting the bent portion by etching and removing a desired portion of the semiconductor acceleration sensor. Forming a high-concentration impurity layer to reach, and forming an etchant inlet to reach the sacrificial layer by removing the high-concentration impurity layer by etching. That has a step, it is characterized in that so as to form the cut groove the sacrificial layer is etched away by introducing an etchant from the etchant inlet.

According to a second aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the first aspect, as the acceleration detecting portion, a resistance value changes by bending in a portion corresponding to the bending portion of the epitaxial layer. A piezo resistor is formed, and acceleration is detected by converting a change in the resistance value of the piezo resistor into an electric signal.

According to a third aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the first aspect, electrodes which are substantially opposed to each other are formed as the acceleration detecting section, and the bending section and / or the acceleration detecting section apply acceleration. The acceleration is detected by detecting the deflection of the weight portion as a change in capacitance by the electrode.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as the sacrificial layer by impurity diffusion. It is assumed that.

According to a fifth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as the sacrificial layer by impurity diffusion. The high-concentration impurity layer is made porous by a method to form a porous silicon layer.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to fifth aspects, the high-concentration impurity layer is formed at a position adjacent to the bent portion. It is characterized by having made it.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to sixth aspects, the high concentration impurity layer and the sacrificial layer are continuously removed by etching. It is characterized by having made it.

According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to fifth or seventh aspects, the high-concentration impurity layer is formed by the bending portion of the epitaxial layer. And a portion excluding the frame forming portion.

[0023]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 = FIG. 1 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to an embodiment of the present invention, and FIG.
It is a schematic perspective view which shows the state which partly fractured in the manufacturing process of (b)-(h). The semiconductor acceleration sensor according to the present embodiment has a silicon oxide film 2 formed on a single crystal silicon substrate 1 which is an n-type semiconductor substrate having a thickness of 400 to 600 μm by thermal oxidation or the like.
Is formed, an opening 2a is formed by etching the silicon oxide film 2 using a resist mask (not shown) patterned in a predetermined shape, and the resist mask is removed by plasma ashing or the like. At this time, the opening 2a is formed in the substantially square central portion 1 of the single crystal silicon substrate 1.
It is formed in a portion surrounding a. The central part 1a
Is not particularly limited, and may be, for example, a circle, an ellipse, or a rectangle (rectangle, square).

Subsequently, using the silicon oxide film 2 in which the opening 2a is formed as a mask, p-type impurities such as boron (B) are deposited and subjected to thermal diffusion or ion implantation and annealing to thereby form a sacrificial layer (or a high sacrificial layer). Concentration impurity layer)
Is formed (FIG. 1A).
The silicon oxide film 2 is removed by etching. Here, the impurity concentration of the p + type buried sacrificial layer 3a is 10 ¹⁹
It is desirable to be not less than cm ^-3 .

In this embodiment, the p + type buried sacrificial layer 3a is formed using the silicon oxide film 2 as a mask, but a silicon nitride film may be used as a mask.

In this embodiment, the p + type buried sacrificial layer 3a is formed on the single-crystal silicon substrate 1. However, an n-type impurity such as phosphorus (P) is deposited and thermally diffused or ion-implanted. Alternatively, the n + type buried sacrificial layer may be formed by performing an annealing process.

Further, the p + type buried sacrificial layer 3a is
It may extend from the entire outer edge of a so as to completely surround that portion, or may extend from a portion of the outer edge. When extending from the whole, the p + type buried sacrificial layer 3a may have an annular shape, for example, the central portion 1a is circular, and the p + type buried sacrificial layer 3a is formed as a concentric circle and a central portion formed by a concentric circle. 11a, the central portion 1a is an inner square, and the p + type buried sacrificial layer 3a is formed by an outer square concentric with and in the same direction as the inner square, and an annular shape between the inner square and the outer square. May be a part. Further, the p + -type buried sacrificial layer 3a may be a portion formed by a portion between the circular central portion 1a and the outer square or a portion formed by a combination of the opposite portions. Alternatively, an elliptical shape may be used.

The p + type buried sacrificial layer 3a is
When extending from a part of the outer edge of a, the p + type buried sacrificial layer 3
a is an equal angle around the center 1a (eg, 90 °)
In the case of 90 °, the p + -type buried sacrificial layer 3a has four beam forms facing each other at the central portion 1a (that is, at the central portion 1a). Crossing a cross). In other words, the p + type buried sacrificial layer 3a may extend radially from the central portion 1a, and the number thereof is not limited.

Next, an n-type epitaxial layer 4 is formed on the surface of the single crystal silicon substrate 1 on which the p + type buried sacrificial layer 3a is formed, with a thickness corresponding to a later-described bending portion 14 which bends when an acceleration is applied. The epitaxial layer 4 is patterned using a photoresist (not shown) patterned in a predetermined shape as a mask.
Boron (B) is provided at a position corresponding to a bending portion 14 described later.
The piezoresistor 5 is formed by performing deposition and thermal diffusion or ion implantation and annealing of a p-type impurity (FIG. 1B). Similarly, deposition and thermal diffusion or ion implantation of a p-type impurity are performed. Then, by performing an annealing process, a diffusion wiring 6 is formed so as to be electrically connected to the piezoresistor 5, and the photoresist is removed (FIGS. 1C and 2A).

Next, using a resist mask (not shown) patterned in a predetermined shape, a p-type impurity such as boron (B) is deposited and deposited on a portion of the epitaxial layer 4 adjacent to a beam portion 14b described later. The p + type impurity layer 7 reaching the p + type buried sacrificial layer 3a is formed by performing thermal diffusion or ion implantation and annealing, and the resist mask is removed (FIGS. 1D and 2B).

In this embodiment, the p + type impurity layer 7 is formed at a position adjacent to the beam portion 14b. However, the present invention is not limited to this. It may be formed at a location other than 14 and the frame 13. In this embodiment, the p + -type impurity layer 7 is formed after the piezoresistor 5 and the diffusion wiring 6 are formed. However, after the p + -type impurity layer 7 is formed, the piezo resistance 5 and the diffusion wiring 6 are formed. It may be formed.

Next, a silicon oxide film 8 is formed on the single crystal silicon substrate 1 and the epitaxial layer 4, and a protective film 9 such as a silicon nitride film is formed on the silicon oxide film 8. Then, the silicon oxide film 8 / protective film 9 formed on the single-crystal silicon substrate 1 is etched using a resist mask (not shown) patterned in a predetermined shape, so that a weight portion 15 described later is formed. An opening 10 is formed at a position corresponding to the outer peripheral edge of the substrate, and the resist mask is removed (FIG. 1E).

Next, anisotropic etching of the single crystal silicon substrate 1 is performed by using the silicon oxide film 8 having the opening 10 formed therein / the protective film 9 as a mask and using an alkaline etchant such as a KOH solution. p + type buried sacrificial layer 3a
Is formed (FIG. 1F).

Next, the silicon oxide film 8 / protective film 9 on the p + type impurity layer 7 are removed by etching to form an opening (not shown), and a hydrofluoric nitric acid-based etchant is introduced from the opening. The p + -type impurity layer 7 is removed by etching to form an etchant inlet 12, and an etchant (50% hydrofluoric acid aqueous solution: 69% nitric acid aqueous solution: acetic acid = 1) is formed from the etchant inlet 12 by an acidic solution containing hydrofluoric acid or the like. : 1 ~
Then, the p + type buried sacrificial layer 3a is removed by etching to form the cut groove 3, and the central portion 14 is formed.
a and a beam portion 14b, and the beam portion 14b extends between at least a part of an inner peripheral side surface of the frame 13 described later and the central portion 14a, and the beam portion 14b and the central portion 14a are integrally connected. The neck portion 1 is attached to the bending portion 14 and the center portion 14a.
Weight portion 15 suspended and supported via frame 5a and frame 1
1 and a support member 16 that supports the lower surface side of the weight 3 and surrounds the outer peripheral edge of the weight 15 via the cutout 11 (FIG. 1).
(G), FIG. 2 (c)).

Next, a contact hole (not shown) is formed by removing the silicon oxide film 8 / protective film 9 at a desired position on the diffusion wiring 6 by etching, and the contact hole is buried. A metal wiring 17 of aluminum (Al) or the like is formed so as to be electrically connected to the piezoresistor 5, and the silicon oxide film 8 / protective film 9 on the single crystal silicon substrate 1 is removed by etching (FIG. 2).
(D)).

Finally, the portion of the epitaxial layer 4 excluding the portion that becomes the bending portion 14 and the frame 13 and a part of the single crystal silicon substrate 1 under the portion are subjected to reactive ion etching (RIE). By removing, a frame-shaped frame 13 having an upper surface side and a lower surface side is formed (FIGS. 1H and 2E). Here, beam part 14
It is desirable that the boundary between the frame b and the frame 13 and the boundary between the beam portion 14b and the beam portion 14b be processed into a curved shape in order to avoid concentration of stress.

Therefore, in the present embodiment, the etchant inlet 12 is formed at a position adjacent to the beam portion 14b of the epitaxial layer 4, and the etchant is introduced from the etchant inlet 12 to form the p + type buried sacrificial layer 3a. Since the etchant is removed by etching, the stagnation phenomenon of the etchant is eliminated, and convection can be performed promptly. As a result, there is no influence of the liquid composition fluctuation due to the autocatalytic decomposition reaction of nitric acid in a locally closed space, and p + The bent portion 1 can be precisely formed without deteriorating the selectivity between the mold embedded sacrificial layer 3a and the epitaxial layer 4.
4 can be formed.

Since the p + -type impurity layer 7 is a high-concentration impurity layer similarly to the p + -type buried sacrificial layer 3a, the p + -type impurity layer 7 and the p + -type buried sacrificial layer 3a are continuously etched and removed. And the process can be shortened.

Further, conventionally, etching had to be performed in the longitudinal direction of the beam portion 14b, but in the present embodiment, etching can be performed from a direction perpendicular to the longitudinal direction of the beam portion 14b, so that the etching distance is shortened. be able to.

In this embodiment, the conductivity type of the single crystal silicon substrate 1 and the epitaxial layer 4 is n
A p-type buried sacrificial layer 3a, a piezoresistor 5, a diffusion wiring 6, and a p-type impurity are used as conductive types for impurity diffusion for forming the p + -type impurity layer 7, but the present invention is not limited to this. , The opposite conductivity type may be used.

Embodiment 2 = FIG. 3 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.
FIG. 5 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above, and FIG. 5 is a manufacturing process of the semiconductor acceleration sensor according to the present embodiment along AA ′ in FIG. FIG. 6 is a schematic sectional view showing a manufacturing process of the semiconductor acceleration sensor according to the present embodiment at BB ′ in FIG. 4, and FIG. 7 is a sectional view showing the present embodiment. FIG. 5 is a schematic cross-sectional view showing a manufacturing process of the semiconductor acceleration sensor along CC ′ in FIG. 4.

First, a silicon oxide film 2 is formed on one main surface of a single crystal silicon substrate 1 which is a semiconductor substrate by thermal oxidation or the like, and the silicon oxide film 2 is etched. A substantially elongated opening 2a extends outwardly from the outer edge of the square central portion 1a and is spaced at equal angles (90 °). In addition,
The opening 2a may be formed at a location surrounding the center 1a.

Subsequently, using the silicon oxide film 2 in which the opening 2a is formed as a mask, p-type impurities such as boron (B) are deposited and thermally diffused or ion-implanted and annealed to perform p + -type burying. A sacrificial layer 3a is formed (FIGS. 5A, 6A and 7A), and the silicon oxide film 2 is removed by etching.

In the present embodiment, the p + type buried sacrificial layer 3a is formed on the single crystal silicon substrate 1, but an n type impurity such as phosphorus (P) is deposited and thermally diffused or ion-deposited. The n + type buried sacrificial layer may be formed by performing implantation and annealing.

The p + type buried sacrificial layer 3a is located at the center 1
It may extend from the entire outer edge of a so as to completely surround that portion, or may extend from a portion of the outer edge. When extending from the whole, the p + type buried sacrificial layer 3a may have an annular shape, for example, the central portion 1a is circular, and the p + type buried sacrificial layer 3a is formed as a concentric circle and a central portion formed by a concentric circle. 1a, or the central portion 1a is an inner square, and the p + -type buried sacrificial layer 3a is formed by an outer square concentric with and in the same direction as the inner square, and an annular shape between the inner square and the outer square. May be a part. Further, the p + -type buried sacrificial layer 3a may be a portion formed by a portion between the circular central portion 1a and the outer square or a portion formed by a combination of the opposite portions. Alternatively, an elliptical shape may be used.

The p + type buried sacrificial layer 3a is
When extending from a part of the outer edge of a, the p + type buried sacrificial layer 3
a is an equal angle around the center 1a (eg, 90 °)
In the case of 90 °, the p + -type buried sacrificial layer 3a has four beam forms facing each other at the center 1a (ie, a cross at the center). Which intersects). In other words, the p + type buried sacrificial layer 3a may extend radially from the central portion 1a, and the number thereof is not limited.

Next, on one main surface of the single-crystal silicon substrate 1, a thickness n corresponding to the bending portion 14 which bends when an acceleration is applied is applied.
A p-type impurity such as boron (B) is formed in a portion adjacent to the beam portion 14b made of the epitaxial layer 4 by using a resist mask (not shown) patterned in a predetermined shape. P + by performing position and thermal diffusion or ion implantation and annealing
Forming a p + type impurity layer 7 reaching the type buried sacrificial layer 3a;
The resist mask is removed.

In the present embodiment, the p + type impurity layer 7 is formed at a position adjacent to the beam portion 14b. However, the present invention is not limited to this. 14 and the frame 13 may be formed at locations other than those. Further, in the present embodiment, the p + -type impurity layer 7 is formed, but an n + -type impurity layer may be formed.

Next, a silicon oxide film 8 is formed on both surfaces by a low pressure CVD method, pyrogenic oxidation or the like, and a protective film 9 such as a silicon nitride film is formed on the silicon oxide film 8 by a low pressure CVD method or the like. The silicon oxide film 8 / the portion corresponding to the outer peripheral edge of the weight portion 15 on the two main surfaces of the silicon substrate 1
By removing the protective film 9 by etching, the opening 10
(FIG. 5B, FIG. 6B, and FIG. 7B).

In the present embodiment, the silicon oxide film 8 / the protective film 9 are formed, but the present invention is not limited to this, and only the silicon oxide film 8 or the protective film 9 may be formed. good. However, by forming the silicon oxide film 8 / the protective film 9, the internal stress of each film can be compressed and pulled (or reversed) to reduce the warpage of the beam 2b.

Next, using the silicon oxide film 8 having the opening 10 formed therein / the protective film 9 as a mask, potassium hydroxide (KO) is used.
H) The cut portion 11 is formed by performing anisotropic etching of the single crystal silicon substrate 1 using an alkaline etchant such as a solution until the single crystal silicon substrate 1 reaches the p + type buried sacrificial layer 3a (FIG. 5C, FIG. 6 (c)).

Next, the metal wiring 17, the upper stopper bonding electrode 18, the movable electrode 19 and the electrode pad 20 are formed on the protective film 9 on one main surface side of the single crystal silicon substrate 1 by using gold (Au) or Al.
(FIG. 5D, FIG. 6D, FIG.
(C)). At this time, the metal wiring 17, the upper stopper bonding electrode 18, the movable electrode 19, and the electrode pad 20 may be formed via a chromium (Cr) film or the like in order to enhance the adhesion to the underlying layer. Further, as a patterning method of the metal wiring 17, the upper stopper bonding electrode 18, the movable electrode 19, and the electrode pad 20, a metal layer is formed by performing vapor deposition or sputtering, and formed into a predetermined shape by using a photolithography technique and an etching technique. Patterning method, metal wiring 17, upper stopper bonding electrode 1 in advance
8, a method of forming a metal layer by vapor deposition or sputtering after forming a resist or the like other than where the movable electrode 19 and the electrode pad 20 are formed, and removing the resist or the like, a so-called lift-off method.

Next, the silicon oxide film 8 / protective film 9 on the two main surfaces of the single crystal silicon substrate 1 are removed by etching, and a lower stopper 22 having a concave portion 22a at a position corresponding to the weight portion 15 is formed by anodic bonding or the like. The silicon oxide film 8 / protective film 9 on the p + type impurity layer 7 is removed by etching to form an opening (not shown), and a fluorine-nitric acid-based etchant is introduced from the opening to form the p + type. The impurity layer 7 is removed by etching to form an etchant inlet 12 (FIGS. 5 (e), 6 (e), and 7 (d)). The etchant inlet 12 is made of an acidic solution containing hydrofluoric acid or the like. An etchant (50% hydrofluoric acid aqueous solution: 69% nitric acid aqueous solution: acetic acid = 1: 1 to 3: 8 on a volume basis) is introduced to remove the p + type buried sacrificial layer 3a by etching to form the cut groove 3 (FIG. 5 (f), FIG. 6 (f ). Then, a desired portion of the silicon oxide film 8 / protective film 9 and the epitaxial layer 4 is removed by etching so that the bending is concentrated on the beam portion 14b of the bending portion 14 to form a slit 21, and the center portion 14a and the beam portion 14b are formed. A beam portion 14b extends between at least a portion of the inner peripheral side surface of the frame 13 and the central portion 14a, and the bending portion 14 in which the beam portion 14b and the central portion 14a are integrally connected; A weight 15 suspended and supported by the 14a via a neck 15a and a support member 16 supporting the lower surface of the frame 13 and surrounding the outer periphery of the weight 15 via the cutout 11 are formed.

Finally, the upper stopper 23 having the concave portion 23a at a position corresponding to the weight portion 15 and having the fixed electrode 24 formed so as to face the movable electrode 19 is attached to the upper stopper bonding electrode 18 by anodic bonding or the like. Join. here,
The upper stopper 23 includes a fixed electrode 24 and an electrode pad 2.
A contact hole 25 for making contact with 0 is formed. (FIGS. 5 (g), 6 (g), 7)
(E)).

In the present embodiment, the slit 2
1 can be formed at the same time when the etchant inlet 12 and the cut groove 6 are formed, whereby the number of steps can be reduced.

Although the lower stopper 22 is joined to the two main surfaces of the single crystal silicon substrate 1 before the formation of the etchant inlet 12, the invention is not limited to this. Lower stopper 22 in the process
May be joined.

In the case where the etchant introduction port 12 is formed by etching away portions of the epitaxial layer 4 excluding the frame 13 and the bent portion 14, for example, as shown in FIG. 15 (the surface on which the epitaxial layer 4 is formed).
Further, in the second embodiment, the slit 21 is formed at a position adjacent to the beam portion 14b and at a portion of the inner peripheral side surface of the frame 13 excluding the portion where the beam portion 14b is formed. As shown in FIG. 9, a portion adjacent to the beam portion 14 b and a beam portion 14 b
The slit 21 may be formed at a location other than the formation location, thereby increasing the volume of the weight 15 and improving the sensitivity.

Therefore, in the present embodiment, an etchant inlet 12 is formed at a position adjacent to the beam portion 14b of the epitaxial layer 4, and an etchant is introduced from the etchant inlet 12 to form the p + type buried sacrificial layer 3a. Since the etchant is removed by etching, the stagnation phenomenon of the etchant is eliminated, and convection can be performed promptly. As a result, there is no influence of the liquid composition fluctuation due to the autocatalytic decomposition reaction of nitric acid in a locally closed space, and p + The bent portion 1 can be precisely formed without deteriorating the selectivity between the mold embedded sacrificial layer 3a and the epitaxial layer 4.
4 can be formed.

Since the p + -type impurity layer 7 is a high-concentration impurity layer similarly to the p + -type buried sacrificial layer 3a, the p + -type impurity layer 7 and the p + -type buried sacrificial layer 3a are continuously etched and removed. And the process can be shortened.

Further, conventionally, etching had to be performed in the longitudinal direction of the beam portion 14b, but in the present embodiment, etching can be performed from a direction perpendicular to the longitudinal direction of the beam portion 14b, so that the etching distance is shortened. be able to.

In this embodiment, the acceleration is detected by converting the change in the capacitance between the opposing electrodes (the movable electrode 19 and the fixed electrode 24) into an electric signal and detecting the acceleration. This eliminates the need for a process for forming the diffusion wiring 6 and the contact hole, thereby simplifying the process.

In the piezoresistor 5, the sensitivity changes with temperature. In the present embodiment, the sensitivity does not change with temperature, the sensitivity-temperature characteristics are improved, and the sensitivity is adjusted by adjusting the gap between the electrodes. Becomes possible.

In the present embodiment, the conductivity type of single crystal silicon substrate 1 and epitaxial layer 4 is n
Although the mold is used, the present invention is not limited to this, and an opposite conductivity type may be used.

In all of the above embodiments, the weight 15 is supported by the four beams 2b. However, the present invention is not limited to this. For example, eight beams, twelve beams may be used. The weight portion 15 may be supported by any number of beam portions 2b such as beams, 16 beams, and the like.

In all of the above embodiments,
Although the case of the p + type buried sacrificial layer 3a as the sacrificial layer has been described, the present invention is not limited to this. If a porous silicon layer is formed as the sacrificial layer, the single crystal silicon substrate 1 and the epitaxial layer 4 The selectivity of about 150 times or more is obtained as compared with the above, and the bending portion 14 can be formed with high accuracy.

Here, as a method for forming the porous silicon layer, for example, as shown in FIG. 10, electrodes 27a and 27b are arranged in an electrolytic bath 26 so as to face each other, and electrodes 27a and 27b are formed.
7b is connected to an external DC power supply (not shown).
The electrolytic bath 26 is filled with an electrolytic solution 28 containing a strong acid such as a hydrofluoric acid (HF) solution, and one main surface is patterned into a predetermined shape between the electrodes 27a and 27b by a substrate fixing jig 29. A single crystal silicon substrate 1 on which a silicon oxide film 2 is formed is disposed. And the electrode 27
a, 27b to apply a voltage to the electrode 27a as a cathode,
By using 7b as an anode, fluorine ions are generated in the electrolytic solution 28, and the fluorine ions are converted into the p + type buried sacrificial layer 3a.
Is dissolved to form a porous silicon layer. Further, the single crystal silicon substrate 1 may be directly made porous using an anodizing method.

Further, in all of the above-described embodiments, the case where the etchant is introduced only from the etchant introduction port 12 has been described. However, the present invention is not limited to this, and both the cut portion 11 and the etchant introduction port 12 are used. An etchant may be introduced from.

In all of the above embodiments,
If the metal wiring is arranged rotationally symmetrically with respect to a center line passing through the center of gravity of the weight portion 15 and perpendicular to the sensor, 4
Since the metal wirings are formed evenly on the beam portions 2b, thermal distortion is evenly applied, and a structure in which an offset hardly occurs can be obtained.

[0070]

According to the first aspect of the present invention, a step of forming a sacrificial layer at a predetermined position on one side of a semiconductor substrate, a step of forming an epitaxial layer on the side of the semiconductor substrate where the sacrificial layer is formed, Forming a high-concentration impurity layer reaching the sacrifice layer, forming an acceleration detection unit for detecting acceleration by converting strain into an electric signal at a location corresponding to the bent portion of the epitaxial layer, A step of forming a cut portion reaching the sacrificial layer by anisotropically etching a portion corresponding to the outer peripheral edge of the weight portion from a side different from the epitaxial layer forming surface of the semiconductor substrate; A step of forming a groove, and a step of forming a flexible portion for suspending and supporting the weight portion and a frame for supporting the flexible portion by etching and removing a desired portion of the epitaxial layer. Forming a high-concentration impurity layer reaching the sacrificial layer in the epitaxial layer, and forming an etchant introduction port reaching the sacrificial layer by etching away the high-concentration impurity layer. Since the sacrificial layer is etched away by introducing the etchant from the etchant inlet to form the cut groove, convection of the etchant becomes possible even in the cut groove, and the etchant composition does not change in a closed space. Thus, a method of manufacturing a semiconductor acceleration sensor capable of maintaining selectivity and accurately forming a bent portion can be provided.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, a piezoresistor whose resistance value changes due to bending is provided as an acceleration detecting portion at a portion corresponding to a bending portion of the epitaxial layer. Since the acceleration is detected by converting the change in the resistance value of the piezoresistor into an electric signal, the same effect as the first aspect can be obtained.

According to a third aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the first aspect, electrodes which are substantially opposed to each other are formed as the acceleration detecting portion, and the flexure portion and / or the weight portion when applying acceleration are formed. When the acceleration is detected by detecting the deflection of the electrode as a change in the capacitance by the electrode, in addition to the effect of the invention described in claim 1, the sensitivity temperature characteristics are improved and the piezo resistance is formed. The process can be simplified and the sensitivity setting can be easily adjusted by the gap between the electrodes.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as a sacrificial layer by impurity diffusion. The same effect as the invention according to any one of the third to third aspects is obtained.

According to a fifth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as a sacrificial layer by impurity diffusion, and anodized. Since the porous silicon layer is formed by making the high-concentration impurity layer porous, a bent portion can be formed with higher accuracy in addition to the effects of the invention according to any one of claims 1 to 3.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to fifth aspects, the high-concentration impurity layer is formed at a position adjacent to the bent portion. Therefore, in addition to the effect of the invention according to any one of claims 1 to 5, the sacrificial layer below the bent portion can be removed by etching from both sides of the bent portion,
The etching time can be shortened.

According to a seventh aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to sixth aspects, the high-concentration impurity layer and the sacrificial layer are continuously removed by etching. In addition to the effects of the invention according to any one of claims 1 to 6, the manufacturing process can be shortened.

According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to fifth or seventh aspects, the high-concentration impurity layer is formed by forming a bent portion of the epitaxial layer and a frame. Since it is formed at a location other than the location, in addition to the effect of the invention according to any one of claims 1 to 5 or 7, it is possible to shorten the time for etching and removing the sacrificial layer. At the same time, the step of etching the epitaxial layer so that the bending is concentrated on the bending portion can be omitted.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to one embodiment of the present invention.

FIG. 2 is a schematic perspective view showing a partially broken state of the manufacturing process of FIGS. 1 (b) to 1 (h).

FIG. 3 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 4 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above.

FIG. 5 is a diagram of the semiconductor acceleration sensor according to the present embodiment;
FIG. 7 is a schematic cross-sectional view showing a manufacturing process at AA ′ of FIG.

FIG. 6 shows the semiconductor acceleration sensor according to the present embodiment;
13 is a schematic cross-sectional view showing a manufacturing step at BB ′ of FIG.

FIG. 7 shows a semiconductor acceleration sensor according to the present embodiment;
FIG. 9 is a schematic cross-sectional view showing a manufacturing step at CC ′ of FIG.

FIG. 8 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 9 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 10 is a schematic sectional view showing an apparatus for forming a porous silicon layer according to another embodiment of the present invention.

FIG. 11 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to a conventional example.

FIG. 12 is a schematic plan view showing a state when viewed from above a semiconductor acceleration sensor according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Single crystal silicon substrate 1a Central part 2 Silicon oxide film 2a Opening 3 Cut groove 3a p + type buried sacrificial layer 4 Epitaxial layer 5 Piezoresistance 6 Diffusion wiring 7 p + type impurity layer 8 Silicon oxide film 9 Protective film 10 Opening 11 Notch portion 12 Etchant inlet 13 Frame 14 Flexure portion 14a Central portion 14b Beam portion 15 Weight portion 15a Neck portion 16 Support member 17 Metal wiring 18 Upper stopper bonding electrode 19 Movable electrode 20 Electrode pad 21 Slit 22 Lower stopper 22a Recess 23 Upper stopper 23a recess 24 fixed electrode 25 contact hole 26 electrolytic bath 27a, 27b electrode 28 electrolytic solution 29 substrate fixing jig

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takuro Ishida 1048 Odakadoma, Kadoma, Osaka Prefecture Inside Matsushita Electric Works, Ltd.

Claims (8)

[Claims] A step of forming a sacrificial layer at a predetermined position on one surface of a semiconductor substrate; a step of forming an epitaxial layer on a surface of the semiconductor substrate on which the sacrificial layer is formed; Forming a high-concentration impurity layer that reaches the substrate; forming an acceleration detection unit for detecting acceleration by converting strain into an electric signal at a position corresponding to the bent portion of the epitaxial layer; Forming a cut portion reaching the sacrificial layer by anisotropically etching a portion corresponding to the outer peripheral edge of the semiconductor substrate from a side different from the epitaxial layer forming surface;
Forming a cut groove by etching away the sacrificial layer, and forming a bent portion for suspending and supporting the weight portion and a frame for supporting the bent portion by etching and removing a desired portion of the epitaxial layer. Forming a high-concentration impurity layer reaching the sacrificial layer in the epitaxial layer, and forming an etchant inlet to reach the sacrificial layer by etching away the high-concentration impurity layer. And a step of
A method for manufacturing a semiconductor acceleration sensor, characterized in that the sacrificial layer is removed by etching by introducing an etchant through the etchant inlet to form the cut groove. 2. A piezoresistor whose resistance value changes by bending is formed at a position corresponding to the bending portion of the epitaxial layer as the acceleration detecting unit, and a change in the resistance value of the piezoresistance is converted into an electric signal. 2. The method for manufacturing a semiconductor acceleration sensor according to claim 1, wherein the acceleration is detected. 3. An acceleration detecting section comprising electrodes which are arranged substantially opposite to each other, and wherein the bending section and / or the acceleration detecting section apply acceleration.
2. The method for manufacturing a semiconductor acceleration sensor according to claim 1, wherein the deflection of the weight portion is detected by the electrode as a change in capacitance, and the acceleration is detected. 4. The method for manufacturing a semiconductor acceleration sensor according to claim 1, wherein a high-concentration impurity layer is formed as said sacrificial layer by impurity diffusion. 5. A high-concentration impurity layer is formed as said sacrificial layer by impurity diffusion, and said high-concentration impurity layer is made porous by anodization to form a porous silicon layer. A method for manufacturing a semiconductor acceleration sensor according to claim 3. 6. The method for manufacturing a semiconductor acceleration sensor according to claim 1, wherein said high-concentration impurity layer is formed at a position adjacent to said bent portion. 7. The high-concentration impurity layer and the sacrifice layer,
7. The method of manufacturing a semiconductor acceleration sensor according to claim 1, wherein the semiconductor acceleration sensor is continuously removed by etching. 8. The semiconductor device according to claim 1, wherein the high-concentration impurity layer is formed in a portion of the epitaxial layer excluding the bending portion and a frame forming portion. A method for manufacturing the semiconductor acceleration sensor according to any one of the above.