JP3493980B2 - Manufacturing method of semiconductor acceleration sensor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor acceleration sensor having a doubly supported beam structure, which is used in automobiles, aircrafts, home electric appliances and the like.

[0002]

2. Description of the Related Art FIG. 8 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to a conventional example. First, the silicon nitride films 25 are formed on both surfaces of the silicon substrate 24a (see FIG. 8).
(A)), the bending portion 11 described later on one surface of the silicon substrate 24a and the bending portion 11 on the other surface when acceleration is applied.
The silicon nitride film 25 at the portions corresponding to the outer peripheral edge of the weight portion 12 which gives the bending is removed by etching to form openings 25a and 25b (FIG. 8B).

Subsequently, using the silicon nitride film 25 having the openings 25a and 25b as a mask, the silicon substrate 2 is formed.
4a is etched to form recesses 26a and 26b, and the silicon nitride film 25 on the side of the silicon substrate 24a where the flexible portion 11 is formed is removed by etching. Then, the silicon substrate 24b is bonded to the surface side of the silicon substrate 24a from which the silicon nitride film 25 is removed (FIG. 8C), and the silicon substrate 24b is thinned by grinding or etching to a thickness corresponding to the bending portion 11. (FIG.8 (d)).

Next, a thin film silicon substrate 24b has a conductivity type opposite to that of the silicon substrate 24b at a position corresponding to the bending portion 11, and a resistance change due to the bending is converted into an electric signal by forming a bridge circuit. Piezoresistor 2 to convert
7 and diffusion wiring 28 electrically connected to the piezoresistor 27
And are formed by impurity diffusion (FIG. 8E).

Next, the piezoresistor 2 of the silicon substrate 24b
A protective film 29 is formed on the surface where the 7 is formed, the protective film 29 at a desired portion on the diffusion wiring 28 is removed by etching to form a contact hole, and the metal wiring 14 is formed so as to fill the contact hole.

Finally, using the silicon nitride film 25 having the opening 25b as a mask, potassium hydroxide (KO) is formed.
H) By anisotropically etching the silicon substrate 24a using an alkaline etchant such as a solution, the notch 8 reaching from the recess 26b on one surface side of the silicon substrate 24a to the recess 26a on the other surface and communicating therewith. The bending portion 11 is formed and connected to the center portion of the weight portion 12, and both ends thereof are supported by the frame 10 formed of the silicon substrate 24b, and the supporting member 13 that supports the lower surface side of the frame 10. And are formed (FIG. 8 (f)).

In the semiconductor acceleration sensor, the acceleration to be detected is transmitted to the bending portion 11 as bending, and the bending portion 11 receives the acceleration.
The resistance value of the piezoresistor 27 formed at is changed by bending and is converted into an electric signal.

Therefore, the sensitivity of the semiconductor acceleration sensor is governed by the thickness of the bending portion 11, deteriorates as the thickness increases, and is influenced by the variation in the thickness. That is, in the manufacturing process of the semiconductor acceleration sensor, it is important to uniformly and accurately control the thickness of the bending portion 11.

[0009]

However, in the method of manufacturing the semiconductor acceleration sensor as described above, the bending portion 11 is connected to the central portion of the weight portion 12, and both ends thereof are connected to the frame 14.
It is possible to manufacture a semiconductor acceleration sensor having a double-supported beam structure supported by the silicon substrate 24a.
In the step of thinning the silicon substrate 24b into a thin film having a thickness corresponding to the bending portion 11 after the bonding of the 4b, the thickness of the bending portion 11 can be made uniform because the thickness of the silicon substrate 24b varies. It was difficult.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method of manufacturing a semiconductor acceleration sensor capable of accurately forming the thickness of a bending portion. It is in.

[0011]

According to a first aspect of the present invention, a semiconductor substrate having one main surface and two main surfaces extends outward from an outer edge of at least a part of a central portion of the semiconductor substrate. Forming a high-concentration impurity region, forming an epitaxial layer on one main surface of the semiconductor substrate with a thickness corresponding to a bending portion that bends when acceleration is applied, and the epitaxial layer forming surface of the semiconductor substrate A step of forming an electrode and a metal wiring electrically connected to the electrode at a predetermined position on the side, and a portion corresponding to the outer peripheral edge of the weight portion that bends the bending portion when acceleration is applied to the semiconductor substrate. A step of anisotropically etching from the main surface side to form a notch reaching the high-concentration impurity region, and removing the high-concentration impurity region through the notch by isotropic etching. , Have a forming by epitaxial layer both ends connected to the central portion said epitaxial layer flexure portion supported on the frame formed by the weight portion, the impurity concentration of the high concentration impurity regions
Is lower on one main surface of the semiconductor substrate,
To do .

According to a second aspect of the invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, a step of forming a slit by etching a desired portion of the epitaxial layer after forming the bending portion is provided. It is characterized by that.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first or second aspect,
In the epitaxial layer, a step of forming a high-concentration connecting layer having a high impurity concentration connected to the high-concentration impurity region is provided, and the slit is formed by etching away the high-concentration connecting layer. It is what

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the third aspect, the high-concentration connecting layer and the high-concentration impurity region are continuously removed by etching. Is.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first to fourth aspects, the wiring formation surface side of the semiconductor substrate is etched before the high concentration impurity region is removed by etching. The method is characterized in that a step of forming a protective film for protecting it from erosion by is provided.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the fifth aspect, a chromium film, a silicon nitride film or a fluororesin is used as the protective film.

According to a seventh aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the first to sixth aspects, a step of reducing the thickness of the weight portion by etching is provided. .

The invention according to claim 8 is the method for manufacturing a semiconductor acceleration sensor according to any one of claims 1 to 7, wherein the metal wiring passes through the center of gravity of the weight portion and is perpendicular to the semiconductor acceleration sensor. It is characterized by being arranged rotationally symmetrically with respect to.

[0019]

[0020] The invention of claim 9, wherein, in the method of manufacturing a semiconductor acceleration sensor according to claim 1, wherein the impurity concentration of the first major surface of said semiconductor substrate in the high concentration impurity regions, 5 × 10 ¹⁹ cm ^-3 or less It is characterized by that.

According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth aspect , the high-concentration impurity region is formed by impurity deposition and thermal diffusion, and wet oxidation or pyrogenic oxidation is performed. As a result, the impurity concentration of the high-concentration impurity region is lowered on the one main surface of the semiconductor substrate.

According to an eleventh aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the ninth aspect , the high-concentration impurity region is directly ion-implanted and annealed to the main surface of the semiconductor substrate. Thus, the high-concentration impurity region having a low impurity concentration is formed on one main surface of the semiconductor substrate.

According to a twelfth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth aspect , after the high-concentration impurity region is formed, the main surface of the semiconductor substrate in the high-concentration impurity region is formed on the main surface. It is characterized in that an impurity having a conductivity type opposite to that of the high concentration impurity region is doped.

According to a thirteenth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth to twelfth aspects, at least the impurity concentration of the epitaxial layer in the semiconductor substrate and the epitaxial layer is set during epitaxial growth. It is characterized in that the concentration of impurities taken into the epitaxial layer is made higher than the maximum value by autodoping.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. Note that the following embodiments are also applied to the case where the conductivity types are opposite.

1 to 3 are schematic cross-sectional views showing a manufacturing process of a semiconductor acceleration sensor according to an embodiment of the present invention, and FIG. 4 is a partially broken state of the semiconductor acceleration sensor according to the present embodiment. FIG. 5 is a schematic perspective view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above. Note that FIG. 1 shows A- in FIG.
2 shows a schematic cross-sectional view taken along line BB ′ in FIG. 5, and FIG. 3 shows a schematic cross-sectional view taken in FIG.

First, a silicon oxide film 2 is formed by thermal oxidation or the like on an n-type silicon substrate 1 as a semiconductor substrate,
By etching the silicon oxide film 2, a substantially elongated opening extending outward from the outer edge of the rectangular central portion 1a of the silicon substrate 1 and spaced at equal intervals (90 °). 2a is formed.

The opening 2a may be formed at a location surrounding the central portion 1a. Then, the opening 2a
By using the silicon oxide film 2 having the film formed thereon as a mask, p-type impurities such as boron (B) are deposited and thermally diffused or ion-implanted and annealed to perform p + -type buried sacrificial layer 3 as a high-concentration impurity region. (Fig. 1
(A), FIG. 2 (a), FIG. 3 (a)), silicon oxide film 2
Are removed by etching.

In this embodiment, the p + type buried sacrificial layer 3 is formed on the silicon substrate 1. However, n type impurities such as phosphorus (P) are deposited and thermally diffused or ion implanted and annealed. The n + type buried sacrificial layer may be formed by performing the treatment.

The p + type buried sacrificial layer 3 has a central portion 1a.
May extend from the entire outer edge to completely surround that portion, or it may extend from a portion of the outer edge. When extending from the whole, the p + -type buried sacrificial layer 3 may have an annular shape, for example, the central portion 1a has a circular shape, and p
The + type embedded sacrificial layer 3 is an annular portion between a concentric circle formed by a circle concentric with the + type embedded sacrificial layer 3 and the central portion 1a, or the central portion 1a is an inner square, and the p + type embedded sacrificial layer 3 is concentric therewith. And formed by an outer square having the same orientation and may be an annular portion between the inner square and the outer square. Further, the p + type buried sacrificial layer 3 may be a portion formed by a portion between the circular central portion 1a and the outer square or a combination thereof, and further, instead of the square, a rectangular shape may be used. Alternatively, an elliptical shape may be used.

Further, the p + type buried sacrificial layer 3 has the central portion 1a.
P + type buried sacrificial layer 3 when extending from a part of the outer edge of the
Can be substantially elongated layers spaced at equal angles (eg, 90 °) around the central portion 1a, where the p + buried sacrificial layers 3 are separated from each other in the central portion 1a. There are four beams facing each other (that is, a shape crossing at the central portion 1a). In other words, the p + type buried sacrificial layer 3 may extend radially from the central portion 1a, and the number thereof is not limited.

Next, on the surface of the silicon substrate 1 on which the p + type embedded sacrificial layer 3 is formed (hereinafter, this surface side is referred to as the surface), the n-type has a thickness corresponding to a bending portion 11 which will be bent when acceleration is applied. Of the epitaxial layer 4 is formed on both sides by the low pressure CVD method,
The silicon oxide film 5 is formed by pyrogenic oxidation or the like, and the silicon nitride film 6 is formed on the silicon oxide film 5 by the low pressure CVD method or the like, which corresponds to the outer peripheral edge of the weight portion 12 to be described later on the back surface side of the silicon substrate 1. The openings 7 are formed by etching away the silicon oxide film 5 / silicon nitride film 6 at the portions to be formed (FIG. 1 (b), FIG. 2 (b), FIG. 3 (b)).

In the present embodiment, the silicon oxide film 5 / silicon nitride film 6 is formed, but the invention is not limited to this, and only the silicon nitride film 6 may be formed. However, by forming the silicon oxide film 5 / silicon nitride film 6, it becomes possible to reduce the warp of the beam portion 11a described later by compressing and pulling (or vice versa) the internal stress of each film.

Next, using the silicon oxide film 5 / silicon nitride film 6 having the openings 7 as a mask, anisotropic etching of the silicon substrate 1 is performed using an alkaline etchant such as potassium hydroxide (KOH) solution. Is performed until the p + type buried sacrificial layer 3 is reached to form the cut portion 8 (FIGS. 1C and 2C).

Next, an etchant is introduced from the cut portion 8 and the p + type buried sacrificial layer 3 is removed by isotropic etching in which etching is performed in all directions to form a cut groove 9 and the epitaxial layer 4 is formed. From a frame-shaped frame 10 made of, a flexible portion 11 made of an epitaxial layer 4 having both ends (beam portions 11a) supported by the frame 10, and a silicon substrate 1 having a central portion 12a supported at the central portion of the flexible portion 11. A weight portion 12 is formed, and a support member 13 that is formed of the silicon substrate 1 that surrounds the weight portion 12 and supports the lower surface side of the frame 10 (the bonding surface side of the silicon substrate 1 and the epitaxial layer 4).

At this time, the etching rate of isotropic etching is higher in the p + type buried sacrificial layer 3 than in the epitaxial layer 4 having a low impurity concentration, and only the epitaxial layer 4 remains selectively. , P + type buried sacrificial layer 3 can be selectively removed.

In this embodiment, an acidic solution of hydrofluoric acid or the like (50% hydrofluoric acid aqueous solution: 69% nitric acid aqueous solution: acetic acid =) is used as an etchant for performing isotropic etching.
(1: 1 to 3: 8 volume basis) is used.

Next, the metal wiring 14, the upper stopper bonding electrode 15, the movable electrode 16 and the electrode pad 17 are formed of gold (Au) on the surface side silicon nitride film 9 (FIG. 1).
(D), FIG. 2 (d), FIG. 3 (c)). At this time, the metal wiring 14, the upper stopper junction electrode 15, the movable electrode 16 and the electrode pad 17 may be formed via a chromium (Cr) film or the like in order to enhance the adhesion to the underlying layer. Also, the metal wiring 1
4, aluminum (Al) may be used as the upper stopper junction electrode 15, the movable electrode 16 and the electrode pad 17. Further, the metal wiring 14, the upper stopper bonding electrode 15,
As a method of forming the movable electrode 16 and the electrode pad 17, a method of forming a metal layer by performing vapor deposition or sputtering and patterning it into a predetermined shape by using a photolithography technique and an etching technique, a metal wiring 14, an upper stopper in advance. After forming a resist or the like on the bonding electrode 15, the movable electrode 16, and the electrode pad 17 other than the positions,
There is a method of forming a metal layer by performing vapor deposition or sputtering, and removing the resist or the like, a so-called lift-off method.

Next, a wiring protection film 18 made of a chromium film, a silicon nitride film, a fluororesin or the like is formed on the front surface side, and as shown in FIG. 5, a portion adjacent to the beam portion 11a and the frame 10 are formed.
An opening 18a is formed in a portion of the inner side surface of the substrate excluding the portion where the beam portion 11a is formed (FIG. 1 (e), FIG. 2 (e), FIG. 3).
(D)).

Next, using the wiring protective film 18 having the opening 18a as a mask, reactive ion etching (RI) is performed.
E: The slit 19 is formed by Reactive Ion Etching or the like. At this time, the slit 19 adjacent to the beam portion 11 a is formed until reaching the cut groove 9, and the slit 19 on the inner side surface of the frame 10 is formed until reaching the cut portion 8.

In this embodiment, the beam portion 11a is used.
Although the slits 19 are formed at the same time on the inner side surface of the frame 10 and the location adjacent to the slit 19, the slit 19 is not limited to this, and the slits 19 may be formed on the inner side surface of the frame 10.
The slit 19 may be formed (or vice versa) at a position adjacent to the beam portion 11a after forming the. However, if the slit 19 is formed on the inner side surface of the frame 10 and then the slit 19 is formed at a position adjacent to the beam portion 11a, the cut groove 9 is not etched by RIE or the like.

In the present embodiment, the slit 19 is formed after the p + type buried sacrificial layer 3 is removed by etching. However, the slit 19 is not limited to this, and the p + is formed after the slit 19 is formed. The mold-embedded sacrificial layer 3 may be removed by etching.

Further, the slit 19 of the epitaxial layer 4
If a high-concentration connecting layer that is connected to the p + type buried sacrificial layer 3 is formed in advance at the formation position by deposition of p-type or n-type impurities, thermal diffusion, or ion implantation and annealing, it is even more accurate. The slit 19 can be formed. In this case, since the high-concentration connecting layer and the p + type buried sacrificial layer 3 can be continuously removed by etching, the cut groove 9 and the slit 19 can be formed without increasing the number of steps.

Here, at the boundary between the beam portion 11a and the central portion of the flexible portion 11 and the boundary between the beam portion 11a and the frame 10, there are formed slits 19 having curved edges in order to avoid stress concentration. It is desirable to form.

Finally, the wiring protection film 18 on the front surface and the silicon oxide film 5 / silicon nitride film 6 on the back surface are removed by etching (FIG. 1 (f), FIG. 2 (f), FIG. 3 (e)), and the weight is removed. A lower stopper 20 having a recess 20a at a portion corresponding to the portion 12 is joined to the support member 13 by anodic bonding or the like, and a recess 21a is provided at a portion corresponding to the weight portion 12 so as to face the movable electrode 16. The upper stopper 21 having the fixed electrode 22 is bonded to the upper stopper bonding electrode 15 by anodic bonding or the like (FIGS. 1 (g), 2 (g) and 3).
(F)). Here, the fixed electrode 2 is attached to the upper stopper 21.
2 and a contact hole 23 for making contact with the electrode pad 17 are formed.

In this embodiment, the slit 1
Although the lower stopper 20 is joined to the support member 13 after forming 9, the slit 19 may be formed after joining the lower stopper 20 to the support member 13 without being limited thereto. .

Further, in this embodiment, as shown in FIG. 4, the slits 19 are formed in the portion adjacent to the beam portion 11a and the inner side surface of the frame 10, but the invention is not limited to this. , For example, as shown in FIG.
Epitaxial layer 4 between the flexure 11 and the frame 10
May be removed by etching to form a slit. In this case, the movable electrode 16 is formed on the upper surface side of the weight portion 12 (epitaxial layer 4 formation surface side).

In the method of manufacturing the semiconductor acceleration sensor according to this embodiment, the outer peripheral edge of the weight portion 12 is formed by anisotropic etching from the back surface of the silicon substrate 1, and the bending portion 11 is at the center of the silicon substrate 1. The p + -type buried sacrificial layer 3 provided surrounding the portion 1a is formed by isotropic etching, and the p + -type buried sacrificial layer 3 is etched as compared with the silicon substrate 1 and the epitaxial layer 4. Since the speed is high, the epitaxial layer 4 is not so much etched when the p + type buried sacrificial layer 3 is removed by etching, and the thickness of the bending portion 11 can be accurately formed.
It is possible to stably manufacture a semiconductor acceleration sensor having a doubly supported beam structure with little sensitivity variation.

Further, since the p + type buried sacrificial layer 3 is removed by etching to form the cut groove 19, the bending of the bending portion 11 given by the weight portion 12 is concentrated on the beam portion 11a, and the movable electrode 16 and the fixed portion are fixed. The rate of change of the capacitance formed by the electrode 22 is increased, and the sensitivity can be improved.

Further, since the slits 19 are formed only in the portion adjacent to the beam portion 11a and the inner side surface of the frame 10 (excluding the portion where the beam portion 11a is formed), the weight portion 12 is formed.
The upper side epitaxial layer 4 can also be used as a weight portion, the weight portion 12 can be increased in volume to increase the weight of the weight portion 12, and the sensitivity can be improved.

In this embodiment, the two beam portions 1
Although the metal wiring 14 is formed on 1a, for example, as shown in FIG. 7, four metal wirings 14 are arranged rotationally symmetrically with respect to the center line perpendicular to the sensor, passing through the center of gravity of the weight portion 12. By doing so, the metal wiring 14 is evenly formed on the four beam portions 11a, thermal strain is evenly applied, and an offset-resistant structure can be obtained.

In the present embodiment, if the bottom surface of the weight portion 12 (the surface side different from the surface on which the epitaxial layer 4 is formed) is etched to reduce the thickness of the weight portion 12, a flat lower stopper is used. Therefore, the step of forming the concave portion in the lower stopper is unnecessary, and the cost can be reduced.

Further, in the present embodiment, four beam portions 11a are formed, but the number of beam portions is not limited to this, and any number of beam portions such as eight beams and twelve beams may be formed. May be.

In the present embodiment, when the silicon nitride film is used as the wiring protection film 18, the surface silicon nitride film 6 may not be formed. In this case, the wiring protection film 18 on the electrode pad 17 is thinned by etching in advance, and the entire surface of the wiring protection film 18 is etched after the p + type buried sacrificial layer 3 is removed by etching to expose the electrode pad 17. If the etching is stopped, the portions other than the electrode pads 17 are covered with the silicon nitride film, and the moisture resistance can be improved.

Here, when the epitaxial layer 4 is formed after the p + type buried sacrificial layer 3 is formed, since the surface of the silicon substrate 1 is completely exposed at the beginning of the epitaxial growth, the p + type buried sacrificial layer is formed. There is a problem that impurities in the layer 3 escape into the atmosphere for forming the epitaxial layer 4 and are taken in at the same time during the epitaxial growth.
This phenomenon is generally called auto-doping, but naturally, the higher the impurity concentration of the p + type buried sacrificial layer 3, the greater the degree thereof, and the particularly high impurity concentration of the p + type buried sacrificial layer 3. In this case, an inversion layer, which is a p + type impurity region, is formed near the interface between the silicon substrate 1 and the epitaxial layer 4 by autodoping even in a region where the p + type impurity region should not be formed by design. As a method of solving this problem, there is a method of lowering the impurity concentration of the p + type buried sacrificial layer 3 near the surface of the silicon substrate 1. There are the following three methods, for example.

(1) Deposition and thermal diffusion are performed by using the silicon oxide film having the openings formed therein as a mask, and wet oxidation or pyrogenic oxidation is performed to form the silicon oxide film at the places where the openings are formed. At this time,
Impurities near the surface of the silicon substrate of the p + type buried sacrificial layer are taken into the silicon oxide film.

(2) Using the silicon oxide film having the opening formed as a mask, ion implantation and annealing are directly performed on the silicon substrate. Here, it is known that the peak of the impurity distribution immediately after the ion implantation appears at a position slightly deeper than the implantation surface due to the channeling effect, and this distance is determined by the type of the impurity and the acceleration energy at the time of implantation. In the case of the same concentration, the deeper the peak position, the lower the impurity concentration on the surface of the silicon substrate.

(3) The p + type buried sacrificial layer is doped with an impurity having a conductivity type opposite to that of the p + type buried sacrificial layer in the vicinity of the surface of the silicon substrate. As a result, p-type and n-type impurities exist near the substrate surface of the p + -type buried sacrificial layer, so that when forming the epitaxial layer, each of the impurities escapes into the atmosphere at the same time during epitaxial growth. It is taken into the layer and the two are offset, so that the formation of the inversion layer can be suppressed.

In the above three methods, the impurity concentration on the substrate surface of the p + type buried sacrificial layer is 5 × 10 ¹⁹
It is preferably cm ⁻³ or less.

In addition to the above-mentioned method, as a method for preventing the formation of the inversion layer, the impurity concentration of at least the epitaxial layer of the silicon substrate and the epitaxial layer is set to the impurity taken into the epitaxial layer by the autodoping during the epitaxial growth. If the concentration is higher than the concentration of, the trapped impurities can be canceled out, the formation of the inversion layer can be completely prevented, and the impurities on the epitaxial layer side through the surface of the silicon substrate can be prevented. Diffusion can also be suppressed.

[0061]

According to the invention of claim 1, a high-concentration impurity region extending outward from an outer edge of at least a part of a central portion of the semiconductor substrate is formed on one main surface of the semiconductor substrate having one main surface and two main surfaces. A step of forming, an step of forming an epitaxial layer on one main surface of the semiconductor substrate with a thickness corresponding to a bending portion that bends when acceleration is applied, and an electrode and an electrode at predetermined locations on the epitaxial layer forming surface side of the semiconductor substrate. A step of forming a metal wiring electrically connected to the electrode, and anisotropically etching a portion corresponding to the outer peripheral edge of the weight portion that gives the bending portion a flexure when an acceleration is applied, from the two main surface sides of the semiconductor substrate, The step of forming a notch reaching the high-concentration impurity region, and removing the high-concentration impurity region by isotropic etching through the notch, connecting to the center of the weight part and making both ends epitaxial And the step of forming the bending portion supported by the frame formed by the layers by the epitaxial layer, so that the epitaxial layer having a desired thickness can be formed, and the high-concentration impurity region has the epitaxial layer and the semiconductor substrate. On the other hand, the etching rate in isotropic etching is very fast, the epitaxial layer is hardly etched when removing the high-concentration impurity region by etching, and the thickness of the bending portion can be accurately formed. It was possible to provide a method of manufacturing a semiconductor acceleration sensor that can be manufactured. Furthermore, the impurity concentration of the high-concentration impurity region
Was reduced on the main surface of the semiconductor substrate,
Of the high-concentration impurity region into the atmosphere at the beginning of the local growth.
It is possible to reduce the amount of impurities that are ejected,
Inversion layer formation by pinging
It is possible to suppress the diffusion of pure substances.

According to a second aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the first aspect, a step of forming a slit by etching a desired portion of the epitaxial layer after forming the bending portion is provided. The deflection given by the weight portion is concentrated on the bending portion, and the sensitivity can be improved.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first or second aspect,
Since the epitaxial layer is provided with a step of forming a high-concentration connecting layer having a high impurity concentration that is connected to the high-concentration impurity region, and the high-concentration connecting layer is etched away to form the slit, the high-concentration connecting layer is formed. Since the etching rate is higher than that of the epitaxial layer, the epitaxial layer is not etched much and the flexure portion can be formed with high accuracy.

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the third aspect, the high-concentration connecting layer and the high-concentration impurity region are continuously removed by etching, so that the number of steps is increased. The slit can be formed without.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first to fourth aspects, before the high-concentration impurity region is removed by etching, the wiring formation surface side of the semiconductor substrate is provided. Since a step of forming a protective film such as a chromium film, a silicon nitride film, or a fluororesin that protects the metal from etching is eroded, the electrodes and the metal wiring are eroded by the etching when the high-concentration impurity regions are removed by etching. Can be prevented.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first to sixth aspects, a step of reducing the thickness of the weight portion by etching is provided. Since it can be bonded to the two main surfaces of the semiconductor substrate, the cost can be reduced.

According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first to seventh aspects, the metal wiring is passed through a center of gravity of the weight portion and is perpendicular to a center line perpendicular to the semiconductor acceleration sensor. Since they are arranged in rotational symmetry, thermal strain is evenly applied, and a structure in which offset is unlikely to occur can be obtained.

[0068]

[0069] The invention of claim 9, wherein, in the method of manufacturing a semiconductor acceleration sensor according to claim 1, wherein the impurity concentration of the one principal surface of the semiconductor substrate in the high concentration impurity regions, 5
Since it is less than × 10 ¹⁹ cm ^-3 , it is possible to reduce the amount of impurities that escape from the high-concentration impurity region into the atmosphere at the beginning of epitaxial growth, and to form an inversion layer by autodoping or to diffuse impurities to the epitaxial layer. Can be suppressed.

According to a tenth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to the ninth aspect , the high concentration impurity region is formed by impurity deposition and thermal diffusion, and wet oxidation or pyrogenic oxidation is performed. As a result, the impurity concentration in the high-concentration impurity region is lowered on one main surface of the semiconductor substrate, so that the amount of impurities escaping from the high-concentration impurity region into the atmosphere at the beginning of epitaxial growth can be reduced, and the inversion layer by autodoping can be reduced. Formation and the diffusion of impurities into the epitaxial layer can be suppressed.

According to an eleventh aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth aspect , the high concentration impurity region is directly ion-implanted and annealed to one main surface of the semiconductor substrate. Since the high-concentration impurity region having a low impurity concentration is formed on one main surface of the semiconductor substrate, it is possible to reduce the amount of impurities escaping from the high-concentration impurity region into the atmosphere at the beginning of epitaxial growth. Formation of the inversion layer and diffusion of impurities into the epitaxial layer can be suppressed.

According to a twelfth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth aspect , the high-concentration impurity regions are formed on one main surface of the semiconductor substrate after the high-concentration impurity regions are formed. Since the impurity of the conductivity type opposite to that of is doped, the impurities of the first conductivity type and the second conductivity type simultaneously escape into the atmosphere during the epitaxial growth and are taken into the epitaxial layer. Can be offset and the formation of the inversion layer can be suppressed, and at the same time, the diffusion of impurities into the epitaxial layer can be suppressed.

According to a thirteenth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the ninth to twelfth aspects, at least the impurity concentration of the epitaxial layer among the semiconductor substrate and the epitaxial layer is set by auto-doping during epitaxial growth. Since the impurity concentration taken into the epitaxial layer is set higher than the maximum value, it is possible to cancel the impurities of the first conductivity type and the second conductivity type, and to completely prevent the formation of the inversion layer.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a semiconductor acceleration sensor according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of the semiconductor acceleration sensor according to the present embodiment.

FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the semiconductor acceleration sensor according to the present embodiment.

FIG. 4 is a schematic perspective view showing a partially broken state of the semiconductor acceleration sensor according to the present embodiment.

FIG. 5 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above.

FIG. 6 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 7 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above.

FIG. 8 is a schematic cross-sectional view showing a manufacturing process of a semiconductor acceleration sensor according to a conventional example.

[Explanation of symbols]

1 Silicon substrate 1a central part 2 Silicon oxide film 2a opening 3 p + type embedded sacrificial layer 4 Epitaxial layer 5 Silicon oxide film 6 Silicon nitride film 7 openings 8 notches 9 notch 10 frames 11 Flexible part 11a beam part 12 Weight 12a central part 13 Support members 14 Metal wiring 15 Upper stopper junction electrode 16 movable electrodes 17 electrode pad 18 Wiring protection film 19 slits 20 Lower stopper 20a recess 21 Upper stopper 21a recess 22 Fixed electrode 23 Contact holes 24a, 24b Silicon substrate 25 Silicon nitride film 25a, 25b opening 26a, 26b recess 27 Piezoresistor 28 Spread Loss 29 Protective film

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-8-236784 (JP, A) JP-A-5-102495 (JP, A) JP-A-3-110478 (JP, A) JP-A-2- 81477 (JP, A) JP 3-255369 (JP, A) JP 9-139509 (JP, A) JP 8-278218 (JP, A) JP 9-211020 (JP, A) JP 54-142078 (JP, A) JP 61-93961 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/84 G01P 15/12

Claims (13)

(57) [Claims] 1. A step of forming, on one main surface of a semiconductor substrate having one main surface and two main surfaces, a high-concentration impurity region extending outward from an outer edge of at least a part of a central portion of the semiconductor substrate, and the semiconductor. A step of forming an epitaxial layer on one main surface of the substrate with a thickness corresponding to a bending portion that bends when an acceleration is applied; an electrode at a predetermined position on the epitaxial layer formation surface side of the semiconductor substrate; The step of forming a metal wiring to be electrically connected, and anisotropically etching a portion corresponding to the outer peripheral edge of the weight portion that gives the bending portion a flexure when an acceleration is applied, from the two main surface sides of the semiconductor substrate, Forming a notch reaching the high-concentration impurity region, removing the high-concentration impurity region by isotropic etching through the notch, connecting both ends to the center of the weight part Bending part supported on the frame formed by the serial epitaxial layer have a forming by epitaxial layer, impurities of the high concentration impurity regions
Substance concentration on the one main surface of the semiconductor substrate
A method for manufacturing a characteristic semiconductor acceleration sensor. 2. The method of manufacturing a semiconductor acceleration sensor according to claim 1, further comprising a step of forming a slit by etching a desired portion of the epitaxial layer after forming the bending portion. 3. The epitaxial layer is provided with a step of forming a high-concentration connecting layer having a high impurity concentration, which is connected to the high-concentration impurity region, and the slit is formed by etching away the high-concentration connecting layer. The method for manufacturing a semiconductor acceleration sensor according to claim 1 or 2, wherein 4. The method for manufacturing a semiconductor acceleration sensor according to claim 3, wherein the high-concentration connecting layer and the high-concentration impurity region are continuously removed by etching. 5. The method according to claim 1, further comprising a step of forming a protective film for protecting the wiring formation surface side of the semiconductor substrate from erosion due to etching before the high concentration impurity region is removed by etching. The method for manufacturing the semiconductor acceleration sensor according to claim 4. 6. The method of manufacturing a semiconductor acceleration sensor according to claim 5, wherein a chromium film, a silicon nitride film, or a fluororesin is used as the protective film. 7. The method for manufacturing a semiconductor acceleration sensor according to claim 1, further comprising a step of thinning the weight portion by etching. 8. The metal wiring is arranged in rotational symmetry with respect to a center line that passes through the center of gravity of the weight portion and is perpendicular to the semiconductor acceleration sensor.
A method for manufacturing a semiconductor acceleration sensor according to claim 7. 9. The semiconductor acceleration sensor according to claim 1, wherein an impurity concentration of one main surface of the semiconductor substrate in the high-concentration impurity region is set to 5 × 10 ¹⁹ cm ⁻³ or less. Manufacturing method. 10. The high-concentration impurity region is formed by impurity deposition and thermal diffusion, and wet oxidation or pyrogenic oxidation is performed to adjust the impurity concentration of the high-concentration impurity region to the main component of the semiconductor substrate. The method for manufacturing a semiconductor acceleration sensor according to claim 9 , wherein the surface is lowered. 11. The high-concentration impurity region having a low impurity concentration on the one main surface of the semiconductor substrate by directly performing impurity ion implantation and annealing treatment on the one main surface of the semiconductor substrate in the high-concentration impurity region. The method of manufacturing a semiconductor acceleration sensor according to claim 9 , wherein the region is formed. 12. After forming the high-concentration impurity region, one main surface of the semiconductor substrate in the high-concentration impurity region is doped with an impurity having a conductivity type opposite to a conductivity type of the high-concentration impurity region. Claims characterized in that
9. The method for manufacturing the semiconductor acceleration sensor according to 9 . 13. The impurity concentration of at least the epitaxial layer among the semiconductor substrate and the epitaxial layer is set higher than a maximum value of the impurity concentration taken into the epitaxial layer by autodoping during epitaxial growth. Claims 9 to 1
2. The method for manufacturing the semiconductor acceleration sensor according to 2 .