JPH11135787A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, which permits crystal defect occurrence conditions to be evaluated electrically on a semiconductor substrate, for the anisotropically etching for forming a sidewall oxide film on gate electrodes. SOLUTION: This device comprises a gate insulating film on a first conductivity-type semiconductor substrate 11 via gate electrodes 13, a sidewall oxide film 15 at both side faces of the gate electrodes 13, a second conductivity- type low-concn. shallow diffused layer 14 formed self-aligningly on the gate electrodes 13 and a second conductivity-type high concn. deep diffused layer 17 distant from the oxide film 15. This can permit a crystal defect layer produced when the sidewall oxide film 15 is etched to be evaluated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
In particular, the present invention relates to a test semiconductor device suitable for evaluating a crystal defect accompanying formation of a sidewall (sidewall oxide film) of an LDD transistor having a fine structure.

[0002]

2. Description of the Related Art In an LDD transistor, for example, a gate electrode made of polysilicon is provided on a P-type semiconductor substrate via an insulating film, and a self-aligned N-type low concentration diffusion layer is provided on the gate electrode. In addition, the transistor has a structure in which a sidewall oxide film is provided on the side surface of the gate electrode, and an N + type high concentration diffusion layer is formed using this as a mask. This type of transistor is suitable for a MOSFET having a fine gate length of 0.5 μm or less because a short channel effect can be prevented by a low concentration diffusion layer and a good ohmic contact can be obtained by a high concentration diffusion layer.

FIG. 2 shows an outline of a manufacturing process of an LDD transistor. For example, a P-type semiconductor substrate 11 is prepared,
After forming a thin oxide film serving as a gate insulating film in a cell portion of the transistor, a polysilicon film is deposited on the entire surface, and a gate electrode 13 is formed by patterning. Then, using the gate electrode 13 as a mask, an N-type shallow low-concentration diffusion layer 14 is formed in a self-aligned manner. Figure 2 shows this stage.
It is shown in (A).

Then, a thick oxide film is deposited on the entire surface of the substrate 11 by CVD, and the deposited oxide film is etched by anisotropic etching.
5 is formed. The anisotropic etching is a high-speed selective etching in the vertical direction with respect to the horizontal direction, and is usually performed.
A reactive ion etching (RIE) method is used.
That is, since the etching proceeds while beating the oxide film with the ions formed in the plasma, the surface of the semiconductor substrate 11 is exposed and the surface of the semiconductor substrate 11 is slightly Due to the etching, a damaged layer 16 which is a crystal defect layer is formed on the surface of the semiconductor substrate 11. This stage is shown in FIG.

Further, using the sidewall oxide film 15 as a mask,
A type impurity is ion-implanted to form a deep N-type high concentration diffusion layer 17. Thus, a gate electrode and a source / drain diffusion region of the LDD transistor are formed.

[0006]

As described above, the LDD
In the manufacturing process of the transistor, the side wall oxide film portion on the side surface of the gate electrode is formed by anisotropically etching the thick oxide film, leaving only the portion, and removing the other oxide film portion by etching. At this stage, at the end of the etching of the oxide film, the semiconductor substrate is etched to form a damaged layer, which is a crystal defect layer, as described above. In examining the conditions of the anisotropic etching for forming the sidewall oxide film, the existence of a crystal defect layer formed on the surface of the semiconductor substrate is important, and the etching conditions are set so that the crystal defect layer is not formed as much as possible. It is necessary to find out, and it is necessary to evaluate the existence of the crystal defect layer.

However, conventionally, as a method for evaluating a damaged layer caused by this anisotropic etching, for example, a crystal defect is made visible by using a special chemical solution, and the state is observed using a scanning electron microscope or the like. There is something to observe. According to this method, it is possible to determine the presence or absence of crystal defects, or the number of crystal defects, but it is impossible to evaluate the electrical characteristics of the crystal defects, for example, how they relate to leakage current. It is.

Further, as shown in FIG. 2C, an LDD transistor provided with a sidewall oxide film is formed, and a PN formed between the P-type semiconductor substrate 11 and the N-type source / drain diffusion layers. It is possible to measure the junction leakage current. However, since the damage layer 16 formed by the anisotropic etching is formed inside the high concentration diffusion layer 17, even if the leakage current of the PN junction is measured, the damage layer 16
Hardly appears to have any effect.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and a semiconductor device capable of electrically evaluating the occurrence of crystal defects in a semiconductor substrate due to anisotropic etching for forming a sidewall oxide film of a gate electrode. It is intended to provide a device.

[0010]

According to the present invention, there is provided a semiconductor device comprising:
A gate electrode on a semiconductor substrate of one conductivity type via a gate insulating film, and sidewall oxide films provided on both side surfaces of the gate electrode;
A shallow opposite conductivity type low concentration diffusion layer formed by self-alignment with respect to the gate electrode; and a deep opposite conductivity type high concentration diffusion layer spaced apart from the side wall oxide film. The present invention is characterized in that a crystal defect layer generated when a film is formed by etching can be evaluated.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIG. FIG. 1 shows the structure of this evaluation device. For example, a gate electrode 13 made of polysilicon or the like is formed on a P-type semiconductor substrate via a gate insulating film 12.
And a sidewall oxide film 15 on the side surface of the gate electrode 13.
And a structure provided with a shallow N− type low concentration diffusion layer 14 formed by self-alignment with respect to the gate electrode 13 is the same as the structure of the conventional LDD transistor. This evaluation device differs from the conventional LDD transistor in that an N + type high concentration diffusion layer 17 is arranged at a distance A from the sidewall oxide film 15.

Thus, in the section A between the sidewall oxide film 15 and the high-concentration diffusion layer 17, the damage layer 16 is not included in the deep high-concentration diffusion layer 17 but is a shallow N- type low-concentration diffusion layer 14. And a P-type layer of the semiconductor substrate 11 near the PN junction surface. Therefore, the N-type diffusion layer 1
By applying a positive voltage to the electrode 18 connected to the electrodes 6 and 17 and applying a negative voltage from an electrode (not shown) connected to the P-type layer of the semiconductor substrate 11, the PN junction is in a reverse bias state, and the depletion layer spreads here. When a crystal defect exists, a leak current flows. Accordingly, the semiconductor substrate 11 formed by the anisotropic etching when forming the sidewall oxide film 15 is thereby formed.
It is possible to measure the electrical characteristics of leakage current of internal crystal defects.

Next, the outline of the manufacturing process of the evaluation device will be described. A thin gate insulating film is formed on a semiconductor substrate 11, a polysilicon film is deposited thereon, and a gate insulating film 12 and a gate electrode 13 are formed by patterning. If the semiconductor substrate 11 is a P-type, N-
A shallow diffusion layer is formed by ion implantation or the like in a self-aligned manner using the gate electrode 13 as a mask. Next, a thick oxide film is deposited on the entire surface of the semiconductor substrate 11 by CVD or the like,
Anisotropic etching is performed by reactive ion etching (RIE). By performing this etching until the surface of the semiconductor substrate 11 is exposed, the sidewall oxide film 15 is formed on the side surface of the gate electrode 13. At this time, the semiconductor substrate 1
Since the etching cannot be stopped exactly at the end of the etching of the oxide film 1, the semiconductor substrate 11 is exposed by overetching and is hit by ions. As a result, crystal defects occur, and the damaged layer 16 is formed.

Next, a deep N + type diffusion layer 17 is formed apart from the side wall oxide film 15 by, for example, ion implantation using a resist mask. Then, an insulating film 19 is deposited on the entire surface of the semiconductor substrate, a contact opening is formed, and a metal wiring layer made of aluminum or the like is formed, thereby completing the device for evaluation. This device for evaluation may be formed in a matrix form over the entire surface of a semiconductor wafer and used as a wafer for crystal defect evaluation. It may be manufactured together with and evaluated. Thereby, multi-point evaluation of the leak current of the damaged layer due to the presence of crystal defects on the entire surface of the semiconductor wafer can be performed.

In the above embodiment, an example of an N-channel LDD transistor has been described.
Of course, the same can be applied to a P-channel type LDD transistor. Further, the semiconductor substrate of the above-described embodiment may be a P-type or N-type well, and it goes without saying that an LDD transistor disposed in this well can be similarly evaluated.

[0016]

As described above, the evaluation device of the present invention has a deep high-concentration diffusion layer disposed at a position separated from the side wall oxide film on the side surface of the gate electrode. As a result, a damaged layer is formed near the PN junction of the low-concentration diffusion layer by anisotropic etching, and a leak current generated by the damaged layer can be detected with high detection sensitivity. Therefore, it is possible to clarify the correlation between the etching conditions of the anisotropic etching for forming the sidewall oxide film and the corresponding leak current generated in the damaged layer. By such an electrical measurement, the influence of the anisotropic etching on the electrical characteristics of the damaged layer can be evaluated. For this reason, it is possible to predict the effect on the characteristics of the LDD transistor, such as the LSI, due to the change in the conditions of the anisotropic etching, etc., which can contribute to the improvement of the quality.

Further, by arranging the evaluation device in each part of the wafer, multi-point measurement on the wafer becomes possible.
It is possible to evaluate the distribution of leak current on a wafer under certain etching conditions. This makes it possible to set detailed process control conditions such as the arrangement of wafers at the time of etching.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of an evaluation device according to an embodiment of the present invention.

FIG. 2 is a sectional view showing an outline of a manufacturing process of the LDD transistor.

Claims (1)

[Claims] 1. A gate electrode on a semiconductor substrate of one conductivity type with a gate insulating film interposed therebetween, a side wall oxide film provided on both side surfaces of the gate electrode, and a shallow opposite formed by self-alignment with respect to the gate electrode. A conductive type low-concentration diffusion layer and a deep opposite-conductivity-type high-concentration diffusion layer disposed apart from the sidewall oxide film can be used to evaluate a crystal defect layer generated when the sidewall oxide film is formed by etching. A semiconductor device, characterized in that: