JPH11119723A - Picture display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To correctly display an input video signal generated from a digital signal on a dot matrix type display device. SOLUTION: A sampling circuit 2 samples a video signal S1 generated from a digital signal based on a sampling clock S5 outputted from a PLL 6 synchronously with a horizontal synchronizing signal S4 and a display driving signal 3 displays the sampled signal on a dot matrix type LCD 4. The video signal S1 is converted into a digital video signal by an A/D conversion circuit 1 and the digital video signal is inputted to an MPU 5. The MPU 5 inputs a vertical synchronizing signal S3 and a horizontal synchronizing signal S4, counts the signal S4 from the signal S3 by the procedure of a video level detection processing part 7a and detects a horizontal scanning line having a video signal exceeding a previously set small value by the procedure of an image start vertical position detecting processing part 7b. A horizontal scanning line detected at first is set up in the circuit 3 as a vertical image starting position and displayed on the LCD 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device for correctly displaying an input video signal generated from a digital signal such as a personal computer output on a dot matrix type display device.

[0002]

2. Description of the Related Art In recent years, there has been an increasing number of applications in which a digital video signal such as a personal computer is converted into an analog video signal, which is sampled again and displayed on an LCD or PDP. However, due to differences in the video processing circuit of the personal computer, etc., the position at which the image starts from the vertical and horizontal synchronization signals is not constant. There was a problem that the position was shifted. For the same reason, the original signal clock cycle of the digital video signal may be different, and if this is displayed as it is on a dot matrix type display device, there are adverse effects such as missing data and occurrence of moire. Furthermore, since the phase of the synchronization signal is shifted due to the length of the cable connecting the video signal, the phase of the sampling clock generated in synchronism with this generally deviates from the optimum value with respect to the input video signal, and character information etc. is displayed accurately. There was also a problem that it could not be done.

[0003]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide means for correctly displaying an input video signal generated from a digital signal on a dot matrix type display device. .

[0004]

SUMMARY OF THE INVENTION In an image display apparatus using a dot matrix for sampling and displaying a video signal generated from a digital signal output from a personal computer or the like, a level at which the same video signal is input and the same level becomes a predetermined level or more. Detecting means, and a video start vertical position detecting means for inputting a vertical synchronizing signal and a horizontal synchronizing signal of the video signal, and counting a horizontal synchronizing signal from the vertical synchronizing signal at which the video signal becomes a predetermined level or more. The correct display is achieved by displaying the video signal in the dot matrix, using the position of the horizontal synchronization signal at which the video signal is equal to or higher than a predetermined level as the image start position in the vertical direction.

[0005]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram of a main part of an embodiment of an image display device according to the present invention. A video signal S1 generated from a digital signal such as a personal computer output is sampled by a sampling circuit 2 by a sampling clock S5 synchronized with a horizontal synchronizing signal S4 by a PLL 6 and displayed on a dot matrix type LCD 4 by a display driving circuit 3. The video signal S1 is converted into a digital video signal using the A / D conversion circuit 1 at, for example, a sampling clock S5.
Input to PU5. The MPU 5 has another vertical synchronization signal S3.
And the horizontal synchronizing signal S4, and the video synchronizing signal S3 from the vertical synchronizing signal S3
In addition to counting 4, the level of the digital video signal at each horizontal scanning line is checked by the procedure of the image start vertical position detection processing section 7b. , A horizontal synchronizing signal having a video signal exceeding the above, that is, a horizontal scanning line is detected. The horizontal scanning line detected first is set as a vertical image start position in the display drive circuit 3 and displayed on the LCD 4. If the position within the horizontal scanning line that detects a predetermined level or more of the video signal is detected at any sampling clock position, it can be considered that the image in the vertical direction has started. Further, the MPU 5 receives an input switching signal S6 indicating switching of an input video signal, and in the procedure of the image start vertical position detection processing section 7b, the image start position in the horizontal direction can be set to any arbitrary number from the switching of the video signal. It can also be the minimum value detected in the field.

Similarly, the sampling clock S5 is input to the MPU 5, and the sampling clock S5 from the horizontal synchronizing signal S4 is inputted by the procedure of the video level detection processing section 7c.
And the level of the digital video signal at each sampling clock is checked by the procedure of the image start horizontal position detection processing section 7d, and this is used to detect the position of the sampling clock having a video signal exceeding a preset small value, for example, about LSB. I do. The position of the sampling clock detected first is set as the horizontal image start position in the display drive circuit 3 and displayed on the LCD 4. The detection of the position of the sampling clock at which the video signal becomes equal to or higher than the predetermined level is performed on all the scanning lines in the same field, and the minimum value among them, that is, the position closest to the start of the scanning line is the horizontal image start position. It can also be. Further, the minimum value of several fields after the signal switching can be set as the image start position in the horizontal direction.

The MPU 5 receives an input switching signal S6 serving as a signal indicating a display mode for each horizontal dot number of the personal computer output, and the image horizontal width detection processing section 7e performs the following steps.
In the same manner as described above, the number of sampling clocks on a horizontal scanning line that is equal to or higher than a predetermined video signal level is detected. The number of the detected sampling clocks is compared with the number of dots in the horizontal direction of the personal computer output determined from the LUT in the image horizontal width detection processing unit 7e from the display mode. Is output, and the two are combined. The detected image horizontal width is the maximum value of the image horizontal width detected by an arbitrary horizontal scanning line in the same field. Further, the image horizontal width can be set to the maximum value detected at an arbitrary plural fields from the switching of the video signal at the image start position.

A PL for generating a sampling clock S5
The horizontal synchronization signal S4 input as the reference signal of L6 is
The sampling clock S5 is input via a programmable delay line 8 serving as a phase adjusting means for adjusting the phase of the sampling clock S5 with respect to the horizontal synchronizing signal S4. In the MPU 5, the sampling clock S
In step 5, the average value of the A / D-converted video signal is obtained, and the value of the delay setting signal S8 for setting the delay value of the programmable delay line 8 is changed to set the phase at which the average value of the video signal is maximized.

[0009]

As described above, in a dot matrix type image display device which samples and displays a video signal generated from a digital signal such as a personal computer output, the same video signal is input and the same level is higher than a predetermined level. A vertical start signal and a horizontal start signal of the same video signal, and counts the horizontal sync signal from the vertical sync signal at which the video signal is higher than a predetermined level. Means for displaying an input video signal generated from a digital signal, such as displaying the video signal in the dot matrix with the position of the horizontal synchronization signal at which the video signal is equal to or higher than a predetermined level as the image start position in the vertical direction. The image can be correctly displayed on a dot matrix type display device.

[Brief description of the drawings]

FIG. 1 is a block diagram of a main part of an embodiment of an image display device according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 A / D conversion circuit 2 Sampling circuit 3 Display drive circuit 4 LCD 5 MPU 6 PLL 7a Video level detection processing unit 7b Image start vertical position detection processing unit 7c Video level detection processing unit 7d Image start horizontal position detection processing unit 7e Image horizontal Width detection processing unit 7f Clock phase adjustment processing unit 8 Programmable delay line S1 Video signal S3 Vertical synchronization signal S4 Horizontal synchronization signal S5 Sampling clock S6 Input switching signal

Claims (9)

[Claims] 1. An image display apparatus comprising a dot matrix for sampling and displaying a video signal generated from a digital signal output from a personal computer or the like and detecting a video level at which the same video signal is input and the same level becomes a predetermined level or more. Means, a video start vertical position detection means for inputting a vertical synchronization signal and a horizontal synchronization signal of the video signal, and counting a horizontal synchronization signal from the vertical synchronization signal at which the video signal becomes a predetermined level or more, An image display device, wherein the position of a horizontal synchronizing signal at which the video signal is equal to or higher than a predetermined level is set as a vertical image start position, and the video signal is displayed on the dot matrix. 2. An image display device comprising a dot matrix for sampling and displaying a video signal generated from a digital signal output from a personal computer or the like, wherein said video signal is input and said video signal level is equal to or higher than a predetermined level. A video start horizontal position detecting means for inputting a horizontal synchronization signal and a sampling clock signal of the video signal and counting a sampling clock signal from the horizontal synchronization signal at which the video signal is equal to or higher than a predetermined level; An image display device, wherein the position of a sampling clock signal at which a video signal is equal to or higher than a predetermined level is set as a horizontal image start position and the same video signal is displayed on the dot matrix. 3. The image start position in the vertical direction is a position of a horizontal synchronization signal at which a level of a video signal detected by the video level detection means is detected at an arbitrary sampling clock position in the same scanning line. The image display device according to claim 1, wherein: 4. The image start position in the horizontal direction is a position of a sampling clock obtained from a horizontal synchronizing signal of an arbitrary horizontal scanning line in the same field where the level of a video signal detected by the video level detecting means is detected. The image display device according to claim 3, wherein the minimum value is set. 5. The image processing method according to claim 1, further comprising the step of detecting the switching of the video signal, wherein the image start position is a minimum value detected in a plurality of arbitrary fields from the switching of the video signal. Image display device. 6. An image display apparatus comprising a dot matrix for sampling and displaying an input video signal generated from a digital signal such as a personal computer output and the like, wherein the number of horizontal signal clocks of the original digital signal generating the video signal is determined. Setting means, clock frequency adjusting means for variably adjusting the frequency of the sampling clock, and a position on the horizontal scanning line at which the video signal is equal to or higher than a predetermined level and a position on the horizontal scanning line at which the video signal is equal to or lower than the predetermined level. An image horizontal width detecting means for detecting an image horizontal width and a sampling clock counting means are provided, and the number of sampling clocks within the image horizontal width is adjusted to the number of the signal clocks by changing the frequency of the sampling clock. An image display device characterized by the following. 7. The image display apparatus according to claim 6, wherein the detected image horizontal width is a maximum value of the image horizontal width detected by an arbitrary horizontal scanning line in the same field. 8. The apparatus according to claim 6, further comprising means for detecting the switching of the video signal and its type, and wherein the horizontal width of the image is a maximum value detected in a plurality of arbitrary fields from the switching of the video signal. Image display device. 9. A phase adjusting means for adjusting a phase of the sampling clock with respect to a horizontal synchronizing signal, and an averaging means for obtaining an average value of sampled video signals,
7. The image display apparatus according to claim 6, wherein the sampling clock is set to a phase at which the same average value is maximized.