JPH11118837A - Transmission output detecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily detect a level with less detection error even if an input signal is different in waveform such as burst signal and consecutive signal with large variation in amplitude in a transmission power detecting circuit for satellite communication ground station. SOLUTION: An input detection signal is compared with a reference signal (c) in a first comparator 1, and also compared with a reference signal (e) higher in voltage by dV than the reference signal (c) in a second comparator 8. The output from the first comparator 1 obtains a signal with a pulse width of (t) in a unit pulse generating circuit 9, and an AND is taken using the output from the second comparator 8 and an AND gate 10. After the output from the gate 10 is input into a second pulse generating circuit 4, a switch 11 is controlled by that output so as to turn ON/OFF the signal from a sampling d'.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for detecting a transmission signal level modulated on a carrier signal in an RF frequency band, and more particularly to a transmission output detection circuit for a power amplifier of a satellite communication ground station.

[0002]

2. Description of the Related Art In the case of a power amplifier for a satellite communication ground station, a particularly high transmission output level is required. Therefore, the transmission output amplified to perform a protection operation on its own device, another device, or the human body, That is, detection of the transmission output level is indispensable. On the other hand, in a satellite communication ground station, the modulation method of the transmission signal to be amplified by the power amplifier and the multiplexing method to the carrier wave are often not specified. There is a difference in a signal transmission form for transmitting in a burst form or the like. Therefore, it is necessary to accurately detect the transmission output even for such a difference between various transmission signals.

[0003] In the figure, a modulated signal modulated by a modulator 51 is amplified to a required transmission level by a power amplifier 52 and transmitted from a transmission antenna 53.

The output of the power amplifying device 52 is detected by a detector 54 for detecting a high-frequency signal, and then a transmission signal level is detected by a transmission output detecting circuit 55. The detector 54 is usually a diode detector, and is subjected to envelope detection (envelope detection).

For the transmission output detection circuit 55 used in such a configuration, an output level detection method using a sample and hold circuit has conventionally been used to detect a burst transmission signal.

FIG. 6 is a block diagram of such a conventional transmission output detection circuit.

In FIG. 1, a detection signal obtained by envelope-detecting a transmission signal by a diode detector as described above is input from an envelope detection signal input terminal a.

The envelope detection signal a is branched into two, one of which is a comparator 1 for detecting the rise of a burst signal.
Is compared with the reference signal level (DC voltage) of the reference signal input terminal c. When the level exceeds the reference signal level, the comparator 1 outputs a burst detection signal. The burst detection signal is delayed for a predetermined time by the delay circuit 2, and then the sampling signal d 'synchronized with the rising edge of the burst detection signal delayed by the first single pulse generation circuit 3.
Occurs.

On the other hand, the burst detection signal output from the comparator 1 is also branched to a second single pulse generation circuit 4 for generating a pulse having a width longer than the standard repetition time of the burst signal, The inverted signal of the pulse generation circuit output 4 is ORed with the sampling signal d 'output from the first single pulse generation circuit 3 and input to the control circuit of the sampling circuit 6 as the sampling signal d. The envelope detection signal is sampled, held by the hold circuit 7, and output to the output level detection signal output terminal b.

According to the above operation, when the interval between the burst detection signals detected by the comparator 1 is smaller than the pulse width of the second single pulse generation circuit 4, the input envelope detection signal is determined to be a burst signal. Determined, the sampling circuit 6,
The hold circuit 7 performs a normal sample and hold operation. However, if the burst detection signal generation interval is longer than the pulse width of the second single pulse generation circuit 4, the input envelope detection signal is determined to be a continuous signal, and the switch in the sampling circuit 6 is turned off. It is continuously turned on, smoothed by the capacitor in the hold circuit, and output to the output level detection signal output terminal b.

The above prior art is disclosed in
No. 228073.

[0012]

As described above, the problem of the conventional circuit is that when the transmission signal is a continuous signal of phase modulation and the modulation speed is low, the amplitude modulation component is added to the envelope detection signal. Remains, and the comparator operates for burst detection.

In the case of simple two-phase phase modulation, since the signal always passes through a point having an amplitude of 0 when the state transitions, if the modulation is performed at a speed lower than the filter time constant of the envelope detection circuit,
The signal is input to the transmission signal level detection circuit while having the amplitude fluctuation due to the phase modulation.

The above problem will be described below with reference to the drawings.

FIG. 7 is a timing chart of level detection of a modulation signal when a continuous code "1010..." Is subjected to low-speed two-phase modulation in the conventional circuit shown in FIG.

The amplitude V _{1 of} the signal input to a
, The comparator 1 operates and the sampling signal d is output to the sampling circuit 6.

When the envelope detection signal a is sampled by the sampling signal d, only the voltage V ₁ ′ smaller than the original peak voltage is obtained at the output of the hold circuit 7 because the amplitude is sampled near zero.

Normally, in the burst signal detection by the TDMA method, the rise delay is one due to the relationship with the minimum burst width.
μsec and the delay time of the delay circuit 2 is about 1 μs
ec, the sampling pulse width is set to about 1 μsec. Therefore, if the modulation period of the phase modulation signal is within several msec, the detection error (V1 '/ V1) is small, but several m
A large detection error occurs in a modulated signal having a period equal to or longer than s.

As described above in detail, an object of the present invention is to detect a transmission signal level having a large amplitude fluctuation represented by a phase modulation signal having a low modulation speed as simply and accurately as possible.

The purpose of detecting the transmission signal level in the power amplifier for the satellite communication ground station is not to detect the absolute value of the level accurately, but for the safety of the human body during maintenance work and operation. Level protection, protection of the apparatus itself from reflected power, prevention of interference RF waves from being generated in other transmission signals, and the like.

[0021]

In order to solve the above-mentioned problems, a transmission output detection circuit according to the present invention comprises first and second comparison means for comparing a detected signal with first and second reference voltages, respectively.
Means for sample-holding and outputting the peak voltage of the detection signal based on the comparison means, and means for detecting a detection time difference between the first and second comparison means, wherein the slope of the rise of the detection signal is The sample and hold operation is prohibited based on the above. The second reference voltage is higher than the first reference voltage by a predetermined voltage. Further, the output of the first comparing means outputs a pulse signal for a predetermined time in accordance with the rise. The detection signal is
The high-frequency power signal modulated continuously or in a burst is detected by envelope detection.

In synchronization with the rise of the output signal of the AND circuit, a pulse signal for discriminating between a burst signal and a continuous signal is output by 4
When the amplitude change rate of the input envelope detection signal is larger than dV / t, the transmission signal is determined to be a continuous signal, and the sample-and-hold circuit operation is not performed. A smoothed signal is detected as an output level.

When the amplitude change rate of the envelope detection signal is greater than dV / t, the error in detecting the transmission signal level of the phase modulation signal having a low modulation speed is reduced by setting the capacitor smoothed signal to the output level of the transmission signal. You can do it.

[0024]

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, the constructions of reference numerals 1 to 4, 6, and 7 are the same as those of the conventional circuit operation, and the description is omitted.

The second reference signal e (DC voltage) of the second comparator 8 is set to a voltage higher by dV than the first reference signal c of the first comparator 1 for performing burst detection. The output of the first comparator 1 is input to a third single pulse generation circuit 9,
A pulse having a pulse width t synchronized with the rise of the burst detection signal output from the first comparator 1 is output. The output of the second comparator 8 and the output pulse of the third single pulse generation circuit 9 are ANDed by the AND circuit 10. If the slope of the rising edge of the envelope detection signal input to a is smaller than dV / t, the output of the AND circuit 10 remains at the “0” level. In this case, the output of the second single pulse generation circuit 4 The output also remains at "0" level.

The switch gate 11 receives the output of the single pulse generation circuit 4 and enters an output open mode when the input is at "0" level, and a short mode when it is at "1" level. Therefore, since the output of the single pulse generation circuit 4 is at the "0" level, the sampling signal d is pre-upped and the "1" level is continuously input to the sampling circuit. As a result, the input envelope detection signal is smoothed as it is by the capacitor in the hold circuit 7 and output to b as an output level detection signal.

FIG. 2 is a timing chart showing waveforms at various parts in FIG. 1 when a continuous signal is transmitted for a fixed time.

In this figure, a detection voltage V ₁ is continuously input to an envelope detection signal input terminal a for a certain period of time. Then, the detection voltages V ₁ and the voltage less than the second
The values of the reference signal voltage e and the first reference signal voltage c are shown. As described above, e and c are ec
= ΔV holds.

Such a detection signal is input to the first comparator 1 and the second comparator 8, and the output of the first comparator 1 is at time t.
After being delayed by _{0 by the} delay circuit 2, the first single pulse generation circuit 3 obtains a sampling signal d '.

On the other hand, the output of the second comparator 2 receives the output of the first comparator 1 and the output of the third single pulse generating circuit 9 for generating a short pulse of time t at the rising edge and the AND gate. The logical product is taken by 10 and its output is long pulsed by the second single pulse generating circuit 4. Then, the long pulse signal is input to the switch circuit 11,
In the “1” level time, the output of the first single pulse generation circuit 3 is output as it is as the sampling signal d.
In the “0” level time, the sampling signal d is output as the “1” level signal.

The sampling signal d is input to a sampling circuit 6, and the detection signal is sampled and then held by a hold circuit 7 to obtain a detection output.

In this figure, as shown in the output waveform of the logical sum 5, the sampling signal d has the times t _s1 and t
Since the detection signal of the voltages V ₁ is sampled at _s2, the voltage of V ₁ 'is obtained at the output of the hold circuit 7. The value of V ₁ ′ is almost the same as V ₁ , and the detection error can be almost ignored.

FIG. 3 is a time chart when a transmission output modulated by a burst signal is detected.

FIG. 3 shows waveforms corresponding to the waveforms of the respective parts described with reference to FIG. In this figure, the waveform operation of each part is the same as that described in FIG. Finally, since a sampling signal d is obtained for each burst signal, each burst signal can be sampled. By detecting a predetermined number of burst signals, a hold output voltage V ₁ ′ equal to the detection output V ₁ is obtained. Can be

FIG. 4 is a diagram showing a time chart of each unit in the case of the transmission signal subjected to the two-phase modulation described in FIG.

In this figure, the conditions for the two-phase modulation signal are the same as in FIG.

Here, as for the output of the first comparator 1, a "0" level is outputted for the first reference signal c and below, and a "1" level is outputted for other than the first reference signal c. A waveform is output.

After being delayed by the time t ₀ in the delay circuit 2, the first single pulse generation circuit 3 outputs a continuous sampling signal d ′ of the time t ₁ .

On the other hand, since the output of the second comparator 8 is a sine wave, when the second reference signal e is compared, the time when the output of the second comparator 8 becomes "0" is smaller than the output of the first comparator 1. , A long pulse signal is obtained. The output of the third single pulse generating circuit 9 is a pulse waveform at time t, and the second comparator 8
And AND of the output of the AND gate 10 and AND gate 10, the output is always at "0" level. Therefore, the output of the second single pulse generation circuit 4 is always at "0" level. Then, the switch 11 is always in the OFF state, the mode is switched to the open mode, and the output of the switch 11 is pre-upped to the “1” level, so that the sampling signal d always becomes the “1” level.

Finally, the envelope detection signal is smoothed as it is by the capacitor in the hold circuit 7 without receiving the sampling signal, and a detection output is obtained. [Embodiment] Next, the frequency range and the maximum error that can be improved will be described using an embodiment of the present invention using specific numerical values.

The delay time t ₀ from the input of the envelope detection signal to the generation of the sampling pulse is 2 μsec,
The sampling pulse width t1 is 1 μsec, the pulse width of the third single pulse generation circuit 9 is 0.5 μsec, and the level difference (ΔV) between the reference voltages of the first comparator 1 and the second comparator 2 is 6 dB (doubled). ).

The dynamic range of the detected power level is 2
At 0 dB, assuming that the envelope detection signal is a half-wave rectified waveform of a sine wave, it is possible to detect a modulated signal of about 64 kHz or less as a continuous signal even in the worst case. The error when detecting and sampling and holding is 6 dB at the maximum.

The dynamic range of the detected power level is 1
With 4 dB, a modulated signal of about 128 kHz or less can be detected as a continuous signal, and the error at this frequency is greatly reduced to a maximum of 1.5 dB.

[0045]

As described above, the transmission output detection circuit of the present invention determines the burst signal and the continuous signal from the amplitude change rate of the envelope detection signal, and the maximum error of the conventional circuit is the detected power level. The detection error can be reduced by 10 dB or more as compared with the case where the dynamic range is almost the same as the dynamic range. Further, by setting the dynamic range to an appropriate value, it is possible to reduce the detection error itself to several dB or less. Further, the circuit of the present invention has an effect that it can be easily configured with only a small addition as compared with the conventional circuit configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an embodiment of a transmission output detection circuit according to the present invention.

FIG. 2 is a timing chart when a constant level continuous signal is input to FIG. 1;

FIG. 3 is a timing chart when a burst signal is input to FIG. 1;

FIG. 4 is a timing chart when a sine wave half-wave rectified signal is input to FIG. 1;

FIG. 5 is a block diagram of a transmission device including a conventional transmission output detection circuit.

FIG. 6 is a block diagram illustrating an example of a conventional transmission output detection circuit.

FIG. 7 is a timing chart when a signal having a half-wave rectified sine wave shape is input to FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st comparator 2 delay circuit 3 1st single pulse generation circuit 4 2nd single pulse generation circuit 5 OR circuit 6 sampling circuit 7 hold circuit 8 2nd comparator 9 3rd single pulse generation circuit 10 AND circuit 11 Switch circuit a Envelope detection signal b Output level detection signal c First reference signal d Sampling signal e Second reference signal

Claims (5)

[Claims] 1. First and second comparing means for comparing a detected signal with first and second reference voltages, respectively; and means for sample-holding and outputting a peak voltage of the detected signal based on the comparing means. And a means for detecting a detection time difference between the first and second comparing means, and prohibiting the sample and hold operation based on a rising slope of the detection signal. 2. The transmission output detection circuit according to claim 1, wherein the second reference voltage is a voltage higher than the first reference voltage by a predetermined voltage. 3. The transmission output detection circuit according to claim 1, wherein the output of said first comparison means outputs a pulse signal for a predetermined time in accordance with a rise. 4. The transmission output detection circuit according to claim 1, wherein the detection signal is obtained by performing envelope detection on a continuous or burst-modulated high-frequency power signal. 5. The transmission output detection circuit according to claim 1, wherein the means for inhibiting the sample and hold outputs a signal smoothed by a capacitor.