JPH11113247A - Power supply circuit - Google Patents

Power supply circuit

Info

Publication number
JPH11113247A
JPH11113247A JP9266673A JP26667397A JPH11113247A JP H11113247 A JPH11113247 A JP H11113247A JP 9266673 A JP9266673 A JP 9266673A JP 26667397 A JP26667397 A JP 26667397A JP H11113247 A JPH11113247 A JP H11113247A
Authority
JP
Japan
Prior art keywords
motor
power supply
inverter
npn transistor
smoothing capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9266673A
Other languages
Japanese (ja)
Other versions
JP3561613B2 (en
Inventor
Katsumi Okawa
克実 大川
Yasuhiro Koike
保広 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP26667397A priority Critical patent/JP3561613B2/en
Publication of JPH11113247A publication Critical patent/JPH11113247A/en
Application granted granted Critical
Publication of JP3561613B2 publication Critical patent/JP3561613B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To reduce spike current, by constituting a power supply circuit so that the power supply circuit is placed in the power line between a smoothing capacitor and an inverter and is provided with a spike current reducing circuit comprising parallel-connected diode and coil. SOLUTION: A power supply circuit is provided with a spike current reducing circuit 12 placed between an inverter 11 and a smoothing capacitor C11. When a direct-current voltage DC is inputted, the direct-current voltage DC is smoothed through the smoothing capacitor C11 and then outputted to the inverter 11 through the spike current reducing circuit 12. Transistors Q11-Q16 comprising the inverter 11 are fed with a specified control signal, respectively, and the phase switching, the adjustment of the rotational speed and direction of a motor M are controlled through the control signal, so that the motor M is rotated as specified. Though there is parasitic capacitance in the motor M, the spike component is suppressed because the spike current reducing circuit 12 is provided. As a result, spike currents can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は電源回路に関し、さ
らに詳しくいえば、モータを駆動するインバータ電源に
おけるスパイク電流の抑止に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit, and more particularly, to suppression of spike current in an inverter power supply for driving a motor.

【0002】[0002]

【従来の技術】以下で、従来一般に用いられていた電源
回路について図面を参照しながら説明する。図3は、従
来の一般的なインバータ駆動の電源回路の構成を示す図
である。この回路は、図3に示すように、NPN型のト
ランジスタQ1〜Q6と、ダイオードD1〜D6からな
るインバータ1と、平滑用コンデンサC1とを有し、負
荷となる3相のモータMを駆動する回路である。
2. Description of the Related Art A conventional power supply circuit will be described below with reference to the drawings. FIG. 3 is a diagram showing a configuration of a conventional general inverter-driven power supply circuit. As shown in FIG. 3, this circuit includes NPN-type transistors Q1 to Q6, an inverter 1 including diodes D1 to D6, and a smoothing capacitor C1, and drives a three-phase motor M serving as a load. Circuit.

【0003】この回路には、直流電圧DCが入力され、
平滑用コンデンサによって平滑化されたのちにインバー
タ1に出力される。インバータ1によって直流電圧DC
は交流電圧に変換される。またインバータ1を構成する
トランジスタQ1〜Q6にはそれぞれ所定の制御信号が
入力されており、モータMの相切替や、回転速度,回転
方向の調整などがこの制御信号によって制御され、その
制御に従ってモータMが所定の回転をする。
[0003] A DC voltage DC is input to this circuit.
After being smoothed by the smoothing capacitor, it is output to the inverter 1. DC voltage DC by inverter 1
Is converted to an AC voltage. A predetermined control signal is input to each of the transistors Q1 to Q6 constituting the inverter 1, and phase control of the motor M, adjustment of the rotation speed and rotation direction, and the like are controlled by the control signal. M makes a predetermined rotation.

【0004】[0004]

【発明が解決しようとする課題】上記の電源回路の負荷
である3相のモータMは、図4に示すように3本のコイ
ルL1〜L3より構成されるが、このコイルL1〜L3
の間には、相互に図4に示すような寄生容量C3〜C5
が存在する。モータMを構成するコイルL1〜L3に電
流が流れるごとにこれらの寄生容量C3〜C5は充放電
を繰り返す。従って、寄生容量C3〜C5に電荷が充放
電する際に、流れる充放電電流が相電流に乗り、図5に
示すようなスパイク状の波形の電流成分が相電流に流
れ、これがノイズとなって飛んでしまうという問題が生
じていた。
The three-phase motor M, which is a load of the above power supply circuit, comprises three coils L1 to L3 as shown in FIG.
And between the parasitic capacitances C3 to C5 as shown in FIG.
Exists. Each time a current flows through the coils L1 to L3 constituting the motor M, these parasitic capacitances C3 to C5 repeat charging and discharging. Therefore, when the parasitic capacitances C3 to C5 are charged and discharged, the flowing charge / discharge current rides on the phase current, and a spike-shaped current component as shown in FIG. 5 flows in the phase current, which becomes noise. There was a problem of flying.

【0005】[0005]

【課題を解決するための手段】本発明は、上記従来の欠
点に鑑み成されたもので、直流電圧を交流に変換してモ
ータに供給するインバータ電源回路であって、直流電圧
を平滑化する平滑用コンデンサと、前記平滑化された直
流電圧を交流に変換して前記モータに供給するインバー
タと、前記平滑用コンデンサと前記インバータとの間の
電源ラインに設けられ、並列に接続されたダイオードと
コイルとからなるスパイク電流低減回路とを有すること
を特徴とする電源回路や、前記モータは、第1〜第3の
コイルを有し、その各々に第1〜第3の端子が接続する
ことで構成され、前記インバータは、第1〜第6のNP
N型トランジスタを有し、前記第1のNPN型トランジ
スタのエミッタと前記第2のNPN型トランジスタのコ
レクタとが接続し、この接続部が前記モータの前記第1
の端子に接続し、前記第3のNPN型トランジスタのエ
ミッタと前記第4のNPN型トランジスタのコレクタと
が接続し、この接続部が前記モータの前記第2の端子に
接続し、前記第5のNPN型トランジスタのエミッタと
前記第6のNPN型トランジスタのコレクタとが接続
し、この接続部が前記モータの前記第3の端子に接続
し、前記第1のNPN型トランジスタのコレクタ,前記
第3のNPN型トランジスタのコレクタ及び前記第5の
NPN型トランジスタのコレクタが共通であって、かつ
前記スパイク電流低減回路を介して前記平滑用コンデン
サの正側端子に接続し、前記第2のNPN型トランジス
タのエミッタ,前記第4のNPN型トランジスタのエミ
ッタ及び前記第6のNPN型トランジスタのエミッタが
共通であって、かつ前記平滑用コンデンサの負側端子に
接続していることを特徴とする本発明に係る電源回路に
より、上記課題を解決するものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and is an inverter power supply circuit for converting a DC voltage into an AC and supplying the AC to a motor, wherein the DC voltage is smoothed. A smoothing capacitor, an inverter that converts the smoothed DC voltage to AC and supplies the AC to the motor, and a diode provided in a power supply line between the smoothing capacitor and the inverter and connected in parallel. A power supply circuit having a spike current reduction circuit composed of a coil and the motor, the motor includes first to third coils, and first to third terminals are connected to each of the first to third coils. And wherein the inverter includes first to sixth NPs.
An N-type transistor, wherein an emitter of the first NPN-type transistor and a collector of the second NPN-type transistor are connected to each other, and the connection portion is connected to the first of the motor;
And the emitter of the third NPN transistor is connected to the collector of the fourth NPN transistor, and this connection is connected to the second terminal of the motor, and the fifth terminal is connected to the fifth terminal of the motor. The emitter of the NPN transistor is connected to the collector of the sixth NPN transistor, and this connection is connected to the third terminal of the motor, and the collector of the first NPN transistor is connected to the third terminal of the motor. The collector of the NPN transistor and the collector of the fifth NPN transistor are common, and connected to the positive terminal of the smoothing capacitor via the spike current reduction circuit. An emitter, an emitter of the fourth NPN transistor, and an emitter of the sixth NPN transistor are common, and The power supply circuit according to the present invention, characterized in that connected to the negative terminal of the smoothing capacitor is intended to solve the above problems.

【0006】[0006]

【発明の実施の形態】以下で、本発明の実施形態につい
て図面を参照しながら説明する。図1は、本発明の実施
形態に係るインバータ駆動の電源回路の構成を示す図で
ある。この回路は、図1に示すように、NPN型のトラ
ンジスタQ11〜Q16と、ダイオードD11〜D16
からなるインバータ11と、平滑用コンデンサC11
と、インバータ11と平滑用コンデンサC11の間に設
けられたスパイク電流低減回路12とを有し、直流電圧
DCを交流変換し、負荷となる3相のモータMを駆動す
る回路である。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a configuration of an inverter-driven power supply circuit according to an embodiment of the present invention. As shown in FIG. 1, this circuit includes NPN transistors Q11 to Q16 and diodes D11 to D16.
And a smoothing capacitor C11
And a spike current reducing circuit 12 provided between the inverter 11 and the smoothing capacitor C11. The spike current reducing circuit 12 converts a DC voltage DC into an AC voltage and drives a three-phase motor M serving as a load.

【0007】インバータ11は、図1に示すように、第
1〜第6のNPN型トランジスタQ11〜Q16を有
し、第1のNPN型トランジスタQ11のエミッタと第
2のNPN型トランジスタQ12のコレクタとが接続
し、第3のNPN型トランジスタQ13のエミッタと第
4のNPN型トランジスタQ14のコレクタとが接続し
ている。
As shown in FIG. 1, the inverter 11 has first to sixth NPN transistors Q11 to Q16, and an emitter of the first NPN transistor Q11 and a collector of the second NPN transistor Q12. Are connected, and the emitter of the third NPN transistor Q13 is connected to the collector of the fourth NPN transistor Q14.

【0008】また、第5のNPN型トランジスタQ15
のエミッタと第6のNPN型トランジスタQ16のコレ
クタとが接続し、第1のNPN型トランジスタQ11の
コレクタ,第3のNPN型トランジスタQ13のコレク
タ及び第5のNPN型トランジスタQ15のコレクタが
共通であって、スパイク電流低減回路12を介して平滑
用コンデンサC11の正側端子に接続している。
Further, the fifth NPN transistor Q15
Is connected to the collector of the sixth NPN transistor Q16, and the collector of the first NPN transistor Q11, the collector of the third NPN transistor Q13, and the collector of the fifth NPN transistor Q15 are common. And connected to the positive terminal of the smoothing capacitor C11 via the spike current reducing circuit 12.

【0009】さらに、第2のNPN型トランジスタQ1
2のエミッタ,第4のNPN型トランジスタQ14のエ
ミッタ及び第6のNPN型トランジスタQ16のエミッ
タが共通であって、平滑用コンデンサC11の負側端子
に接続している。スパイク電流低減回路12は、並列に
接続されたコイルL21とダイオードD21とからな
り、インバータ11と平滑用コンデンサC11との間に
設けられている。
Further, the second NPN transistor Q1
The second emitter, the emitter of the fourth NPN transistor Q14, and the emitter of the sixth NPN transistor Q16 are common, and are connected to the negative terminal of the smoothing capacitor C11. The spike current reduction circuit 12 includes a coil L21 and a diode D21 connected in parallel, and is provided between the inverter 11 and the smoothing capacitor C11.

【0010】本実施形態に係る電源回路には、直流電圧
DCが入力され、平滑用コンデンサC11によって平滑
化されたのちにスパイク電流低減回路12を介してイン
バータ11に出力される。インバータ11を構成するト
ランジスタQ11〜Q16にはそれぞれ所定の制御信号
が入力されており、モータMの相切替や、回転速度,回
転方向の調整などがこの制御信号によって制御され、そ
の制御に従ってモータMが所定の回転をする。
In the power supply circuit according to the present embodiment, a DC voltage DC is input, smoothed by a smoothing capacitor C11, and then output to an inverter 11 via a spike current reducing circuit 12. A predetermined control signal is input to each of the transistors Q11 to Q16 constituting the inverter 11, and the phase switching of the motor M, the adjustment of the rotation speed and the rotation direction, and the like are controlled by the control signal. Makes a predetermined rotation.

【0011】このモータMには、図5で説明したように
寄生容量が存在しているが、本実施形態の回路ではイン
バータ11と平滑用コンデンサC11とを結ぶ電源ライ
ン上に、スパイク電流低減回路12が設けられている。
このため、寄生容量の充放電によるスパイク電流を抑制
し、図2に示すように相電流は平滑化され、図5に示す
従来に比してスパイク電流を低減することが可能にな
る。
Although the motor M has a parasitic capacitance as described with reference to FIG. 5, in the circuit of this embodiment, a spike current reduction circuit is provided on a power supply line connecting the inverter 11 and the smoothing capacitor C11. 12 are provided.
Therefore, the spike current due to the charging and discharging of the parasitic capacitance is suppressed, the phase current is smoothed as shown in FIG. 2, and the spike current can be reduced as compared with the conventional example shown in FIG.

【0012】よって、このスパイク電流成分が原因とな
るノイズの発生を極力抑止することが可能になる。
Therefore, it is possible to suppress the generation of noise caused by the spike current component as much as possible.

【0013】[0013]

【発明の効果】以上説明したように、本発明によれば、
インバータと平滑用コンデンサとを結ぶ電源ライン上
に、スパイク電流低減回路が設けられている。このた
め、モータに寄生容量が存在しても、相電流に乗るスパ
イク成分は抑制され、従来に比してスパイク電流による
ノイズ等の悪影響を低減することが可能になる。
As described above, according to the present invention,
A spike current reduction circuit is provided on a power supply line connecting the inverter and the smoothing capacitor. For this reason, even if a parasitic capacitance exists in the motor, a spike component riding on the phase current is suppressed, and it is possible to reduce adverse effects such as noise due to the spike current as compared with the related art.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態に係る電源回路の構成を説明
する図である。
FIG. 1 is a diagram illustrating a configuration of a power supply circuit according to an embodiment of the present invention.

【図2】本発明の実施形態に係る電源回路の動作を説明
する図である。
FIG. 2 is a diagram illustrating an operation of the power supply circuit according to the embodiment of the present invention.

【図3】従来の電源回路の構成を説明する図である。FIG. 3 is a diagram illustrating a configuration of a conventional power supply circuit.

【図4】3相モータに寄生する寄生容量を説明する図で
ある。
FIG. 4 is a diagram illustrating a parasitic capacitance of a three-phase motor.

【図5】従来の電源回路の問題点を説明する図である。FIG. 5 is a diagram illustrating a problem of a conventional power supply circuit.

【符号の説明】[Explanation of symbols]

11 インバータ 12 スパイク電流低減回路 C11 平滑用コンデンサ 11 Inverter 12 Spike current reduction circuit C11 Smoothing capacitor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 直流電圧を交流に変換してモータに供給
するインバータ電源回路であって、 直流電圧を平滑化する平滑用コンデンサと、 前記平滑化された直流電圧を交流に変換して前記モータ
に供給するインバータと、 前記平滑用コンデンサと前記インバータとの間の電源ラ
インに設けられ、並列に接続されたダイオードとコイル
とからなるスパイク電流低減回路とを有することを特徴
とする電源回路。
1. An inverter power supply circuit for converting a DC voltage to an AC and supplying the AC to a motor, comprising: a smoothing capacitor for smoothing the DC voltage; and a motor for converting the smoothed DC voltage to AC. And a spike current reduction circuit provided in a power supply line between the smoothing capacitor and the inverter, the spike current reduction circuit including a diode and a coil connected in parallel.
【請求項2】 前記モータは、第1〜第3のコイルを有
し、その各々に第1〜第3の端子が接続することで構成
され、 前記インバータは、第1〜第6のNPN型トランジスタ
を有し、 前記第1のNPN型トランジスタのエミッタと前記第2
のNPN型トランジスタのコレクタとが接続し、この接
続部が前記モータの前記第1の端子に接続し、 前記第3のNPN型トランジスタのエミッタと前記第4
のNPN型トランジスタのコレクタとが接続し、この接
続部が前記モータの前記第2の端子に接続し、 前記第5のNPN型トランジスタのエミッタと前記第6
のNPN型トランジスタのコレクタとが接続し、この接
続部が前記モータの前記第3の端子に接続し、 前記第1のNPN型トランジスタのコレクタ,前記第3
のNPN型トランジスタのコレクタ及び前記第5のNP
N型トランジスタのコレクタが共通であって、かつ前記
スパイク電流低減回路を介して前記平滑用コンデンサの
正側端子に接続し、 前記第2のNPN型トランジスタのエミッタ,前記第4
のNPN型トランジスタのエミッタ及び前記第6のNP
N型トランジスタのエミッタが共通であって、かつ前記
平滑用コンデンサの負側端子に接続していることを特徴
とする請求項1記載の電源回路。
2. The motor according to claim 1, wherein the motor includes first to third coils, and first to third terminals are respectively connected to the first and third coils. A transistor, an emitter of the first NPN transistor and the second
Is connected to the first terminal of the motor, and the emitter of the third NPN transistor is connected to the fourth terminal of the third NPN transistor.
Is connected to the second terminal of the motor, and the emitter of the fifth NPN transistor is connected to the sixth terminal of the motor.
And the collector of the NPN transistor is connected to the third terminal of the motor. The collector of the first NPN transistor is connected to the third terminal of the motor.
Of the NPN transistor and the fifth NP
The N-type transistor has a common collector and is connected to the positive terminal of the smoothing capacitor via the spike current reduction circuit. The emitter of the second NPN-type transistor and the fourth
Of the NPN transistor and the sixth NP
2. The power supply circuit according to claim 1, wherein an emitter of the N-type transistor is common and is connected to a negative terminal of the smoothing capacitor.
JP26667397A 1997-09-30 1997-09-30 Power supply circuit Expired - Fee Related JP3561613B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26667397A JP3561613B2 (en) 1997-09-30 1997-09-30 Power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26667397A JP3561613B2 (en) 1997-09-30 1997-09-30 Power supply circuit

Publications (2)

Publication Number Publication Date
JPH11113247A true JPH11113247A (en) 1999-04-23
JP3561613B2 JP3561613B2 (en) 2004-09-02

Family

ID=17434112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26667397A Expired - Fee Related JP3561613B2 (en) 1997-09-30 1997-09-30 Power supply circuit

Country Status (1)

Country Link
JP (1) JP3561613B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008120408A1 (en) * 2007-03-29 2008-10-09 Mitsubishi Heavy Industries, Ltd. One model electric compressor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008120408A1 (en) * 2007-03-29 2008-10-09 Mitsubishi Heavy Industries, Ltd. One model electric compressor
JP2008252962A (en) * 2007-03-29 2008-10-16 Mitsubishi Heavy Ind Ltd Integrated electric compressor
US8308442B2 (en) 2007-03-29 2012-11-13 Mitsubishi Heavy Industries, Ltd. Integrated electric compressor

Also Published As

Publication number Publication date
JP3561613B2 (en) 2004-09-02

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