JP2003189464A - Rush current preventive circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a rush current preventive circuit which can get efficient and stable action with its simple circuit constitution. <P>SOLUTION: This rush current preventive circuit is equipped with a resistor (6) for rush current limitation which is connected between a DC power source (1) and an input smoothing capacitor (3), a field effect transistor (8) where a source terminal and a drain terminal are connected in parallel with the resistor (6) for rush current limitation, a voltage detection means (16) which detects the voltage between the terminals of the resistor (6) for rush current limitation, potential dividing resistors (9 and 10) which divide the voltage of the DC power source (1) and whose potential dividing point is connected to the gate terminal of a field effect transistor (4), a resistor (12) for switching of gate voltage which is connected in parallel with one hand (10) of the potential dividing resistor connected between the gate terminal and the source terminal of a field effect transistor (8), and a bipolar transistor (13) where an emitter terminal and a collector terminal are connected in series to the resistor (12) for switching of gate voltage and which is turned on or turned off by the voltage detected by a voltage detection means (16) given to the base terminal. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inrush current prevention circuit for limiting an inrush current flowing from a power source to an input smoothing capacitor when a power source is turned on, and more particularly to an inrush current prevention circuit having a simple circuit configuration, high efficiency and stable operation. Belong to

[0002]

2. Description of the Related Art Generally, a DC-DC converter (direct current-
In the DC power supply input part of a switching power supply such as a DC converter or an inverter (DC-AC converter), an inrush current prevention circuit is provided to limit an excessive inrush current flowing into the switching power supply when the DC power is turned on. It is provided. For example, FIG. 3 shows a conventional inrush current prevention circuit using a resistor for limiting inrush current, and in FIG. 3, (1) adjusts the rectified voltage after rectifying the AC voltage from the AC power supply or the rectified voltage thereof. DC power supply to generate the DC voltage after,
(2) is a DC power supply input terminal to which the DC power supply (1) is connected, (3)
Is an input smoothing capacitor, (4) is a power conversion circuit such as a DC-DC converter or an inverter, and (5) is a power conversion circuit (4).
, And (6) are inrush current limiting resistors. In the circuit shown in Fig. 3, the output current of the DC power supply (1) input from the DC power supply input terminal (2) is the resistance for inrush current limiting.
Since it flows through the input smoothing capacitor (3) through (6), the inrush current that flows when the DC power supply (1) is turned on is limited by the inrush current limiting resistor (6), and an excessive inrush current to the power conversion circuit (4) occurs. Can be prevented from flowing in. The maximum value of this inrush current is determined by the maximum value of the voltage applied to the DC power supply input terminal (2) and the resistance value of the inrush current limiting resistor (6).

FIG. 4 is a resistor for limiting the inrush current shown in FIG.
A conventional inrush current prevention circuit in which a triac (TRIAC: bidirectional three-terminal thyristor) (7) is connected in parallel with (6) is shown. In the inrush current prevention circuit shown in Fig. 4, the DC power supply (1)
The inrush current that flows from the DC power supply (1) to the input smoothing capacitor (3) when the power is turned on is limited by the inrush current limiting resistor (6).
After the inrush current has almost finished flowing, the triac (7) becomes conductive due to the current signal flowing from the auxiliary winding of the transformer (not shown) in the power conversion circuit (4) to the gate terminal of the triac (7), and the inrush current limiting resistor Short circuit (6). As a result, current flows from the DC power supply (1) through the triac (7) during steady state, and almost no current flows through the inrush current limiting resistor (6). The power loss can be almost zero.

FIG. 5 shows a resistor for limiting the inrush current shown in FIG.
Connect the field effect transistor (8) instead of (6), connect the voltage dividing resistors (9, 10) to both ends of the DC power input terminal (2), and divide the voltage dividing resistors (9, 10) into voltage dividing points. Is connected to the gate terminal (control terminal) of the field effect transistor (8),
A delay capacitor (11) is connected in parallel with the voltage dividing resistor (10) connected between the gate terminal and source terminal (one main terminal) of (8).
The conventional inrush current prevention circuit which connected is shown. In the inrush current prevention circuit shown in FIG. 5, the delay capacitor (11) is gradually charged through the voltage dividing resistor (9), and the charging voltage of the delay capacitor (11) is the threshold voltage of the field effect transistor (8). Field effect transistor until the above is reached and it is turned on completely
(8) is gradually turned on to limit the inrush current. Further, since the resistance value of the field effect transistor (8) after it is turned on is extremely small and the power loss due to it is hardly a problem, it is possible to suppress the power loss in the rush current prevention circuit in the steady state to an extremely small value.

[0005]

By the way, FIG. 3 to FIG.
The conventional inrush current prevention circuit shown in (1) has the following drawbacks. That is, in the circuit shown in FIG. 3, power loss occurs due to the current flowing through the inrush current limiting resistor (6) in a steady state and efficiency is reduced, and power loss due to the inrush current limiting resistor (6) always occurs. For inrush current limiting resistor (6)
As a result, a resistor with a large rated power is required. In the circuit shown in Fig. 4, it is necessary to continuously supply current to the gate terminal of the TRIAC (7) during steady state, so the power conversion circuit (4)
The circuit configuration becomes complicated, for example, by providing an auxiliary winding on a transformer (not shown) constituting the. In the circuit shown in FIG. 5, the larger the time constant of the voltage dividing resistor (10) and the delay capacitor (11), the more the inrush current is suppressed. Therefore, in order to limit the inrush current to a certain extent, the voltage dividing resistor (10 2) and the capacitance of the delay capacitor (11) need to be increased, which causes a problem that the outer shape of the delay capacitor (11) becomes large. Also, during steady state, the charging voltage of the delay capacitor (11) may change due to fluctuations in the input voltage, etc.
Below the threshold voltage of the field effect transistor (8)
Turns off, which makes the operation unstable.

Therefore, it is an object of the present invention to provide an inrush current prevention circuit which has a simple circuit configuration and which is highly efficient and stable in operation.

[0007]

The present invention is provided between a power source (1) and an input smoothing capacitor (3), and when the power source (1) is turned on, the power source (1) changes the input smoothing capacitor (3). This is an inrush current prevention circuit that limits the inrush current that flows.The inrush current limiting resistor (6) connected between the power supply (1) and the input smoothing capacitor (3) and both main terminals are for inrush current limiting. Main switching element (8) connected in parallel with the resistor (6) and voltage detection means (16) for detecting the terminal voltage of the inrush current limiting resistor (6)
And an auxiliary switching element (13) which is turned on when the detection voltage of the voltage detection means (16) applied to the control terminal exceeds a predetermined value, and is turned off when the detection voltage is equal to or lower than the predetermined value. Holds the voltage level of the signal applied to the control terminal of the main switching element (8) at a low voltage level when the auxiliary switching element (13) is in the on state and holds the main switching element (8) in the off state. On / off holding means for holding the main switching element (8) in the on state by applying a high voltage level signal to the control terminal of the main switching element (8) when the auxiliary switching element (13) is in the off state ( 1
7) and are provided. When the power supply (1) is turned on, the main switching element (8) is in the off state and the resistance for inrush current limiting from the power supply (1)
Since a current flows through the input smoothing capacitor (3) through (6), the inrush current flowing from the power supply (1) to the input smoothing capacitor (3) when the power is turned on is limited by the inrush current limiting resistor (6). At this time, the voltage between the terminals of the inrush current limiting resistor (6) detected by the voltage detecting means (16) becomes higher than a predetermined value, and the auxiliary switching element (13) is turned on. Means (17) to main switching element
The voltage level of the signal applied to the control terminal of (8) is held at a low voltage level, and the main switching element (8) is held in the off state. After that, when the charging current of the input smoothing capacitor (3) decreases and enters a steady state, the voltage between the terminals of the inrush current limiting resistor (6) detected by the voltage detection means (16) falls below a predetermined value, and auxiliary switching The element (13) is turned off. At this time, a signal of a high voltage level is applied from the on / off holding means (17) to the control terminal of the main switching element (8), and the main switching element (8) is held in the on state. Main switching element from (1)
Current flows to the input side through (8). Therefore, in a steady state, almost no power loss occurs, and a rush current prevention circuit with high efficiency and stable operation can be obtained with a simple circuit configuration.

The on / off holding means (17) in one embodiment of the present invention divides the voltage of the power source (1) and the voltage dividing point is connected to the control terminal of the main switching element (8). The voltage dividing resistors (9, 10) and the applied voltage switching resistor (12) connected in parallel with one of the voltage dividing resistors (10) connected between the control terminal of the main switching element (8) and one of the main terminals. ), And both main terminals of the auxiliary switching element (13) are connected in series to the applied voltage switching resistor (12). When turning on the power (1),
Since the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) is sufficiently low and the main switching element (8) is in the off state, the input smoothing capacitor from the power supply (1) through the inrush current limiting resistor (6).
Current flows into (3), and the inrush current that flows from the power supply (1) to the input smoothing capacitor (3) when the power is turned on is the inrush current limiting resistor (6).
Limited by At this time, the voltage between the terminals of the inrush current limiting resistor (6) detected by the voltage detecting means (16) becomes higher than a predetermined value, and the auxiliary switching element (13) is turned on. On the other hand, the applied voltage switching resistance (12) is connected in parallel with (10), and the voltage dividing resistance (9, 10)
The voltage level of the voltage dividing point is held at a low voltage level.
As a result, a signal of a low voltage level is given to the control terminal of the main switching element (8), and the off state of the main switching element (8) is reliably held. When the charging current of the input smoothing capacitor (3) decreases and enters a steady state with the passage of time, the voltage across the terminals of the inrush current limiting resistor (6) detected by the voltage detection means (16) falls below a specified value. The auxiliary switching element (13) is turned off. As a result, the parallel connection between one of the voltage dividing resistors (10) and the applied voltage switching resistor (12) is disconnected, so the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) rises. Held at a high voltage level,
The ON state of the main switching element (8) is surely maintained.
Therefore, in the steady state, from the power supply (1) to the main switching element
Since a current flows through (8) to the input side, almost no power loss occurs, and a highly efficient inrush current prevention circuit can be obtained with a simple circuit configuration. In addition, by turning on / off the auxiliary switching element (13), the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) is switched between low voltage level and high voltage level between the time when the power supply (1) is turned on and the steady state. Since the level is switched to the level, it is possible to reliably hold the off state or the on state of the main switching element (8) and stably operate the inrush current prevention circuit. Further, in the embodiment of the present invention, since the delay capacitor (11) is connected between the control terminal of the main switching element (8) and one of the main terminals, it is possible to reduce the inductive and capacitive characteristics included in the wiring. The impedance can suppress the surge current flowing immediately after the main switching element (8) is turned on.

In another embodiment of the present invention, the auxiliary switching element is used when the voltage of the power source (1) is lower than the reference voltage.
An input monitoring circuit (18) is provided which turns on (13) and turns off the auxiliary switching element (13) when the voltage of the power supply (1) is higher than the reference voltage. This allows the power supply (1)
Main switching element when the voltage of the device is lower than the reference voltage
Since the main switching element (8) is turned on when (8) is held in the off state and the voltage of the power supply (1) becomes higher than the reference voltage, the power when the voltage of the power supply (1) is low The malfunction of the conversion circuit (4) can be prevented. The input monitoring circuit (18) is a reference voltage generating means (19) for generating a reference voltage, and a comparing means (22) for comparing the voltage level of the power supply (1) with the reference voltage level of the reference voltage generating means (19). And a drive means (29) for generating a drive signal to be applied to the control terminal of the auxiliary switching element (13) by the output signal of the comparison means (22).

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an inrush current prevention circuit according to the present invention will be described below with reference to FIG. However,
In FIG. 1, the same parts as those in FIGS. 3 to 5 are designated by the same reference numerals, and the description thereof will be omitted. The inrush current prevention circuit of the present embodiment, as shown in FIG. 1, includes an inrush current limiting resistor (6) connected between a DC power input terminal (2) and an input smoothing capacitor (3), and a source. The voltage applied to the field effect transistor (8) as a main switching element, whose terminals and drain terminals are connected in parallel with the inrush current limiting resistor (6), and the voltage applied to the DC power input terminal (2), and the voltage dividing point Is a voltage divider resistor (9,1
0), a delay capacitor (11) connected between the gate terminal and the source terminal of the field effect transistor (8), and a voltage dividing resistor connected between the gate terminal and the source terminal of the field effect transistor (8). On the other hand, a gate voltage switching resistor (12) connected in parallel with (10) as an applied voltage switching resistor, and an auxiliary in which the collector terminal and the emitter terminal are connected in series to the gate voltage switching resistor (12). It has a bipolar transistor (13) as a switching element. A resistor (14) is placed between the drain terminal of the field effect transistor (8) and the base terminal of the bipolar transistor (13).
And a capacitor (15) is connected between the base terminal and the emitter terminal of the bipolar transistor (13),
A voltage detection means (16) for detecting the terminal voltage of the inrush current limiting resistor (6) is configured. Bipolar transistor (13)
Is turned on when the charging voltage of the capacitor (15) of the voltage detecting means (16) exceeds the threshold value and a current flows to the base terminal, and the voltage of the capacitor (15) of the voltage detecting means (16) becomes equal to or lower than the threshold value. When the voltage drops and the current stops flowing to the base terminal, it turns off. The voltage dividing resistors (9, 10) and the gate voltage switching resistor (12) reduce the voltage level of the signal applied to the gate terminal of the field effect transistor (8) when the bipolar transistor (13) is on to a low voltage level. To hold the field effect transistor (8) in the off state, and when the bipolar transistor (13) is in the off state, a signal of a high voltage level is applied to the gate terminal of the field effect transistor (8) to Holds (8) on
It constitutes an off-holding means (17). Other configurations are shown in FIG.
This is substantially the same as the conventional inrush current prevention circuit shown in FIG.

In the above structure, when the DC power supply (1) is turned on, the gate voltage, that is, the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) forming the on / off holding means (17) is sufficiently high. Since it is low, the field effect transistor (8) does not turn on and is held in the off state. Therefore, the current flowing from the DC power supply (1) to the input smoothing capacitor (3) flows through the inrush current limiting resistor (6). Therefore, the inrush current flowing from the DC power source (1) to the input smoothing capacitor (3) when the DC power source (1) is turned on is limited by the inrush current limiting resistor (6). When the DC power supply (1) is turned on, the charging voltage of the input smoothing capacitor (3) is approximately 0 [V], so the DC power input terminal (2) is placed between both terminals of the inrush current limiting resistor (6). A voltage substantially equal to the voltage of the DC power source (1) applied to At this time, a current flows through the resistor (14) and the capacitor (15) forming the voltage detecting means (16), and when the charging voltage of the capacitor (15) exceeds the threshold value of the bipolar transistor (13), the current will flow to the base terminal. flow,
The bipolar transistor (13) is turned on. As a result, since the gate voltage switching resistor (12) is connected in parallel with one of the voltage dividing resistors (10), the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) is the field effect transistor. It is held at a voltage level lower than the threshold voltage of (8), and the off state of the field effect transistor (8) is surely held.

When the charging current flowing from the DC power supply (1) to the input smoothing capacitor (3) decreases with time and enters a steady state, the voltage between both terminals of the inrush current limiting resistor (6) decreases. Therefore, the voltage of the capacitor (15) forming the voltage detecting means (16) also drops. Then, the voltage of the capacitor (15) in the voltage detecting means (16) is the bipolar transistor (13).
When it falls below the threshold value of 1, the current stops flowing to the base terminal and the bipolar transistor (13) is turned off.
As a result, the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) rises and the delay capacitor (11) is charged, and the gate voltage of the field effect transistor (8) gradually rises above the threshold voltage. When it becomes higher, the field effect transistor (8) is turned on. Therefore, when the power is turned on, the inrush current limiting resistor
The current flowing through (6) is a field effect transistor (8)
Flowing through. By turning off the bipolar transistor (13), one of the voltage dividing resistors (10) and the gate voltage switching resistor (12)
Since the parallel connection with and is disconnected, the gate voltage level of the field effect transistor (8) is maintained at a voltage level higher than the threshold voltage level, and the on state of the field effect transistor (8) is reliably maintained. To do. Since the delay capacitor (11) suppresses the surge current flowing immediately after the field effect transistor (8) is turned on by the inductive and capacitive impedances included in the wiring, it may be omitted.

In this embodiment, when the DC power supply (1) is turned on, the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) is sufficiently low,
Since the field effect transistor (8) is off, current flows from the DC power supply (1) through the inrush current limiting resistor (6) to the input smoothing capacitor (3), and the input smoothing from the DC power supply (1) occurs when the power is turned on. The inrush current flowing through the capacitor (3) is limited by the inrush current limiting resistor (6). At this time, the charging voltage of the capacitor (15) in the voltage detecting means (16) becomes higher than the threshold value of the bipolar transistor (13) and the bipolar transistor (13) is turned on, so one of the voltage dividing resistors (10)
The gate voltage switching resistor (12) is connected in parallel with the gate voltage switching resistor (12), and the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) is maintained at a low voltage level. As a result, a signal having a low voltage level is applied to the gate terminal of the field effect transistor (8), and the field effect transistor (8) is reliably held in the off state. After that, when the charging current of the input smoothing capacitor (3) decreases and enters a steady state, the voltage of the capacitor (15) in the voltage detecting means (16) drops below the threshold value of the bipolar transistor (13) and the bipolar transistor ( 13) is turned off. As a result, the parallel connection between one of the voltage dividing resistors (10) and the applied voltage switching resistor (12) is disconnected, so the voltage level at the voltage dividing point of the voltage dividing resistors (9, 10) rises. Is maintained at a high voltage level to ensure that the field effect transistor is
Hold the ON state of (8). Therefore, in the steady state, current flows from the DC power supply (1) to the input side through the field effect transistor (8), so that power loss hardly occurs, and a highly efficient inrush current prevention circuit can be obtained with a simple circuit configuration. it can. Also, by turning on / off the bipolar transistor (13), the voltage dividing resistance is maintained between when the DC power supply (1) is turned on and when it is steady.
Since the voltage level of the voltage dividing point of (9, 10) is switched between a low voltage level and a high voltage level, the field effect transistor (8) can be reliably held in the off state or the on state, and the inrush current prevention circuit can be stabilized. It can be operated.

The embodiment shown in FIG. 1 can be modified. For example, in the rush current prevention circuit according to the embodiment shown in FIG. 2, when the applied voltage of the DC power supply input terminal (2) is lower than the reference voltage, the bipolar transistor (13) is turned on and the DC power supply input terminal (2) is turned on. An input monitoring circuit (18) for turning off the bipolar transistor (13) when the applied voltage of (1) is higher than the reference voltage is provided in front of the input smoothing capacitor (3). The input monitoring circuit (18) compares the reference voltage generating means (19) for generating a reference voltage with the applied voltage level of the DC power supply input terminal (2) and the reference voltage level of the reference voltage generating means (19). A differential amplifier circuit (22) as a means and a bipolar transistor by the output signal of the differential amplifier circuit (22)
A drive circuit (29) as drive means for generating a drive signal applied to the base terminal of (13).

The reference voltage generating means (19) is composed of a resistor (20) and a Zener diode (21) connected in series at both ends of the input smoothing capacitor (3), and is composed of the resistor (20) and the Zener diode (21). Generate a reference voltage from the connection point. In the differential amplifier circuit (22), the emitter terminal is connected to one end (+ side) of the input smoothing capacitor (3) through the resistor (23) and the collector terminal is the other end (-side) of the input smoothing capacitor (3). Of the input smoothing capacitor (3) and the PNP transistor (24) whose base terminal is connected to the connection point of the resistor (20) and the Zener diode (21) constituting the reference voltage generating means (19). The voltage dividing resistors (25, 26) connected to both ends, the emitter terminal is connected to the emitter terminal of the PNP transistor (24), and the collector terminal is connected via the resistor (27) to the other end of the input smoothing capacitor (3) ( -Side) and the base terminal is composed of a PNP transistor (28) connected to the voltage dividing point of the voltage dividing resistor (25, 26), and an output signal is generated from the collector terminal of the PNP transistor (28). To do. Drive circuit (29)
The collector terminal has a differential amplifier circuit (22) through a resistor (30).
Is connected to the voltage dividing point of the voltage dividing resistor (25, 26), the emitter terminal is connected to the other end (-side) of the input smoothing capacitor (3), and the base terminal is connected to the differential amplifier circuit (22). Make up P
NP connected to the collector terminal of NP transistor (28)
The N-transistor (31), two resistors (32, 33) connected in series between one end (+ side) of the input smoothing capacitor (3) and the collector terminal of the NPN transistor (31), and the emitter terminal are inputs. It is connected to one end (+ side) of the smoothing capacitor (3), the collector terminal is connected to the base terminal of the bipolar transistor (13) through the output resistor (34), and the base terminal is two resistors (32, 33). PNP connected to the connection point of
Composed of a transistor (35) and a PNP transistor
The drive signal of the bipolar transistor (13) is output from the collector terminal of (35) through the output resistor (34).

In the configuration shown in FIG. 2, when the voltage applied to the DC power supply input terminal (2) is low, the voltage dividing resistors (25, 26) forming the differential amplifier circuit (22) in the input monitoring circuit (18) are used. ) Becomes low, and the PNP transistor (28) is turned on. As a result, the voltage at the emitter terminal of the PNP transistor (24) changes from the connection point of the resistor (20) and the Zener diode (21) constituting the reference voltage generating means (19) to the differential amplifier circuit (2
Since it becomes lower than the reference voltage applied to the base terminal of the PNP transistor (24) in (2), the PNP transistor (2
4) is turned off. Therefore, a high voltage is applied from the collector terminal of the PNP transistor (28) in the differential amplifier circuit (22).
An (H) level output signal is generated and applied to the base terminal of the NPN transistor (31) which constitutes the drive circuit (29), so that N
The PN transistor (31) is turned on. With this,
Since the PNP transistor (35) is also turned on, the PNP
A drive signal is applied from the collector terminal of the transistor (35) to the base terminal of the bipolar transistor (13) via the output resistor (34), and the bipolar transistor (13) is turned on. Therefore, the OFF state of the field effect transistor (8) is maintained until the level of the voltage applied to the DC power supply input terminal (2) reaches the level of the reference voltage of the reference voltage generating means (19).

When the level of the voltage applied to the DC power supply input terminal (2) reaches the level of the reference voltage of the reference voltage generating means (19), the PNP transistor (28) is turned off and the PNP transistor (28) is turned off.
The voltage at the emitter terminal of the transistor (24) constitutes the reference voltage generating means (19) and the resistor (20) and the Zener diode (2
Since the voltage becomes higher than the reference voltage applied to the base terminal of the PNP transistor (24) in the differential amplifier circuit (22) from the connection point of 1), the PNP transistor (24) is turned on. As a result, the PNP transistor (2
A low voltage (L) level output signal is generated from the collector terminal of 8), and the NPN transistor (3
Since the NPN transistor (31) is turned off by being applied to the base terminal of 1), the PNP transistor (35) is also turned off. Therefore, the bipolar transistor (13) is turned off and the field effect transistor (8) is turned on. The operation of the inrush current prevention circuit of FIG. 2 excluding the input monitoring circuit (18) and the effect obtained by it are as shown in FIG.
Since it is almost the same as the embodiment shown in FIG.

In the embodiment shown in FIG. 2, the input monitoring circuit
According to (18), when the applied voltage of the DC power supply input terminal (2) is lower than the reference voltage, the field effect transistor (8) is kept in the off state, and the applied voltage of the DC power supply input terminal (2) is lower than the reference voltage. Field-effect transistor when it gets too high (8)
Is turned on, it is possible to prevent malfunction of the power conversion circuit (14) due to noise or the like when the voltage of the DC power supply (1) is low.

The embodiment of the present invention is not limited to the above-mentioned embodiments, and various modifications can be made. For example, in each of the above-described embodiments, the mode in which the field effect transistor and the bipolar transistor are used as the main switching element (8) and the auxiliary switching element (13) is shown, but a thyristor, a triac, etc. can of course be used. . In addition, another resistor is connected in parallel with the capacitor (15) of the voltage detection means (16), and the ratio of the resistance value of this resistor and the resistance value of the resistor (14) is adjusted to adjust the inrush current limiting resistor.
The detection voltage between both terminals in (6) may be adjusted arbitrarily. Further, the input monitoring circuit (18) of the embodiment shown in FIG. 2 may be provided on the DC power supply input terminal (2) side. Further, in the embodiment shown in FIG. 2, the differential amplifier circuit which constitutes the input monitoring circuit (18).
(22) is a comparator that uses the base terminal of the PNP transistor (24) as a reference terminal, the base terminal of the PNP transistor (28) as a comparison terminal, and the collector terminal of the PNP transistor (28) as an output terminal. Replacement,
The drive circuit (29) may be replaced by a buffer amplifier. Further, it goes without saying that the present invention can be applied even when an AC power source is used as the power source.

[0020]

According to the present invention, the inrush current flowing in the input smoothing capacitor when the power is turned on is limited by the inrush current limiting resistor, and when the charging of the input smoothing capacitor is almost completed, the main switching element is turned on. Since the current limiting resistor is short-circuited, power loss hardly occurs in a steady state, and a highly efficient inrush current prevention circuit can be obtained with a simple circuit configuration. In addition, turning on the auxiliary switching element
When the power is turned on, the voltage level of the signal applied to the control terminal of the main switching element is switched between a low voltage level and a high voltage level between when the power is turned on and when it is in a steady state. Hold
The inrush current prevention circuit can be operated stably. Furthermore, when the input monitoring circuit is provided, it is possible to prevent malfunction of the power conversion device due to noise or the like when the power supply voltage is low.

[Brief description of drawings]

FIG. 1 is an electric circuit diagram showing an embodiment of an inrush current prevention circuit according to the present invention.

FIG. 2 is an electric circuit diagram showing another embodiment of the present invention.

FIG. 3 is an electric circuit diagram showing a first example of a conventional inrush current prevention circuit.

FIG. 4 is an electric circuit diagram showing a second example of a conventional inrush current prevention circuit.

FIG. 5 is an electric circuit diagram showing a third example of a conventional inrush current prevention circuit.

[Explanation of symbols]

(1) ・ ・ DC power supply (power supply), (2) ・ ・ DC power supply input terminal, (3) ・ ・ Input smoothing capacitor, (4) ・ ・ Power conversion circuit, (5) ・ ・ Output terminal, (6)・ ・ Resistor for limiting inrush current, (7) ・ ・ Triac, (8) ・ ・ Field effect transistor (main switching element), (9,10) ・ ・ Voltage dividing resistor, (11) ・ ・ Capacitor for delay, ( 12) .. Gate voltage switching resistance (applied voltage switching resistance), (13) .. Bipolar transistor (auxiliary switching element), (14)
..Resistance, (15) .. capacitor, (16) .. voltage detection means, (17) .. on / off holding means, (18) .. input monitoring circuit, (19) .. reference voltage generation means, (20) ・ ・ Resistance, (21) ・ ・ Zener diode, (22) ・ ・ Differential amplifier circuit (comparison means), (23) ・ ・ Resistance, (24) ・ ・ PN
P-transistor, (25,26) ・ ・ Voltage dividing resistor, (27) ・ ・
Resistance, (28) .. PNP transistor, (29) .. Drive circuit (driving means), (30) .. resistance, (31) .. NPN
Transistor, (32,33) ・ Resistance, (34) ・ ・ Output resistance, (35) ・ ・ PNP transistor

Claims (5)

[Claims] 1. A rush current prevention circuit, which is provided between a power supply and an input smoothing capacitor and limits a rush current flowing from the power supply to the input smoothing capacitor when the power is turned on, comprising: the power supply and the input smoothing capacitor. An inrush current limiting resistor, a main switching element having both main terminals connected in parallel with the inrush current limiting resistor, and voltage detection means for detecting a terminal voltage of the inrush current limiting resistor. An auxiliary switching element that is turned on when a detection voltage of the voltage detection means applied to the control terminal exceeds a predetermined value, and is turned off when the detection voltage is equal to or lower than the predetermined value, The voltage level of the signal applied to the control terminal of the main switching element is maintained at a low voltage level when the auxiliary switching element is in the ON state, and the main switching element is maintained. ON / OFF holding for holding the main switching element in the ON state by applying a high voltage level signal to the control terminal of the main switching element when the auxiliary switching element is in the OFF state. And a means for preventing inrush current. 2. The on / off holding means divides the voltage of the power source and a voltage dividing resistor whose voltage dividing point is connected to a control terminal of the main switching element; a control terminal of the main switching element; One of the voltage dividing resistors connected between one of the main terminals is provided with an applied voltage switching resistor that is connected in parallel, and both main terminals of the auxiliary switching element are connected in series to the applied voltage switching resistor. The inrush current prevention circuit according to claim 1, which is connected. 3. The inrush current prevention circuit according to claim 1, wherein a delay capacitor is connected between the control terminal of the main switching element and one main terminal. 4. An input monitoring circuit that turns on the auxiliary switching element when the voltage of the power source is lower than a reference voltage, and turns off the auxiliary switching element when the voltage of the power source is higher than the reference voltage. The inrush current prevention circuit according to claim 1, further comprising: 5. The input monitoring circuit comprises a reference voltage generating means for generating the reference voltage, a comparing means for comparing a voltage level of the power supply with a reference voltage level of the reference voltage generating means, and the comparing means. The inrush current prevention circuit according to claim 4, further comprising a drive unit that generates a drive signal to be applied to the control terminal of the auxiliary switching element according to the output signal.