JPH11112032A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

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Publication number
JPH11112032A
JPH11112032A JP26521397A JP26521397A JPH11112032A JP H11112032 A JPH11112032 A JP H11112032A JP 26521397 A JP26521397 A JP 26521397A JP 26521397 A JP26521397 A JP 26521397A JP H11112032 A JPH11112032 A JP H11112032A
Authority
JP
Japan
Prior art keywords
semiconductor
light emitting
semiconductor substrate
semiconductor layer
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26521397A
Other languages
Japanese (ja)
Inventor
Akira Watanabe
暁 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP26521397A priority Critical patent/JPH11112032A/en
Publication of JPH11112032A publication Critical patent/JPH11112032A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device for dissolving the decline of light emitting intensity by reducing the area of the light emitting part of a light emitting element and the decline of the light emitting intensity by covering the light emitting part of the light emitting element with an electrode. SOLUTION: In a semiconductor light emitting device for which an individual electrode 5 is connected and provided in semiconductor layers 2-4 formed on one main surface side of a semiconductor substrate 1, and a common electrode 6 is connected and provided on the other main surface side of the semiconductor substrate 1, an inclined part T inclined in the thickness direction of the semiconductor substrate 1 is provided on one main surface side of the semiconductor substrate 1, and the individual electrode 5 is connected to the semiconductor layer 4 on the inclined part T.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体発光装置に関
し、特にページプリンタ用感光ドラムの露光用光源など
に用いられる半導体発光装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device used as an exposure light source for a photosensitive drum for a page printer.

【0002】[0002]

【従来の技術】従来の半導体発光装置を図5および図6
に示す。図6は図5中のA−A線断面図である。図5お
よび図6において、21は半導体基板、22は島状半導
体層、23は個別電極、24は共通電極である。
2. Description of the Related Art FIGS. 5 and 6 show a conventional semiconductor light emitting device.
Shown in FIG. 6 is a sectional view taken along line AA in FIG. 5 and 6, 21 is a semiconductor substrate, 22 is an island-shaped semiconductor layer, 23 is an individual electrode, and 24 is a common electrode.

【0003】半導体基板21は、例えばシリコン(S
i)やガリウム砒素(GaAs)などの単結晶半導体基
板などから成る。島状半導体層22は、ガリウム砒素や
アルミニウムガリウム砒素などの化合物半導体層などか
ら成り、一導電型半導体不純物を含有する層22aと逆
導電型半導体不純物を含有する層22bから成る。一導
電型半導体不純物を含有する層22aと逆導電型半導体
不純物を含有する層22bの界面部分で半導体接合部が
形成される。この島状半導体層22は、例えばMOCV
D(有機金属化学気相成長)法やMBE(電子ビームエ
ピタキシ)法でガリウム砒素やアルミニウムガリウム砒
素などから成る単結晶半導体層を形成した後に、メサエ
ッチングなどによって島状に形成される。
The semiconductor substrate 21 is made of, for example, silicon (S
i) or a single crystal semiconductor substrate such as gallium arsenide (GaAs). The island-shaped semiconductor layer 22 is made of a compound semiconductor layer such as gallium arsenide or aluminum gallium arsenide, and includes a layer 22a containing a semiconductor impurity of one conductivity type and a layer 22b containing a semiconductor impurity of the opposite conductivity type. A semiconductor junction is formed at the interface between the layer 22a containing the semiconductor impurity of one conductivity type and the layer 22b containing the semiconductor impurity of the opposite conductivity type. This island-shaped semiconductor layer 22 is made of, for example, MOCV
A single crystal semiconductor layer made of gallium arsenide, aluminum gallium arsenide, or the like is formed by a D (metal organic chemical vapor deposition) method or an MBE (electron beam epitaxy) method, and is formed into an island shape by mesa etching or the like.

【0004】島状半導体層22の表面部分には、例えば
窒化シリコン(SiNx )などから成る保護膜25が形
成されており、この保護膜25の表面部分には、例えば
金(Au)などから成る個別電極23が形成されてい
る。この個別電極23は、保護膜25に形成されたコン
タクトホールCを介して逆導電型半導体不純物を含有す
る半導体層22bに接続されている。この個別電極23
は、島状半導体層22のうちの逆導電型半導体不純物を
含有する層22bの上面部分から壁面部分を経由して、
半導体基板21の端面近傍まで、隣接する島状半導体層
22ごとに交互に他の端面側に延在するように形成され
ている。個別電極23はその幅広部分において外部回路
とボンディングワイヤなどで接続される。また、半導体
基板21の裏面側のほぼ全面には共通電極24が形成さ
れている。
A protection film 25 made of, for example, silicon nitride (SiN x ) is formed on the surface of the island-shaped semiconductor layer 22. The surface of the protection film 25 is made of, for example, gold (Au). Individual electrodes 23 are formed. The individual electrode 23 is connected to a semiconductor layer 22b containing a semiconductor impurity of the opposite conductivity type via a contact hole C formed in the protective film 25. This individual electrode 23
From the upper surface portion of the layer 22b containing the opposite conductivity type semiconductor impurity of the island-like semiconductor layer 22 via the wall surface portion,
The adjacent island-shaped semiconductor layers 22 are formed so as to alternately extend to the other end surface side up to near the end surface of the semiconductor substrate 21. The individual electrode 23 is connected to an external circuit at a wide portion thereof by a bonding wire or the like. A common electrode 24 is formed on almost the entire back surface of the semiconductor substrate 21.

【0005】島状半導体層22、個別電極23および共
通電極24で個々の発光ダイオードが構成され、この発
光ダイオードは半導体基板21上に一列状に並ぶように
形成される。この場合、例えば個別電極23が発光ダイ
オードのアノード電極となり、共通電極24がカソード
電極となる。
Each light emitting diode is constituted by the island-shaped semiconductor layer 22, the individual electrode 23, and the common electrode 24. The light emitting diodes are formed on the semiconductor substrate 21 in a line. In this case, for example, the individual electrode 23 becomes the anode electrode of the light emitting diode, and the common electrode 24 becomes the cathode electrode.

【0006】このような半導体発光装置では、例えば個
別電極23から共通電極24に向けて順方向に電流を流
すと、逆導電型半導体不純物を含有する層22bには電
子が注入され、一導電型半導体不純物を含有する層22
aには正孔が注入される。これらの少数キャリアの一部
が多数キャリアと発光再結合することによって光を生じ
る。また、列状に形成された発光素子のいずれかの個別
電極23を選択して電流を流して発光させることによ
り、例えばページプリンタ用感光ドラムの露光用光源と
して用いられる。
In such a semiconductor light emitting device, for example, when a current flows in the forward direction from the individual electrode 23 to the common electrode 24, electrons are injected into the layer 22b containing the semiconductor impurity of the opposite conductivity type, and the one conductivity type Layer 22 containing semiconductor impurities
Holes are injected into a. Some of these minority carriers emit light by radiative recombination with majority carriers. Further, by selecting any one of the individual electrodes 23 of the light emitting elements formed in a row and causing a current to flow to emit light, the light emitting element is used, for example, as an exposure light source for a photosensitive drum for a page printer.

【0007】[0007]

【発明が解決しようとする課題】近時、プリンタの印画
品質の高精細化にともなって半導体発光装置も益々高精
細化が求められており、図7に示すように、例えば発光
部の長さx1 が10μmで、幅y1 が25μmのような
寸法形状の発光素子が求められている。
In recent years, as the printing quality of a printer has been improved, the semiconductor light emitting device has been required to have higher definition. For example, as shown in FIG. in x 1 is 10 [mu] m, a width y 1 is required emitting element of dimensions such as 25 [mu] m.

【0008】ところが、発光素子の発光部が小面積化す
ると、発光強度が低下し、感光ドラムの露光用光源とし
て充分な発光が得られないという問題があった。
However, when the light emitting portion of the light emitting element is reduced in area, the light emission intensity is reduced, and there has been a problem that sufficient light emission as an exposure light source for the photosensitive drum cannot be obtained.

【0009】また、このような半導体発光素子では、個
別電極23と半導体層22との接続面積を大きくすると
発光強度を向上させることができるが、個別電極23と
半導体層22との接続面積を大きくすると、発光素子が
大面積化すると共に、最も強く発光する箇所は個別電極
23に被覆されていることから、光の取り出し効率が悪
く、その結果発光強度が低下するという問題もあった。
In such a semiconductor light emitting device, the emission intensity can be improved by increasing the connection area between the individual electrode 23 and the semiconductor layer 22, but the connection area between the individual electrode 23 and the semiconductor layer 22 is increased. Then, the area of the light-emitting element is increased, and the portion that emits the strongest light is covered with the individual electrode 23. Therefore, there is a problem that the light extraction efficiency is low, and as a result, the light emission intensity is reduced.

【0010】本発明は、このような従来装置の問題点に
鑑みてなされたものであり、発光素子の発光部が小面積
化して発光強度が低下すると共に、発光素子の発光部が
電極で被覆されることによって発光強度が低下すること
を解消した半導体発光装置を提供することを目的とす
る。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the conventional device. The light-emitting portion of the light-emitting element is reduced in area to reduce the light-emission intensity, and the light-emitting portion of the light-emitting element is covered with an electrode. It is an object of the present invention to provide a semiconductor light emitting device in which the emission intensity is not reduced by being performed.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、請求項1に係る半導体発光装置では、半導体基板の
一主面側に形成した半導体層に、個別電極を接続して設
けると共に、前記半導体基板の他の主面側に共通電極を
接続して設けた半導体発光装置において、前記半導体基
板の一主面側に、この半導体基板の厚み方向に傾斜した
傾斜部を設け、この傾斜部上で前記個別電極を前記半導
体層に接続した。
According to a first aspect of the present invention, there is provided a semiconductor light emitting device, wherein an individual electrode is connected to a semiconductor layer formed on one main surface of a semiconductor substrate. In a semiconductor light emitting device provided with a common electrode connected to the other main surface of the semiconductor substrate, an inclined portion inclined in a thickness direction of the semiconductor substrate is provided on one main surface of the semiconductor substrate. Above, the individual electrodes were connected to the semiconductor layer.

【0012】また、請求項2に係る半導体発光装置で
は、半導体基板の一主面側に一導電型半導体層と逆導電
型半導体を積層して設け、この逆導電型半導体層に個別
電極を接続して設けると共に、前記一導電型半導体層に
共通電極を接続して設けた半導体発光装置において、前
記半導体基板の一主面側に、この半導体基板の厚み方向
に傾斜した傾斜部を設け、この傾斜部上で前記個別電極
を前記逆導電型半導体層に接続すると共に、前記半導体
基板の一主面側で前記共通電極を前記一導電型半導体層
に接続した。
In the semiconductor light emitting device according to the second aspect, a semiconductor layer of one conductivity type and a semiconductor of the opposite conductivity type are provided on one main surface side of the semiconductor substrate, and an individual electrode is connected to the semiconductor layer of the opposite conductivity type. In a semiconductor light emitting device provided by connecting a common electrode to the one conductivity type semiconductor layer, an inclined portion inclined in a thickness direction of the semiconductor substrate is provided on one main surface side of the semiconductor substrate. The individual electrode was connected to the opposite conductivity type semiconductor layer on the inclined portion, and the common electrode was connected to the one conductivity type semiconductor layer on one main surface side of the semiconductor substrate.

【0013】[0013]

【発明の実施の形態】以下、請求項1および請求項2に
係る発明の実施形態を添付図面に基づき詳細に説明す
る。図1は請求項1に係る半導体発光装置の一実施形態
を示す平面図であり、図2は図1中のA−A線断面図で
ある。図1および図2において、1は半導体基板、2は
バッファ層、3は一導電型半導体層、4は逆導電型半導
体層、5は個別電極、6は共通電極、7は保護膜であ
る。バッファ層2、一導電型半導体層3、逆導電型半導
体層4で各半導体層が構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention according to claims 1 and 2 will be described in detail with reference to the accompanying drawings. FIG. 1 is a plan view showing an embodiment of the semiconductor light emitting device according to claim 1, and FIG. 2 is a sectional view taken along line AA in FIG. 1 and 2, 1 is a semiconductor substrate, 2 is a buffer layer, 3 is a semiconductor layer of one conductivity type, 4 is a semiconductor layer of opposite conductivity type, 5 is an individual electrode, 6 is a common electrode, and 7 is a protective film. Each semiconductor layer is composed of the buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4.

【0014】半導体基板1は、例えばシリコン(Si)
やガリウム砒素(GaAs)などの単結晶半導体基板で
構成され、一導電型、例えばn型半導体不純物を1×1
16〜1018atoms・cm-3程度含有する。この半
導体基板1は、例えば300〜400μm程度の厚みを
有する。この半導体基板1の一主面側には、この半導体
基板1の厚み方向に傾斜した傾斜部Tが設けられてい
る。この傾斜部Tは、例えば半導体基板1の一部をフォ
トマスクで被覆して他の部分をエッチング除去すること
により形成される。このエッチングは、ウエットエッチ
ング、或いはドライエッチングのいずれでもよい。ま
た、後述する個別電極5を基板1の一方側に設ける場合
は、半導体基板1の一方側のみに傾斜部Tを形成しても
よい。この傾斜部Tは、例えば厚みh1 が3.5μm程
度に形成され、幅w1 が5μm程度に形成される。
The semiconductor substrate 1 is made of, for example, silicon (Si).
And a single crystal semiconductor substrate of gallium arsenide (GaAs) or the like.
It contains about 0 16 to 10 18 atoms · cm -3 . This semiconductor substrate 1 has a thickness of, for example, about 300 to 400 μm. On one main surface side of the semiconductor substrate 1, an inclined portion T inclined in the thickness direction of the semiconductor substrate 1 is provided. The inclined portion T is formed, for example, by covering a part of the semiconductor substrate 1 with a photomask and removing the other part by etching. This etching may be either wet etching or dry etching. When an individual electrode 5 described later is provided on one side of the substrate 1, the inclined portion T may be formed only on one side of the semiconductor substrate 1. The inclined portion T is formed, for example, to have a thickness h 1 of about 3.5 μm and a width w 1 of about 5 μm.

【0015】前記半導体基板1上には、バッファ層2、
一導電型半導体層3、逆導電型半導体層4が順次積層し
て形成されている。
On the semiconductor substrate 1, a buffer layer 2,
One conductivity type semiconductor layer 3 and reverse conductivity type semiconductor layer 4 are formed by sequentially laminating.

【0016】前記バッファ層2は、半導体基板1と一導
電型半導体層3との格子定数の相違に基づくミスフィッ
ト転位を減少させるために設けるもので、厚み1〜4μ
m程度のガリウム砒素などから成る。このバッファ層2
には、一導電型半導体不純物を1×1016〜1018at
oms・cm-3程度含有する。このバッファ層2は、ミ
スフィット転位をより有効に低減するために複数層設け
ても良い。
The buffer layer 2 is provided to reduce misfit dislocations due to a difference in lattice constant between the semiconductor substrate 1 and the one conductivity type semiconductor layer 3, and has a thickness of 1 to 4 μm.
m of gallium arsenide or the like. This buffer layer 2
Has a conductivity type semiconductor impurity of 1 × 10 16 to 10 18 at
oms · cm -3 . A plurality of buffer layers 2 may be provided in order to more effectively reduce misfit dislocations.

【0017】前記バッファ層2上には、一導電型半導体
層3が設けられる。この一導電型半導体層3は、ガリウ
ム砒素やアルミニウムガリウム砒素(Alx Ga1-x
s)などから成り、例えばシリコン(Si)やセレン
(Se)などの一導電型半導体不純物を1×1016〜1
19atoms・cm-3程度含有する。この一導電型半
導体層3は、0.3〜3μm程度の厚みに形成される。
On the buffer layer 2, a one conductivity type semiconductor layer 3 is provided. The one conductivity type semiconductor layer 3 is made of gallium arsenide or aluminum gallium arsenide (Al x Ga 1 -x A
s) or the like, and one conductivity type semiconductor impurity such as silicon (Si) or selenium (Se) is 1 × 10 16 to 1
It contains about 0 19 atoms · cm -3 . This one conductivity type semiconductor layer 3 is formed to a thickness of about 0.3 to 3 μm.

【0018】前記一導電型半導体層3上には、逆導電型
半導体層4が形成される。この逆導電型半導体層4もア
ルミニウムガリウム砒素(Aly Ga1-y As)などの
化合物半導体層から成り、亜鉛(Zn)などの逆導電型
半導体不純物を1×1016〜1019atoms・cm-3
程度含有する。この逆導電型半導体層4は、0.1〜3
μm程度の厚みに形成される。前記一導電型半導体層3
と逆導電型半導体層4はキャリアの閉じ込め効果と光の
取り出し効果をより有効に行うために、例えば混晶比、
或いは光学的エネルギーバンドギャプの異なる複数の層
でそれぞれ形成してもよい。
On the one conductivity type semiconductor layer 3, an opposite conductivity type semiconductor layer 4 is formed. The opposite conductivity type semiconductor layer 4 is also made of a compound semiconductor layer such as aluminum gallium arsenide (Al y Ga 1 -y As), and contains a reverse conductivity type semiconductor impurity such as zinc (Zn) at 1 × 10 16 to 10 19 atoms · cm. -3
Content. The opposite conductivity type semiconductor layer 4 has a thickness of 0.1 to 3
It is formed to a thickness of about μm. The one conductivity type semiconductor layer 3
And the opposite conductivity type semiconductor layer 4 has a mixed crystal ratio, for example, in order to more effectively perform the effect of confining carriers and the effect of extracting light.
Alternatively, each layer may be formed of a plurality of layers having different optical energy band gaps.

【0019】半導体基板1上に、バッファ層2、一導電
型半導体層3、および逆導電型半導体層4を順次積層し
て設けると、半導体基板1の傾斜部Tがそのまま半導体
層2〜4に引き継がれ、逆導電型半導体層3の表面部に
も傾斜部が形成される。このバッファ層2、一導電型半
導体層3、逆導電型半導体層4は、発光素子ごとに島状
に形成される。
When the buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4 are sequentially laminated on the semiconductor substrate 1, the inclined portion T of the semiconductor substrate 1 is directly connected to the semiconductor layers 2 to 4. Then, the inclined portion is formed also on the surface portion of the opposite conductivity type semiconductor layer 3. The buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4 are formed in an island shape for each light emitting element.

【0020】この半導体層2〜4上には、例えば窒化シ
リコン(SiNx )膜などから成る保護膜7で被覆され
る。
The semiconductor layers 2 to 4 are covered with a protective film 7 made of, for example, a silicon nitride (SiN x ) film.

【0021】この保護膜7に形成されたコンタクトホー
ルを介して逆導電型半導体層4に、金とクロム(Au/
Cr)などから成る個別電極5が接続される。この個別
電極5は半導体基板1の傾斜部T上で接続される。ま
た、半導体基板1の他の主面側には、金とクロム(Au
/Cr)などから成る共通電極6および半導体基板1と
の接続部分はオーミックコンタクトを得るために、半導
体不純物が高濃度に添加されている。
Gold and chromium (Au / Au) are applied to the opposite conductivity type semiconductor layer 4 through the contact holes formed in the protective film 7.
An individual electrode 5 made of Cr or the like is connected. The individual electrodes 5 are connected on the inclined portion T of the semiconductor substrate 1. On the other main surface side of the semiconductor substrate 1, gold and chromium (Au)
A semiconductor impurity is added at a high concentration to a connection portion between the common electrode 6 made of / Cr) or the like and the semiconductor substrate 1 in order to obtain an ohmic contact.

【0022】このように、個別電極5を半導体基板1の
傾斜部T上で逆導電型半導体層4に接続すると、一導電
型半導体層3と逆導電型半導体層4の界面部分のうち、
高所領域A、傾斜領域B、および低所領域Cの3箇所で
発光するが、傾斜領域Bでは半導体層2〜4が傾斜して
形成されていることから、この傾斜領域Bにおける発光
も外部に有効に取り出すことができる。つまり、従来装
置では、高所領域Aにおける発光しか取り出せなかった
ものが、本発明品では傾斜領域Bの発光も取り出すこと
ができ、従来構造に比較して発光強度が約20%向上す
ることが分かった。
As described above, when the individual electrode 5 is connected to the opposite conductivity type semiconductor layer 4 on the inclined portion T of the semiconductor substrate 1, of the interface between the one conductivity type semiconductor layer 3 and the opposite conductivity type semiconductor layer 4,
Although light is emitted at three places: a high place area A, an inclined area B, and a low place area C, since the semiconductor layers 2 to 4 are formed to be inclined in the inclined area B, light emission in the inclined area B is also external. Can be effectively taken out. That is, in the conventional device, only the light emission in the high place area A can be extracted, but in the product of the present invention, the light emission in the inclined area B can also be extracted, and the emission intensity can be improved by about 20% as compared with the conventional structure. Do you get it.

【0023】次に、請求項1に係る半導体発光装置の製
造方法の一例を示す。まず、半導体基板1の一主面側に
傾斜部Tを形成する。この傾斜部Tは半導体基板1の一
主面側の所定領域をフォトマスクで被覆してフッ硝酸若
しくは硫酸過酸化水素系のエッチング液でエッチングす
る。この場合、半導体基板1の<001>方向に発光素
子が配列されるように半導体基板1の面方位を定めてお
けば、個別電極4の取り出し方向は必然的にメサエッチ
ングされて傾斜部Tが形成されることになる。
Next, an example of a method for manufacturing a semiconductor light emitting device according to claim 1 will be described. First, an inclined portion T is formed on one main surface side of the semiconductor substrate 1. This inclined portion T covers a predetermined region on one main surface side of the semiconductor substrate 1 with a photomask, and is etched with a hydrofluoric-nitric acid or sulfuric acid-based hydrogen peroxide-based etchant. In this case, if the plane orientation of the semiconductor substrate 1 is determined so that the light emitting elements are arranged in the <001> direction of the semiconductor substrate 1, the extraction direction of the individual electrode 4 is inevitably mesa-etched, and the inclined portion T is formed. Will be formed.

【0024】次に、バッファ層2、一導電型半導体層
3、および逆導電型半導体層4をMOCVD法などで順
次積層して形成する。半導体基板1として例えばシリコ
ン基板を用いる場合、表面の自然酸化膜を800〜10
00℃の高温で除去し、次に450℃以下の低温で核と
なるアモルファスガリウム砒素膜を100〜500Åの
厚みに成長させた後に500〜700℃まで昇温して、
ガリウム砒素単結晶膜を形成する(二段階成長法)。こ
のガリウム砒素膜中で成長を中断し、750〜1000
℃の高温アニールと600℃以下へ急冷を繰り返す(熱
サイクル法)ことにより、転位などの結晶欠陥を低減さ
せる。次いで、残りの各バッファ層2を所定厚みになる
まで連続して形成し、一導電型半導体層3と逆導電型半
導体層4を順次形成する。
Next, the buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4 are sequentially laminated by MOCVD or the like. When a silicon substrate is used as the semiconductor substrate 1, for example, a natural oxide film on
Removed at a high temperature of 00 ° C., and then grown an amorphous gallium arsenide film serving as a nucleus at a low temperature of 450 ° C. or less to a thickness of 100 to 500 ° C., and then heated to 500 to 700 ° C.
A gallium arsenide single crystal film is formed (two-step growth method). The growth is interrupted in this gallium arsenide film,
Crystal defects such as dislocations are reduced by repeating high-temperature annealing at ℃ and rapid cooling to 600 ° C. or lower (thermal cycle method). Next, the remaining buffer layers 2 are continuously formed until a predetermined thickness is obtained, and the one conductivity type semiconductor layer 3 and the opposite conductivity type semiconductor layer 4 are sequentially formed.

【0025】MOCVD法で形成する場合は、ガリウム
(Ga)の原料ガスとしてはトリメチルガリウム((C
3 3 Ga)などが用いられ、砒素(As)の原料
ガスとしてはアルシン(AsH3 )などが用いられ、ア
ルミニウム(Al)の原料ガスとしてはトリメチルアル
ミニウム((CH3 3 Al)などが用いられる。導
電型を制御するn型半導体不純物としてはシラン(Si
4 )などがあり、p型半導体不純物としてはジメチル
ジンク((CH3 2 Zn)などがある。
In the case of forming by MOCVD, gallium (Ga) source gas is trimethylgallium ((C
H 3 ) 3 Ga) and the like, arsine (AsH 3 ) and the like as arsenic (As) source gas, and trimethylaluminum ((CH 3 ) 3 Al) as aluminum (Al) source gas Is used. Silane (Si) is used as the n-type semiconductor impurity for controlling the conductivity type.
H 4 ), and p-type semiconductor impurities include dimethyl zinc ((CH 3 ) 2 Zn).

【0026】このように、半導体基板1の全面もしくは
一部に、バッファ層2、一導電型半導体層3、および逆
導電型半導体層4を順次積層して形成した後に、エッチ
ングなどによって島状に形成し、次に、MOCVD法な
どで窒化シリコン膜などから成る保護膜6を形成した
後、コンタクトホール部を形成して個別電極4と共通電
極5を形成して完成する。
As described above, the buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4 are sequentially formed on the entire surface or a part of the semiconductor substrate 1, and then formed into an island shape by etching or the like. Then, after forming a protective film 6 made of a silicon nitride film or the like by MOCVD or the like, a contact hole portion is formed, and the individual electrode 4 and the common electrode 5 are formed.

【0027】図3および図4は請求項2に係る半導体発
光装置の一実施形態を示す図であり、図3は平面図、図
4は図3中のA−A線断面図である。図3および図4に
おいて、1は半導体基板、2はバッファ層、3は一導電
型半導体層、4は逆導電型半導体層、5は個別電極、6
は共通電極、7は保護膜、Tは傾斜部である。
FIGS. 3 and 4 are views showing one embodiment of the semiconductor light emitting device according to claim 2, FIG. 3 is a plan view, and FIG. 4 is a sectional view taken along line AA in FIG. 3 and 4, 1 is a semiconductor substrate, 2 is a buffer layer, 3 is a semiconductor layer of one conductivity type, 4 is a semiconductor layer of the opposite conductivity type, 5 is an individual electrode, 6
Is a common electrode, 7 is a protective film, and T is an inclined portion.

【0028】この請求項2に係る半導体発光装置も、半
導体基板1の一主面側に傾斜部Tを形成して、バッファ
層2、一導電型半導体層3、および逆導電型半導体層4
を形成して、傾斜部T上の逆導電型半導体層4に個別電
極5を接続している点では、請求項1に係る半導体発光
装置とほぼ同様であるが、この請求項2に係る半導体発
光装置では、各半導体層2〜4が形成された半導体基板
1の一主面側に共通電極6を形成している。
In the semiconductor light emitting device according to the second aspect, the inclined portion T is formed on one main surface side of the semiconductor substrate 1 so that the buffer layer 2, the one conductivity type semiconductor layer 3, and the opposite conductivity type semiconductor layer 4 are formed.
Is formed, and the individual electrode 5 is connected to the opposite-conductivity-type semiconductor layer 4 on the inclined portion T. This is almost the same as the semiconductor light emitting device according to claim 1, but the semiconductor according to claim 2 In the light emitting device, the common electrode 6 is formed on one main surface side of the semiconductor substrate 1 on which the semiconductor layers 2 to 4 are formed.

【0029】このように構成しても、発光領域Bの発光
は半導体基板1の表面側に取り出されて発光強度が向上
する。さらに、共通電極6を半導体基板1の個別電極5
が形成された一主面側に形成すると、共通電極6と個別
電極5を一回の工程で形成でき、製造工程が簡略化され
る。
Even with such a configuration, the light emitted from the light emitting region B is extracted to the front surface side of the semiconductor substrate 1 and the light emission intensity is improved. Further, the common electrode 6 is connected to the individual electrode 5 of the semiconductor substrate 1.
The common electrode 6 and the individual electrode 5 can be formed in a single process by forming them on one main surface side on which is formed, thereby simplifying the manufacturing process.

【0030】[0030]

【発明の効果】以上のように、請求項1に係る半導体発
光装置によれば、半導体基板の一主面側に、この半導体
基板の厚み方向に傾斜した傾斜部を設け、この傾斜部上
の半導体に個別電極を接続したことから、電極と半導体
層の接続部の直下で発光する光も取り出すことができ、
もって発光素子全体の発光強度が向上する。また、電極
と半導体層の接続部が傾斜していることから、平面視し
たときの発光素子を大面積化することなく電極と半導体
層の接続面積を大きくすることができる。
As described above, according to the semiconductor light emitting device of the first aspect, the inclined portion inclined in the thickness direction of the semiconductor substrate is provided on one main surface side of the semiconductor substrate. Since the individual electrode is connected to the semiconductor, light emitted immediately below the connection between the electrode and the semiconductor layer can also be extracted,
As a result, the emission intensity of the entire light emitting element is improved. Further, since the connection portion between the electrode and the semiconductor layer is inclined, the connection area between the electrode and the semiconductor layer can be increased without increasing the area of the light emitting element when viewed in plan.

【0031】また、請求項2に係る半導体発光装置によ
れば、半導体基板の一主面側に、この半導体基板の厚み
方向に傾斜した傾斜部を設け、この傾斜部上で個別電極
を逆導電型半導体層に接続すると共に、半導体基板の一
主面側で共通電極を一導電型半導体層に接続したことか
ら、平面視したときの発光素子を大面積化することなく
電極と半導体層の接続面積を大きくすることができると
共に、共通電極と個別電極を一回の工程で形成でき、製
造工程が簡略化される。
Further, according to the semiconductor light emitting device of the present invention, an inclined portion inclined in the thickness direction of the semiconductor substrate is provided on one principal surface side of the semiconductor substrate, and the individual electrode is reversely conductive on the inclined portion. Connection between the electrode and the semiconductor layer without increasing the area of the light emitting element in plan view because the common electrode is connected to the one-conductivity type semiconductor layer on one main surface side of the semiconductor substrate while being connected to the semiconductor layer. The area can be increased, and the common electrode and the individual electrode can be formed in one process, which simplifies the manufacturing process.

【図面の簡単な説明】[Brief description of the drawings]

【図1】請求項1に係る半導体発光装置の一実施形態を
示す平面図である。
FIG. 1 is a plan view showing one embodiment of a semiconductor light emitting device according to claim 1;

【図2】図1中のA−A線断面図である。FIG. 2 is a sectional view taken along line AA in FIG.

【図3】請求項2に係る半導体発光装置の一実施形態を
示す図である。
FIG. 3 is a view showing one embodiment of a semiconductor light emitting device according to claim 2;

【図4】図3中のA−A線断面図である。FIG. 4 is a sectional view taken along line AA in FIG.

【図5】従来の半導体発光装置を示す平面図である。FIG. 5 is a plan view showing a conventional semiconductor light emitting device.

【図6】図5中のA−A線断面図である。FIG. 6 is a sectional view taken along line AA in FIG.

【図7】従来の半導体発光装置における発光素子部分を
拡大して示す図である。
FIG. 7 is an enlarged view showing a light emitting element portion in a conventional semiconductor light emitting device.

【符号の説明】[Explanation of symbols]

1‥‥‥半導体基板、2‥‥‥バッファ層、3‥‥‥一
導電型半導体層、4‥‥‥逆導電型半導体層、5‥‥‥
個別電極、6‥‥‥共通電極、7‥‥‥保護膜
1 semiconductor substrate, 2 buffer layer, 3 one conductivity type semiconductor layer, 4 reverse conductivity type semiconductor layer, 5 layer
Individual electrode, 6 mm common electrode, 7 mm protective film

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板の一主面側に形成した半導体
層に、個別電極を接続して設けると共に、前記半導体基
板の他の主面側に共通電極を接続して設けた半導体発光
装置において、前記半導体基板の一主面側に、この半導
体基板の厚み方向に傾斜した傾斜部を設け、この傾斜部
上で前記個別電極を前記半導体層に接続したことを特徴
とする半導体発光装置。
In a semiconductor light emitting device, an individual electrode is connected to a semiconductor layer formed on one main surface of a semiconductor substrate and a common electrode is connected to another main surface of the semiconductor substrate. A semiconductor light emitting device, wherein an inclined portion inclined in a thickness direction of the semiconductor substrate is provided on one principal surface side of the semiconductor substrate, and the individual electrode is connected to the semiconductor layer on the inclined portion.
【請求項2】 半導体基板の一主面側に一導電型半導体
層と逆導電型半導体を積層して設け、この逆導電型半導
体層に個別電極を接続して設けると共に、前記一導電型
半導体層に共通電極を接続して設けた半導体発光装置に
おいて、前記半導体基板の一主面側に、この半導体基板
の厚み方向に傾斜した傾斜部を設け、この傾斜部上で前
記個別電極を前記逆導電型半導体層に接続すると共に、
前記半導体基板の一主面側で前記共通電極を前記一導電
型半導体層に接続したことを特徴とする半導体発光装
置。
2. The semiconductor device according to claim 1, further comprising: a first conductive type semiconductor layer and a reverse conductive type semiconductor laminated on one main surface side of the semiconductor substrate; and an individual electrode connected to the reverse conductive type semiconductor layer. In a semiconductor light emitting device provided with a common electrode connected to a layer, an inclined portion inclined in a thickness direction of the semiconductor substrate is provided on one principal surface side of the semiconductor substrate, and the individual electrode is inverted on the inclined portion. Connect to the conductive semiconductor layer,
A semiconductor light emitting device, wherein the common electrode is connected to the one conductivity type semiconductor layer on one main surface side of the semiconductor substrate.
JP26521397A 1997-09-30 1997-09-30 Semiconductor light emitting device Pending JPH11112032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26521397A JPH11112032A (en) 1997-09-30 1997-09-30 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26521397A JPH11112032A (en) 1997-09-30 1997-09-30 Semiconductor light emitting device

Publications (1)

Publication Number Publication Date
JPH11112032A true JPH11112032A (en) 1999-04-23

Family

ID=17414106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26521397A Pending JPH11112032A (en) 1997-09-30 1997-09-30 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPH11112032A (en)

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