JPH11108985A - Mosfet overlap length measuring method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method which enables the determining of a highly accurate overlap length L between a gate and a diffusion layer, free from effect on the non-linearity of a channel resistance as caused by a gate voltage even in a short channel MOSFET. SOLUTION: In a measuring method, a capacity-voltage characteristic of a MOS diode is measured to determine a flat band voltage from the maximum value and the minimum value of the capacity measured. Moreover, the dependence on the gate voltage of a capacity between a gate and a diffusion layer in a MOSFET is measured to define the capacity between the gate add the diffusion layer, at a point where the gate voltage gives the flat band voltage as first capacity value and the maximum value of the capacity between the gate and the diffusion layer as second capacity value. A gate side capacity is subtracted from the first and the second capacity values separately and then, the ratio of both the results is multiplied by the gate length of the MOSFET to determine an overlap length of the MOSFET.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to measurement of circuit parameters of a MOSFET, and more particularly to a method of measuring an overlap length between a gate and a diffusion layer.

[0002]

2. Description of the Related Art Conventionally, the measurement of the overlap length between a gate and a diffusion layer has been described in the paper IEEE ELECTRON DEVICE RETTERS, VOL.
As shown in EDL-1, No. 9, pp. 170-173, 1980, the channel resistance was found in the linear region from the current-voltage characteristics, and a graph of the gate length dependence of the channel resistance for each gate voltage was drawn. From the overlap length ΔL.

The details will be described with reference to FIG. FIG.
(A) is a circuit for measuring channel resistance. Gate electrode 2
02, a gate voltage 201 is applied and a drain electrode 204 is applied.
To the drain voltage 207 through the drain ammeter 206
And the source electrode 203 and the substrate electrode 205 are connected to a low potential. By changing the gate voltage at two or more points, the drain current Id is measured in a linear region where the drain voltage is about 0.1 V, and the channel resistance R is determined as R = Vd / Id. This measurement is performed by changing the gate length L, and the relationship between the channel resistance and the gate length L is plotted for each gate voltage as shown in FIG. 5B, and the overlap length ΔL is determined from the intersection.

[0004]

However, as a problem of the prior art, as shown in FIG. 5B, as the gate length L is reduced, the linearity of the channel resistance is lost and the channel resistance does not intersect at one point. There is a disadvantage that the length ΔL cannot be determined. The reason is that a short channel effect occurs in which the charge in the channel region is affected by not only the gate voltage but also the charge in the depletion layer in the source / drain regions and the electric field. That is, due to the parasitic resistance formed in the diffusion layer or the like, the channel resistance does not become zero even when the channel length becomes zero.

SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned disadvantages of the prior art. Even in a short-channel MOSFET, it is possible to obtain a higher accuracy without being affected by the nonlinearity of the channel resistance due to the gate voltage. It is another object of the present invention to provide a method for calculating the overlap length ΔL between the gate and the diffusion layer.

[0006]

The present invention employs the following basic technical structure to achieve the above object. That is, the first embodiment of the present invention
The capacitance-voltage characteristics of the diode are measured, and the flat band voltage is determined from the maximum and minimum values of the measured capacitance.
A gate voltage dependence characteristic of the gate / diffusion interlayer capacitance of the SFET is measured, the gate / diffusion interlayer capacitance at the point where the gate voltage becomes the flat band voltage is set as a first capacitance value, and the maximum value of the gate / diffusion interlayer capacitance is set as the first capacitance value. After subtracting the gate side surface capacitance from the first and second capacitance values, respectively, and multiplying the ratio of the two by the gate length of the MOSFET, M
This is a method for measuring the overlap length of a MOSFET, wherein the overlap length is determined.

In a second aspect of the present invention, a capacitance-voltage characteristic of a MOS diode is measured, and a flat band voltage is obtained from a maximum value and a minimum value of the measured capacitance.
The gate voltage dependence characteristic of the gate / diffusion interlayer capacitance of T is measured, and the gate / diffusion interlayer capacitance at the point where the gate voltage becomes the flat band voltage is defined as a first capacitance value. To create each M
Measuring the gate capacitance of the OSFET under a strong inversion state to obtain a gate length dependence characteristic of the gate capacitance, and obtaining a MOSFET overlap length from a point where the gate capacitance becomes equal to the first capacitance value. This is a lap length measuring method.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The measurement flow as shown in FIG. 1 is executed by adopting the above-mentioned technical configuration in the present invention. Further, two methods can be used for the final step “calculate the overlap length” of the flow shown in the flowchart. First, in order to obtain the flat band voltage Vfb, the high frequency capacity-voltage characteristics (CV characteristics) of the large area MOS diode are measured. Next, using a short-channel MOSFET, the capacitance Cfb at the time of flat band is calculated using the maximum value Cmax and the minimum value Cmin of the CV characteristic, and the flat band voltage Vfb is calculated.
Ask for. Next, in order to obtain the overlap capacitance Covl, the gate voltage dependence of the gate / diffusion interlayer capacitance of the MOSFET is measured. Then, from the point where the gate voltage becomes the flat band voltage Vfb, the overlap capacitance Cov is obtained.
Find l. After subtracting the side surface capacitance Cf from the overlap capacitance Covl and the total gate capacitance Call, respectively, the overlap ratio is multiplied by the gate length L of the MOSFET to obtain the overlap length ΔL.

Alternatively, as a second technique, after the above-mentioned overlap capacitance Covl is obtained, the gate capacitance is obtained for a plurality of separately prepared MOSFETs to obtain the channel-dependent characteristics of the gate capacitance.
The overlap length can be determined from the intersection of vl and the total gate capacitance characteristic value.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A specific example of a method for measuring a MOSFET overlap length according to the present invention will be described below in detail with reference to the drawings. That is, FIG. 1 is a flowchart showing one specific example of the MOSFET overlap length measuring method according to the present invention, and shows the capacitance-voltage characteristics (CV
Characteristics), a flat band voltage Vfb is obtained from the measured maximum value Cmax and minimum value Cmin, and then the gate voltage dependence of the MOSFET gate / diffusion interlayer capacitance is measured. The gate / diffusion interlayer capacitance at the point where the voltage Vfb is reached is defined as a first capacitance value Covl, the maximum value of the gate / diffusion interlayer capacitance is defined as a second capacitance value Call, and the first capacitance value Covl and the second capacitance value Call are defined. After subtracting the gate side face capacitance Cf from the above, the process of multiplying the ratio of the two by the gate length L of the MOSFET to obtain the MOSFET overlap length ΔL is shown.

FIGS. 2 and 3 show a first embodiment of the present invention. FIG. 2A shows a high-frequency C of a large-area MOS diode.
This is a circuit for measuring the -V characteristic. Capacity measuring device 101
Uses HP4275A. The high potential terminal 102 of the capacitance measuring device is connected to the gate electrode 104 of the large area MOS diode.
And the low potential terminal 103 of the capacitance measuring device is connected to the substrate electrode 105 of the large area MOS diode. The capacitance is measured at a high frequency of about 1 MHz, and the CV characteristic as shown in FIG. 2B is measured by changing the DC voltage inside the capacitance measuring device.

Next, calculation of the flat band voltage Vfb is performed. The calculation method of the flat band voltage Vfb is 4063
A Semiconductor Parameter Analysis System Vol. II (6-75
6-78) and the physics of VLSI devices (p70-p
76). First, in FIG. 2B, the maximum value Cmax and the minimum value Cmin of the capacitance are read. Thereby, the maximum depletion layer width Xd is obtained.

Xd = εsi · εo · A · (Cmax−C
min) / (Cmax · Cmin) where εsi is the relative dielectric constant of the substrate (silicon), εo is the dielectric constant of vacuum, and A is the area of the large-area MOS diode. The maximum width of the depletion layer is due to the surface potential φs
= 2φf (Fermi order), and the following two equations are solved to find the impurity concentration Nsub of the substrate.

Φs = q · Nsub / (2 · εsi · εo) · Xd ² φf = k · T / q · ln (Nsub / ni) where q is the electron charge, k is Boltzmann's constant, and T is absolute The temperature, ni, is the intrinsic carrier density. Next, the depletion layer capacitance Cd in the flat band state is determined. Cd = εsi · εo · A / λ λ = (εsi · εo · k · T / (q ² · Nsub))
^1/2 last to determine the flat-band capacity Cfb.

Cfb = Cmax · Cd / (Cmax + Cd) Thus, from the high-frequency CV characteristics measured above,
The flat band voltage Vfb is obtained from the point where C = Cfb. Next, as shown below, the short channel type MOSFE
Each electrode of T is connected as shown in FIG. 3A, and the gate voltage dependence characteristic is measured to determine the overlap capacitance Covl. In FIG. 3A, the capacitance measuring device 101 is shown in FIG.
Is the same as The gate electrode 106 of the MOSFET is connected to the high potential terminal 102 of the capacitance measuring device 101,
The source electrode 107 and the drain electrode 108 of the FET are connected to the low potential terminal 103 of the capacitance measuring device 101,
The T substrate electrode 109 is grounded.

First, the gate / diffusion interlayer capacitance of the MOSFET is measured. The measurement method is Solid-state Electronics Vol.
Accumula described in No. 33, No. 12, pp. 1650-1652, 1990.
The tionChannel Method is used. The measurement of the gate / diffusion interlayer capacitance is performed at a low frequency of about 10 KHz,
The gate voltage dependence of the gate / diffusion interlayer capacitance as shown in FIG. 3B is measured by changing the DC voltage inside the capacitance measuring device.

The overlap capacitance Covl is obtained from the gate / diffusion interlayer capacitance at the point where the gate voltage = Vfb.
Further, the total gate capacitance Call is determined from the maximum value of the gate voltage dependence characteristic. Finally, the overlap length ΔL is obtained.
Overlap capacitance Covl and total gate capacitance Call
Includes the side surface capacitance Cf of the gate, and is calculated in consideration of Cf.

Cf = 2 · εox · εo / π · ln (1+
Here, εox is the relative dielectric constant of the gate oxide film, tpoly is the gate polysilicon film thickness, and tox is the gate oxide film thickness.
The overlap length ΔL is obtained by the following equation. ΔL = L · (Covl−Cf) / (Call−Cf) where L is the gate length of the MOSFET. Note that ΔL
Is a value obtained by summing the respective overlap lengths on the source side and the drain side.

FIG. 4 shows a second embodiment of the present invention. The second embodiment is a method of obtaining the overlap length ΔL from the point where the gate capacitance = Covl, using the gate length dependence of the gate capacitance in the strong inversion state. Specifically, M
The capacitance-voltage characteristic (CV characteristic) of the OS diode is measured, a flat band voltage Vfb is obtained from the measured maximum value Cmax and minimum value Cmin, and the gate voltage dependence characteristic of the MOSFET gate / diffusion interlayer capacitance is calculated. Measure,
The gate / diffusion interlayer capacitance at the point where the gate voltage becomes the flat band voltage Vfb is defined as a first capacitance value Covl. In the subsequent steps, a plurality of MOSFETs having different gate lengths different from each other are different from the first embodiment. And the gate capacitance of each MOSFET is measured under a strong inversion state to determine the gate length-dependent characteristics of the gate capacitance.
MO characterized by finding FET overlap length
This is an SFET overlap length measuring method.

Since the method of obtaining the overlap capacitance Covl is the same as that of the first embodiment, the description is omitted. Next, the connection is made as shown in FIG. 4A, and the gate length L dependence characteristic of the gate capacitance is measured. The difference between the connection in FIG. 4A and the connection in FIG. 3A is that the substrate electrode 109 of the MOSFET is connected to the low potential terminal 103 of the capacitance measuring device 101. The gate capacitance is measured by preparing a plurality of MOSFETs having different gate lengths, each of which is performed at a low frequency of about 10 KHz.
The gate capacitance is measured by applying a voltage high enough to strongly reverse the voltage, preferably a maximum standardized voltage. This measurement is performed for a plurality of MOSFETs having different gate lengths L, and a graph of the L dependency of the gate capacitance as shown in FIG. 4B is obtained.

In FIG. 4B, gate capacitance = Cov
The overlap length ΔL is obtained from the point where 1 is obtained. This method has an advantage that it is not necessary to calculate the gate side surface capacitance as compared with the first embodiment. The features of the method of the present invention can be expressed, for example, as follows. That is, in the first embodiment, a large area MOS formed on the same wafer is used.
MOSF in diodes and short channel MOSFETs
The method for measuring the overlap length of ET, comprising:
Measuring the capacitance-voltage characteristic of the S diode, (b)
A step of obtaining a flat band voltage from the measured maximum value and the minimum value of the capacitance; (c) a step of measuring a gate voltage dependent characteristic of a gate / diffusion interlayer capacitance of the MOSFET; and (d) a gate voltage is the flat band voltage. Point gate /
Detecting the inter-diffusion interlayer capacitance and setting it as a first capacitance value, and setting the maximum value of the gate / diffusion interlayer capacitance as a second capacitance value; (e) gate side surfaces from the first and second capacitance values, respectively; After subtracting the capacitance, the ratio between the two is obtained, and then the value of the ratio is multiplied by the gate length of the MOSFET to obtain a MOSF.
Determining a ET overlap length.

In the second embodiment, a large-area MOS diode and a short-channel MOS diode formed on the same wafer are used.
A method for measuring the overlap length of a MOSFET in an OSFET, comprising: (a) a step of measuring a capacitance-voltage characteristic of a MOS diode; (b) a step of obtaining a flat band voltage from the measured maximum and minimum values of the capacitance; c) M
Measuring the gate voltage-dependent characteristics of the gate / diffusion interlayer capacitance of the OSFET; (d) detecting the gate / diffusion interlayer capacitance at the point where the gate voltage becomes the flat band voltage and setting this as a first capacitance value; A step of setting the maximum value of the gate / diffusion interlayer capacitance to a second capacitance value; (e) further, each MOSFET using a MOSFET having a plurality of gate lengths;
Measuring the gate capacitance in the strongly inverted state of the FET to determine the gate length dependence of the gate capacitance, and (f) determining the point at which the gate capacitance becomes equal to the first capacitance value by using a MOSFET.
Determining the overlap length.

Further, the present invention also includes a recording medium on which a program for causing a computer to execute these methods is recorded.

[0024]

According to the present invention, a short channel MOSFE is provided.
Also at T, the overlap length can be accurately obtained without being affected by the gate voltage. At the same time, the overlap capacity can be obtained. The reason is C-
This is because the overlap is obtained by using the flat band voltage obtained from the V characteristic, and the overlap length is obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a measurement flow of the present invention.

FIG. 2 is a diagram showing the first half of the steps of the first embodiment of the present invention.

FIG. 3 is a diagram showing a latter half of the steps of the first embodiment of the present invention.

FIG. 4 is a diagram showing a second embodiment of the present invention.

FIG. 5 is a diagram showing a conventional example.

[Explanation of symbols]

 101 Capacitance measuring device (HP4275A) 102 Capacitance measuring high potential terminal 103 Capacitance measuring low potential terminal 104 MOS gate electrode 105 MOS substrate electrode 106 MOSFET gate Electrode 107: MOSFET source electrode 108: MOSFET drain electrode 109: MOSFET substrate electrode 201: Gate voltage (Vg) 202: MOSFET gate electrode 203: MOSFET source electrode 204: MOSFET Drain electrode 205: MOSFET substrate electrode 206: Drain ammeter (Id) 207: Drain voltage (Vd)

Claims (10)

[Claims] 1. A capacitance-voltage characteristic of a MOS diode is measured, a flat band voltage is determined from a maximum value and a minimum value of the measured capacitance, and a gate voltage dependence characteristic of a MOSFET gate / diffusion interlayer capacitance is measured. The gate / diffusion interlayer capacitance at the point where the voltage becomes the flat band voltage is the first
, And the maximum value of the gate / diffusion interlayer capacitance is taken as the second capacitance value. After subtracting the gate side surface capacitance from the first and second capacitance values, respectively,
A MOSFET overlap length by multiplying the MOSFET overlap length by a gate length of the MOSFET. 2. A large area MOS formed on the same wafer
2. The method for measuring a MOSFET overlap length according to claim 1, wherein a diode and a short channel MOSFET are used. 3. A capacitance-voltage characteristic of a MOS diode is measured, a flat band voltage is determined from a maximum value and a minimum value of the measured capacitance, and a gate voltage dependence characteristic of a gate / diffusion interlayer capacitance of the MOSFET is measured. The gate / diffusion interlayer capacitance at the point where the voltage becomes the flat band voltage is the first
, A plurality of MOSFETs having different gate lengths are separately formed, and the gate capacitance is measured for each MOSFET under the strong inversion state to determine the gate length dependence of the gate capacitance. A MOSFET overlap length is determined from a point at which the capacitance value becomes equal to the capacitance value of the MOSFET. 4. A large area MOS formed on the same wafer
4. The method according to claim 3, wherein a diode and a short-channel MOSFET are used. 5. The MOSFET overlap length measuring method according to claim 3, wherein in the strong inversion state, a maximum standard voltage of the MOSFET is applied to the MOSFET. 6. A large area MOS formed on the same wafer
MOSF in diodes and short channel MOSFETs
The method for measuring the overlap length of ET, comprising:
Measuring the capacitance-voltage characteristic of the S diode, (b)
A step of obtaining a flat band voltage from the measured maximum value and the minimum value of the capacitance; (c) a step of measuring the gate voltage dependence of the gate / diffusion interlayer capacitance of the MOSFET; and (d) the gate voltage becomes the flat band voltage. Point gate /
Detecting the inter-diffusion interlayer capacitance and setting it as a first capacitance value, and setting the maximum value of the gate / diffusion inter-layer capacitance as a second capacitance value; (e) gate side surfaces from the first and second capacitance values, respectively; After subtracting the capacitance, the ratio between the two is obtained, and then the value of the ratio is multiplied by the gate length of the MOSFET to obtain a MOSF.
Determining a ET overlap length. 7. A large area MOS formed on the same wafer
MOSF in diodes and short channel MOSFETs
The method for measuring the overlap length of ET, comprising:
Measuring the capacitance-voltage characteristic of the S diode, (b)
A step of obtaining a flat band voltage from the measured maximum value and the minimum value of the capacitance; (c) a step of measuring the gate voltage dependence of the gate / diffusion interlayer capacitance of the MOSFET; and (d) the gate voltage becomes the flat band voltage. Point gate /
Detecting the inter-diffusion interlayer capacitance and setting the same as a first capacitance value, and setting the maximum value of the gate / diffusion inter-layer capacitance to a second capacitance value; (e) furthermore, a plurality of MOSFETs having different gate lengths from each other; Measuring the gate capacitance in the strong inversion state of each MOSFET to determine the gate length dependence of the gate capacitance, and (f) defining the point where the gate capacitance becomes equal to the first capacitance value as the MOSFET overlap length. Determining a MOSFET overlap length. 8. The MOSFET overlap length measuring method according to claim 7, wherein the maximum inversion voltage of the MOSFET is applied to the MOSFET in the strong inversion state. 9. A computer measures a capacitance-voltage characteristic of a MOS diode, obtains a flat band voltage from a maximum value and a minimum value of the measured capacitance, and measures a gate voltage dependence characteristic of a MOSFET gate / diffusion interlayer capacitance. A gate / diffusion interlayer capacitance at a point where the gate voltage becomes the flat band voltage is defined as a first capacitance value; a maximum value of the gate / diffusion interlayer capacitance is defined as a second capacitance value; Recording a program for executing a MOSFET overlap length measuring method for obtaining a MOSFET overlap length by multiplying a ratio of the two by a gate length of the MOSFET after subtracting a gate side surface capacitance from each of them. . 10. A computer measures the capacitance-voltage characteristics of a MOS diode, obtains a flat band voltage from the maximum and minimum values of the measured capacitance, and measures the gate voltage dependency of the gate / diffusion interlayer capacitance of the MOSFET. And the gate / point at the point where the gate voltage becomes the flat band voltage
Using the diffusion interlayer capacitance as the first capacitance value, separately fabricating MOSFETs with a plurality of gate lengths, measuring the gate capacitance of each MOSFET under a strong inversion state, and determining the gate length dependent characteristic of the gate capacitance, A recording medium storing a program for executing a MOSFET overlap length measuring method for obtaining a MOSFET overlap length from a point where the first capacitance value becomes equal to the first capacitance value.