JPH11154696A - Method of measuring mosfet capacitance - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accurately obtain a fringe capacitance and overlap capacitance, by finding and separating both capacitances from measured values. SOLUTION: A method comprises steps of applying a gate voltage Vg to a gate electrode 103 of an MOSFET 101 with a DC current 106 fed to the electrode 103, connecting a DC current 108 to the drain electrode 104 through a DC ammeter 107 for measuring the drain current Id, applying a drain voltage Vd to measure an Id-Vg characteristic of each gate length L, finding a threshold voltage Vt and mutual inductance gm from the Id-Vg characteristic to compute a transistor gain factor β, measuring a gate capacitance Cg every length L to make a Cg-L characteristic curve, obtaining a fringe capacitance from the intersect of the Cg axis at L=0 on the Cg-L curve, and subtracting the fringe capacitance from the intersect of the Cg axis at β=0 on a Cg-β curve to find an overlap capacitance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for measuring circuit parameters of a MOSFET, and more particularly to a method for measuring an overlap capacitance and a fringe capacitance between a gate and a diffusion layer.

[0002]

2. Description of the Related Art Conventionally, the measurement of the overlap capacitance and the fringe capacitance between a gate and a diffusion layer has been reported in Solid-St.
ate Electronics Vol. 33, N
o. 12, p. As shown in 1650-1652 and 1990, a reverse bias is applied between the diffusion layer and the substrate, the capacitance between the gate and the diffusion layer is measured, and the fringe capacitance is calculated.
The overlap volume was determined by subtracting the fringe volume from the measured value.

Next, a detailed description will be given with reference to FIG. FIG.
(A) is a circuit for measuring a gate and a capacitance between diffusion layers. The capacity measuring device 206 uses HP4275A. MO
In the SFET 201, the gate electrode 203 is connected to the low potential terminal 208 of the capacitance measuring device 206, and the source electrode 20
2 and the drain electrode 204 are connected to the high potential terminal 207 of the capacitance measuring device 206, and the substrate electrode 205 is connected to the ground potential. The capacitance Cgsd between the gate and the diffusion layer is measured while changing the internal DC voltage Vd of the capacitance measuring device. FIG.
As shown in (b), when Vd is increased, Cgsd becomes constant, and the value is read. Next, the fringe capacity Cf
(BSIM3v3 Manual, 19
95, p4-17, UC Berkeley).

Cf = 2εox / π · ln (1 + tpoly / tox) Here, εox is the dielectric constant of the oxide film, tpoly is the gate polysilicon film thickness, and tox is the gate oxide film thickness. Therefore, the overlap capacity Co is determined as follows.

[0005] Co = Cgsd-Cf

[0006]

The first problem is that the formula for calculating the fringe capacitance is applied only when the gate cross-section is rectangular. If the gate shape is not rectangular or the gate oxide film is not uniform, an error may occur. Has the disadvantage of causing

The reason is that the fringe capacitance is calculated by assuming an ideal gate shape.

[0008] It is an object of the present invention to provide a method for accurately measuring the fringe capacitance and the overlap capacitance even when the gate shape is not rectangular or the gate oxide film is not uniform.

[0009]

According to the method for measuring MOSFET capacitance of the present invention, the gate length L formed on the same wafer is determined.
Using a plurality of MOSFETs having different Id-Vd
The characteristics are measured, the transistor gain coefficient β is determined from the threshold voltage Vt and the mutual inductance gm, the gate capacitance Cg of the MOSFET is measured, and the fringe capacitance is determined from the Cg-axis intercept of L = 0 of the Cg-L characteristic to obtain the Cg-β characteristic. The fringe volume is subtracted from the Cg axis intercept at β = 0 to determine the overlap volume.

Further, the relationship between β and L obtained above is plotted, the overlap length ΔL is obtained from the L-axis intercept of β = 0, and the overlap length is obtained from the capacitance value at L = ΔL of the Cg-L characteristic. The overlap volume can also be determined by reducing the fringe volume.

[Operation] According to the MOSFET capacitance measuring method of the present invention, the fringe capacitance is obtained from the intercept of the Cg-L characteristic, so that it can be accurately obtained even when the gate shape is not rectangular or the gate oxide film is not uniform. Can be.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a flowchart of a measuring method according to the present invention. First, a plurality of MOs having different gate lengths L
The Id-Vg characteristics of the SFET are measured. Next, I
Vt and gm are obtained from the d-Vg characteristic, and β is calculated. Next, the gate capacitance is measured for each L and Cg-L characteristics are created. Here, the fringe capacity is obtained from the Cg axis intercept of L = 0 of the Cg-L characteristic. Next, the overlap capacity is obtained by subtracting the fringe capacity from the Cg axis intercept of β = 0 in the Cg-β characteristic.

[0013]

[First Embodiment] FIG. 2 shows a first embodiment of the present invention. FIG. 2A shows a circuit for measuring the Id-Vg characteristic. A DC current 106 is connected to the gate electrode 103 of the MOSFET 101 and the gate voltage Vg is applied. A DC power supply 108 is connected to the drain electrode 104 through a DC ammeter 107 for measuring the drain current Id and the drain voltage Vd is applied. The electrode 105 is connected to a low potential. Here, Id is measured while Vg is continuously changed, and an Id-Vg characteristic as shown in FIG. 2B is measured. A tangent is drawn in the linear region of the Id-Vg characteristic, the threshold voltage Vt is obtained from the intersection of the X axis, and the transconductance gm is obtained from the inclination of the tangent. Using these values, the paper P
rosedings of the 1996 IE
EE International Conference
ce on Microelectronic Tes
t Structures, vol. 9, P139-
The transistor gain coefficient β is obtained by the method of the following equation (1) shown in 144 March 1996.

Β = Id ² / {gm · Vd · (Vg−Vt) ² } (1) These measurements and calculations are performed for each gate length L.

Next, the gate capacitance is measured. FIG.
(C) is a circuit for measuring the Cg-L characteristic. The capacity measuring device 110 uses HP4275A. MOSFET
The high potential terminal 111 of the capacitance measuring device 110 is connected to the gate electrode 103 of 101, and the low potential terminal 112 of the capacitance measuring device 110 is connected to the source electrode 102, the drain electrode 104 and the substrate electrode 105 of the MOSFET 101. In the capacitance measurement, the DC bias of the capacitance measuring device 110 is set to the MOSF so that the MOSFET 101 is sufficiently turned on and becomes saturated.
The power supply voltage is set to about the used power supply voltage of the ET, the gate length is changed, and the measurement is performed, and the Cg-L characteristic as shown in FIG. 2D is measured. From Cg-intercept of L = 0 in this Cg-L characteristic extracting the fringe capacitance Cf _1.

Next, by replacing L in the Cg-L characteristic with β, a Cg-β characteristic as shown in FIG.
The capacitance value Cof ₁ of the Cg axis intercept of 0 is read. Cof ₁
Is the gate capacitance when β = 0, and is the sum of the overlap capacitance Co ₁ and the fringe capacitance Cf ₁ . Therefore, the overlap capacity Co ₁ can be obtained by the following equation (2).

Co ₁ = Cof ₁ −Cf ₁ (2) Further, by using Cof ₁ obtained here, the overlap length ΔL ₁ can also be obtained from FIG. 2D.

[Second Embodiment] FIG. 3 shows a second embodiment of the present invention. ΔL from β-L characteristic L-axis intercept of β-L characteristic
₂ is obtained, the fringe capacitance Cf ₂ is determined from the Cg axis intercept of L = 0 of the Cg-L characteristic, and the overlap capacitance Co ₂ is calculated using the value Cof ₂ of L = ΔL ₂ .

As in the first embodiment, the Id-Vg characteristic is measured, and β is calculated. As shown in FIG.
From L-axis intercept of β = 0 of β-L characteristic, overlap length Δ
Determine the L _2. Next, the Cg-L characteristics were measured in the same manner as in the first embodiment, and as shown in FIG. 3B, the fringe capacitance Cf ₂ was obtained from the Cg axis intercept at L = 0, and L = ΔL ₂ determination of the value Cof _2. Since this Cof ₂ is the sum of the overlap capacitance Co ₂ and the fringe capacitance Cf ₂ , the overlap capacitance Co ₂ can be calculated by the following equation (3).

Co ₂ = Cof ₂ -Cf ₂ (3)

[0021]

The effect of the present invention is as follows. The fringe capacity and the overlap capacity are obtained from the measured values and separated.
It can be obtained accurately even for an arbitrary gate shape. The reason is that the fringe volume is not calculated from the formula,
This is because it is determined from the actually measured value.

[Brief description of the drawings]

FIG. 1 is a measurement flowchart of the present invention.

FIG. 2 is an explanatory diagram of a first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a second embodiment of the present invention.

FIG. 4 is an explanatory diagram of a conventional example.

[Explanation of symbols]

 Reference Signs List 101 MOSFET 102 MOSFET source electrode 103 MOSFET gate electrode 104 MOSFET drain electrode 105 MOSFET substrate electrode 106 Gate voltage (Vg) 107 Drain ammeter (Id) 108 Drain voltage (Vd) 110 Container measuring instrument (HP4275A) 111 Capacitance measurement high potential terminal 112 Capacitance measurement low potential terminal 201 MOSFET 202 MOSFET source electrode 203 MOSFET gate electrode 204 MOSFET drain electrode 205 MOSFET substrate electrode 206 Container measuring instrument (HP4275A) 207 Capacity measurement high potential terminal 208 Capacity measurement low potential terminal

Claims (2)

[Claims] 1. A gate length L formed on the same wafer
Using a plurality of MOSFETs having different Id-Vd
The characteristics are measured, and the threshold voltage Vt and the transconductance gm
From the transistor gain coefficient β,
The Cg-L characteristic is created by measuring the gate capacitance Cg of the Cg-L characteristic, the fringe capacitance is obtained from the Cg-axis intercept of L = 0 of the Cg-L characteristic, and the fringe is obtained from the Cg-axis intercept of β = 0 of the Cg-β characteristic. A method of measuring MOSFET capacitance, characterized in that the capacitance is reduced to obtain an overlap capacitance. 2. The relationship between β and L is plotted, and β = 0
The overlap length ΔL was determined from the L-axis intercept of
2. The MOSFET capacitance measuring method according to claim 1, wherein the fringe capacitance is subtracted from the capacitance value at L = [Delta] L of the -L characteristic to obtain an overlap capacitance.