JPH1090308A - Signal-inputting apparatus of electric measuring apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce costs of parts by sharing a parallel-series conversion circuit when conversion data from respective A/D converters of two input channels are input at the same time to a main body of a measuring apparatus. SOLUTION: The same A/D conversion clock is fed to A/D converters 1A, 1B of input channels A, B. Input signals from the channels A, B are sampled and A/D converted at the same time at the A/D converters 1A, 1B. Output terminals of the A/D converters 1A, 1B are connected to the same parallel-series conversion circuit 11 via output drivers 12A, 12B. An output driver control circuit 13 consisting of a flip-flop circuit alternatively selects the output drivers 12A, 12B upon receipt of a latch clock generated from a latch clock generation circuit 14. Parallel data of the selected input channel A or B are latched to the parallel-series conversion circuit by the latch clock, converted to serial data and sent to a main body of a measuring apparatus.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal input device for an electric measuring instrument, and more particularly, to a parallel input device having two input channels and having A / D converted by the A / D converter at the same time. The present invention relates to a signal input device of an electric measuring instrument which converts data into serial data and takes it into a measuring instrument main body.

[0002]

2. Description of the Related Art Electric measuring instruments such as memory recorders include:
Usually, a plurality of input channels are provided so that, for example, a voltage signal and a current signal can be taken into the measuring instrument body at the same time as the signals to be measured,
FIG. 3 illustrates a case where there are two input channels.

According to this, each of the input channels A and B has A / D converters 1A and 1B, and these are supplied with the same A / D conversion clock. As a result, each of the measured analog signals input from the input channels A and B via the amplifiers 2A and 2B is sampled at the same time by the A / D converters 1A and 1B and A / D converted.

In this case, parallel output type A / D converters 1A and 1B are used, and the respective parallel data are respectively converted into PS (parallel-serial) conversion circuits 3A and 3B.
Is converted into serial data and transferred to, for example, a CPU (Central Processing Unit) in the measuring instrument body.

[0005]

However, in this conventional example, each input channel A, B has a P-S
Since the conversion circuits 3A and 3B are provided, it is not preferable in terms of cost. Further, even if the serial data is transferred to the inside of the measuring instrument main body, there is a problem that the wiring work at the time of assembling becomes complicated because of separate signal lines.

The present invention has been made to solve such a problem, and an object of the present invention is to reduce the cost of parts by sharing a parallel-serial conversion circuit for a plurality of, for example, two input channels. Another object of the present invention is to provide a signal input device of an electric measuring instrument which can simplify wiring work.

[0007]

According to the present invention, there is provided at least two input channels each including a parallel output type A / D converter for converting an analog signal to be measured into digital data, In the signal input device of an electric measuring instrument, the parallel data A / D converted at the same time by the A / D converter of each input channel is converted into serial data and taken into the measuring instrument main body. An output driver control circuit for alternately selecting an output driver connected to the output side of the converter;
A latch clock generation circuit for outputting a latch clock to the output driver control circuit at a predetermined timing after the A / D conversion operation of the D converter, and alternately outputting from each of the A / D converters via the output driver The parallel data is latched by the latch clock and converted into serial data in synchronization with the conversion shift clock, and one parallel-serial conversion circuit and a shift clock supplied to the parallel-serial conversion circuit are counted. And a counter circuit for controlling the latch clock generation circuit. The parallel data A / D converted at the same time by the A / D converter of each input channel is converted into serial data by the one parallel-serial conversion circuit. It is characterized by being converted to.

In this case, the output driver control circuit comprises a flip-flop circuit that operates at the falling edge or the rising edge of the latch clock.
The counter circuit is composed of a 4-bit BCD counter, and when a shift clock corresponding to the number of bits of the parallel data is counted, the latch clock generation signal is supplied from the counter to the latch clock generation circuit.

According to this, a special and expensive circuit element is not required, and the circuit element can be constituted by a circuit element which is generally easily available and relatively inexpensive, so that the cost can be reduced as a whole. Also, only one serial data transfer line is required.
Therefore, the wiring work can be simplified.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment will be described with reference to FIGS. 1 and 2 for better understanding of the technical concept of the present invention.

In each of the input channels A and B, the analog signal to be measured is supplied to the A / A through amplifiers 2A and 2B, respectively.
Points input to the A / D converters 1A and 1B, their A / D
That the converters 1A and 1B are of a parallel output type,
The point that the same A / D conversion clock is supplied to the / D converters 1A and 1B is the same as that of the conventional example of FIG. 3 described above. The parallel-serial conversion circuit 11 is shared.

For this reason, in this embodiment, each A /
The parallel output terminals of the D converters 1A and 1B are connected to the same parallel-serial conversion circuit 11 via output drivers 12A and 12B.
And each of the output drivers 12A, 12A
An output driver control circuit 13 for alternately selecting B is provided. In this case, the output driver control circuit 13 is composed of a flip-flop circuit, one of its Q-bar terminals is connected to, for example, the output driver 12A on the input channel A side, and the other Q terminal is for example, connected to the output driver 12B on the input channel B side. Connected.

The signal input device includes a latch clock generation circuit 14 for supplying a latch clock to the output driver control circuit 13. The latch clock generation circuit 14 monitors the A / D conversion clock and outputs the A / D converter 1
A latch clock is generated at a predetermined timing after A / D conversion of A and 1B, and the predetermined timing is determined by the counter circuit 14a.

In this embodiment, the counter circuit 14a
Comprises a 4-bit BCD counter, which counts shift clocks for the parallel-serial conversion circuit 11. That is, the counter circuit 14a outputs a latch clock generation signal to the latch clock generation circuit 14 when counting the number of shift clocks corresponding to the number of bits of the A / D converted parallel data.

Next, the operation of the signal input device will be described with reference to the timing chart of FIG. First, the analog signals to be measured input from the input channels A and B are simultaneously A / D converted by the A / D converters 1A and 1B.

When the A / D conversion is completed and the A / D conversion clock changes from low to high (see FIG. 2B),
A latch clock is generated from the latch clock generation circuit 14 (see FIG. 2C). Output driver control circuit 13
Receives the latch clock and outputs the output driver 12A,
12B, but in this example,
The output driver control circuit 13 outputs the A / D conversion clock Lo.
Initialized during the period w, the output driver 12A on the input channel A side is selected at the first falling edge of the latch clock (see FIG. 2 (f)).

At the rising edge of the latch clock, the parallel data on the input channel A side is latched by the parallel-serial conversion circuit 11 (see FIG. 2D), and the conversion shift clock (see FIG. 2A). ) Is converted into serial data in synchronization with () (see FIG. 2 (e)) and sent to, for example, a CPU of a measuring instrument main body (not shown).

The count of the shift clock is started by the counter circuit 14a in synchronization with the first falling edge of the latch clock. In this example,
The analog signal to be measured is converted to 16-bit parallel data by A
/ D conversion, when the counter circuit 14a counts 16 cycles of the shift clock, the counter circuit 14a
a outputs a latch clock generation signal.

Thus, the latch clock generation circuit 14
, A second latch clock is generated, and the falling edge of the second latch clock causes the Q terminal of the output driver
Hi and Low of the bar terminals are inverted, and the output driver 12B on the input channel B side is selected this time (FIG. 2 (g)).
reference).

At the rising edge of the latch clock, the parallel data on the input channel B side is latched by the parallel-serial conversion circuit 11 and converted into serial data in synchronization with the shift clock for conversion. The serial data of the channel B is followed by the serial data of the input channel A, for example, C
Sent to PU.

The above operation is repeated each time the analog signals to be measured of the input channels A and B are A / D converted by the A / D converters 1A and 1B at the same time. In the above embodiment, a flip-flop circuit is used for the output driver control circuit 13, and the counter circuit 14a is a 4-bit BCD counter. However, the present invention is not limited to these. In the above embodiment, the input channels are A and B.
However, the present invention is also applicable to a case where the number of input channels is larger than the above.

[0022]

As described above, according to the present invention,
At least two units each including a parallel output type A / D converter for converting an analog signal to be measured into digital data.
With two input channels, A of each input channel
The parallel / serial conversion circuit can be shared for each input channel when the parallel data that has been A / D converted at the same time by the / D converter is converted into serial data and taken into the measuring instrument body. In addition, the component cost can be further reduced, and the component mounting space of the circuit board can be reduced. Also, only one wire is required to be drawn into the measuring instrument main body, so that the wiring work at the time of assembly is simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the embodiment.

FIG. 3 is a block diagram showing a conventional example.

[Explanation of symbols]

 1A, 1B A / D converter 11 Parallel-serial conversion circuit 12A, 12B Output driver 13 Output driver control circuit 14 Latch clock generation circuit 14a Counter circuit

Claims (3)

[Claims] An input / output converter includes at least two input channels each including a parallel output type A / D converter for converting an analog signal to be measured into digital data. In a signal input device of an electric measuring instrument which converts A / D converted parallel data into serial data and takes it into a measuring instrument main body, an output driver connected to an output side of each of the A / D converters is alternately changed. The output driver control circuit to be selected and each of the A /
A latch clock generation circuit for outputting a latch clock to the output driver control circuit at a predetermined timing after the A / D conversion operation of the D converter, and alternately outputting from each of the A / D converters via the output driver The parallel data is latched by the latch clock and converted into serial data in synchronization with the conversion shift clock, and one parallel-serial conversion circuit and a shift clock supplied to the parallel-serial conversion circuit are counted. And a counter circuit for controlling the latch clock generation circuit. The parallel data A / D converted at the same time by the A / D converter of each input channel is converted into serial data by the one parallel-serial conversion circuit. A signal input device for an electric measuring device, wherein the signal is converted into a signal. 2. The signal input device of an electric measuring instrument according to claim 1, wherein said output driver control circuit comprises a flip-flop circuit which operates at a falling edge or a rising edge of said latch clock. 3. The latch circuit according to claim 1, wherein the counter circuit comprises a 4-bit BCD counter, and when a shift clock corresponding to the number of bits of the parallel data is counted, a latch clock generation signal is supplied from the counter to the latch clock generation circuit. Item 2. A signal input device for an electric measuring instrument according to Item 1.